JP2002325459A - Pulse width modulation signal generator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To set an upper/lower limit value of duty cycle of pulse width modulation, without checking the value set in a register by a software without using a separate hardware, in a pulse width modulation signal generator circuit. SOLUTION: A pulse width modulation signal generator circuit 15, a setting means for setting a maximum/minimum value duty cycle, and a CPU12 having an instruction for transfer of a duty set value, are provided. When the duty cycle set value is transferred from the CPU12 in the case of this set value larger the maximum value set in the setting means, this maximum value is transferred, the duty cycle width of a pulse width modulation output is controlled to a value or less set in the setting means. Further, when the duty set value is transferred from the CPU12, in the case of its set value smaller than the minimum value set in the setting means, this minimum value is transferred, and the duty cycle width of the pulse width modulation output is controlled to a value or larger, set in the setting means.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pulse width modulation signal generator, and more particularly, to a pulse width modulation signal in a semiconductor device such as a microcomputer capable of generating a pulse width modulation signal for use in motor control, inverter control and the like. It relates to a generating device.

[0002]

2. Description of the Related Art A pulse signal called a PWM (Pulse Width Modulation) signal is used for controlling a motor or an inverter. This P
In order to generate a WM signal, a microcomputer having a configuration as shown in FIG. * Conventional technology (PWM generation method) In FIG. 5, reference numeral 51 denotes a hardware unit of a one-chip microcomputer for generating a PWM signal.
52, a PWM signal generation circuit 53, and the like. CPU
52 includes an instruction set 54 as a software unit. The instruction set 54 includes a data transfer instruction 55 in addition to a normal arithmetic operation instruction and a logical operation instruction.

FIG. 6 shows a detailed structure of the PWM signal generation circuit 53 in FIG. Here, 56 is a counter, 57,
58 is a comparator, 59 is a cycle setting register, 60 is a duty setting register, and 61 is a flip-flop circuit. Although not shown, the PWM signal generation circuit 53 includes a compare register for setting the duty ratio of the PWM signal. The counter 56 and the compare register are composed of registers having a fixed bit width such as 8 bits or 16 bits.

[0006] The counter 56 shown in FIG. 6 counts up every clock. The comparator 57 compares the counter value with the compare register value, and when the respective values match as shown in FIG. 7, the output signal is inverted. When the counter value overflows, the comparator 5
7, the output signal is reset. A PWM signal is generated by a sequence of these operations.

When the PWM signal is used for control, the control is performed by changing the ratio (duty) of the pulse at the Hi level according to the state of the control target.

In the configuration of FIG. 6, the duty of the output PWM is determined by setting the value of the compare register. Various configurations are known as the PWM signal generation circuit 53 (FIG. 5) capable of generating a PWM signal in a microcomputer, and the configuration in FIG. 6 is an example. However, in either case, the point that the value of the control register is changed by the data transfer instruction 55 from the CPU 52 and the point that the duty of the PWM is changed by comparing the counter 56 with a certain set value are common. . * Conventional technology (control method using PWM signal) When performing motor control or inverter control using the PWM signal generation circuit 53, the PWM carrier and duty are determined by the values of the respective control registers. When a value is set in the control register, a PWM signal having the carrier and duty as set is generated.

The setting of the value in the control register is performed by the CPU 52.
This is performed by a data transfer instruction 55 from. The value to be set is calculated by software, and the calculated value is transferred to the control register by the data transfer instruction 55, and is set in the control register.

[0008]

The duty to be controlled is limited by the PWM duty depending on the hardware characteristics and the control algorithm. For example, when performing motor control, if the PWM duty is too large, the ON period of the transistor becomes longer and a large amount of current flows, which may lead to destruction of hardware to be controlled such as a motor. Conversely, if the duty of the PWM is too small, the period during which the transistor is ON becomes very short. Then, the transistor is turned off before it is completely turned on, which may lead to destruction of the transistor.

For this reason, after the setting value for the compare register is obtained by the control operation, the duty for setting the compare register is not lower than the lower limit required for the control target and is higher than the upper limit. You need to make sure that there are no. * Conventional Solution 1 As a solution to the above problem, there is a method of limiting the value by software as shown in FIG. In the processing of the conventional software based on the flow of FIG.
After determining the set value in step S8, it is determined whether the value is within the range determined by the PWM signal generation circuit in processing step S8.
2. Check with the comparison instruction in S83. If the value is outside the range determined by the PWM signal generation circuit 53, the set value is rewritten to a value within the range in processing steps S84 and S85, and thereafter, the CPU issues a transfer instruction (mov).
From to the register. Conversely, if the value is within the range, the processing is performed with the value as it is in the processing step S86.

However, in this case, software processing time is required to keep the duty at a specified value. When a PWM signal is used for motor control or inverter control, the duty of PWM is set to P as shown in FIG.
It is updated for each WM carrier. Therefore, the duty set value must be calculated within the PWM carrier cycle, and the processing time of the software needs to be as short as possible. If this countermeasure is performed by software, there is a problem that the processing amount of the software increases. * Conventional solution 2 As means for solving such a problem, Japanese Patent Application Laid-Open No. 6-83
As described in Japanese Patent No. 985, there is a method in which a register for setting an upper limit value and a lower limit value is provided in the PWM signal generation circuit unit. In this method, the duty of the PWM can be limited without increasing the processing amount of software as shown in FIG.

However, many different circuit configurations are generally considered as the configuration of the PWM output circuit. For example, as shown in FIG.
When the duty limiting circuit 65A is newly designed and added to the PWM signal generating circuit 53A in the 1A circuit, the duty control is performed on the different PWM signal generating circuits 53B of the different hardware units 51B as shown in FIG. At times, the duty limiting circuit 65A created in FIG. 10A cannot be used as it is. For this reason, it is necessary to newly design a duty limit circuit 65B dedicated to the PWM signal generation circuit 53B.

Therefore, when the duty is limited by such a method, it is necessary to redesign the circuit for each PWM output circuit, so that the number of design steps is increased and there is a problem that there is no versatility. .

Therefore, the present invention solves such a problem, and does not check the value set in the register by software or use another hardware.
It is an object of the present invention to be able to set an upper limit value and a lower limit value of a PWM duty.

[0014]

To achieve the above object, according to the present invention, there is provided a pulse width modulation signal generation apparatus comprising: a pulse width modulation signal generation circuit; and a setting means for setting a maximum value of a duty. And a CPU having an instruction to transfer a duty set value.
If the set value is larger than the maximum value set by the setting means when transferring the duty set value from the above, the maximum value is transferred and the duty width of the pulse width modulation output is set by the setting means. It is controlled to be less than the value.

According to a second aspect of the present invention, in the pulse width modulation signal generating apparatus, the setting means has a dedicated register for setting a maximum value. A pulse width modulation signal generating apparatus according to a third aspect of the present invention provides a pulse width modulation signal generating circuit, a setting means for setting a minimum value of a duty, and a CPU having an instruction for transferring a duty set value.
When the duty set value is transferred from the CPU, if the set value is smaller than the minimum value set by the setting means, the minimum value is transferred and the duty width of the pulse width modulation output is transferred. Is controlled to be equal to or more than the value set by the setting means.

According to a fourth aspect of the present invention, in the pulse width modulation signal generating apparatus, the setting means has a dedicated register for setting a minimum value. A pulse width modulation signal generating apparatus according to a fifth aspect of the present invention includes a pulse width modulation signal generating circuit, a setting unit for setting a maximum value and a minimum value of a duty, and a CPU having an instruction for transferring the duty set value. When the duty set value is transferred from the CPU, if the set value is larger than the maximum value set by the setting means, the maximum value is transferred and the duty width of the pulse width modulation output is transferred. Is controlled to be equal to or less than the value set by the setting means, and when the duty set value is transferred from the CPU, if the set value is smaller than the minimum value set by the setting means, the minimum value is transferred. Then, the duty width of the pulse width modulation output is controlled to be equal to or greater than the value set by the setting means.

According to a sixth aspect of the present invention, in the pulse width modulation signal generating apparatus of the present invention, the setting means has a dedicated register for setting a maximum value and a minimum value.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG.
This will be described with reference to FIG. 1 includes a CPU 12, a ROM 13, a RAM 14, a PW
It comprises an M signal generation circuit 15, a serial 16, an A / D 17, a timer 18, and other peripheral circuits. The duty ratio of the PWM waveform generated by the PWM signal generation circuit 15 is
It is determined by a value transferred from the CPU 12.

The microcomputer 11 shown in FIG.
When a value is transferred to a register for setting a duty ratio of a PWM waveform generated by the PWM signal generation circuit 15, the register has a function of transferring a value within the set maximum value and minimum value range. That is, in the microcomputer 11, reference numeral 20 denotes an instruction set.
Includes a restricted data transfer 21.

FIG. 2 shows an example in which the maximum value is set to "90" by the maximum value setting means and the minimum value is set to "10" by the minimum value setting means. Among them, the maximum value will be described. In the prior art shown in FIG. 9A, if the instruction of the data transfer instruction mov95, (PWMREG) is described, the CPU 12 transfers the value “95” directly to the PWMREG (PWM dedicated register). Written. On the other hand, in the microcomputer 11 according to the embodiment of the present invention, in addition to the conventional data transfer command, the CPU 12 sends a transfer command (movlim) for limiting the upper limit value to the CPU 12.
have. After using this transfer instruction, movl
im95, (PWMREG), since the upper limit is set to “90” as described above,
Are transferred to PWMREG. in short,
When the maximum value is set to “90” as described above, the CPU 1
Even if a value larger than "90" of "95" is written by the register transfer instruction (movlim) provided in 2, the maximum value "90" is transferred as the duty ratio of the PWM waveform. As a result, the upper limit of the PWM duty can be limited without software or external hardware.

Next, the minimum value will be described with reference to FIG. In the prior art shown in FIG. 1A, when a data transfer instruction mov5, (PWMREG) is described, the CPU 12 outputs the value “5” as it is to the PWM.
Written to REG. On the other hand, in the microcomputer 11 according to the embodiment of the present invention, the CPU 12 has a transfer command (movlim) for limiting the lower limit in addition to the conventional data transfer command. After using this transfer instruction, as shown in FIG.
In the case where (PWMREG) is described, when the lower limit value is set to “10”, “10” is transferred from the CPU 12 to PWMREG. In short, when the minimum value is set to "10", even if a value smaller than "10" of "5" is written by a register transfer instruction (movlim) provided in the CPU 12, the minimum value is "1".
"0" is transferred as the duty ratio of the PWM waveform. As a result, the lower limit of the PWM duty can be limited without software or external hardware.

Therefore, by setting both the maximum value and the minimum value, as shown in FIG. 4, the upper and lower limits of the PWM duty can be limited without software or external hardware. . 4A shows a conventional technique, and FIG. 4B shows an embodiment of the present invention.

As shown in FIG. 8, in the conventional software processing, in order to limit the value to be transferred to the register, it is necessary to monitor the upper and lower limits by a software comparison instruction before the register transfer instruction. If a CPU instruction is provided, a value within a preset upper limit value or lower limit value range can be transferred to the register by one instruction (movlim). For this reason, the software processing can be simplified, and values within the limit range can be reliably transferred. Therefore, a malfunction when the PWM signal generation circuit 15 transfers a value out of the standard can be prevented, which leads to protection of hardware. Also CPU
Since the value can be limited at 12, the PWM signal generation circuit 15 external to the CPU does not need to design a circuit for limiting the duty width according to the configuration, and is uniformly effective for various configurations of the PWM signal generation circuit. is there. Also, when the value needs to be limited, such as setting of a timer or a serial other than the PWM signal generation circuit, the CPU 12 limits the upper limit of the timer setting value and the upper limit of transmission data in serial communication. be able to. Therefore, as in the case of the PWM signal generation circuit 15, a circuit for limiting the value outside the CPU 12 is not required, and the present invention is also effective for hardware other than the PWM signal generation circuit 15.

[0024]

As described above, according to the present invention, P
Since the maximum value and the minimum value of the WM signal are limited and the value within the limited range can be transferred by the instruction of the CPU, the duty ratio data of the PWM signal calculated by the arithmetic processing is required in the system. The limited value can be written to the register without monitoring by program processing whether the duty is within the duty of the PWM signal. As a result, the PWM duty can be limited and hardware such as a transistor and a motor can be protected without burdening software or adding hardware. In addition, by providing instructions inside the CPU, C
There is no need for a circuit outside the PU, and there is versatility other than the PWM output circuit.

[Brief description of the drawings]

FIG. 1 is a diagram showing a schematic configuration of a pulse width modulation signal generation device according to an embodiment of the present invention.

FIG. 2 is a diagram showing an example of the operation of the pulse width modulation signal generation device of FIG.

FIG. 3 is a diagram showing an example of the operation of the pulse width modulation signal generator of FIG. 1;

FIG. 4 is a diagram showing an example of the operation of the pulse width modulation signal generation device of FIG. 1;

FIG. 5 is a diagram showing a schematic configuration of a conventional pulse width modulation signal generation device.

6 is a diagram illustrating a PW in the pulse width modulation signal generation device of FIG. 5;
The figure which shows the structure of an M signal generation circuit

FIG. 7 is a diagram showing an operation example of the pulse width modulation signal generation device of FIG. 6;

FIG. 8 is a diagram showing an example of conventional problem solving means.

FIG. 9 is a diagram showing an operation example of the problem solving means of FIG. 8;

FIG. 10 is a diagram showing another example of the conventional problem solving means.

[Explanation of symbols]

 11 microcomputer 12 CPU 15 PWM signal generation circuit

Claims (6)

[Claims] 1. A pulse width modulation signal generating circuit, setting means for setting a maximum value of a duty, and a CPU having an instruction for transferring a duty set value, and transferring a duty set value from the CPU. If the set value is larger than the maximum value set by the setting means, the maximum value is transferred, and the duty width of the pulse width modulation output is controlled to be equal to or less than the value set by the setting means. Pulse width modulation signal generator. 2. The pulse width modulation signal generating apparatus according to claim 1, wherein said setting means has a dedicated register for setting a maximum value. 3. A pulse width modulation signal generating circuit, setting means for setting a minimum value of duty, and a CPU having an instruction for transferring a duty set value, and transferring the duty set value from the CPU. When the set value is smaller than the minimum value set by the setting means, the minimum value is transferred, and the duty width of the pulse width modulation output is controlled to be equal to or more than the value set by the setting means. Pulse width modulation signal generator. 4. The pulse width modulation signal generating apparatus according to claim 3, wherein said setting means has a dedicated register for setting a minimum value. 5. A pulse width modulation signal generating circuit, setting means for setting a maximum value and a minimum value of a duty, and a CPU having an instruction for transferring a duty set value, wherein the CPU has a duty set value If the set value is larger than the maximum value set by the setting means when transferring, the maximum value is transferred, and the duty width of the pulse width modulation output is controlled to be equal to or less than the value set by the setting means. When transferring the duty set value from the CPU, if the set value is smaller than the minimum value set by the setting means, the minimum value is transferred to change the duty width of the pulse width modulation output to A pulse width modulation signal generation device configured to control the value to be equal to or more than a value set by a setting unit. 6. The pulse width modulation signal generator according to claim 5, wherein the setting means has a dedicated register for setting a maximum value and a minimum value.