CN103490656B - Based on the carrier modulating method of four electrical level inverter topological structures of H bridge - Google Patents
Based on the carrier modulating method of four electrical level inverter topological structures of H bridge Download PDFInfo
- Publication number
- CN103490656B CN103490656B CN201310469744.3A CN201310469744A CN103490656B CN 103490656 B CN103490656 B CN 103490656B CN 201310469744 A CN201310469744 A CN 201310469744A CN 103490656 B CN103490656 B CN 103490656B
- Authority
- CN
- China
- Prior art keywords
- bridge
- diodes
- derided capacitors
- switching tubes
- electrical level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
Based on the carrier modulating method of four electrical level inverter topological structures of H bridge, relate to the carrier modulating method of four electrical level inverter topological structures based on H bridge and topological structure.Solve existing inverter topology because number of devices is many and the carrier modulating method of four electrical level inverter topological structures complicated, cause the problem that structural stability is low.This topological structure comprises DC side, switch combination circuit and inverter side, and DC side is connected by switch combination circuit with inverter side.The carrier modulating method of this topological structure is: first that three frequencies is the identical and triangular wave carrier that amplitude is equal compares with a baseline sinusoidal wave respectively, obtains three pulse signal A
1, B
1and C
1; Then baseline sinusoidal wave is direct and no-voltage compares and obtains pulse signal D
1; Finally by pulse signal A
1, B
1, C
1and D
1calculate acquisition eight pulse signals by gate, these eight pulse signals control conducting and the disconnection of eight switching tubes respectively.The present invention is applicable to the high-power field of mesohigh.
Description
Technical field
The present invention relates to the carrier modulating method of the four electrical level inverter topological structures based on H bridge and the four electrical level inverter topological structures based on H bridge.
Background technology
Relative to two-level inverter, multi-electrical level inverter has that device voltage stress is low, output voltage closer to sinusoidal wave, voltage total harmonic distortion factor (THD) switching loss that is low, device is little, power transmission efficiency is high, system electromagnetic interference (electromagnetic interference, EMI) advantage such as little, becomes a focus of research at mesohigh high-power applications field multi-level power converter.Basic many level topological structure has been summed up 3 kinds: H bridge cascade connection type, diode clamp type and striding capacitance type.Each module of H bridge cascade connection type has an independently DC power supply, and system cost is high, the large and difficult design of volume; In striding capacitance type topological structure, each phase brachium pontis all needs cross-over connection electric capacity, and switching loss is larger; Wherein diode clamp type (neutral point clamped, NPC) multi-electrical level inverter is simple due to structure, is used widely without the need to complex transformer.The high voltage of DC side is divided into a series of lower level voltage by the diode of series connection by it, realizes high level output with low-voltage device.At present, conventional single phase multilevel inverter mainly single-phase neutral-point-clamped voltage-source type three-level inverter, as shown in Figure 4, it is combined by a three level brachium pontis and two level brachium pontis, realize three level through diode clamp to export, single-phase five level proposed afterwards, single-phase seven level are all increase clamp diode and the realization of electric capacity number on this basis, shown in Fig. 5 is diode clamp type five-electrical level inverter topological structure circuit theory diagrams, can find out, along with level number increases, needed for it, clamp diode number one-tenth is accompanied and is increased, add system cost and control complexity, in addition, a large amount of devices reduces the reliability of inverter, thus limit the application of multi-electrical level inverter technology.
Summary of the invention
The present invention is in order to solve existing inverter topology because number of devices is many and the carrier modulating method of four electrical level inverter topological structures complicated, cause the problem that structural stability is low, propose the carrier modulating method of the four electrical level inverter topological structures based on H bridge.
Based on the carrier modulating method of four electrical level inverter topological structures of H bridge, it realizes based on the following four electrical level inverter topological structures based on H bridge:
The described four electrical level inverter topological structures based on H bridge comprise DC side, switch combination circuit and inverter side, described DC side comprises DC power supply E, derided capacitors C1, No. two derided capacitors C2 and No. three derided capacitors C3, derided capacitors C1, No. two derided capacitors C2 are identical with the parameter of No. three derided capacitors C3, derided capacitors C1, No. two derided capacitors C2 and No. three derided capacitors C3 are connected in parallel on the output of DC power supply E after being sequentially connected in series, power source combination after parallel connection provides DC power supply for inverter side, and the output voltage of DC power supply E is V
ininverter side is H-bridge circuit structure, switch combination circuit comprises a switch combination and No. two switch combinations, a derided capacitors C1 is connected by the voltage output end of No. two switch combinations with the H bridge of inverter side by the tie point of a switch combination and No. two derided capacitors C2 and No. three derided capacitors C3 with the tie point of No. two derided capacitors C2
Described carrier modulating method is realized by following steps:
Step one, by three frequencies, the identical and triangular wave carrier that amplitude is equal compares with a baseline sinusoidal wave respectively, obtains three pulse signal A
1, B
1and C
1, the frequency modulating signal of described baseline sinusoidal wave is 50Hz, and triangular wave carrier frequency is the integral multiple of the frequency modulating signal of baseline sinusoidal wave;
Step 2, by the baseline sinusoidal wave in step one directly and no-voltage compare and obtain pulse signal D
1;
Step 3, the pulse signal A will obtained in step one and step 2
1, B
1, C
1and D
1calculate acquisition eight pulse signals by gate, these eight pulse signals control conducting and the disconnection of eight switching tubes respectively.
Beneficial effect: the inverter topology in the present invention eliminates clamp diode conventional in conventional inverter topological structure, the number of devices of topological structure is greatly reduced, reduces cost of manufacture; Simultaneously, after being compared by all identical triangular wave carrier of three frequencies, amplitude and a baseline sinusoidal wave for the carrier modulating method of inverter topology of the present invention, calculate can realize by gate, very easy, make the stability of topological structure improve more than 5%.
Accompanying drawing explanation
Fig. 1 is the circuit structure schematic diagram of the four electrical level inverter topological structures based on H bridge;
Fig. 2 is the flow chart of the carrier modulating method of four electrical level inverter topological structures based on H bridge;
Fig. 3 is the identical and schematic diagram of the triangular wave carrier that amplitude is equal, a baseline sinusoidal wave and four pulse signals for three frequencies described in embodiment two;
Fig. 4 is the circuit structure schematic diagram of traditional single-phase three-level inverter topological structure;
Fig. 5 is the circuit structure schematic diagram of diode clamp type five-electrical level inverter topological structure.
Embodiment
Embodiment one, composition graphs 1 illustrates this embodiment, based on four electrical level inverter topological structures of H bridge, it comprises DC side, switch combination circuit and inverter side, described DC side comprises DC power supply E, a derided capacitors C1, No. two derided capacitors C2 and No. three derided capacitors C3, a derided capacitors C1, No. two derided capacitors C2 are identical with the parameter of No. three derided capacitors C3, a derided capacitors C1, the output of DC power supply E is connected in parallel on after No. two derided capacitors C2 and No. three derided capacitors C3 are sequentially connected in series, power source combination after parallel connection provides DC power supply for inverter side, the output voltage of DC power supply E is V
ininverter side is H-bridge circuit structure, switch combination circuit comprises a switch combination and No. two switch combinations, a derided capacitors C1 is connected with a voltage output end of inverter side H bridge by a switch combination with the tie point of No. two derided capacitors C2, and No. two derided capacitors C2 are connected by No. two switch combinations another voltage output end with the H bridge of inverter side with the tie point of No. three derided capacitors C3.
The output voltage of the DC power supply E in present embodiment is V
in, and derided capacitors C1, No. two derided capacitors C2 are identical with the model of No. three derided capacitors C3, the voltage of each derided capacitors both sides is V
in/ 3.
Embodiment two, composition graphs 1 illustrate this embodiment, this embodiment is with the difference of the four electrical level inverter topological structures based on H bridge described in embodiment one, a switch combination of described switch combination circuit is identical with the structure of No. two switch combinations, a wherein said switch combination comprises No. five switching tube S5, No. six switching tube S6, No. five diode D5 and No. six diode D6
The negative pole of described No. five diode D5 is connected with the tie point of No. two derided capacitors C2 with the collector electrode of No. five switching tube S5 and a derided capacitors C1 as one end of the combination of this switch simultaneously, the positive pole of described No. five diode D5 is connected with the collector electrode of the emitter of No. five switching tube S5, the positive pole of No. six diode D6 and No. six switching tube S6 simultaneously, is connected the while of the other end as the combination of this switch of the negative pole of No. six diode D6 with a voltage output end of the emitter of No. six switching tube S6 and the H bridge of inverter side.
Embodiment three, composition graphs 1 illustrate this embodiment, this embodiment is with the difference of the four electrical level inverter topological structures based on H bridge described in embodiment two, described inverter side H bridge comprises a switching tube S1, No. two switching tube S2, No. three switching tube S3, No. four switching tube S4, diode D1, No. two diode D2, No. three diode D3, No. four diode D4, resistance R and inductance L
One end of described resistance R is connected with the other end of the collector electrode of the positive pole of the emitter of a switching tube S1, a diode D1, No. two switching tube S2, the combination of No. two diode D2 and No. one switches simultaneously, and the other end of resistance R is connected with one end of inductance L,
The other end of inductance L is connected with the negative pole of the positive pole of the emitter of No. three switching tube S3, No. three diode D3, the collector electrode of No. four switching tube S4 and No. four diode D4 as another voltage output end of inverter side H bridge simultaneously,
The collector electrode of a switching tube S1 is connected with the collector electrode of the negative pole of a diode D1, No. three switching tube S3, the negative pole of No. three diode D3 and the positive pole of DC power supply E simultaneously,
The emitter of No. two switching tube S2 is connected with the emitter of the positive pole of No. two diode D2, No. four switching tube S4, the positive pole of No. four diode D4 and the negative pole of DC power supply E simultaneously.
Inverter topology DC side of the present invention adopts three direct voltage sources of connecting, whole topological structure is without any need for clamp diode, enormously simplify the topological structure of inverter, reduce cost, also improve the reliability of inverter work simultaneously.
If the output voltage between two brachium pontis is V
0, then output voltage V
0total ± V
in, ± V
in/ 3, ± 2V
in/ 3, ± 0 eight kind of level, output voltage V
0with the pass of the situation of opening of switching tube be:
Embodiment four, composition graphs 2 and Fig. 3 illustrate this embodiment, the carrier modulating method of the four electrical level inverter topological structures based on H bridge described in embodiment three, and it is realized by following steps:
Step one, by three frequencies, the identical and triangular wave carrier that amplitude is equal compares with a baseline sinusoidal wave respectively, obtains three pulse signal A
1, B
1and C
1, the frequency modulating signal of described baseline sinusoidal wave is 50Hz, and triangular wave carrier frequency is the integral multiple of the frequency modulating signal of baseline sinusoidal wave;
Step 2, by the baseline sinusoidal wave in step one directly and no-voltage compare and obtain pulse signal D
1;
Step 3, the pulse signal A will obtained in step one and step 2
1, B
1, C
1and D
1calculate acquisition eight pulse signals by gate, these eight pulse signals control conducting and the disconnection of eight switching tubes respectively.
Triangular wave carrier frequency described in present embodiment is the integral multiple of the frequency modulating signal of baseline sinusoidal wave, such as, triangular wave carrier frequency can be 500Hz or 5kHz etc., the amplitude of described three triangular wave carriers is 1/3, the reference voltage being in nethermost triangular wave carrier is 0, the reference voltage of the triangular wave carrier mediated is 1/3, and the reference voltage being in uppermost triangular wave carrier is 2/3, and the voltage magnitude of baseline sinusoidal wave is 0.85.
The difference of the carrier modulating method of the four electrical level inverter topological structures based on H bridge described in embodiment five, this embodiment and embodiment four is, the pulse signal A described in step 3
1, B
1, C
1and D
1calculate acquisition eight pulse signals by gate, and eight switching tubes that these eight pulse signal correspondences control with the pass of the output level state of inverter side H bridge corresponding during each switching tube conducting are:
Claims (4)
1., based on the carrier modulating method of four electrical level inverter topological structures of H bridge, it realizes based on the following four electrical level inverter topological structures based on H bridge:
The described four electrical level inverter topological structures based on H bridge comprise DC side, switch combination circuit and inverter side, described DC side comprises DC power supply (E), a derided capacitors (C1), No. two derided capacitors (C2) and No. three derided capacitors (C3), a derided capacitors (C1), No. two derided capacitors (C2) are identical with the parameter of No. three derided capacitors (C3), a derided capacitors (C1), the output of DC power supply (E) is connected in parallel on after No. two derided capacitors (C2) and No. three derided capacitors (C3) are sequentially connected in series, power source combination after parallel connection provides DC power supply for inverter side, the output voltage of DC power supply (E) is V
ininverter side is H-bridge circuit structure, switch combination circuit comprises a switch combination and No. two switch combinations, a derided capacitors (C1) is connected by the voltage output end of No. two switch combinations with the H bridge of inverter side by the tie point of a switch combination and No. two derided capacitors (C2) and No. three derided capacitors (C3) with the tie point of No. two derided capacitors (C2)
It is characterized in that, described carrier modulating method is realized by following steps:
Step one, by three frequencies, the identical and triangular wave carrier that amplitude is equal compares with a baseline sinusoidal wave respectively, obtains three pulse signal A
1, B
1and C
1, the frequency modulating signal of described baseline sinusoidal wave is 50Hz, and triangular wave carrier frequency is the integral multiple of the frequency modulating signal of baseline sinusoidal wave;
Step 2, by the baseline sinusoidal wave in step one directly and no-voltage compare and obtain pulse signal D
1;
Step 3, the pulse signal A will obtained in step one and step 2
1, B
1, C
1and D
1calculate acquisition eight pulse signals by gate, these eight pulse signals control conducting and the disconnection of eight switching tubes respectively.
2. the carrier modulating method of the four electrical level inverter topological structures based on H bridge according to claim 1, is characterized in that, the pulse signal A described in step 3
1, B
1, C
1and D
1calculate acquisition eight pulse signals by gate, the pass between these eight pulse signals with corresponding eight switching tubes controlled is:
。
3. the carrier modulating method of the four electrical level inverter topological structures based on H bridge according to claim 1, it is characterized in that, a switch combination of described switch combination circuit is identical with the structure of No. two switch combinations, a wherein said switch combination comprises No. five switching tubes (S5), No. six switching tubes (S6), No. five diodes (D5) and No. six diodes (D6)
The negative pole of described No. five diodes (D5) is connected with the tie point of No. two derided capacitors (C2) with the collector electrode of No. five switching tubes (S5) and a derided capacitors (C1) as one end of the combination of this switch simultaneously, the positive pole of described No. five diodes (D5) simultaneously with the emitter of No. five switching tubes (S5), the positive pole of No. six diodes (D6) is connected with the collector electrode of No. six switching tubes (S6), the negative pole of No. six diodes (D6) is connected with a voltage output end of the emitter of No. six switching tubes (S6) and the H bridge of inverter side as the other end of the combination of this switch simultaneously.
4. the carrier modulating method of the four electrical level inverter topological structures based on H bridge according to claim 3, it is characterized in that, described inverter side H bridge comprises a switching tube (S1), No. two switching tubes (S2), No. three switching tubes (S3), No. four switching tubes (S4), a diode (D1), No. two diodes (D2), No. three diodes (D3), No. four diodes (D4), resistance (R) and inductance (L)
One end of described resistance (R) is connected with the other end of the combination of the collector electrode of the positive pole of the emitter of a switching tube (S1), a diode (D1), No. two switching tubes (S2), No. two diodes (D2) and a switch simultaneously, the other end of resistance (R) is connected with one end of inductance (L)
The other end of inductance (L) is connected with the negative pole of the positive pole of the emitter of No. three switching tubes (S3), No. three diodes (D3), the collector electrode of No. four switching tubes (S4) and No. four diodes (D4) as another voltage output end of inverter side H bridge simultaneously
The collector electrode of a switching tube (S1) is connected with the positive pole of the collector electrode of the negative pole of a diode (D1), No. three switching tubes (S3), the negative pole of No. three diodes (D3) and DC power supply (E) simultaneously
The emitter of No. two switching tubes (S2) is connected with the negative pole of the emitter of the positive pole of No. two diodes (D2), No. four switching tubes (S4), the positive pole of No. four diodes (D4) and DC power supply (E) simultaneously.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310469744.3A CN103490656B (en) | 2013-10-10 | 2013-10-10 | Based on the carrier modulating method of four electrical level inverter topological structures of H bridge |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310469744.3A CN103490656B (en) | 2013-10-10 | 2013-10-10 | Based on the carrier modulating method of four electrical level inverter topological structures of H bridge |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103490656A CN103490656A (en) | 2014-01-01 |
| CN103490656B true CN103490656B (en) | 2015-09-09 |
Family
ID=49830667
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310469744.3A Active CN103490656B (en) | 2013-10-10 | 2013-10-10 | Based on the carrier modulating method of four electrical level inverter topological structures of H bridge |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103490656B (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105827129B (en) * | 2015-01-04 | 2020-06-02 | 华为技术有限公司 | Circuit and power converter with multi-level topology |
| CN106208894B (en) * | 2016-08-24 | 2019-01-04 | 清华大学 | A kind of polyphase machine drive system |
| CN106533217B (en) * | 2016-12-28 | 2019-03-15 | 北京天诚同创电气有限公司 | Rectifier, rectification circuit and its control method |
| CN107994794B (en) * | 2017-12-29 | 2019-11-08 | 重庆大学 | The double-T shaped four level inverse conversions unit of one kind and its application circuit and modulator approach |
| CN108667321B (en) * | 2018-04-27 | 2020-07-07 | 重庆大学 | Hybrid four-level rectifier |
| CN108923675B (en) * | 2018-07-30 | 2020-08-07 | 安徽大学 | Seven-level frequency converter power conversion circuit |
| CN110098755B (en) * | 2019-05-28 | 2020-09-04 | 中国矿业大学 | Five-level mixed pi-type converter |
| CN113938041B (en) * | 2021-10-13 | 2024-01-12 | 中国石油大学(华东) | Redundant driving pulse rejection modulation of high-frequency SiC MOSFET four-level half-bridge inverter |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2107672A1 (en) * | 2008-03-31 | 2009-10-07 | SMA Solar Technology AG | Three-phase inverter without connection between the neutral conductor of the grid and the mid-point of the intermediate circuit |
| FR2952485B1 (en) * | 2009-11-10 | 2012-11-23 | Lorraine Inst Nat Polytech | MULTI-LEVEL MULTI-VOLTAGE MATRIX CONVERTER CIRCUIT, AND METHOD FOR IMPLEMENTING SAID CIRCUIT |
| CA2789705A1 (en) * | 2010-02-15 | 2011-08-18 | Siemens Corporation | Single phase multilevel inverter |
| CN102594185B (en) * | 2012-02-20 | 2014-06-11 | 阳光电源股份有限公司 | Four-level topology unit and application circuit thereof |
-
2013
- 2013-10-10 CN CN201310469744.3A patent/CN103490656B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN103490656A (en) | 2014-01-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103490656B (en) | Based on the carrier modulating method of four electrical level inverter topological structures of H bridge | |
| CN103051233B (en) | Non-isolated single-phase photovoltaic grid-connected inverter and on-off control timing sequence thereof | |
| CN102594187B (en) | Four-level topological unit and application circuit thereof | |
| CN101944839B (en) | Single-phase five-level power inverter | |
| CN106301042B (en) | A kind of seven electrical level inverters | |
| CN105577012A (en) | Hybrid five-level current converter and control method thereof | |
| CN103269171B (en) | High power cascade type diode H-bridge unit power factor rectifier | |
| CN103872937B (en) | A kind of control method of striding capacitance type five level inverter | |
| CN103166495A (en) | Single phase asymmetrical full-bridge non-isolated photovoltaic grid-connected inverter | |
| CN107196523A (en) | A kind of three level active third-harmonic zero-sequence voltage matrix converters of T-type structure | |
| CN106921306A (en) | The level three-phase inverter of T-shaped active clamp type five and parallel network reverse electricity generation system | |
| CN102710154B (en) | The four-quadrant many current levels source code converter of main circuit based on IGCT | |
| CN102361408A (en) | Non-isolated photovoltaic grid-connected inverter and switching control time sequence thereof | |
| CN104617803A (en) | Multi-level converter submodule as well as inverter circuit and MMC topology both manufactured from such submodule | |
| CN102594185B (en) | Four-level topology unit and application circuit thereof | |
| CN101834451A (en) | High-voltage back-to-back converter | |
| CN205356152U (en) | Three rows formula DCDC converter based on many level of modularization | |
| CN105305861A (en) | Cascaded multilevel inverter | |
| CN102403920B (en) | Three-level half-bridge photovoltaic grid connected inverter | |
| CN102594188B (en) | Four-level topological unit and application circuit of four-level topological unit | |
| CN102170244A (en) | Cascaded multi-level current transformer of shared power supply | |
| CN102223098A (en) | Single-phase inverter and control method thereof | |
| CN103259436B (en) | Combination clamping type Five-level converter and control method thereof | |
| CN203193538U (en) | Three-level inverter for new energy | |
| CN102801349A (en) | Single-phase nine-level converter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |