CN105305861A - Cascaded multilevel inverter - Google Patents
Cascaded multilevel inverter Download PDFInfo
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- CN105305861A CN105305861A CN201510703309.1A CN201510703309A CN105305861A CN 105305861 A CN105305861 A CN 105305861A CN 201510703309 A CN201510703309 A CN 201510703309A CN 105305861 A CN105305861 A CN 105305861A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/4835—Converters with outputs that each can have more than two voltages levels comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/4837—Flying capacitor converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
The present invention discloses a novel cascaded multilevel inverter. The cascaded multilevel inverter topology is formed through series connection in turn of cascades of a double T-type multilevel unit topology. The double T-model multilevel inverter is composed of two three-level T-type bridge arms through the back-to-back combination, the two three-level T-type bridge arms share a direct current bus which is composed of two electrolytic capacitors in series connection, and the number of direct current powers which independently supply power is reduced and the size and the cost are saved. Compared with the traditional cascaded multilevel inverter, a cascaded multilevel inverter composed of novel double T-type multilevel converters in series connection employs fewer power devices to output more voltage levels, and output voltage has low harmonic content, therefore the cascaded multilevel inverter provided by the invention has good electromagnetic compatibility, low power switch loss and high reliability. The novel cascaded multilevel inverter topology also has the advantages of easy modularization, the employment of soft-switching technology and the like, and is applicable to the grid-connected system inverter application.
Description
Technical field
The present invention relates to power electronics DC-AC multi-electrical level inverter field, be specifically related to a kind of New Cascading multi-electrical level inverter.
Background technology
Day by day serious along with the in short supply of world energy sources and environmental pollution, clean regenerative resource enjoys the favor of people, and the development of regenerative resource and application depend on the DC-AC inverter device of function admirable.Therefore, need research structure badly simple, export the quality of power supply better, the DC-to-AC converter that efficiency is higher.Inverter is the electronic installation for realizing the conversion of DC-AC electric energy, and according to the difference of DC side power supply natures, inverter can be divided into voltage source inverter and current source inverter.Traditional two-level inverter is applied to the low power electrical domain of low pressure usually.The target of future electrical energy electronic technology research is high power density, high efficiency, high-performance.In the solution realizing high-power conversion, multi-electrical level inverter is because its control mode is various, output waveform percent harmonic distortion is low, power device voltage stress is low, electromagnetic interference (ElectroMagneticInterference, EMI) less, the high good characteristic of inversion efficiency has become the focus that high-power is applied, the fields such as such as high-voltage motor frequency control, flexible AC transmission, high voltage direct current transmission, Research on Unified Power Quality Conditioner.R.H.Baker proposed the concept of cascaded H-bridges Multilevel Inverters the earliest in 1975; The people such as Japanese scholars A.Nabae, H.Akagi propose neutral point clamp type many level PWMs inverter in nineteen eighty-three; T.A.Meynard proposed striding capacitance type multi-electrical level inverter in 1992.Diode-clamped and striding capacitance Clamp multi-electrical level inverter topology is respectively shown in Fig. 1 (a) He Fig. 1 (b).Diode-clamped multi-electrical level inverter shown in Fig. 1 (a) produces the phase voltage of n level in DC side by (n-1) individual capacitances in series, every phase brachium pontis comprises 2 (n-1) individual power switch pipe be connected in series, each power switch pipe two ends reverse parallel connection has a fast recovery diode, also comprise the individual clamping diode of (n-1) (n-2) be connected in parallel on power switch pipe branch road, for carrying out voltage clamp for each power switch pipe.Fig. 1 (b) is depicted as striding capacitance Clamp multi-electrical level inverter topology, N level phase voltage is produced by (n-1) individual capacitances in series in DC side, every phase brachium pontis comprises 2 (n-1) individual power switch pipe be connected in series, each power switch pipe two ends reverse parallel connection has a fast recovery diode, every phase brachium pontis also needs (n-1) (n-2)/2 clamping capacitance, is used for realizing all pressures of each power switch pipe.Figure 2 shows that Cascade H bridge type multi-electrical level inverter topology, be made up of n the mutual cascade of full-bridge, comprise 4n power switch pipe and corresponding anti-paralleled diode, the individual independently DC power supply of n and n DC capacitor formation.Export although first two multi-electrical level inverter topology can realize voltage with multiple levels, need a large amount of clamping diodes or striding capacitance, thus can make systems bulky, reliability reduces, and cost increases.Cascaded H-bridges multi-level converter topology structure have use device few, do not need clamping diode and striding capacitance, be easy to modularization and adopt the advantage such as soft switch technique, be considered to compare the inverter being suitable for grid-connected system.
In recent years, on traditional cascaded H-bridges multi-electrical level inverter basis, a large amount of New Cascading multi-electrical level inverter topologys is suggested in succession, and the voltage being intended to realize more high level number exports, improve the output quality of power supply.
Summary of the invention
Goal of the invention: complicated in order to solve current traditional multi-level inverter structure, volume is larger, the problem that reliability is lower, the invention discloses a kind of novel double-T shaped multi-electrical level inverter unit topology and New Cascading multi-electrical level inverter, propose in unit topology, adopt DC voltage to mix asymmetric algorithm simultaneously, form the asymmetric multi-electrical level inverter of novel Mixed cascading, a part of unit module is made to run on high frequency mode, another part unit module runs on low frequency mode, switching loss is reduced while improving output-voltage levels number, thus reduce EMI further, improve and export the quality of power supply.
Technical scheme: a kind of New Cascading multi-electrical level inverter, is characterized in that, this New Cascading multi-electrical level inverter is made up of the cascade of connecting successively of n the double-T shaped multi-electrical level inverter unit topology of module 1 to module n.Described double-T shaped multi-electrical level inverter unit topology, is characterized in that, comprise left side brachium pontis, first brachium pontis, second brachium pontis, DC bus, right side brachium pontis.
Left side brachium pontis comprises power switch pipe and power switch pipe, and power switch pipe is connected to DC bus capacitor C after being connected with emitter with the emitter of power switch pipe
dc1negative polarity end.First brachium pontis neutral point clamp two-way power switch pipe adopts common emitter connection to form by two power switch pipes, and the emitter of two power switch pipes is connected with emitter, and an end is connected to the mid point of dc-link capacitance, and the other end is connected to positive polarity output terminal A.Second brachium pontis neutral point clamp two-way power switch pipe adopts common emitter connection to form by two power switch pipes, and the emitter of two power switch pipes is connected with emitter, and an end is connected to the mid point of DC bus, and the other end is connected to negative polarity output B.Right side brachium pontis comprises power switch pipe and power switch pipe, and power switch pipe is connected to DC bus capacitor C after being connected with collector electrode with the collector electrode of power switch pipe
dc2positive ends.Left side the collector electrode of first brachium pontis power switch pipe, the collector electrode of first brachium pontis neutral point clamp two-way power switch pipe and first brachium pontis power switch pipe of right side emitter be connected after be connected to positive polarity output terminal A.Left side the collector electrode of second brachium pontis power switch pipe, the collector electrode of second brachium pontis neutral point clamp two-way power switch pipe and second brachium pontis power switch pipe of right side emitter be connected after be connected to negative polarity output B.DC bus is by two electrochemical capacitor C
dc1and C
dc2in series, C
dc1negative polarity end be connected to left side brachium pontis mid point, C
dc1positive ends and C
dc2negative polarity end be connected, C
dc2positive ends be connected to right side brachium pontis mid point.
Novel double-T shaped multi-electrical level inverter unit topology, forms symmetrical multi-electrical level inverter when direct current survey capacitance voltage value is identical in unit module; DC capacitor voltage value forms asymmetric multi-electrical level inverter time different.Under dc-link capacitance voltage symmetry and asymmetric two kinds of patterns, on off state and the corresponding output-voltage levels of inverter are:
(1) dc-link capacitance voltage symmetry pattern: V
dc1=V
dc2=V
dc
On off state and output voltage under table 1 symmetric pattern
(2) dc-link capacitance asymmetrical voltage pattern: V
dc2=2V
dc1=2V
dc
On off state and output voltage under table 2 dissymmetric mode
Under output same level number 7 level conditions, the parameter comparison of novel double-T shaped asymmetric multi-electrical level inverter and diode-clamped, striding capacitance Clamp and Cascade H bridge type three kinds of traditional multi-level inverters is as shown in table 3.
The contrast of the novel double-T shaped multi-electrical level inverter of table 3 and traditional multi-level inverter
A kind of New single-phase cascaded multilevel inverter disclosed by the invention is made up of the cascade of connecting successively of n double-T shaped multi-electrical level inverter unit module.The negative polarity output of unit module 1 is connected to the positive polarity output terminal of unit module 2, and the negative polarity output of unit module 2 is connected to the positive polarity output terminal of unit module 3 ... the negative polarity output of unit module n-1 is connected to the positive polarity output terminal of unit module n.
Cascaded symmetric multi-electrical level inverter is formed when the direct current survey capacitance voltage value of unit module is identical in New single-phase cascaded multilevel inverter; Mixed cascading asymmetric multi-electrical level inverter is formed when DC capacitor voltage value is not identical in unit module.The asymmetric multi-electrical level inverter of Mixed cascading can be made up of n the unequal symmetrical cell module-cascade of DC voltage, also can be made up of n asymmetric unit module cascade.Table 4 is depicted as the relevant parameter in unit module under DC capacitor voltage three kinds of dissymmetric modes.Wherein, N
levelfor output level number, V
maxn () is output voltage maximum in n unit module, V
maxfor the maximum output voltage that New Cascading multi-electrical level inverter is total, V
blockfor the maximum peak reverse voltage sum that all power switch pipes bear.
Table 4 dissymmetric mode and corresponding parameter
Beneficial effect: compared to traditional multi-level inverter, a kind of New single-phase cascaded multilevel inverter disclosed by the invention has following advantage:
(1) compare with diode-clamped and striding capacitance Clamp two kinds of multi-electrical level inverters, when exporting same level number, the power switch pipe quantity used and isolation drive quantity all greatly reduce, do not need additionally to increase clamping diode or striding capacitance, therefore, the system bulk reduced and complexity, reduce cost.
(2) compared with traditional Cascade H bridge type multi-electrical level inverter, the asymmetric multi-electrical level inverter of this novel Mixed cascading, when exporting same level number, the power switch pipe quantity used, DC bus capacitor quantity all greatly reduce, and unit module runs on low frequency state, reduce switching loss, thus save system cost.
(3) double-T shaped multi-level-cell module has 14 kinds of different current flow paths, containing a large amount of Redundanter schalter vectors, compared to traditional multi-electrical level inverter, is easy to realize modularization and failure tolerant runs, can improves the unfailing performance of system.
Accompanying drawing explanation
Fig. 1 is traditional Clamp multi-level converter topology structure figure;
Fig. 2 is traditional cascaded H-bridges multi-level converter topology structure figure;
Fig. 3 is double-T shaped multi-electrical level inverter unit topology diagram;
Fig. 4 is double-T shaped multi-electrical level inverter current flow paths;
Fig. 5 is the New Cascading multi-electrical level inverter of n unit module series connection;
Fig. 6 is the cascaded multilevel inverter of two unit module series connection.
Embodiment
Below in conjunction with accompanying drawing the present invention done and further explain.
As Fig. 1 (a), Fig. 1 (b) and Fig. 2 are respectively diode-clamped, capacitor-clamped type and Cascade H bridge type three kinds of traditional multi-level inverter topologies.
Figure 3 shows that the double-T shaped multi-level converter topology structure figure of one disclosed by the invention, this novel double-T shaped multi-electrical level inverter unit topology comprises left side brachium pontis (1), first brachium pontis (2), second brachium pontis (3), DC bus (4), right side brachium pontis (5).
Left side brachium pontis (1) comprises power switch pipe (11) and power switch pipe (12), and power switch pipe (11) is connected to DC bus capacitor C after being connected with emitter with the emitter of power switch pipe (12)
dc1negative polarity end.First brachium pontis neutral point clamp two-way power switch pipe (2) adopts common emitter connection to form by two power switch pipes, the emitter of two power switch pipes is connected with emitter, one end is connected to the mid point of dc-link capacitance, and the other end is connected to positive polarity output terminal A.Second brachium pontis neutral point clamp two-way power switch pipe (3) adopts common emitter connection to form by two power switch pipes, the emitter of two power switch pipes is connected with emitter, one end is connected to the mid point of DC bus, and the other end is connected to negative polarity output B.Right side brachium pontis (5) comprises power switch pipe (51) and power switch pipe (52), and power switch pipe (51) is connected to DC bus capacitor C after being connected with collector electrode with the collector electrode of power switch pipe (52)
dc2positive ends.Left side the collector electrode of first brachium pontis power switch pipe (11), the collector electrode of first brachium pontis neutral point clamp two-way power switch pipe (2) and first brachium pontis power switch pipe (51) of right side emitter be connected after be connected to positive polarity output terminal A.Left side the collector electrode of second brachium pontis power switch pipe (12), the collector electrode of second brachium pontis neutral point clamp two-way power switch pipe (3) and second brachium pontis power switch pipe (52) of right side emitter be connected after be connected to negative polarity output B.DC bus (4) is by two electrochemical capacitor C
dc1and C
dc2in series, C
dc1negative polarity end be connected to left side brachium pontis mid point, C
dc1positive ends and C
dc2negative polarity end be connected, C
dc2positive ends be connected to right side brachium pontis mid point.
Figure 4 shows that novel double-T shaped multi-electrical level inverter current flow paths, 8 power switch pipes have 14 kinds of current flow paths.Definition electric current flows out for positive direction (i>0) from positive ends A, and electric current flows out for negative direction (i<0) from negative polarity end B.
(1) Fig. 4 (a) and (b) for output level be+2V
dctime on off state and current flow paths.Fig. 4 (a) is depicted as electric current positive direction (i>0), trigger power switching tube S
p4and S
n1conducting, electric current flows into through S from negative polarity end B
n1, C
dc1, C
dc2, S
p4flow out from positive ends A; Fig. 4 (b) is depicted as electric current negative direction (i<0), and all power switch pipes are in off state, and electric current flows into through D from positive ends A
p4, C
dc2, C
dc1, D
n1flow out from negative polarity end B.
(2) on off state that Fig. 4 (c) and (d) be output when being 0 level and current flow paths.Fig. 4 (a) is depicted as electric current positive direction, trigger power switching tube S
n2, S
p3conducting, electric current flows into from negative polarity end B, flows through S
n2– D
n3– S
p3– D
p2, flow out from positive ends A; Fig. 4 (d) is depicted as electric current negative direction, trigger power switching tube S
p2, S
n3conducting, electric current flows into from positive ends A, flows through S
p2– D
p3– S
n3– D
n2, flow out from negative polarity end B.
(3) Fig. 4 (e) and (f) for output level be-2V
dctime on off state and current flow paths.Fig. 4 (e) is depicted as electric current positive direction (i>0), and all power switch pipes are in off state, and electric current flows into from negative polarity end B, flows through D
n4– C
dc2– C
dc1– D
p1, flow out from positive ends A; Fig. 4 (f) is depicted as electric current negative direction (i<0), trigger power switching tube S
p1and S
n4conducting, electric current flows into from positive ends A, flows through S
p1, C
dc1, C
dc2, D
n4, flow out from negative polarity end B.
(4) Fig. 4 (g) to Fig. 4 (j) for output level is-V
dctime on off state and current flow paths.Fig. 4 (g) is depicted as electric current positive direction, trigger power switching tube S
n2conducting, controls all the other power switch pipes and turns off.Current flow paths is: S
n2– D
n3– C
dc1– D
p1.Fig. 4 (h) is depicted as electric current negative direction, trigger power switching tube S
p1, S
n3conducting, controls all the other power switch pipes and turns off.Current flow paths is: S
p1– C
dc1– S
n3– D
n2.Fig. 4 (i) is depicted as electric current positive direction, trigger power switching tube S
p3conducting, controls all the other power switch pipes and turns off.Current flow paths is: D
p2– S
p3– C
dc2– D
n4.Fig. 4 (j) is depicted as electric current negative direction, trigger power switching tube S
p2, S
n4conducting, controls all the other power switch pipes and turns off.Current flow paths is: S
p2– D
p3– C
dc2– S
n4.
(5) Fig. 4 (k) to Fig. 4 (n) for output level is+V
dctime on off state and current flow paths.Fig. 4 (k) is depicted as electric current positive direction, trigger power switching tube S
p3, S
n1conducting, controls all the other power switch pipes and turns off.Current flow paths is: S
n1– C
dc1– S
p3– D
p2.Fig. 4 (l) is depicted as electric current negative direction, trigger power switching tube S
p2conducting, controls all the other power switch pipes and turns off.Current flow paths is: S
p2– D
n3– C
dc1– D
n1.Fig. 4 (m) is depicted as electric current positive direction, trigger power switching tube S
p4, S
n2conducting, controls all the other power switch pipes and turns off.Current flow paths is: S
n2– D
n3– C
dc2– S
p4.Fig. 4 (n) is depicted as electric current negative direction, trigger power switching tube S
n3conducting, controls all the other power switch pipes and turns off.Current flow paths is: D
p4– C
dc2– S
n3– D
n2.
Figure 5 shows that the New single-phase cascaded multilevel inverter topology containing n unit module, be made up of n the mutual cascade of double-T shaped multi-electrical level inverter unit module.The negative polarity output of unit module 1 is connected to the positive polarity output terminal of unit module 2, and the negative polarity output of unit module 2 is connected to the positive polarity output terminal of unit module 3 ... the negative polarity output of unit module n-1 is connected to the positive polarity output terminal of unit module n.Cascaded symmetric multi-electrical level inverter is formed when the direct current survey capacitance voltage value of unit module is identical in New Cascading multi-electrical level inverter; Mixed cascading asymmetric multi-electrical level inverter is formed when DC capacitor voltage value is not identical in unit module.The asymmetric multi-electrical level inverter of Mixed cascading can be made up of n the mutual unequal symmetrical cell module-cascade of DC voltage, also can be made up of n asymmetric unit module cascade.The output voltage situation of the asymmetric multi-electrical level inverter of Mixed cascading under the invention discloses symmetric pattern and under three kinds of dissymmetric modes.
(1) under symmetric pattern, V
dc11=V
dc12=V
dc21=V
dc22=... V
dcn1=V
dcn2, in unit module, DC voltage is equal, and the output voltage of New Cascading multi-electrical level inverter is: v
0=v
01+ v
02+ v
03+ ... + v
0n; The maximum output voltage of unit module: V
max=2V
dc; N unit module cascaded multilevel inverter maximum output voltage is: V
max=2nV
dc; Output-voltage levels number is: N
level=4n+1.
On off state and output voltage under table 6 symmetric pattern
(2) dissymmetric mode 1: in unit module, DC voltage value is different, V
dc11=V
dc12=V
dc; V
dc21=V
dc22=5V
dc; Vd
cn1=Vd
cn2=(5n-1) V
dc(n=1,2,3 ...).The Maximum Output Level of unit module m: V
max(n)=+ 2 × (5n-1) V
dc, maximum output voltage: V
max=+(5n-1)/2V
dc, total output-voltage levels number is: N
level=5n, IGBT quantity: N
iGBT=8n, DC capacitor quantity: N
source=2n
Table 7 dissymmetric mode 1 time on off state and output voltage
(3) dissymmetric mode 2:V
dc11=V
dc, V
dc12=2V
dc; V
dc21=2
2v
dc, V
dc22=2
3v
dc; V
dcn1=2
2n-2v
dc, V
dcn2=2
2n-1v
dc(n=1,2,3 ...).The Maximum Output Level of unit module n: V
max(n)=+ 3 × 4
n-1v
dc, always export maximum voltage: V
max=+(4
n-1) V
dc, total output-voltage levels number: N
level=2
2n+1-1, IGBT quantity: N
iGBT=8n, DC capacitor quantity: N
source=2n.
Table 8 dissymmetric mode 2 times on off states and output voltage
(4) dissymmetric mode 3:
The Maximum Output Level of unit module n: V
max(n)=+ 3 × 7
n-1v
dc, always export maximum voltage: V
max=+(7
n-1)/2V
dc, total output-voltage levels number: N
level=7
n, IGBT quantity: N
iGBT=8n, DC capacitor quantity: N
source=2n.
Table 9 dissymmetric mode 3 times on off states and output voltage
Figure 6 shows that the single-phase cascaded multilevel inverter that two double-T shaped unit modules are in series, adopt the DC bus-bar voltage algorithm of dissymmetric mode 3, V
dc11=V
dc, V
dc12=2V
dc, V
dc21=7V
dc, V
dc22=14V
dc; 49 level phase voltages can be produced.In state 1 to state 7, the output voltage of unit module 2 remains unchanged, and the power switch pipe of unit module 2 runs on low frequency state.Thus in this New Cascading multi-electrical level inverter, the unit module of low-frequency operation can choose low frequency power device.
Table 10 on off state and output voltage (mode 3)
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (4)
1. a cascaded multilevel inverter, it is characterized in that: described inverter is made up of the cascade of connecting successively of at least two double-T shaped multi-electrical level inverter unit topologys, described double-T shaped multi-electrical level inverter unit topology is made up of left side brachium pontis (1), first brachium pontis (2), second brachium pontis (3), DC bus (4), right side brachium pontis (5).
2. cascaded multilevel inverter according to claim 1, it is characterized in that: the left side brachium pontis (1) of described double-T shaped multi-electrical level inverter comprises power switch pipe (11) and power switch pipe (12), and power switch pipe (11) is connected to DC bus capacitor C after being connected with emitter with the emitter of power switch pipe (12)
dc1negative polarity end; First brachium pontis neutral point clamp two-way power switch pipe (2) adopts common emitter connection to form by two power switch pipes, and the emitter of two power switch pipes is connected with emitter, and an end is connected to the mid point of dc-link capacitance, and the other end is connected to positive polarity output terminal A; Second brachium pontis neutral point clamp two-way power switch pipe (3) adopts common emitter connection to form by two power switch pipes, and the emitter of two power switch pipes is connected with emitter, and an end is connected to the mid point of DC bus, and the other end is connected to negative polarity output B; Right side brachium pontis (5) comprises power switch pipe (51) and power switch pipe (52), and power switch pipe (51) is connected to DC bus capacitor C after being connected with collector electrode with the collector electrode of power switch pipe (52)
dc2positive ends; Left side the collector electrode of first brachium pontis power switch pipe (11), the collector electrode of first brachium pontis neutral point clamp two-way power switch pipe (2) and first brachium pontis power switch pipe (51) of right side emitter be connected after be connected to positive polarity output terminal A; Left side the collector electrode of second brachium pontis power switch pipe (12), the collector electrode of second brachium pontis neutral point clamp two-way power switch pipe (3) and second brachium pontis power switch pipe (52) of right side emitter be connected after be connected to negative polarity output B; DC bus (4) is by two electrochemical capacitor C
dc1and C
dc2in series, C
dc1negative polarity end be connected to left side brachium pontis mid point, C
dc1positive ends and C
dc2negative polarity end be connected, C
dc2positive ends be connected to right side brachium pontis mid point.
3. cascaded multilevel inverter according to claim 2, it is characterized in that: the power switch pipe of double-T shaped multi-electrical level inverter is insulated gate bipolar transistor, the peak-inverse voltage value that four power switch pipes of described left side brachium pontis and right side brachium pontis bear is equal, and the peak-inverse voltage value that neutral point clamp power switch pipe bears is the half of left side and right side power switching tube.
4. cascaded multilevel inverter according to claim 1, it is characterized in that: form symmetrical multi-electrical level inverter when direct current survey capacitance voltage value is identical in described double-T shaped multi-level-cell module, when DC capacitor voltage value is different, form asymmetric multi-electrical level inverter; Described asymmetric multi-electrical level inverter is made up of at least two DC voltage unequal symmetrical cell module-cascades or at least two asymmetric unit module cascades are formed.
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| CN201510703309.1A Active CN105305861B (en) | 2015-10-26 | 2015-10-26 | A kind of cascaded multilevel inverter |
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| CN106301042A (en) * | 2016-09-18 | 2017-01-04 | 华东交通大学 | A kind of seven electrical level inverters |
| CN109088557A (en) * | 2018-09-28 | 2018-12-25 | 华东交通大学 | A kind of cascade multilevel inverter |
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| CN112737378B (en) * | 2021-01-06 | 2021-11-23 | 湖南大学 | Cascaded H-bridge multi-level converter hybrid topology structure and control method thereof |
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