CN106208131B - Multilevel Inverters topological structure for new energy access and active distribution network - Google Patents

Multilevel Inverters topological structure for new energy access and active distribution network Download PDF

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Publication number
CN106208131B
CN106208131B CN201610584241.4A CN201610584241A CN106208131B CN 106208131 B CN106208131 B CN 106208131B CN 201610584241 A CN201610584241 A CN 201610584241A CN 106208131 B CN106208131 B CN 106208131B
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terminal
group
power switch
electronic power
feedback diode
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CN106208131A (en
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陆畅
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Pingdingshan Power Supply Co of State Grid Henan Electric Power Co Ltd
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Pingdingshan Power Supply Co of State Grid Henan Electric Power Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/38Arrangements for parallely feeding a single network by two or more generators, converters or transformers
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
    • H02M7/5395Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02ATECHNOLOGIES FOR ADAPTATION TO CLIMATE CHANGE
    • Y02A30/00Adapting or protecting infrastructure or their operation
    • Y02A30/60Planning or developing urban green infrastructure
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/70Wind energy
    • Y02E10/76Power conversion electric or electronic aspects
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/40Fuel cell technologies in production processes

Abstract

The invention discloses a kind of Multilevel Inverters topological structures for new energy access and active distribution network, specifically include 12 groups of electronic power switches, 2 dc-link capacitances, 6 feedback diodes and 3 clamp capacitors.Multilevel Inverters topological structure of the invention reduces the difficulty of striding capacitance voltage balance control, improves control flexibility by increasing the switching mode quantity of power switch;Inverter function can be realized using sinusoidal wave PWM modulation, be conducive to the balance control of striding capacitance voltage, have broad application prospects in occasions such as photovoltaic generating system, micro-capacitance sensor, wind-power electricity generation, fuel cell grid-connected system, active distribution networks.

Description

Multilevel Inverters topological structure for new energy access and active distribution network
Technical field
The invention belongs to New-energy power systems and active distribution network system based on power electronic equipment, and in particular to one Kind can be used for more level topological structures of new energy access and active distribution network.
Background technique
Power electronic technique is since the last century 50's is born, by the rapid development of over half a century, so far It is widely used in needing the every field of transformation of electrical energy.Low pressure it is low power use electrical domain, power electronic technique it is each Oneself is gradually mature for aspect, and the goal in research in future is high power density, high efficiency, high-performance;And in the transmission & distribution of high-power Electrical domain, the technology of various aspects are just becoming the research emphasis of current power electronic technique.Survey of Flexible AC Transmission System, high-voltage dc transmission Electricity, frequency control of the big motor of high pressure etc. all be unable to do without powerful power electronic equipment.
In several solutions for realizing high-power transformation, multi-level converter is always abnormal with small output waveform because of it The advantages that variability (THD), low device voltage stress and low system electromagnetic interference (EMI) and the favor by industry.It is more The concept of level converter is proposed in IEEE Industry Applications Society annual meeting in 1980 by A.Nabea et al. earliest, the electricity DC bus-bar voltage is divided into three level with two concatenated capacitors by road, and each bridge arm is connected with four switching tubes, with a pair Series connection clamp diode and inner switch pipe are in parallel, wherein heart tap is connected with third level, realizes neutral-point-clamped, forms institute Call neutral-point-clamped (NPC-Neural Point Clamped) converter.In this circuit, it is only held when main power tube turns off By the half of DC bus-bar voltage, so being particularly suitable for high-power application.Nineteen eighty-three, Bhagwat et al. is in this base On plinth, tri-level circuit is generalized to any n level, further research has been made to NPC circuit and its unified structure, these works Research as high-voltage high-power converter provides new thinking.So far from the proposition of multi-level converter concept, short In more than 20 years time, application of the electronic power convertor in New-energy power system and active distribution network is obtained further Development, but the technical need of the access of adaptation new energy and active distribution network is also fewer.
Summary of the invention
The purpose of the invention is to adapt to the technical need of new energy access and active distribution network, propose a kind of for new The Multilevel Inverters topological structure of the energy access and active distribution network is subtracted by increasing the switching mode quantity of power switch The small difficulty of striding capacitance voltage balance control, improves control flexibility.
The technical solution of the present invention is as follows: a kind of Multilevel Inverters topology knot for new energy access and active distribution network Structure specifically includes 12 groups of electronic power switches, 2 dc-link capacitances, 6 feedback diodes and 3 clamp capacitors, In, the electronic power switch include a triode and a clamp diode, the collector of the triode with it is described The connected first terminal as the electronic power switch of the cathode of clamp diode, the emitter of the triode and the pincers The Second terminal that the anode of position diode is connected as the electronic power switch, the base stage of the triode meet external PWM Control signal;The first terminal of first group of electronic power switch, the first terminal of second group of electronic power switch, third group The first terminal of electronic power switch is connected with the first end of the first dc-link capacitance, first as the topological structure Input terminal;
It is the Second terminal of first group of electronic power switch, the first terminal of the 4th group of electronic power switch, first anti- The cathode of feedback diode is connected with the first end of the first clamp capacitor;The Second terminal of second group of electronic power switch, The first terminal of five groups of electronic power switches, the second feedback diode cathode be connected with the first end of the second clamp capacitor;Institute State the Second terminal of third group electronic power switch, the first terminal of the 6th group of electronic power switch, third feedback diode Cathode is connected with the first end of third clamp capacitor;The anode of first feedback diode, the second feedback diode anode, The anode of third feedback diode, the cathode of the 4th feedback diode, the 5th feedback diode cathode, the 6th feedback diode Cathode be connected with the second end of the first dc-link capacitance;
The Second terminal of the 4th group of electronic power switch is connected with the first terminal of the 7th group of electronic power switch, The first output end as the topological structure;The Second terminal and the 8th group of power electronics of the 5th group of electronic power switch The first terminal of switch is connected, the second output terminal as the topological structure;The of the 6th group of electronic power switch Two-terminal is connected with the first terminal of the 9th group of electronic power switch, the third output end as the topological structure;
The second end of first clamp capacitor, the anode of the 4th feedback diode, the 7th group of electronic power switch Two-terminal is connected with the first terminal of the tenth group of electronic power switch;The second end of second clamp capacitor, the 5th feedback two The anode of pole pipe, the 8th group of electronic power switch Second terminal be connected with the first terminal of the 11st group of electronic power switch; The second end of the third clamp capacitor, the anode of the 6th feedback diode, the 9th group of electronic power switch Second terminal with The first terminal of 12nd group of electronic power switch is connected;
The anode of first feedback diode, the anode of the second feedback diode, the anode of third feedback diode, The second end of one dc-link capacitance is connected with the first end of the second dc-link capacitance;The second of second dc-link capacitance End and the Second terminal of the tenth group of electronic power switch, the Second terminal and the 12nd group of electric power of the 11st group of electronic power switch The Second terminal of electronic switch is connected, the second input terminal as the topological structure.
Beneficial effects of the present invention: Multilevel Inverters topological structure of the invention, by the switch for increasing power switch Mode quantity reduces the difficulty of striding capacitance voltage balance control, improves control flexibility;Sinusoidal wave PWM can be used Inverter function is realized in modulation, is conducive to the balance control of striding capacitance voltage, in photovoltaic generating system, micro-capacitance sensor, wind-force hair The occasions such as electricity, fuel cell grid-connected system, active distribution network have broad application prospects.
Detailed description of the invention
The Multilevel Inverters topological structure of Fig. 1 embodiment of the present invention, wherein 12 groups of electronic power switches are respectively Qa1、 Qb1、Qc1、Qa2、Qb2、Qc2、Qa3、Qb3、Qc3、Qa4、Qb4、Qc4, 2 dc-link capacitances are respectively Cd1、Cd2, 6 feedback diodes Respectively Da2、Db2、Dc2、Da3、Db3、Dc3, 3 clamp capacitor Cxa、Cxb、Cxc
1 schematic diagram of clamp capacitor charge circuit of the Multilevel Inverters topological structure of Fig. 2 embodiment of the present invention.
2 schematic diagram of clamp capacitor charge circuit of the Multilevel Inverters topological structure of Fig. 3 embodiment of the present invention.
1 schematic diagram of clamp capacitor discharge loop of the Multilevel Inverters topological structure of Fig. 4 embodiment of the present invention.
2 schematic diagram of clamp capacitor discharge loop of the Multilevel Inverters topological structure of Fig. 5 embodiment of the present invention.
3 schematic diagram of clamp capacitor discharge loop of the Multilevel Inverters topological structure of Fig. 6 embodiment of the present invention.
4 schematic diagram of clamp capacitor discharge loop of the Multilevel Inverters topological structure of Fig. 7 embodiment of the present invention.
5 schematic diagram of clamp capacitor discharge loop of the Multilevel Inverters topological structure of Fig. 8 embodiment of the present invention.
Fig. 9 uses the modulation module schematic diagram of the Multilevel Inverters topological structure of SPWM mode.
A phase bridge arm exports mid-point voltage simulation waveform schematic diagram under the SPWM control mode of Figure 10 embodiment of the present invention.
Line voltage U under the SPWM control mode of Figure 11 embodiment of the present inventionabSimulation waveform schematic diagram.
The dc-link capacitance C of Figure 12 Multilevel Inverters topological structured1And Cd2V diagram.
Specific embodiment
With reference to the accompanying drawing, elaborate to the embodiment of the present invention: the present embodiment is being with technical solution of the present invention Under the premise of implemented, the detailed implementation method and specific operation process are given, but protection scope of the present invention is not limited to Following embodiments.
Fig. 1 gives the Multilevel Inverters topological structure of the embodiment of the present invention, specifically includes 12 groups of electronic power switches Qa1、Qb1、Qc1、Qa2、Qb2、Qc2、Qa3、Qb3、Qc3、Qa4、Qb4、Qc4, 2 dc-link capacitance Cd1、Cd2, 6 feedback diodes Da2、Db2、Dc2、Da3、Db3、Dc3And 3 clamp capacitor Cxa、Cxb、Cxc, wherein electronic power switch includes a triode With a clamp diode, the collector of the triode is connected as the power electronics with the cathode of the clamp diode The first terminal of switch, the emitter of the triode is connected with the anode of the clamp diode to be opened as the power electronics The Second terminal of pass, the base stage of the triode connect external pwm control signal.
First group of electronic power switch Qa1First terminal, second group of electronic power switch Qb1First terminal, Three groups of electronic power switch Qc1First terminal and the first dc-link capacitance Cd1First end be connected, as the topology The first input end of structure.
First group of electronic power switch Qa1Second terminal, the 4th group of electronic power switch Qa2First terminal, One feedback diode Da2Cathode and the first clamp capacitor CxaFirst end be connected;Second group of electronic power switch Qb1's Second terminal, the 5th group of electronic power switch Qb2First terminal, the second feedback diode Db2Cathode and the second clamp capacitor CxbFirst end be connected;The third group electronic power switch Qc1Second terminal, the 6th group of electronic power switch Qc2First Terminal, third feedback diode Dc2Cathode and third clamp capacitor CxcFirst end be connected;The first feedback diode Da2 Anode, the second feedback diode Db2Anode, third feedback diode Dc2Anode, the 4th feedback diode Da3Cathode, 5th feedback diode Db3Cathode, the 6th feedback diode Qc3Cathode and the first dc-link capacitance Cd1Second end phase Connection.
The 4th group of electronic power switch Qa2Second terminal and the 7th group of electronic power switch Qa3First terminal phase Connection, the first output end as the topological structure;The 5th group of electronic power switch Qb2Second terminal with the 8th group Electronic power switch Qb3First terminal be connected, the second output terminal as the topological structure;The 6th group of electric power electricity Sub switch Qc2Second terminal and the 9th group of electronic power switch Qc3First terminal be connected, as the topological structure Third output end.
The first clamp capacitor CxaSecond end, the 4th feedback diode Da3Anode, the 7th group of electronic power switch Qa3Second terminal and the tenth group of electronic power switch Qa4First terminal be connected;The second clamp capacitor CxbSecond end, 5th feedback diode Db3Anode, the 8th group of electronic power switch Qb3Second terminal and the 11st group of electronic power switch Qb4First terminal be connected;The third clamp capacitor CxcSecond end, the 6th feedback diode Dc3Anode, the 9th group electricity Power electronic switch Qc3Second terminal and the 12nd group of electronic power switch Qc4First terminal be connected.
Da2、Db2、Dc2Anode, Cd1Second end and Cd2First end be connected;Cd2Second end and the tenth group of electric power Electronic switch Qa4Second terminal, the 11st group of electronic power switch Qb4Second terminal and the 12nd group of electronic power switch Qc4Second terminal be connected, the second input terminal as the topological structure.
It should be understood that the base stage of each triode is the different control signals connect in electronic power switch, by PWM Modulated process determines, is it will be apparent that being no longer described in detail to those skilled in the art.
Different from traditional diode-clamped three-level inverter, in order to enable midpoint potential be easier to realize it is flat Weighing apparatus, introduces clamp capacitor, C as shown in figure 1xa、Cxb、CxcIt is shown, the introducing of clamp capacitor so that second of each bridge arm and Third power tube cannot simultaneously turn on, and otherwise will appear the situation of clamp capacitor circuit short circuit.Therefore, three level P, O, N In O level can be obtained by two kinds of on-off modes, the switch state of each bridge arm increases to four by original three, Which increase the control flexibilities of system.
Modulation system uses space vector pulse width modulation technology (SVPWM), and vector state is by 27 original increasings Present 64 are added to, along with factors such as the smooth electric discharges for needing to consider to guarantee clamp capacitor, increase the tired of its realization It is difficult.Therefore, it is necessary to design one kind not only to have the advantages of SVPWM, but also simple and reliable control mode to the inverse of this topological structure It is most important to become device.
By taking A phase as an example, the O level in three level P, O, N can be obtained by two kinds of on-off modes: a kind of mode is to work as Switching tube Qa1And Qa3It simultaneously turns on, switching tube Qa2And Qa4When simultaneously turning off;Another kind is as switching tube Qa2And Qa4Simultaneously turn on, Switching tube Qa1And Qa3When simultaneously turning off.In the structure of the present embodiment, the switch state of switching device IGBT and the pass of output level System is shown in Table 1.
The switch state of each IGBT of table 1 and the relationship of output level
According to mixed multi-level converter switches mode table shown in table 1, by taking A Xiang Qiaobi as an example, to each switching mode Vector is described in detail as follows:
Vector P: at this point, Qa1、Qa2Conducting, Qa3、Qa4Shutdown, if CxaVoltage be lower than E/2, then Cd1It will add according to Fig. 2 Thick circuit loop is to CxaIt charges.
Zero vector OA: at this point, Qa2、Qa4Conducting, Qa1、Qa3Shutdown, if CxaVoltage be lower than E/2, then Cd2It will be according to Fig. 3 The circuit loop of overstriking is to CxaIt charges.
Zero vector OB: at this point, Qa1、Qa3Conducting, Qa2、Qa4Shutdown, if CxaVoltage be lower than E/2, then Cd1It will be according to Fig. 2 The circuit loop of overstriking is to CxaIt charges.
Vector N: at this point, Qa3、Qa4Conducting, Qa1、Qa2Shutdown, if CxaVoltage be lower than E/2, then Cd2It will add according to Fig. 3 Thick circuit loop is to CxaIt charges.
When systems are functioning properly, the clamp capacitor of phase is specified to would be possible to realize when this is mutually in OA OB state Electric discharge;It cannot discharge at P or N-state.
The discharge loop of three-phase hybrid clamp three-level inverter clamp capacitor is set forth in Fig. 4, Fig. 5, Fig. 6, specifically Job analysis is as follows:
For Fig. 4, if A phase is in OA (0,1,0,1) state, as clamp capacitor CxaVoltage be higher than E/2 when, can edge Overstriking show circuit discharge;If A phase is in P (1,1,0,0) state, the discharge loop of clamp capacitor is by direct current mother at this time Line voltage E is vised and be cannot achieve it and smoothly discharge, only when DC bus-bar voltage appearance reduces suddenly and at a time small Electric discharge is just able to achieve when clamp capacitor voltage.
For Fig. 5, it can be seen from the figure that clamp capacitor C under normal circumstancesxaDischarge loop by DC bus-bar voltage E It vises, is only just able to achieve and puts when reduction suddenly occurs in DC bus-bar voltage and is at a time less than clamp capacitor voltage Electricity.
For Fig. 6, if A phase is in OB state (1,0,1,0) state, as clamp capacitor CxaVoltage be higher than E/2 when, can To discharge along overstriking show circuit;If A phase is in N (0,0,1,1) state, the discharge loop of clamp capacitor is straight at this time Stream busbar voltage E is vised and be cannot achieve its smooth electric discharge, only when reducing suddenly and in certain a period of time occurs in DC bus-bar voltage It carves and is just able to achieve electric discharge when being less than clamp capacitor voltage.
For Fig. 7, if A phase is OA state, C phase is OB state, at this time clamp capacitor CxaLine voltage in discharge loop is Zero, work as CxaVoltage is higher than DC bus capacitor Cd2When voltage, CxaC can be discharged intod2And by the extra electric quantity consumption in part in power grid On, another part charge and discharge to Cd2On extra electricity can be discharged by the circuit of main circuit.C phase cannot be N-state at this time, Otherwise since the presence of discharge loop 1 makes this discharge loop invalid.
For Fig. 8, if A phase is OB state, C phase is OA state, at this time clamp capacitor CxaLine voltage in discharge loop is Zero, work as CxaVoltage is higher than DC bus capacitor C1When voltage, CxaC can be discharged into1And by the extra electric quantity consumption in part on power grid, Another part charge and discharge is to C1On extra electricity can be discharged by the circuit of main circuit.C phase cannot be P-state at this time, no Then since the presence of discharge loop 3 makes this discharge loop invalid.
By analyzing above it is found that during invertor operation, by the charge or discharge of different circuit, it can make to clamp Position capacitor CxaOn voltage maintain near E/2.
For diode clamp type three-level inverter, there are also mitigate device for power switching overvoltage for the addition of clamp capacitor Effect.By taking A phase as an example, it is assumed that there is no clamp capacitor CxaPresence, as switching tube Qa1When shutdown, due in route we three electricity The presence of sense, in Qa1Both ends will generate induced electromotive force.But due to clamp diode VD1In the presence of so that switching tube Qa1Two The voltage at end is finally clamped at capacitor Cd1Voltage on, overvoltage will not maintain;For switching tube Qa4, the principle of clamper and Switching tube Qa1It is identical.But for switching tube Qa2And Qa3For, situation is different, diode Da2And Da3Pincers can not be provided for it Position access (if overvoltage is more than direct current power source voltage E, can pass through derided capacitors Cd1And Cd2Electric discharge, but this is more than out Close pipe Qa2And Qa3Normal resistance to voltage levels), overvoltage can not just be eliminated.
Clamp capacitor C is addedxaAfterwards, due to CxaRespectively with feedback diode Da2Or Da3Clamp circuit is constituted, so that switch Pipe Qa2Or Qa3The overvoltage generated when shutdown is clamped (CxaVoltage and Cd1Cd2It is identical).
As the above analysis, under system normal operating condition, there are following several for hybrid clamp formula Multilevel Inverters A feature:
(1) when A phase is in switch state OA, C can be realized simply by the presence of switch state N or OB in B, C two-phasexa's Electric discharge.
(2) when A phase is in switch state OB, C can be realized simply by the presence of switch state P or OA in B, C two-phasexa's Electric discharge.
(3) it when A phase is in state P or N, only is possible to realize when substantially bust occurs in DC bus-bar voltage CxaElectric discharge.
The control method for meeting three conditions above can make CxaQuick charge and discharge are able to, so as to keep midpoint The balance of current potential and clamp capacitor voltage.
In conjunction with the analysis to A phase, for hybrid clamp formula Multilevel Inverters proposed by the present invention, it can be deduced that three ratios More general conclusion is as follows:
It (1), in addition can be real simply by the presence of switch state N or OB in two-phase when wherein a phase is in switch state OA The now electric discharge of the phase clamp capacitor.
It (2), in addition can be real simply by the presence of switch state P or OA in two-phase when wherein a phase is in switch state OB The now electric discharge of the phase clamp capacitor.
(3) when wherein a phase is in state P or N, only just having when substantially bust occurs in DC bus-bar voltage can It is able to achieve the electric discharge of the phase clamp capacitor.
By above-mentioned three conclusions it is found that when designing modulator approach, if make switch state as much as possible meet this three Item rule ensures that clamp capacitor successfully charge and discharge, so as to by the balance for guaranteeing midpoint potential.
Fig. 9 is the Multilevel Inverters modulation module using SPWM mode, first by modulating wave uraWith two phase phase differences 180 ° of triangular carrier CA1, CA2Compare: if ura>CA1, then logic 1 is exported;If ura≤CA1, then logical zero is exported.uraWith CA2's Compare similarly.
If two logic outputs add up to 2, switching vector selector (Q is exporteda1, Qa3, Qa2, Qa4)=(1,1,0,0), it is corresponding Vector P;
If two logic outputs add up to 0, switching vector selector (Q is exporteda1, Qa3, Qa2, Qa4)=1 (0,0,1), it is corresponding Vector N;
If two logic outputs add up to 1, modulating wave u is being judgedraWhether 0:u is greater thanraWhen > 0, output switch Vector (Qa1, Qa3, Qa2, Qa4)=(1,0,1,0), corresponding vector OB;uraWhen≤0, switching vector selector (Q is exporteda1, Qa3, Qa2, Qa4) =(0,1,0,1), corresponding vector OA.
It is as shown in Figure 10 hybrid clamp formula Multilevel Inverters A phase bridge arm midpoint output voltage under SPWM modulation system Waveform, bridge arm output+325V, 0V and three level voltages of -325V.Line voltage U of the Figure 11 between A, B phaseab, it can be seen that Line voltage output has ± 650V, ± 325V and five level voltages of 0V.Figure 12 shows dc-link capacitance Cd1And Cd2Electricity Pressure, it can be seen from the figure that when stable operation, Cd1、Cd2Voltage remain at 325V, up and down fluctuation be no more than 1V, be straight Flow the half of busbar voltage.
Above-mentioned analysis the result shows that, the embodiment of the present invention propose hybrid clamp formula Multilevel Inverters topological structure, lead to The switching mode quantity for increasing power switch is crossed, the difficulty of striding capacitance voltage balance control is reduced, it is flexible to improve control Property.Topological structure proposed by the present invention is in photovoltaic generating system, micro-capacitance sensor, wind-power electricity generation, fuel cell grid-connected system, master The occasions such as dynamic power distribution network have broad application prospects.
Those of ordinary skill in the art will understand that the embodiments described herein, which is to help reader, understands this hair Bright principle, it should be understood that protection scope of the present invention is not limited to such specific embodiments and embodiments.This field Those of ordinary skill can according to the present invention disclosed the technical disclosures make it is various do not depart from essence of the invention other are each The specific variations and combinations of kind, these variations and combinations are still within the scope of the present invention.

Claims (1)

1. a kind of Multilevel Inverters topological structure for new energy access and active distribution network specifically includes 12 groups of electric power electricity Sub switch Qa1、Qb1、Qc1、Qa2、Qb2、Qc2、Qa3、Qb3、Qc3、Qa4、Qb4、Qc4, 2 dc-link capacitance Cd1、Cd2, 6 feedbacks two Pole pipe Da2、Db2、Dc2、Da3、Db3、Dc3And 3 clamp capacitor Cxa、Cxb、Cxc, wherein the electronic power switch includes One triode and a clamp diode, the collector of the triode are connected as institute with the cathode of the clamp diode The first terminal of electronic power switch is stated, the emitter of the triode is connected described in conduct with the anode of the clamp diode The Second terminal of electronic power switch, the base stage of the triode connect external pwm control signal;First group of electronic power switch Qa1First terminal, second group of electronic power switch Qb1First terminal, third group electronic power switch Qc1First terminal with First dc-link capacitance Cd1First end be connected, the first input end as the topological structure;
First group of electronic power switch Qa1Second terminal, the 4th group of electronic power switch Qa2First terminal, first anti- Present diode Da2Cathode and the first clamp capacitor CxaFirst end be connected;Second group of electronic power switch Qb1Second Terminal, the 5th group of electronic power switch Qb2First terminal, the second feedback diode Db2Cathode and the second clamp capacitor Cxb's First end is connected;The third group electronic power switch Qc1Second terminal, the 6th group of electronic power switch Qc2First end Son, third feedback diode Qc2Cathode and third clamp capacitor CxcFirst end be connected;The first feedback diode Da2's Anode, the second feedback diode Db2Anode, third feedback diode Dc2Anode, the 4th feedback diode Da3Cathode, Five feedback diode Db3Cathode, the 6th feedback diode Qc3Cathode and the first dc-link capacitance Cd1Second end be connected It connects;
The 4th group of electronic power switch Qa2Second terminal and the 7th group of electronic power switch Qa3First terminal be connected, The first output end as the topological structure;The 5th group of electronic power switch Qb2Second terminal and the 8th group of electric power electricity Sub switch Qb3First terminal be connected, the second output terminal as the topological structure;The 6th group of electronic power switch Qc2Second terminal and the 9th group of electronic power switch Qc3First terminal be connected, the third as the topological structure is defeated Outlet;
The first clamp capacitor CxaSecond end, the 4th feedback diode Da3Anode, the 7th group of electronic power switch Da3's Second terminal and the tenth group of electronic power switch Qa4First terminal be connected;The second clamp capacitor CxbSecond end, the 5th Feedback diode Db3Anode, the 8th group of electronic power switch Qb3Second terminal and the 11st group of electronic power switch Qb4's First terminal is connected;The third clamp capacitor CxcSecond end, the 6th feedback diode Dc3Anode, the 9th group of electric power electricity Sub switch Qc3Second terminal and the 12nd group of electronic power switch Qc4First terminal be connected;
The first feedback diode Da2Anode, the second feedback diode Db2Anode, third feedback diode Dc2Sun Pole, the first dc-link capacitance Cd1Second end and the second dc-link capacitance Cd2First end be connected;Second DC bus Capacitor Cd2Second end and the tenth group of electronic power switch Qa4Second terminal, the 11st group of electronic power switch Qb4Second Terminal and the 12nd group of electronic power switch Qc4Second terminal be connected, the second input terminal as the topological structure;
The relationship and A phase of the switch state of B phase and C phase and output level similarly, in A phase, when for vector P, Qa1、Qa2It leads It is logical, Qa3、Qa4Shutdown, if CxaVoltage be lower than E/2, then Cd1To CxaIt charges;Wherein, E indicates direct current power source voltage;
When for zero vector OA, Qa2、Qa4Conducting, Qa1、Qa3Shutdown, if CxaVoltage be lower than E/2, then Cd2To CxaIt charges;
When for zero vector OB, Qa1、Qa3Conducting, Qa2、Qa4Shutdown, if CxaVoltage be lower than E/2, then Cd1To CxaIt charges;
When for vector N, Qa3、Qa4Conducting, Qa1、Qa2Shutdown, if CxaVoltage be lower than E/2, then Cd2To CxaIt charges;
CxaRespectively with feedback diode Da2Or Da3Clamp circuit is constituted, switching tube Q is madea2Or Qa3The overvoltage generated when shutdown It is clamped, CxaVoltage and Cd1Cd2It is identical;
It is modulated using SPWM mode, by modulating wave uraWith two 180 ° of phase phase difference of triangular carrier CA1, CA2Compare: if ura>CA1, then logic 1 is exported;If ura≤CA1, then logical zero is exported;uraWith CA2Comparison similarly;
If two logic outputs add up to 2, switching vector selector (Qa1, Qa3, Qa2, Qa4)=(1,1,0,0), corresponding vector are exported P;
If two logic outputs add up to 0, switching vector selector (Q is exporteda1, Qa3, Qa2, Qa4)=1 (0,0,1,1), corresponding vector N;
If two logic outputs add up to 1, modulating wave u is judgedraWhether 0:u is greater thanraWhen > 0, switching vector selector (Q is exporteda1, Qa3, Qa2, Qa4)=(1,0,1,0), corresponding vector OB;uraWhen≤0, switching vector selector (Q is exporteda1, Qa3, Qa2, Qa4)=(0,1,0,1), Corresponding vector OA.
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