CN108599604B - Single-phase seven-level inverter and PWM signal modulation method thereof - Google Patents

Single-phase seven-level inverter and PWM signal modulation method thereof Download PDF

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CN108599604B
CN108599604B CN201810356085.5A CN201810356085A CN108599604B CN 108599604 B CN108599604 B CN 108599604B CN 201810356085 A CN201810356085 A CN 201810356085A CN 108599604 B CN108599604 B CN 108599604B
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switch tube
circuit
output
level
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CN108599604A (en
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张琦
李江江
孙向东
任碧莹
安少亮
杨惠
许江涛
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Xian University of Technology
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels

Abstract

The invention discloses a single-phase seven-level inverter and a modulation method thereof, wherein the circuit comprises a switched capacitor circuit and an H-bridge circuit, and the switched capacitor circuit consists of threeThe power switch tube, three diodes and two capacitors, the different switch states of three switch tubes in the control circuit are combined, so that the circuit can output 0.5V respectivelydc、VdcAnd 1.5VdcThree different levels are provided, two capacitors have two modes of series charging or parallel discharging under different working states of the circuit, and the inverter circuit can output-1.5V in totaldc、‑Vdc、0.5Vdc、0V、0.5Vdc、Vdc、1.5VdcThe seven levels solve the problem of capacitor voltage sharing of the existing multi-level inverter circuit and reduce the number of switching tubes.

Description

Single-phase seven-level inverter and PWM signal modulation method thereof
Technical Field
The invention belongs to the field of power electronic technology application, and particularly relates to a single-phase seven-level inverter and a PWM signal modulation method of the inverter.
Background
With the rapid development of renewable energy sources such as wind energy, solar energy, hydroenergy, biomass energy, tidal energy, geothermal energy and the like, the full utilization of the energy sources can increase the energy supply and reduce the environmental pollution. At present, the renewable energy is mainly utilized by adopting a distributed grid-connected power generation technology, and the key technology is to adopt a reasonable inverter topology structure and a grid-connected control strategy so as to obtain a stable grid-connected system and high-quality grid-connected current.
Compared with the traditional two-level inverter, the multi-level inverter has the advantages of small output voltage harmonic wave, small electromagnetic interference, small size filter and the like. The earliest multi-level inverter is a three-level midpoint clamping inverter proposed by japanese scholars in 1980, and after more than 30 years of development, many scholars successively propose a multi-level inverter circuit with practical significance and a plurality of modulation control methods of the multi-level inverter. The main structures of the current multi-level inverter include a diode clamping type, a flying capacitor type and an H-bridge cascade type. The diode clamping circuit needs to ensure the voltage sharing of a capacitor at the direct current side, so that the control complexity is increased, the flying capacitor type also has the problems of capacitor voltage balancing control and redundant switch state optimization, and the H-bridge cascade type needs a plurality of independent direct current power supplies. In addition, as the number of output levels of the three types of multi-level inverter circuits increases, the number of required power switching tubes and capacitors rapidly increases, the system size becomes large, and the cost becomes unacceptable. This violates the high efficiency, high power density and low cost of power electronic devices, so a new multi-level inverter circuit needs to be proposed to meet the requirement of renewable energy grid-connected power generation.
Disclosure of Invention
The invention aims to provide a single-phase seven-level inverter and a PWM (pulse-width modulation) method thereof, which solve the problem of capacitor voltage sharing of the existing multi-level inverter circuit and reduce the number of switching tubes.
The invention provides a single-phase seven-level inverter circuit, which comprises a switched capacitor circuit and an H-bridge circuit;
the switched-capacitor circuit includes: DC power supply VdcSwitching tube S5、S6、S7Diode D1、D2、D3、D4And a capacitor C1、C2(ii) a DC power supply VdcAnode and switch tube S5And S6Is connected to the input terminal of, and VdcNegative electrode of (2) and switching tube S7Is connected to the output terminal of S6And S7Are connected with the input end of the power supply; and S7Is connected with a diode D3Anode and capacitor C2And a negative electrode of C2Anode and diode D1Cathode of (2), diode D2Is connected with the anode of a capacitor C1Negative electrode of (2) is connected with3And D1The anode of (1); switch tube S5Output terminal of and diode D4Anode phase ofConnection, D4Cathode of (2) and C1Positive electrode and D2Are connected with each other.
The H-bridge circuit includes: and the positive bus and the negative bus of the H-bridge circuit are connected with the output port of the switched capacitor circuit, and the output of the H-bridge circuit is connected with a load or a power grid through a filter inductor L.
The scheme is also characterized in that:
and the power switch of the switched capacitor circuit and the power switch of the H-bridge circuit are all IGBT or MOSFET full-control power devices.
The diode D1、D2、D3、D4Are silicon carbide diodes or fast recovery diodes or ultrafast recovery diodes.
The capacitor C1、C2All electrolytic capacitors with consistent parameters.
Eight working mode control modes of the single-phase seven-level inverter circuit are as follows:
working mode 1, controlling the switch tube S1、S4And S6Conducting, switching tube S2、S3、S5And S7Turning off;
working mode 2, controlling the switch tube S1、S4、S5And S7Conducting, switching tube S2、S3、S6Turning off;
working mode 3, controlling the switch tube S1、S4Conducting, switching tube S2、S3、S5、S6、S7Turning off;
working mode 4, control switch tube S4、S5、S7Conducting, switching tube S1、S2、S3、S6Turning off;
working mode 5, controlling the switch tube S2、S5、S7Conducting, switching tube S1、S3、S4、S6And turning off;
working mode 6, controlling the switch tube S2、S3Conducting, switching tube S1、S4、S5、S6、S7Turning off;
working mode 7, controlling the switch tube S2、S3、S5And S7Conducting, switching tube S1、S4、S6Turning off;
working mode 8, controlling the switch tube S2、S3And S6Conducting, switching tube S1、S4、S5And S7And (6) turning off.
According to the scheme, the single-phase seven-level inverter circuit comprises a switched capacitor circuit and an H-bridge circuit, wherein the switched capacitor circuit is a key part for realizing multi-level output of the inverter circuit. The switched capacitor circuit consists of three power switching tubes, three diodes and two capacitors, and can output 0.5V respectively according to different switching state combinations of the three switching tubes in the circuitdc、VdcAnd 1.5VdcThree different levels are provided, two capacitors have two modes of series charging or parallel discharging under different working states of the circuit, so that the capacitors have the capacity of automatic voltage sharing, the voltage of the capacitors is also constant to be half of the power voltage, the output port of the switched capacitor circuit is connected with the positive bus and the negative bus of the H bridge, and when the H bridge circuit works in single polarity, the inverter circuit can output-1.5V in totaldc、-Vdc、0.5Vdc、0V、0.5Vdc、Vdc、1.5VdcSeven levels.
According to another technical scheme, the modulation method of the single-phase seven-level inverter PWM signal controls the working mode of the inverter by adjusting the amplitude of a sinusoidal modulation wave signal M, and when the amplitude is more than 0 and less than 1, the inverter outputs a three-level mode; when 1< M <2, the inverter outputs a five-level mode; when 2< M <3, the inverter outputs a seven level mode;
the sine modulation wave signal M is processed by taking an absolute value to obtain a signal K, the signal K and a carrier wave v3The output signal H is obtained by comparing through the comparator 4, when the signal K is larger thanIs equal to carrier v3When the output signal H of the comparator 4 is 1, otherwise, the output signal H is 0, and the output signal H is used as the switch tube S6The PWM control signal of (1); signal K and carrier v2The output signal I is obtained by comparing the signal K with the carrier v when the signal K is more than or equal to the carrier v2When the signal is input, the output signal I of the comparator 3 is 1, otherwise, the output signal I is 0, and the output signal I and the signal H pass through an XOR gate to obtain a signal P; signal K and carrier v1The output signal G is obtained by comparing through the comparator 2, when the signal K is more than or equal to the carrier wave v1When the signal is input, the output signal G of the comparator 2 is 1, otherwise, the output signal G is 0, the output signal G is output after passing through the NOT gate to obtain a signal N, and the signal N and the signal P are output as a switch tube S after passing through the OR gate5PWM control signal of, and switch the transistor S7PWM control signal of and S5The PWM control signals are synchronous; the sine modulation wave signals M and 0 are compared through a comparator 1 to obtain an output signal E, and the output signal obtained after the signal E and the signal G pass through an AND gate is used as a switching tube S1The PWM control signal of (1); the signal E is processed by a NOT gate to obtain a signal F, and the signal F and the signal G are processed by an AND gate to obtain an output signal as a switching tube S3The PWM control signal of (1); signal F as switch tube S2The signal E is used as a switch tube S4The PWM control signal of (1).
The single-phase seven-level inverter circuit has the following beneficial effects:
(1) the inverter circuit has a small number of switches and low hardware cost; a switched capacitor circuit consisting of three power switching tubes, three diodes and two capacitors is added at the front stage of the H-bridge inverter circuit, and then the seven-level inverter circuit can be obtained.
(2) The voltage of two capacitors in the inverter circuit is equalized, so that a control algorithm is simplified, and meanwhile, the inverter circuit can work in an active inverter mode and can also work in a passive inverter mode.
(3) Compared with the traditional multi-level inverter circuit, the inverter circuit can output direct-current power supply voltage with the maximum amplitude of 1.5 times, so that the input range of the voltage is widened.
Drawings
FIG. 1 is a schematic circuit diagram of a single-phase seven-level inverter of the present invention;
fig. 2(a) - (h) show eight different operation modes of the single-phase seven-level inverter of the present invention;
FIG. 3 is a diagram of output voltage variations of a single-phase seven-circuit inverter at different times;
FIG. 4 is a schematic diagram of a single-phase seven-level inverter modulation driving signal generating logic circuit according to the present invention;
FIG. 5 is a waveform diagram of a modulated driving signal of a single-phase seven-level inverter according to the present invention;
fig. 6 is a schematic diagram of an example output voltage waveform of a single-phase seven-level inverter of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and the following detailed description, but the present invention is not limited to these embodiments.
Fig. 1 is a circuit diagram of a single-phase seven-level inverter of the present invention, which is described in detail as follows:
the circuit of the inverter includes: the device comprises a direct current power supply, a switched capacitor circuit, an H-bridge circuit, a filter inductor L and an alternating current access port;
the switched-capacitor circuit includes: switch tube S5、S6、S7Diode D1、D2、D3、D4And a capacitor C1、C2(ii) a DC power supply VdcAnode and switch tube S5And S6Is connected to the input terminal of, and VdcNegative electrode of (2) and switching tube S7Is connected to the output terminal of S6And S7Are connected with the input end of the power supply; and S7Is connected with a diode D3Anode and capacitor C2And a negative electrode of C2Anode and diode D1Cathode of (2), diode D2Is connected with the anode of a capacitor C1Negative electrode of (2) is connected with3And D1The anode of (1); switch tube S5Output terminal of and diode D4Is connected to the anode D4Of a cathodeThen is reacted with C1Positive electrode and D2Are connected with each other.
The H-bridge circuit comprises four power switch tubes S1、S2、S3、S4S of switching tube in H-bridge circuit1、S3And D in the switched capacitor circuit2Is connected with the cathode of the switching tube S2、S4And V anddcnegative electrode of (2) and switching tube S7The output ends of the two-way valve are connected; power switch tube S1Output terminal of (1), power switch tube S2The input end of the filter inductor is connected with one end of the filter inductor, the other end of the filter inductor is connected with an alternating current port, and a power switch tube S3Output terminal of (1), power switch tube S4The input end of the transformer is connected with an alternating current port.
It should be noted that the switching tube may be a metal oxide semiconductor tube or a junction field effect transistor (MOSFET) or an Insulated Gate Bipolar Transistor (IGBT); when the switching tube is a metal oxide semiconductor tube, the input end of the switching tube is a source electrode, the output end of the switching tube is a drain electrode, and the control end is a grid electrode; when the switch tube is an insulated gate bipolar transistor, the input end of the switch tube is a collector, the output end of the switch tube is an emitter, and the control end is a base. It is understood that other types of switch tubes can be selected from the above eight switch tubes. It should also be noted that the diode may be a silicon carbide diode or a fast recovery diode or an ultrafast recovery diode. It will be appreciated that other types of diodes may be selected for the diodes described. In the embodiment of the present invention, the L filter circuit included in the novel single-phase seven-level inverter circuit may also be an LC filter, an LCL filter, or other filters.
The seven-level inverter circuit can work in a seven-level output mode, a five-level output mode and a three-level output mode, and the seven-level output mode is the key point of the seven-level inverter circuit, so that only eight circuit modes corresponding to the seven-level output mode are described as follows:
a first circuit mode for controlling the switch tube S1、S4And S6Conducting, switching tube S2、S3、S5And S7When the circuit is turned off, the circuit is in the operating state shown in fig. 2(a), and the arrow indicates the positive current flow direction. Diode D1Cut-off, D2And D3On, the capacitance C1And C2In parallel state, the voltage at the parallel end is half of the voltage of the DC power supply which passes through the switch tube S6And a capacitor C1、C2Are connected in series; so that the output voltage of the inverter circuit is 1.5Vdc
A second circuit mode for controlling the switching tube S1、S4、S5And S7Conducting, switching tube S2、S3、S6When the circuit is turned off, the circuit operates as shown in fig. 2(b), and the arrow indicates the positive current flow direction. Diode D1On, D2And D3Cut-off, capacitance C1And C2In series state, the voltage at the series end is the voltage of the DC power supply which passes through the switch tube S5And a capacitor C1、C2Parallel connection; so that the output voltage of the inverter circuit is Vdc
A third circuit mode for controlling the switch tube S1、S4Conducting, switching tube S2、S3、S5、S6、S7When the circuit is turned off, the circuit is in the operating state shown in fig. 2(c), and the arrow indicates the positive current flowing direction. Diode D1Cut-off, D2And D3On, the capacitance C1And C2In parallel state, the voltage of the parallel terminal is half of the voltage of the direct current power supply; so that the output voltage of the inverter circuit is 0.5Vdc
A fourth circuit mode for controlling the switching tube S4、S5、S7Conducting, switching tube S1、S2、S3And S6When the circuit is turned off, the circuit is in the operating state shown in fig. 2(d), and the arrow indicates the positive current flowing direction. Diode D1On, D2And D3Cut-off, capacitance C1And C2In a series state, the voltage of the series end is direct current power voltage; the output voltage of the inverter circuit is 0V.
The fifth circuit mode controls the switch tube S2、S5、S7Conducting, switching tube S1、S3、S4And S6When the circuit is turned off, the circuit is in the operating state shown in fig. 2(e), and the arrow indicates the positive current flowing direction. Diode D1On, D2And D3Cut-off, capacitance C1And C2In a series state, the voltage of the series end is direct current power voltage; the output voltage of the inverter circuit is 0V.
A sixth circuit mode for controlling the switching tube S2、S3Conducting, switching tube S1、S4、S5、S6、S7When the circuit is turned off, the circuit is in the operating state shown in fig. 2(f), and the arrow indicates the positive current flowing direction. Diode D1Cut-off, D2And D3On, the capacitance C1And C2In parallel state, the voltage of the parallel terminal is half of the voltage of the direct current power supply; so that the output voltage of the inverter circuit is-0.5Vdc
A seventh circuit mode for controlling the switching tube S2、S3、S5And S7Conducting, switching tube S1、S4、S6When the circuit is turned off, the circuit is in the operating state shown in fig. 2(g), and the arrow indicates the positive current flowing direction. Diode D1On, D2And D3Cut-off, capacitance C1And C2In series state, the voltage at the series end is the voltage of the DC power supply which passes through the switch tube S5And a capacitor C1、C2Parallel connection; so that the output voltage of the inverter circuit is-Vdc
The eighth circuit mode controls the switch tube S2、S3And S6Conducting, switching tube S1、S4、S5And S7Turning off, the circuit is in the working state as shown in FIG. 2(h), with the arrowThe direction of current flow is positive. Diode D1Cut-off, D2And D3On, the capacitance C1And C2In parallel state, the voltage at the parallel end is half of the voltage of the DC power supply which passes through the switch tube S6And a capacitor C1、C2Are connected in series; so that the output voltage of the inverter circuit is-1.5Vdc
As shown in fig. 3, the graph is an output voltage variation graph corresponding to a single-phase seven-level inverter at different times. In one grid voltage cycle, in different time periods, the inverter operates in different modes, and the output voltage changes along with the conversion of the inverter operation mode:
t0-t1the single-phase seven-level inverter outputs 0 level or 0.5V in a time perioddcThe level, when outputting 0 level, the inverter works in the fourth circuit mode; when the output is 0.5VdcAt this level, the inverter operates in the third circuit mode.
t1-t2The single-phase seven-level inverter outputs 0.5V in a time perioddcLevel or VdcLevel when outputting 0.5VdcAt the level, the inverter operates in the third circuit mode, and when the output V isdcAt this level, the inverter operates in the second circuit mode.
t2-t3The single-phase seven-level inverter outputs V in a time perioddcLevel or 1.5VdcLevel when outputting VdcWhen the level is low, the inverter works in a second circuit mode, and when the output voltage is 1.5VdcAt this level, the inverter operates in the first circuit mode.
Inverter operating at t3-t4At time of the period, the working state and t1-t2With similar time periods, operating at t4-t54At time of the period, the working state and t0-t1The time periods are similar and will not be described in detail herein.
t5-t6The single-phase seven-level inverter outputs 0 level or-0.5V in a time perioddcLevel, when 0 level is output, inversionThe device works in a fifth circuit mode and outputs-0.5VdcAt this level, the inverter operates in the sixth circuit mode.
t6-t7The single-phase seven-level inverter outputs-0.5V in a time perioddcLevel or-VdcLevel when outputting-0.5VdcAt the level, the inverter works in a sixth circuit mode, and when-V is outputdcAt this level, the inverter operates in the seventh circuit mode.
t7-t8The single-phase seven-level inverter outputs-V in a time perioddcLevel or-1.5VdcLevel when outputting-VdcAt the level, the inverter works in a seventh circuit mode and outputs-1.5VdcAt this level, the inverter operates in the eighth circuit mode.
Inverter operating at t8-t9At time of the period, the working state and t6-t7With similar time periods, operating at t9-t10At time of the period, the working state and t5-t6The time periods are similar and will not be described in detail herein.
Corresponding to the working state S of the single-phase three-level inverter circuit1、S2、S3、S4、S5、S6And S7Fig. 4 shows a method for generating a Pulse Width Modulation (PWM) signal of a power switch, which is specifically described as follows:
the sine-modulated wave signal M is a power-frequency sine signal (e.g. 50Hz), and the carrier wave v1、v2、v3The frequencies of the high-frequency triangular carriers are the operating frequencies of the power switch, and for example, the frequencies are selected within the range of 10kHz to 20 kHz. Carrier v1、v2、v3Are stacked from low to high in sequence.
The amplitude of the sine modulation wave signal M in different ranges determines that the inverter works in a plurality of level modes, namely when 0<M<When 1, the inverter outputs a three-level mode; when 1 is<M<When 2, the inverter outputs a five-level mode; when 2 is in<M<And 3, the inverter outputs a seven-level mode. The sine modulation wave signal M is obtained after absolute value processingSignal K, signal K and carrier v3The output signal H is obtained by comparing through the comparator 4, when the signal K is more than or equal to the carrier wave v3When the output signal H of the comparator 4 is 1, otherwise, the output signal H is 0, and the output signal H is used as the switch tube S6The PWM control signal of (1); signal K and carrier v2The output signal I is obtained by comparing the signal K with the carrier v when the signal K is more than or equal to the carrier v2When the signal is input, the output signal I of the comparator 3 is 1, otherwise, the output signal I is 0, and the output signal I and the signal H pass through an XOR gate to obtain a signal P; signal K and carrier v1The output signal G is obtained by comparing through the comparator 2, when the signal K is more than or equal to the carrier wave v1When the signal is input, the output signal G of the comparator 2 is 1, otherwise, the output signal G is 0, the output signal G is output after passing through the NOT gate to obtain a signal N, and the signal N and the signal P are output as a switch tube S after passing through the OR gate5PWM control signal of, and switch the transistor S7PWM control signal of and S5The PWM control signals are synchronous; the sine modulation wave signals M and 0 are compared through a comparator 1 to obtain an output signal E, and the output signal obtained after the signal E and the signal G pass through an AND gate is used as a switching tube S1The PWM control signal of (1); the signal E is processed by a NOT gate to obtain a signal F, and the signal F and the signal G are processed by an AND gate to obtain an output signal as a switching tube S3The PWM control signal of (1); signal F as switch tube S2The signal E is used as a switch tube S4The PWM control signal of (1).
The waveforms of the PWM control signals of the respective switching tubes obtained according to the above modulation method are shown in fig. 5. Fig. 6 is a graph of an example output voltage waveform of the single-phase seven-level inverter, and the example output voltage of the seven-level inverter changes from seven level to five level to three level along with the amplitude change of the modulation wave. The inverter of the invention only uses the capacitor C1And C2The number of capacitors is reduced, voltage sharing of capacitor voltage can be achieved once in each switching period due to the working characteristics of the circuit, the fact that the voltage of the two capacitors can keep almost the same voltage value is guaranteed, the complexity of the inverter is reduced, and the reliability of the inverter is improved. The diode clamping type inverter which can output seven levels equally needs 12 switching tubes,The flying capacitor type inverter outputting seven levels needs 12 switching tubes and 6 capacitors, while the circuit of the invention only needs 7 switching tubes, 4 diodes and 2 capacitors, thereby greatly reducing the system volume and the cost.

Claims (6)

1. A single-phase seven-level inverter, comprising: the circuit comprises a direct-current power supply, a switched capacitor circuit, an H-bridge circuit and a filter inductor L;
the switched capacitor circuit comprises three power switch tubes S5、S6、S7Four diodes D1、D2、D3、D4And two capacitors C1、C2(ii) a The positive pole of the DC power supply and the switch tube S5And S6Is connected with the negative pole of the DC power supply and the switch tube S7Is connected to the output terminal of S6And S7Are connected with the input end of the power supply; s7Is connected with a diode D3Anode and capacitor C2Negative electrode of (1), C2Anode and diode D1Cathode of (2), diode D2Is connected with the anode of a capacitor C1Negative electrode of (2) is connected with3And D1The anode of (1); switch tube S5Output terminal of and diode D4Is connected to the anode D4And C1Positive electrode and D2The cathode of the anode is connected;
the positive bus and the negative bus of the H-bridge circuit are connected with the output port of the switched capacitor circuit, and the output of the H-bridge circuit is connected with a load or a power grid through the filter inductor L;
the H-bridge circuit comprises four power switch tubes S1、S2、S3、S4S of switching tube in H-bridge circuit1、S3And D in the switched capacitor circuit2Is connected with the cathode of the switching tube S2、S4And V anddcnegative electrode of (2) and switching tube S7The output ends of the two-way valve are connected; power switch tube S1Output terminal of (1), power switch tube S2Is inputtedOne end of the filter inductor is connected with the other end of the filter inductor, the other end of the filter inductor is connected with an alternating current port, and a power switch tube S3Output terminal of (1), power switch tube S4The input end of the transformer is connected with an alternating current port.
2. The single-phase seven-level inverter according to claim 1, wherein the power switch tube of the switched capacitor circuit and the power switch tube of the H-bridge circuit are all IGBT or MOSFET fully-controlled power devices.
3. The single-phase seven-level inverter according to claim 1, wherein the diode D1、D2、D3、D4Are silicon carbide diodes or fast recovery diodes or ultrafast recovery diodes.
4. The single-phase seven-level inverter according to claim 1, wherein the capacitor C1、C2All electrolytic capacitors with consistent parameters.
5. The single-phase seven-level inverter according to any one of claims 1 to 4, wherein eight operation mode control modes of the single-phase seven-level inverter circuit are as follows:
working mode 1, controlling the switch tube S1、S4And S6Conducting, switching tube S2、S3、S5And S7Turning off;
working mode 2, controlling the switch tube S1、S4、S5And S7Conducting, switching tube S2、S3、S6Turning off;
working mode 3, controlling the switch tube S1、S4Conducting, switching tube S2、S3、S5、S6、S7Turning off;
working mode 4, control switch tube S4、S5、S7Conducting, switching tube S1、S2、S3、S6Turning off;
working mode 5, controlling the switch tube S2、S5、S7Conducting, switching tube S1、S3、S4、S6And turning off;
working mode 6, controlling the switch tube S2、S3Conducting, switching tube S1、S4、S5、S6、S7Turning off;
working mode 7, controlling the switch tube S2、S3、S5And S7Conducting, switching tube S1、S4、S6Turning off;
working mode 8, controlling the switch tube S2、S3And S6Conducting, switching tube S1、S4、S5And S7And (6) turning off.
6. The method for modulating the PWM signal of the single-phase seven-level inverter according to any one of claims 1 to 4, wherein the operation mode of the inverter is controlled by adjusting the amplitude of the sinusoidal modulation wave signal M, and when 0< M <1, the inverter outputs a three-level mode; when 1< M <2, the inverter outputs a five-level mode; when 2< M <3, the inverter outputs a seven level mode;
the sine modulation wave signal M is processed by taking an absolute value to obtain a signal K, the signal K and a carrier wave v3The output signal H is obtained by comparing through the comparator 4, when the signal K is more than or equal to the carrier wave v3When the output signal H of the comparator 4 is 1, otherwise, the output signal H is 0, and the output signal H is used as the switch tube S6The PWM control signal of (1); signal K and carrier v2The output signal I is obtained by comparing the signal K with the carrier v when the signal K is more than or equal to the carrier v2When the signal is input, the output signal I of the comparator 3 is 1, otherwise, the output signal I is 0, and the output signal I and the signal H pass through an XOR gate to obtain a signal P; signal K and carrier v1The output signal G is obtained by comparing through the comparator 2, when the signal K is more than or equal to the carrier wave v1The output signal G of the comparator 2 is 1,otherwise, the output signal G is 0, the output signal G passes through the non-gate to obtain a signal N, and the signal N and the signal P pass through the OR gate to be used as the switch tube S5PWM control signal of, and switch the transistor S7PWM control signal of and S5The PWM control signals are synchronous; the sine modulation wave signals M and 0 are compared through a comparator 1 to obtain an output signal E, and the output signal obtained after the signal E and the signal G pass through an AND gate is used as a switching tube S1The PWM control signal of (1); the signal E is processed by a NOT gate to obtain a signal F, and the signal F and the signal G are processed by an AND gate to obtain an output signal as a switching tube S3The PWM control signal of (1); signal F as switch tube S2The signal E is used as a switch tube S4The PWM control signal of (1).
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