CN112564526A - Three-phase T-shaped three-level double-output inverter - Google Patents
Three-phase T-shaped three-level double-output inverter Download PDFInfo
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- CN112564526A CN112564526A CN202011388576.1A CN202011388576A CN112564526A CN 112564526 A CN112564526 A CN 112564526A CN 202011388576 A CN202011388576 A CN 202011388576A CN 112564526 A CN112564526 A CN 112564526A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/70—Wind energy
- Y02E10/76—Power conversion electric or electronic aspects
Abstract
The invention relates to a three-phase T-shaped three-level double-output inverter, which is characterized in that: the direct current side of the input end is connected with two capacitors and 21 switch modules, and the inverter stage 1 and the inverter stage 2 are used as two groups of three-phase loads carried by the output end; the inverter is mainly applied to the field needing double alternating current, and can enable a group of direct current input voltage to output two groups of three-phase alternating current voltages with adjustable frequency and amplitude through the inverter circuit. The three-level inverter can be better applied to high-voltage and high-power occasions, the voltage stress on a switch of the three-level inverter is lower than that of a switch of the two-level inverter, and the output waveform is closer to a sine wave. And the efficiency of the T-shaped inverter is higher. The double-alternating-current power generation system can invert an input group of direct current into two groups of alternating currents, is widely applied to the fields of wind power generation systems, electric automobiles, rail locomotive traction and the like which need double alternating currents, and has the advantages of reasonable structure, low cost, small equipment volume, good effect and the like.
Description
Technical Field
The invention relates to the technical field of power electronic conversion devices, in particular to a three-phase T-shaped three-level double-output inverter.
Background
An inverter, as a converter that directly converts dc power to ac power, can supply ac loads, but it can only convert dc power to a set of three-phase ac outputs. The double-level double-output inverter structure is useless in the fields of wind power generation systems, electric automobiles, rail locomotive traction and the like which need double alternating current, and therefore scholars have proposed a double-level double-output inverter structure. However, the two-level inverter cannot be applied to high-voltage and high-power occasions better. Therefore, a three-phase T-shaped three-level dual-output inverter is provided. The three-level inverter can be better applied to high-voltage and high-power occasions, the voltage stress on a switch of the three-level inverter is lower than that of a switch of the two-level inverter, and the output waveform is closer to a sine wave. And the efficiency of the T-shaped inverter is higher. By combining the specific double-alternating-current field, the three-level double-output inverter can reduce the equipment volume and the cost to a certain extent. The three-phase T-shaped three-level double-output inverter can be better applied to the field of double alternating currents.
Disclosure of Invention
The invention aims to solve the problem of a high-voltage high-capacity inverter required in the field of double alternating current output, and provides a topological structure of a three-phase T-shaped three-level double-output inverter, which has the advantages of reasonable structure, low cost, wide application and good effect.
The technical scheme adopted for realizing the purpose of the invention is that the three-phase T-shaped three-level double-output inverter is characterized in that: it includes: the DC side of the input end is connected with a capacitor CUAnd a capacitor CLThe three-phase load of the inverter stage 1 is Z, the switch modules A1-A7, the switch modules B1-B7, the switch modules C1-C7a1、Zb1、Zc1The three-phase load carried by the inverter stage 2 is Za2、Zb2、Zc2;
The switch modules A1-A7, B1-B7 and C1-C7 have the same structure and are respectively composed of an insulated gate bipolar transistor and an anti-parallel diode; diode of any of the switch modulesThe anode of the diode is connected with the emitter of the insulated gate bipolar transistor, and the cathode of the diode is connected with the collector of the insulated gate bipolar transistor; defining the emitter of the insulated gate bipolar transistor of any switch module as the emitter of the switch module, the collector of the insulated gate bipolar transistor as the collector of the switch module, the switch module is represented by symbol Xk, and the insulated gate bipolar transistor in the switch module is represented by symbol SXkSymbol D for indicating, diodeXkDenotes, symbol SXkAnd symbol DXkThe subscript Xk of (1) represents the switch module where it is located, wherein, when X belongs to { A, B, C }, k belongs to {1, 2, 3, 4, 5, 6, 7 };
the DC side is connected to two capacitors with voltage source property, which are respectively called as capacitor CUAnd CLCapacitor CUThe positive electrode of the capacitor C is connected with the positive electrode end P of the direct current busUNegative electrode of (1) and capacitor CLIs connected to the positive pole of the capacitor CUNegative electrode of (1) and capacitor CLIs defined as a DC neutral point O with a potential of 0 and a capacitance CLIs connected with the negative end N of the direct current bus, and the voltage between the positive end P and the negative end N is UdThe voltage between the positive terminal P and the neutral point O isThe voltage between the neutral point O and the negative terminal is
The collector of the switch module A1 is connected with the positive terminal P of the direct-current bus, the emitter of the switch module A1 is connected with the collector of the switch module A2, the point at which the emitter of the switch module A1 is connected with the collector of the switch module A2 is defined as an a-phase output terminal a1 of the inverter stage 1, the emitter of the switch module A2 is connected with the collector of the switch module A3, the point at which the emitter of the switch module A2 is connected with the collector of the switch module A3 is defined as an a-phase output terminal a2 of the inverter stage 2, and the emitter of the switch module A3 is connected with the negative terminal N of the direct-current bus; the emitter of the switch module A4 is connected with the DC side midpoint O, the collector of the switch module A4 is connected with the collector of the switch module A5, and the emitter of the switch module A5 is connected with the output end a 1; the emitter of the switch module A6 is connected with the DC side midpoint O, the collector of the switch module A6 is connected with the collector of the switch module A7, and the emitter of the switch module A7 is connected with the output end a 2;
a collector of the switch module B1 is connected with a positive electrode end P of the direct current bus, an emitter of the switch module B1 is connected with a collector of the switch module B2, a point at which the emitter of the switch module B1 is connected with the collector of the switch module B2 is defined as a B-phase output end B1 of the inverter stage 1, an emitter of the switch module B2 is connected with a collector of the switch module B3, a point at which the emitter of the switch module B2 is connected with the collector of the switch module B3 is defined as a B-phase output end B2 of the inverter stage 2, and an emitter of the switch module B3 is connected with a negative electrode end N of the direct current bus; the emitter of the switch module B4 is connected to the DC side midpoint O, the collector of the switch module B4 is connected to the collector of the switch module B5, and the emitter of the switch module B5 is connected to the output terminal B1; the emitter of the switch module B6 is connected to the DC side midpoint O, the collector of the switch module B6 is connected to the collector of the switch module B7, and the emitter of the switch module B7 is connected to the output terminal B2;
a collector of the switch module C1 is connected to the positive terminal P of the dc bus, an emitter of the switch module C1 is connected to a collector of the switch module C2, and a point at which the emitter of the switch module C1 is connected to the collector of the switch module C2 is defined as a C-phase output terminal C1 of the inverter stage 1, an emitter of the switch module C2 is connected to a collector of the switch module C3, and a point at which the emitter of the switch module C2 is connected to the collector of the switch module C3 is defined as a C-phase output terminal C2 of the inverter stage 2, and an emitter of the switch module C3 is connected to the negative terminal N of the dc bus; the emitter of the switch module C4 is connected with the DC side midpoint O, the collector of the switch module C4 is connected with the collector of the switch module C5, and the emitter of the switch module C5 is connected with the output end C1; the emitter of the switch module C6 is connected with the DC side midpoint O, the collector of the switch module C6 is connected with the collector of the switch module C7, and the emitter of the switch module C7 is connected with the output end C2;
defining two sets of outputs of an inverterThe three-phase load of the inverter stage 1 is Za1、Zb1、Zc1The three-phase load carried by the inverter stage 2 is Za2、Zb2、Zc2;
Three-phase load Za1、Zb1、Zc1Are connected to the output terminal a1, the output terminal b1, the output terminal c1, respectively, and the other ends thereof are connected together;
three-phase load Za2、Zb2、Zc2Are connected to the output terminal a2, the output terminal b2, the output terminal c2, respectively, and have the other ends connected together.
The invention discloses a three-phase T-shaped three-level double-output inverter which is mainly applied to the field needing double alternating current and can enable a group of direct-current input voltage to output two groups of three-phase alternating-current voltages with adjustable frequency and amplitude through an inverter circuit. The three-level inverter can be better applied to high-voltage and high-power occasions, the voltage stress on a switch of the three-level inverter is lower than that of a switch of the two-level inverter, and the output waveform is closer to a sine wave. And the efficiency of the T-shaped inverter is higher. The double-alternating-current power generation system can invert an input group of direct current into two groups of alternating currents, is widely applied to the fields of wind power generation systems, electric automobiles, rail locomotive traction and the like which need double alternating currents, and has the advantages of reasonable structure, low cost, small equipment volume, good effect and the like.
Drawings
FIG. 1 is a three-phase T-type three-level dual-output inverter topology structure diagram;
FIG. 2 is a schematic diagram of the operation of mode 1, operating condition 1;
FIG. 3 is a schematic diagram of the operation of mode 1 operating mode 2;
FIG. 4 is an operational schematic diagram of mode 1 operating state 3;
FIG. 5 is a schematic diagram of the operation of mode 2 operating condition 1;
FIG. 6 is an operational schematic diagram of mode 2 operating state 2;
FIG. 7 is a schematic diagram of the operation of mode 2 operating state 3;
FIG. 8 is an inverse level 1 space vector distribution diagram;
FIG. 9 is an inverse level 2 space vector distribution plot;
fig. 10 is a schematic diagram of the current waveform output by the inverter stage 1;
fig. 11 is a schematic diagram of the current waveform output by the inverter stage 2;
FIG. 12 shows the load Z output by inverter stage 1a1A phase voltage schematic;
FIG. 13 shows the load Z output by inverter stage 2a2Phase voltage diagrams.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Referring to fig. 1, the three-phase T-type three-level dual-output inverter of the present invention includes: the DC side of the input end is connected with a capacitor CUCapacitor CL21 switch modules are connected with two groups of three-phase loads, the 21 switch modules are respectively modules A1-A7, switch modules B1-B7, switch modules C1-C7, and the three-phase load carried by the inverter stage 1 is Za1、Zb1、Zc1The three-phase load carried by the inverter stage 2 is Za2、Zb2、Zc2(ii) a The switch modules A1-A7, B1-B7 and C1-C7 have the same structure and are respectively composed of an insulated gate bipolar transistor and an anti-parallel diode; the anode of the diode of any switch module is connected with the emitter of the insulated gate bipolar transistor, and the cathode of the diode is connected with the collector of the insulated gate bipolar transistor; defining the emitter of the insulated gate bipolar transistor of any switch module as the emitter of the switch module, the collector of the insulated gate bipolar transistor as the collector of the switch module, the switch module is represented by symbol Xk, and the insulated gate bipolar transistor in the switch module is represented by symbol SXkSymbol D for indicating, diodeXkDenotes, symbol SXkAnd symbol DXkThe subscript Xk of (1) represents the switch module where it is located, wherein, when X belongs to { A, B, C }, k belongs to {1, 2, 3, 4, 5, 6, 7 }; the DC side is connected to two capacitors with voltage source property, which are respectively called as capacitor CUAnd CLCapacitor CUPositive pole and positive pole of DC busTerminal P is connected to capacitor CUNegative electrode of (1) and capacitor CLIs connected to the positive pole of the capacitor CUNegative electrode of (1) and capacitor CLIs defined as a DC neutral point O with a potential of 0 and a capacitance CLIs connected with the negative end N of the direct current bus, and the voltage between the positive end P and the negative end N is UdThe voltage between the positive terminal P and the neutral point O isThe voltage between the neutral point O and the negative terminal isThe collector of the switch module A1 is connected with the positive terminal P of the direct-current bus, the emitter of the switch module A1 is connected with the collector of the switch module A2, the point at which the emitter of the switch module A1 is connected with the collector of the switch module A2 is defined as an a-phase output terminal a1 of the inverter stage 1, the emitter of the switch module A2 is connected with the collector of the switch module A3, the point at which the emitter of the switch module A2 is connected with the collector of the switch module A3 is defined as an a-phase output terminal a2 of the inverter stage 2, and the emitter of the switch module A3 is connected with the negative terminal N of the direct-current bus; the emitter of the switch module A4 is connected with the DC side midpoint O, the collector of the switch module A4 is connected with the collector of the switch module A5, and the emitter of the switch module A5 is connected with the output end a 1; the emitter of the switch module A6 is connected with the DC side midpoint O, the collector of the switch module A6 is connected with the collector of the switch module A7, and the emitter of the switch module A7 is connected with the output end a 2; a collector of the switch module B1 is connected with a positive electrode end P of the direct current bus, an emitter of the switch module B1 is connected with a collector of the switch module B2, a point at which the emitter of the switch module B1 is connected with the collector of the switch module B2 is defined as a B-phase output end B1 of the inverter stage 1, an emitter of the switch module B2 is connected with a collector of the switch module B3, a point at which the emitter of the switch module B2 is connected with the collector of the switch module B3 is defined as a B-phase output end B2 of the inverter stage 2, and an emitter of the switch module B3 is connected with a negative electrode end N of the direct current bus; the emitter of switch module B4 is connected to DC side midpoint O, and the set of switch module B4The electrode is connected with the collector of the switch module B5, and the emitter of the switch module B5 is connected with the output terminal B1; the emitter of the switch module B6 is connected to the DC side midpoint O, the collector of the switch module B6 is connected to the collector of the switch module B7, and the emitter of the switch module B7 is connected to the output terminal B2; a collector of the switch module C1 is connected to the positive terminal P of the dc bus, an emitter of the switch module C1 is connected to a collector of the switch module C2, and a point at which the emitter of the switch module C1 is connected to the collector of the switch module C2 is defined as a C-phase output terminal C1 of the inverter stage 1, an emitter of the switch module C2 is connected to a collector of the switch module C3, and a point at which the emitter of the switch module C2 is connected to the collector of the switch module C3 is defined as a C-phase output terminal C2 of the inverter stage 2, and an emitter of the switch module C3 is connected to the negative terminal N of the dc bus; the emitter of the switch module C4 is connected with the DC side midpoint O, the collector of the switch module C4 is connected with the collector of the switch module C5, and the emitter of the switch module C5 is connected with the output end C1; the emitter of the switch module C6 is connected with the DC side midpoint O, the collector of the switch module C6 is connected with the collector of the switch module C7, and the emitter of the switch module C7 is connected with the output end C2; two groups of outputs of the inverter are defined as an inverter stage 1 and an inverter stage 2, and three-phase load carried by the inverter stage 1 is Za1、Zb1、Zc1The three-phase load carried by the inverter stage 2 is Za2、Zb2、Zc2(ii) a Three-phase load Za1、Zb1、Zc1Are connected to the output terminal a1, the output terminal b1, the output terminal c1, respectively, and the other ends thereof are connected together; three-phase load Za2、Zb2、Zc2Are connected to the output terminal a2, the output terminal b2, the output terminal c2, respectively, and have the other ends connected together.
As shown in fig. 1, by applying reasonable driving signals to the switching module, the three-phase T-type three-level dual-output inverter can convert a single dc input voltage into two sets of three-phase ac voltages with adjustable frequencies and amplitudes.
The circuit has two working modes, wherein the mode 1 is that the inverter stage 1 works in an effective working state, and the mode 2 is that the inverter stage 2 works in an effective working state. When in useWhen the inverter stage 1 works in an effective working state, the switch modules A3, B3 and C3 are in a conducting state, and the switch modules a6, a7, B6, B7, C6 and C7 are in a closing state; when the inverter stage 2 operates in the active operating state, the switching modules a1, B1 and C1 are in the on state, and the switching modules a4, a5, B4, B5, C4 and C5 are in the off state. When the circuit works in the mode 1, each phase output end of the inverter stage 1 is connected with the voltage U of the direct current side midpoint Ox1o(x ∈ { a, b, c }) has three operating states, which are: working state 1 is Ux1o=+U d2; working state 2 is U x1o0; working state 3 is Ux1o=-Ud/2. When the circuit works in the mode 2, each phase output end of the inverter stage 2 has the voltage U of the direct current side middle point Ox2o(x ∈ { a, b, c }) there are also three operating states, respectively: working state 1 is Ux2o=+U d2; (ii) a Working state 2 is U x2o0; working state 3 is Ux2o=-Ud/2. The inverter stage 1 and the inverter stage 2 work alternately in one period, the inverter stage 1 works in the first half period, and the inverter stage 2 works in the second half period. The following is a detailed description of the various operating states and their operating principles, which are given by way of example for phase a, and for phases b and c, the same applies to phase a.
Operating state 1 of mode 1: for switch SA1、SA4When a drive signal is applied, if a current flows from the inverter circuit to the load, the current flows from the point P through the point SA1Reaching the output terminal a1, as shown by the dotted line in fig. 2, the potential of the output terminal a1 is equal to the potential of point P, i.e. the inverter stage 1 is in the working state 1 and outputs + U d2; if the current flows from the load to the inverter circuit, the current flows from the output end A1Via a freewheeling diode DA1Flows into point P as shown by the horizontal dashed line in fig. 2, and the potential of the output terminal a1 is still equal to the potential of point P.
Operating state 2 of mode 1: for switch SA4、SA5Applying a drive signal to the load from the inverter circuit, i.e. from the neutral point O via the freewheeling diode DA4、SA5Reaching the output terminal a1, the potential of the output terminal a1 is equal to the potential of the point O, i.e., 0 potential, i.e., the dotted line in fig. 3Inverter stage 1 outputs 0; when current flows from the load to the inverter circuit, the current flows from the output terminal a1 through the freewheeling diode DA5、SA4Flows into point O as shown by the horizontal dashed line in fig. 3, and the potential of the output terminal a1 is still equal to the potential of point O.
Operating state 3 of mode 1: for switch SA2、SA5When a drive signal is applied, if a current flows from the inverter circuit to the load, the current flows from the point N through the freewheeling diode DA3、DA2To the output terminal a1, as shown by the dotted line in fig. 4, the potential of the output terminal a1 is equal to the potential of N, i.e., output-U of the inverter stage 1d2; when current flows from the load to the inverter circuit, the current flows from the output terminal a1 through SA2、SA3Flows into point N as shown by the horizontal dotted line in fig. 4, and the potential of the output terminal a1 is still equal to the potential of point N.
Operating state 1 of mode 2: for switch SA2、SA6When a drive signal is applied, if a current flows from the inverter circuit to the load, the current flows from the point P through the point SA1、SA2Reaching the output terminal a2, as shown by the dotted line in fig. 5, the potential of the output terminal a2 is equal to the potential of the point P, i.e. the inverter stage 2 is in the working state 1 and outputs + U d2; when current flows from the load to the inverter circuit, the current flows from the output terminal a2 through the freewheeling diode DA2、DA1Flows into point P as shown by the horizontal dotted line in fig. 5, and the potential of the output terminal a2 is still equal to the potential of point P.
Operating state 2 of mode 2: for switch SA6、SA7Applying a drive signal to the load from the inverter circuit, i.e. from the neutral point O via the freewheeling diode DA6、SA7Reaching the output terminal a2, as shown by the dotted line in fig. 6, the potential of the output terminal a2 is equal to the potential of the point O, i.e., 0 potential, i.e., 0 is output by the inverter stage 2; when current flows from the load to the inverter circuit, the current flows from the output terminal a2 through the freewheeling diode DA7、SA6Flows into point O as shown by the horizontal dashed line in fig. 6, and the potential of the output terminal a2 is still equal to the potential of point O.
Operating state 3 of mode 2: for switch SA3、SA7Applying a drive signal if the current is reversedThe circuit flows to the load, i.e. from point N via the freewheeling diode DA3To the output terminal a2, as shown by the dotted line in fig. 7, the potential of the output terminal a2 is equal to the potential of N, i.e., output-U of the inverter stage 2d2; when current flows from the load to the inverter circuit, the current flows from the output terminal a2 through SA3Flows into point N as shown by the horizontal dotted line in fig. 7, and the potential of the output terminal a2 is still equal to the potential of point N.
TABLE 1 relationship between switching state and output level of three-level double-output IGBT (take phase a as an example)
Table 1 summarizes the on and off states of the switches according to the above-mentioned operating principle of the circuit, and redefines the output voltage of each inverter stage corresponding to each switch state. In one period, the circuit works in a mode 1 and a mode 2 alternately, the inverter stage 1 works in an effective working state in the first half period, and the inverter stage 2 works in an effective working state in the second half period. The feasibility of the circuit is verified by means of virtual space vector adjustment. Fig. 8 and 9 show the spatial vector distribution diagrams of the inversion stage 1 and the inversion stage 2. The number of the large sectors is 6, and each large sector has 5 small sectors. Assuming that the output reference voltage vectors of the inverter stage 1 and the inverter stage 2 are both located in the first small sector of the first large sector, three basic space voltage vectors of the synthesized voltage reference vector are determined according to the latest three-vector principle, and then the action time of the vector is calculated according to the volt-second balance principle. As can be seen from the above, since the inverter stage 1 and the inverter stage 2 work alternately in one cycle, the duty ratio of each inverter stage should be added to 1/2. This gives:
wherein d is11、d12、d13Duty ratios of first small sector effective vectors of the inverter stage 1 in a first large sector respectively; d21、d22、d23The duty cycles of the first small sector active vectors at the first large sector of the inverter stage 2, respectively. U shaperef1For the reference voltage of inverter stage 1, Uref2For the reference voltage of inverter stage 2, the switching order and the action time under the first small sector are determined, from table 2.
TABLE 2 switching sequence and action time
In order to verify the effectiveness of the circuit under this modulation method, simulations were performed by MATLAB. The simulation parameters are as follows: setting the DC side voltage toThe amplitude of the three-phase output voltage of the inverter 1 is 80V, and the frequency is 50 Hz; setting the amplitude of three-phase output phase voltage of the inverter 2 to be 80V and the frequency to be 60 Hz; the three-phase load resistance of the inverter 1 is 6 omega, and the inductance is 25 mH; the three-phase load resistance of the inverter 2 is 6 omega, and the inductance is 25 mH. Fig. 10 of the simulated waveform diagram shows the current waveform output by inverter stage 1; fig. 11 shows the current waveform output by the inverter stage 2; FIG. 12 shows the load Z output by inverter stage 1a1A phase voltage; FIG. 13 shows the load Z output by inverter stage 2a2Phase voltages.
Through the simulation, the feasibility of the three-phase T-shaped three-level dual-output inverter topology is verified under the modulation method of virtual space vector regulation.
Although the present invention has been described in connection with the accompanying drawings, the present invention is not limited to the above-described embodiments, which are illustrative rather than restrictive, and those skilled in the art can make other forms without departing from the spirit of the present invention, which fall within the scope of the present invention.
Claims (1)
1. The utility model provides a three-phase T type three-level dual output inverter which characterized in that: it includes: the DC side of the input end is connected with a capacitor CUAnd a capacitor CLThe three-phase load of the inverter stage 1 is Z, the switch modules A1-A7, the switch modules B1-B7, the switch modules C1-C7a1、Zb1、Zc1The three-phase load carried by the inverter stage 2 is Za2、Zb2、Zc2;
The switch modules A1-A7, B1-B7 and C1-C7 have the same structure and are respectively composed of an insulated gate bipolar transistor and an anti-parallel diode; the anode of the diode of any switch module is connected with the emitter of the insulated gate bipolar transistor, and the cathode of the diode is connected with the collector of the insulated gate bipolar transistor; defining the emitter of the insulated gate bipolar transistor of any switch module as the emitter of the switch module, the collector of the insulated gate bipolar transistor as the collector of the switch module, the switch module is represented by symbol Xk, and the insulated gate bipolar transistor in the switch module is represented by symbol SXkSymbol D for indicating, diodeXkDenotes, symbol SXkAnd symbol DXkThe subscript Xk of (1) represents the switch module where it is located, wherein, when X belongs to { A, B, C }, k belongs to {1, 2, 3, 4, 5, 6, 7 };
the DC side is connected to two capacitors with voltage source property, which are respectively called as capacitor CUAnd CLCapacitor CUThe positive electrode of the capacitor C is connected with the positive electrode end P of the direct current busUNegative electrode of (1) and capacitor CLIs connected to the positive pole of the capacitor CUNegative electrode of (1) and capacitor CLIs defined as a DC neutral point O with a potential of 0 and a capacitance CLIs connected with the negative end N of the direct current bus, and the voltage between the positive end P and the negative end N is UdThe voltage between the positive terminal P and the neutral point O isThe voltage between the neutral point O and the negative terminal is
The collector of the switch module A1 is connected with the positive terminal P of the direct-current bus, the emitter of the switch module A1 is connected with the collector of the switch module A2, the point at which the emitter of the switch module A1 is connected with the collector of the switch module A2 is defined as an a-phase output terminal a1 of the inverter stage 1, the emitter of the switch module A2 is connected with the collector of the switch module A3, the point at which the emitter of the switch module A2 is connected with the collector of the switch module A3 is defined as an a-phase output terminal a2 of the inverter stage 2, and the emitter of the switch module A3 is connected with the negative terminal N of the direct-current bus; the emitter of the switch module A4 is connected with the DC side midpoint O, the collector of the switch module A4 is connected with the collector of the switch module A5, and the emitter of the switch module A5 is connected with the output end a 1; the emitter of the switch module A6 is connected with the DC side midpoint O, the collector of the switch module A6 is connected with the collector of the switch module A7, and the emitter of the switch module A7 is connected with the output end a 2;
a collector of the switch module B1 is connected with a positive electrode end P of the direct current bus, an emitter of the switch module B1 is connected with a collector of the switch module B2, a point at which the emitter of the switch module B1 is connected with the collector of the switch module B2 is defined as a B-phase output end B1 of the inverter stage 1, an emitter of the switch module B2 is connected with a collector of the switch module B3, a point at which the emitter of the switch module B2 is connected with the collector of the switch module B3 is defined as a B-phase output end B2 of the inverter stage 2, and an emitter of the switch module B3 is connected with a negative electrode end N of the direct current bus; the emitter of the switch module B4 is connected to the DC side midpoint O, the collector of the switch module B4 is connected to the collector of the switch module B5, and the emitter of the switch module B5 is connected to the output terminal B1; the emitter of the switch module B6 is connected to the DC side midpoint O, the collector of the switch module B6 is connected to the collector of the switch module B7, and the emitter of the switch module B7 is connected to the output terminal B2;
a collector of the switch module C1 is connected to the positive terminal P of the dc bus, an emitter of the switch module C1 is connected to a collector of the switch module C2, and a point at which the emitter of the switch module C1 is connected to the collector of the switch module C2 is defined as a C-phase output terminal C1 of the inverter stage 1, an emitter of the switch module C2 is connected to a collector of the switch module C3, and a point at which the emitter of the switch module C2 is connected to the collector of the switch module C3 is defined as a C-phase output terminal C2 of the inverter stage 2, and an emitter of the switch module C3 is connected to the negative terminal N of the dc bus; the emitter of the switch module C4 is connected with the DC side midpoint O, the collector of the switch module C4 is connected with the collector of the switch module C5, and the emitter of the switch module C5 is connected with the output end C1; the emitter of the switch module C6 is connected with the DC side midpoint O, the collector of the switch module C6 is connected with the collector of the switch module C7, and the emitter of the switch module C7 is connected with the output end C2;
two groups of outputs of the inverter are defined as an inverter stage 1 and an inverter stage 2, and three-phase load carried by the inverter stage 1 is Za1、Zb1、Zc1The three-phase load carried by the inverter stage 2 is Za2、Zb2、Zc2;
Three-phase load Za1、Zb1、Zc1Are connected to the output terminal a1, the output terminal b1, the output terminal c1, respectively, and the other ends thereof are connected together;
three-phase load Za2、Zb2、Zc2Are connected to the output terminal a2, the output terminal b2, the output terminal c2, respectively, and have the other ends connected together.
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---|---|---|---|---|
CN114785175A (en) * | 2022-03-07 | 2022-07-22 | 东北电力大学 | AC/DC multiport three-level converter |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0356547A1 (en) * | 1988-08-30 | 1990-03-07 | Siemens Aktiengesellschaft | Process for controlling a three-level inverter |
CN110247568A (en) * | 2019-06-29 | 2019-09-17 | 东北电力大学 | A kind of three level dual output inverter topology of three-phase diode clamper type |
-
2020
- 2020-12-01 CN CN202011388576.1A patent/CN112564526A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0356547A1 (en) * | 1988-08-30 | 1990-03-07 | Siemens Aktiengesellschaft | Process for controlling a three-level inverter |
CN110247568A (en) * | 2019-06-29 | 2019-09-17 | 东北电力大学 | A kind of three level dual output inverter topology of three-phase diode clamper type |
Non-Patent Citations (1)
Title |
---|
KOKILA ARUNACHALAM: "Comparison and optimisation of three-level neutral point clamped dual output inverter", 《IET CIRCUITS, DEVICES & SYSTEMS》 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114785175A (en) * | 2022-03-07 | 2022-07-22 | 东北电力大学 | AC/DC multiport three-level converter |
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