CN103259436B - Combination clamping type Five-level converter and control method thereof - Google Patents
Combination clamping type Five-level converter and control method thereof Download PDFInfo
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- CN103259436B CN103259436B CN201310196165.6A CN201310196165A CN103259436B CN 103259436 B CN103259436 B CN 103259436B CN 201310196165 A CN201310196165 A CN 201310196165A CN 103259436 B CN103259436 B CN 103259436B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
- H02M1/007—Plural converter units in cascade
Abstract
The invention discloses a kind of combination clamping type Five-level converter and control method thereof, 4 capacitors, 12 switching tubes, 2 clamping diodes of single-phase brachium pontis form dc-link capacitance branch road, 2 clamp switch pipe branch roads, clamping capacitance branch road, clamping diode branch roads and main switch branch roads, 6 chain type branch roads.Adopt harmonic wave eliminating PWM method, obtain level wayside signaling and level signal; By the level wayside signaling obtained and level signal, directly obtain the on off state of switching tube according to preset switches state table; Between complementary actuating switch device, add dead band, namely obtain the PWM drive singal of single-phase 12 switching tubes.Current transformer of the present invention and control method thereof, having boosting export, only need two carrier cycles just can realize balance of all capacitance voltage cycles once, reduction main switch switching frequency and the advantage such as implementation method is simple.
Description
Technical field
The present invention relates to a kind of converters, especially a kind of combination clamping type Five-level converter and control method thereof.
Background technology
Due to the increase of output level number, Multilevel Inverters has that output waveform harmonic content is low, device bears the advantages such as voltage stress is little, and these advantages make many level Semiconductor Converting Technology be particularly suitable for high-voltage large-capacity power electronics occasion.At present, multi-level converter mainly can be divided into following three kinds: diode clamp formula, capacitor-clamped formula, H bridge tandem type.Wherein, diode clamp formula many level topology because main circuit structure is simple and reliable, energy the advantage such as two-way flow can become the many level topologys be most widely used at present.But, there is DC voltage balance problem in this kind of topology, for three-level topology, can be resolved by certain control algolithm, but existing document point out for five level and above level current transformer power factor close to 1 time, be difficult to reach capacitor voltage balance in full-load range.
Up to the present, have a lot of researcher to propose multiple solution, but they or by cast out a large amount of in long vector realize capacitor voltage balance, reduce system control performance; Or realizing the balance of dc-link capacitance voltage by additional as DC power supply, Auxiliary chopper circuit and employing back-to-back type structure, these schemes add the hardware cost of system, reduce system reliability and efficiency.In view of these reasons, current five level and the many level block of upper level diode clamp are difficult to be applied in engineering.Another many level topology is combination clamping topology, active switching devices, diode, electric capacity is adopted to coordinate clamp function, capacitor voltage balance problem is can solve by the different Capacitance parallel connection that makes of chain type, and can not by the impact of load characteristic.But this combination clamping topology, owing to introducing the devices such as clamp switch pipe and clamping capacitance, adds hardware complexity and the cost of system.Therefore reduce this kind of topological number of devices significant as far as possible.
Summary of the invention
The present invention is for avoiding the weak point that exists in above-mentioned prior art, a kind of combination clamping type Five-level converter and control method thereof are provided, reduce the switching frequency of main switch with the device count reducing Five-level converter to simplify hardware configuration, while realizing the fast automatic balance of capacitance voltage.
The present invention be technical solution problem by the following technical solutions.
Combination clamping type Five-level converter, its design feature is, includes the single-phase brachium pontis that three structures are identical, and wherein, every phase brachium pontis comprises: 2 dc-link capacitance C
1, C
2; 2 clamping capacitance C
3, C
4; 4 main switch S
1, S
2, S
1 ', S
2 'with 8 clamp switch pipe S
c1, S
c1 ', S
c2, S
c2 ', S
c3, S
c3 ', S
c4, S
c4 '; 2 clamping diode D
c1and D
c2;
Wherein, dc-link capacitance C
1and C
2for each phase brachium pontis shares;
Described dc-link capacitance C
1and C
2mutual dc-link capacitance branch road in series; Described clamp switch pipe S
c1, S
c2, S
c1 'and S
c2 'first clamp switch pipe branch road in series mutually, described clamp switch pipe S
c3, S
c4, S
c3 'and S
c4 'second clamp switch pipe branch road in series mutually; Described clamping capacitance C
3and C
4mutual clamping capacitance branch road in series; Described clamping diode D
c1with clamping diode D
c2mutual clamping diode branch road in series; Described main switch S
1, S
2, S
1 'and S
2 'mutual main switch branch road in series; Described dc-link capacitance branch road, the first clamp switch pipe branch road, the second clamp switch pipe branch road, clamping capacitance branch road, clamping diode branch road, main switch branch road are interconnected from front to back successively;
Two end points of described dc-link capacitance branch road, the first clamp switch pipe branch road are connected with the first DC side positive bus-bar, the first DC side negative busbar respectively; Described second clamp switch pipe branch road, clamping capacitance branch road are connected with the second DC side positive bus-bar, the second DC side negative busbar respectively with two end points of main switch branch road.
Present invention also offers a kind of control method of combination clamping type Five-level converter, be characterized in, described main switch branch road breaker in middle pipe S
1with S
1 ', S
2with S
2 'complementary conducting, namely the two drive singal is complementary; S in described first clamp switch pipe branch road and the second clamp switch pipe branch road
cxwith S
cx '(x=1,2,3,4) complementary conducting, and S
c1with S
c2, S
c3with S
c4drive singal is consistent;
Step 1: first by every phase modulating wave m=U
msinwt/U
dcwith 4, there is same frequency f
c, identical peak-to-peak value 0.5 be spatially closely connected successively and be symmetrically distributed in zero and compare with reference to the triangular carrier of positive and negative both sides, obtain level wayside signaling and level signal; Wherein U
msinwt is brachium pontis side desired output voltage, U
dcit is the first DC bus-bar voltage;
Step 2: the level wayside signaling obtained by step 1 and level signal, the on off state of switching tube Sc1, Sc3, S1 and S2 is directly obtained according to the on off state table preset, wherein in each level interval, the redundancy mode of same level switches once every a carrier cycle Tc; Between complementary actuating switch device, add dead band according to the switching tube state principle preset, namely obtain the PWM drive singal of single-phase 12 switching tubes.
In described step 1, by four triangular carriers from top to bottom number consecutively be 1,2,3,4; When sinusoidal modulation wave is crossing with triangular carrier 1, if the amplitude of modulating wave is greater than triangular carrier 1, outputs level signals is designated as 2, otherwise is designated as 1, and now level wayside signaling is designated as (+2U ~+U); When sinusoidal modulation wave is crossing with triangular carrier 2, if the amplitude of modulating wave is greater than triangular carrier 2, outputs level signals is designated as 1, otherwise be designated as 0, now level wayside signaling is designated as (+U ~ 0); When sinusoidal modulation wave is crossing with triangular carrier 3, if the amplitude of modulating wave is greater than triangular carrier 3, outputs level signals is designated as 0, otherwise be designated as-1, now level wayside signaling is designated as (0 ~-U); When sinusoidal modulation wave is crossing with triangular carrier 4, if the amplitude of modulating wave is greater than triangular carrier 4, outputs level signals is designated as-1, otherwise be designated as-2, now level wayside signaling is designated as (-U ~-2U).
Compared with the prior art, beneficial effect of the present invention is embodied in:
The invention discloses a kind of novel combination clamping type Five-level converter, can realize five level and export, single-phase brachium pontis comprises 4 capacitors altogether, comprising 2 dc-link capacitances and 2 clamping capacitances; 12 switching tubes; 2 clamping diodes.This topology not only device used is fewer than similar topology, and dc-link capacitance voltage can autobalance, solves conventional diode clamped five-level current transformer capacitance voltage and is difficult to control problem, can also realize boosting simultaneously and export.In addition, for carried topology, the invention discloses a kind of modulation strategy being simple and easy to realize, within the scope of whole modulation degree, only need two carrier cycles just can realize balance of all capacitance voltage cycles once, reduce the switching frequency of main switch simultaneously, effectively raise the efficiency of system.
1) capacitance voltage automatic balance function, make different Capacitance parallel connections to reach by chain structure, the method does not need complicated control method, not by the impact of load characteristic, within the scope of universe modulation degree, can realize capacitance voltage autobalance under any loading condition.2) in topology, all electric capacity shares identical voltage, and all switching tubes and diode have identical voltage stress, serves good clamp effect.3) export boost function, can obtain under same DC voltage is the output voltage of conventional inverter twice, effectively improves DC side voltage of converter utilance.4) topology of the present invention device used is less in similar topology.5) described modulation strategy, simple, easy Digital Implementation, while realizing the fast automatic balance of capacitance voltage, reduces the switching frequency of main switch.
Combination clamping type Five-level converter of the present invention and control method thereof, have only need two carrier cycles just can realize all capacitance voltage cycles balance once, reduce main switch switching frequency, improve system efficiency and realize the advantages such as simple.
Accompanying drawing explanation
Fig. 1 is the topological circuit figure (single armed circuit) of combination clamping type Five-level converter of the present invention.
Fig. 2 is the schematic diagram obtaining outputs level signals according to harmonic wave eliminating PWM method of the present invention.
Fig. 3 is that the interval switch mode of (+2U ~+U) of the present invention level selects schematic diagram.
Fig. 4 is that module diagram occurs Five-level converter PWM of the present invention.
Simulation result when Fig. 5 is one-phase five-level inverter modulation degree m=0.8 of the present invention.
Simulation result when Fig. 6 is one-phase five-level inverter modulation degree m=0.3 of the present invention.
Below by way of embodiment, and the invention will be further described by reference to the accompanying drawings.
Embodiment
See Fig. 1, combination clamping type Five-level converter, includes the single-phase brachium pontis that three structures are identical, and wherein, every phase brachium pontis comprises: 2 dc-link capacitance C
1, C
2; 2 clamping capacitance C
3, C
4; 4 main switch S
1, S
2, S
1 ', S
2 'with 8 clamp switch pipe S
c1, S
c1 ', S
c2, S
c2 ', S
c3, S
c3 ', S
c4, S
c4 '; 2 clamping diode D
c1and D
c2;
Wherein, dc-link capacitance C
1and C
2for each phase brachium pontis shares;
Described dc-link capacitance C
1and C
2mutual dc-link capacitance branch road in series; Described clamp switch pipe S
c1, S
c2, S
c1 'and S
c2 'first clamp switch pipe branch road in series mutually, described clamp switch pipe S
c3, S
c4, S
c3 'and S
c4 'second clamp switch pipe branch road in series mutually; Described clamping capacitance C
3and C
4mutual clamping capacitance branch road in series; Described clamping diode D
c1with clamping diode D
c2mutual clamping diode branch road in series; Described main switch S
1, S
2, S
1 'and S
2 'mutual main switch branch road in series; Described dc-link capacitance branch road, the first clamp switch pipe branch road, the second clamp switch pipe branch road, clamping capacitance branch road, clamping diode branch road, main switch branch road are interconnected from front to back successively;
Two end points of described dc-link capacitance branch road, the first clamp switch pipe branch road are connected with the first DC side positive bus-bar, the first DC side negative busbar respectively; Described second clamp switch pipe branch road, clamping capacitance branch road are connected with the second DC side positive bus-bar, the second DC side negative busbar respectively with two end points of main switch branch road;
Described dc-link capacitance branch road, the first clamp switch pipe branch road, the second clamp switch pipe branch road, clamping capacitance branch road, clamping diode branch road and main switch branch road are the chain type branch road of series connection mutually, have 6 chain type branch roads, connection parallel with one another between described 6 chain type branch roads, an end points of each branch road in 5 branch roads except clamping diode branch road is connected with DC side positive bus-bar and another end points is connected with DC side negative busbar.As shown in Figure 1, two end points of described dc-link capacitance branch road, the first clamp switch pipe branch road are connected with the first DC side positive bus-bar, the first DC side negative busbar respectively; Described second clamp switch pipe branch road, clamping capacitance branch road are connected with the second DC side positive bus-bar, the second DC side negative busbar respectively with two end points of main switch branch road.On 12 switching tubes, i.e. described 4 main switch S
1, S
2, S
1 ', S
2 'with 8 clamp switch pipe S
c1, S
c1 ', S
c2, S
c2 ', S
c3, S
c3 ', S
c4, S
c4 'in each switching tube on all reverse parallel connection have a diode.
All electric capacity shares identical voltage, and all switching tubes and diode have identical voltage stress; 3 single-phase bridge arm circuit are directly combined and can obtain three-phase topological structure, wherein dc-link capacitance C
1, C
2for each brachium pontis shares, other components and parts in each phase brachium pontis are identical with single-phase brachium pontis.
Wherein, 2 dc-link capacitance C
1, C
2a dc-link capacitance branch road in series, connected mode is, C
1negative pole and C
2positive pole be connected, each junction forms a tie point, and this dc-link capacitance branch road amounts to 3 tie points.As shown in Figure 1,3 tie points of dc-link capacitance branch road number consecutively 1-1,1-2 and 1-3, wherein electric capacity C from top to down in order
1positive pole and electric capacity C
2negative pole respectively as initial tie point 1-1 and Termintion connection point 1-3, be connected respectively to the positive and negative bus of the first DC side.In the present invention, in numbering 1-1, "-" front numeral is branch road sequence number, and the numeral after "-" is the numbering of this tie point.As Fig. 1, the sequence number of dc-link capacitance branch road, the first clamp switch pipe branch road, the second clamp switch pipe branch road, clamping capacitance branch road, clamping diode branch road and main switch branch road is followed successively by 1 ~ 6.
8 clamp switch pipes form two-way clamp switch pipe branch road.Wherein, wherein, clamp switch pipe S
c1, S
c1 ', S
c2, S
c2 'in before the emitter of a switching tube be connected with the collector electrode of a switching tube below, series connection formation first clamp switch pipe branch road, each junction forms a tie point, always has 5 tie points.As shown in Figure 1,5 tie points of the first clamp switch pipe branch road from top to bottom number consecutively are 2-1 ~ 2-5, first switching tube S
c1collector electrode and last switching tube S
c2 'emitter be connected respectively on the positive and negative bus of the first direct current.The tie point (i.e. 2-1,2-3 and 2-5) being numbered odd number in first clamp switch pipe branch road and the tie point of 3 in dc-link capacitance branch road (i.e. 1-1,1-2 and 1-3) by number ascending order are connected successively.In like manner, clamp switch pipe S
c3, S
c3 ', S
c4, S
c4 'in before the emitter of a switching tube be connected with the collector electrode of a switching tube below, series connection formation second clamp switch pipe branch road, each junction forms a tie point, always has 5 tie points.As shown in Figure 1,5 tie points of the second clamp switch pipe branch road from top to bottom number consecutively are 3-1 ~ 3-5, first switching tube S
c3collector electrode and last switching tube S
c4 'emitter be connected respectively on the positive and negative bus of the second direct current, wherein, be numbered in the second clamp switch pipe branch road the tie point (i.e. 3-2 with 3-4) of the even number tie point (i.e. 2-2 with 2-4) corresponding with the first clamp switch pipe branch road by number ascending order be connected successively.
2 clamping capacitance C
3~ C
4a clamping capacitance branch road in series, connected mode is, C
3negative pole and C
4positive pole be connected, each junction forms a tie point, and this clamping capacitance branch road amounts to 3 tie points.As shown in Figure 1,3 tie point number consecutively 4-1 in order ~ 4-3 of clamping capacitance branch road.Wherein, electric capacity C
3positive pole and electric capacity C
4negative pole respectively as initial tie point 4-1 and Termintion connection point 4-3, be connected respectively on the positive and negative bus of the second DC side, 3 tie points (i.e. 4-1,4-2 and 4-3) in clamping capacitance branch road and the tie point (i.e. 3-1,3-3 and 3-5) being numbered odd number in the second clamp switch pipe branch road by number ascending order are connected successively.
4 main switch S
1, S
2, S
1 ', S
2 'in above the emitter of a switching tube is connected with the collector electrode of a switching tube below, formation main switch branch road of connecting, each junction forms a tie point, always has 5 tie points.As shown in Figure 1,5 tie points of main switch branch road from top to bottom number consecutively be 6-1 ~ 6-5.First switching tube S
1collector electrode and last switching tube S
2 'emitter be connected respectively on the positive and negative bus of the second direct current, namely tie point 6-1 with 6-5 is connected with the positive and negative bus of the second direct current respectively.In main switch branch road, the 3rd tie point 6-3 is as single-phase output connection A.
2 clamping diode D
c1~ D
c2form 1 clamping diode branch road, its connected mode is: D
c1anode and D
c2negative electrode be connected, each junction forms a tie point, always has 3 tie points.As shown in Figure 1,3 tie point number consecutivelies of clamping diode branch road are 5-1 ~ 5-3.
D
c1negative electrode and D
c2anode be designated as initial tie point 5-1 and Termintion connection point 5-3,5-1,5-3 are connected with the 4th tie point 6-4 with the 2nd tie point 6-2 in main switch branch road respectively, the tie point 5-2 being numbered 2 in clamping diode branch road is connected with the tie point 4-2 being numbered 2 in clamping capacitance branch road, and tie point 4-2 is connected with the tie point 3-3 of the second clamp switch pipe branch road.
Combination clamping type Five-level converter of the present invention, five level of output are produced by the corresponding Switch State Combination in Power Systems of power switch pipe in topology.
As shown in Figure 2, due to S
cxwith S
cx 'after (x=1,2,3,4) series connection together with certain Capacitance parallel connection, therefore the two drive singal must be complementary.S in rear class NPC simultaneously
xwith S
x 'the drive singal of (x=1,2) is also complementary.Structure shown in Fig. 2 can be divided into two parts, prime is clamp and booster circuit, comprises dc-link capacitance branch road, 2 clamp switch pipes and connecting line thereof, along with the change of clamp switch pipe, have clamp mode ABCDEF in 6 kinds, wherein corresponding clamp switch pipe S during clamp mode F
c1, S
c2, S
c3, S
c4be 0101 state, owing to now there is no capacitor-clamped effect, do not consider.Remain 5 kinds of capacitor-clamped mode ABCDE, respectively corresponding C1=C4, C1=C3, C2=C4, C1+C2=C3+C4, C2=C3 five kinds of Capacitance parallel connection forms.Rear class is diode clamp formula (NPC) three-level structure, can export 1,0 ,-1 three kind of level.2 parts cooperate altogether exportable+2U ,+1U, 0 ,-1U ,-2U five kinds of level, altogether 15 kinds of operation modes, its bridge arm mid point exports U
aoonly have a kind of operating state for during+2U and-2U, respectively have 4 kinds of redundant states for during+U and-U, when being 0, have 5 kinds of redundant states.Brachium pontis output level U
ao, clamp mode, relation between Capacitance parallel connection form and on off state (only marked the on off state of one of them switching tube of complementary switch in table, 1 represents switching tube conducting, and 0 represents that switching tube turns off, and U represents 1 times of output level) as shown in table 1.
Described in following table 1,15 kinds of all working mode all have bidirectional current passage, therefore, put forward topology by the impact of load characteristic, can be used for the various occasion of active reactive.And all switching tubes, diode are all clamped at a capacitance voltage under often kind of mode, as long as ensure all capacitor voltage balance, namely achieve the clamp function of all devices.
Table 1 output level U
ao, clamp mode, relation between Capacitance parallel connection form and on off state
The realization of capacitor voltage balance function and boost function:
As shown in Figure 3, as long as in a capacitor voltage balance cycle, except BCD, AED two kinds combination, in ABCDE five clamp mode, certain 3 alternately occur, just can ensure that four capacitance voltages are equal within this cycle.Such as ABC Three models, C under A clamp mode
1=C
4, C under B clamp mode
1=C
3, C under C clamp mode
2=C
4, three kinds of mode alternately occur, just make C
1=C
2=C
3=C
4.
Another function of Multilevel Inverters of the present invention realizes boosting to export.As when clamp mode A, C
1and C
4parallel connection, with DC side mid point o for reference point, the now positive and negative busbar of rear class NPC three level, midpoint potential all lifting level, the highest exportable level is 2U; And when clamp mode E, C
1and C
4parallel connection, the positive and negative busbar of rear class NPC three level, midpoint potential all have dropped a level, minimum exportable-2U level.Namely be V to whole DC voltage
dcinverter, exportable maximum level is+-V
dc, be the twice of conventional inverter.
A control method for combination clamping type Five-level converter described in basis, described main switch branch road breaker in middle pipe S
1with S
1 ', S
2with S
2 'complementary conducting, namely the two drive singal is complementary; S in described first clamp switch pipe branch road and the second clamp switch pipe branch road
cxwith S
cx '(x=1,2,3,4) complementary conducting, and S
c1with S
c2, S
c3with S
c4drive singal is consistent; This control method comprises following 2 steps:
Step 1: first by every phase modulating wave m=U
msinwt/U
dcwith 4, there is same frequency f
c, identical peak-to-peak value 0.5 be spatially closely connected successively and be symmetrically distributed in zero and compare with reference to the triangular carrier of positive and negative both sides, obtain level wayside signaling and level signal; Wherein U
msinwt is brachium pontis side desired output voltage, U
dcit is the first DC bus-bar voltage;
Step 2: the level wayside signaling obtained by step 1 and level signal, the on off state of switching tube Sc1, Sc3, S1 and S2 is directly obtained according to the on off state table preset, wherein in each level interval, the redundancy mode of same level switches once every a carrier cycle Tc; Between complementary actuating switch device, add dead band according to the switching tube state principle preset, namely obtain the PWM drive singal of single-phase 12 switching tubes;
In described step 1, by four triangular carriers from top to bottom number consecutively be 1,2,3,4; When sinusoidal modulation wave is crossing with triangular carrier 1, if the amplitude of modulating wave is greater than triangular carrier 1, outputs level signals is designated as 2, otherwise is designated as 1, and now level wayside signaling is designated as (+2U ~+U); When sinusoidal modulation wave is crossing with triangular carrier 2, if the amplitude of modulating wave is greater than triangular carrier 2, outputs level signals is designated as 1, otherwise be designated as 0, now level wayside signaling is designated as (+U ~ 0); When sinusoidal modulation wave is crossing with triangular carrier 3, if the amplitude of modulating wave is greater than triangular carrier 3, outputs level signals is designated as 0, otherwise be designated as-1, now level wayside signaling is designated as (0 ~-U); When sinusoidal modulation wave is crossing with triangular carrier 4, if the amplitude of modulating wave is greater than triangular carrier 4, outputs level signals is designated as-1, otherwise be designated as-2, now level wayside signaling is designated as (-U ~-2U);
First on off state must meet following principle: described main switch branch road breaker in middle pipe S
1with S
1 ', S
2with S
2 'complementary conducting, namely the two drive singal is complementary; S in described clamp switch pipe 1 and 2
cxwith S
cx '(x=1,2,3,4) complementary conducting, and S
c1with S
c2, S
c3with S
c4drive singal is consistent.
Specific implementation comprises the following steps:
Step 1, as shown in Figure 3, adopts harmonic wave eliminating PWM method, by every phase modulating wave m=U
msinwt/U
dccompare with 4 triangular carriers, wherein U
msinwt is brachium pontis side desired output voltage, U
dcfor described DC bus-bar voltage, 4 described triangular carriers have same frequency f
cwith identical peak-to-peak value 0.5, they are spatially closely to be connected and whole carrier set is symmetrically distributed in the positive and negative both sides of zero reference, by four triangular carriers from top to bottom number consecutively be 1,2,3,4 (as Fig. 2).When sinusoidal modulation wave is crossing with triangular carrier 1, if the amplitude of modulating wave is greater than triangular carrier 1, outputs level signals is designated as 2, otherwise be designated as 1, now level wayside signaling is designated as (+2U ~+U); When sinusoidal modulation wave is crossing with triangular carrier 2, if the amplitude of modulating wave is greater than triangular carrier 2, outputs level signals is designated as 1, otherwise be designated as 0, now level wayside signaling is designated as (+U ~ 0); When sinusoidal modulation wave is crossing with triangular carrier 3, if the amplitude of modulating wave is greater than triangular carrier 3, outputs level signals is designated as 0, otherwise be designated as-1, now level wayside signaling is designated as (0 ~-U); When sinusoidal modulation wave is crossing with triangular carrier 4, if the amplitude of modulating wave is greater than triangular carrier 4, outputs level signals is designated as-1, otherwise be designated as-2, now level wayside signaling is designated as (-U ~-2U).
Step 2, after obtaining level wayside signaling and level signal by step 1, on off state table as shown in Table 2, directly inquiry obtains S
c1, S
c3, S
1with S
2on off state, wherein in each level interval, the redundancy mode (A, B) of same level switches once every a carrier cycle Tc, such as, in (+2U ~+U) interval, when level signal 1 occurs, two redundancy mode A, B are used alternatingly, as shown in Figure 4.Wherein on off state 1 represents switch device conductive, and 0 represents that switching device turns off; Further according to the principle of on off state demand fulfillment, between complementary actuating switch device, add dead band simultaneously, obtain the PWM drive singal of single-phase 12 switching tubes.
Table 2 on off state table
If Fig. 4 is that module diagram occurs Five-level converter PWM, there is module and comprise comparing unit, switch mode selected cell in PWM, modulating wave and triangular wave input to comparing unit and produce level signal, and this level signal inputs to switch mode selected cell, thus determines on off state; S is determined according on off state and drive singal table
c1, S
c3, S
1with S
2on off state, simultaneously between complementary actuating switch device, add dead band, obtain the PWM drive singal of single-phase 12 switching tubes.
The present invention is directed to the unmanageable difficult problem of the conventional diode clamped five-level current transformer dc-link capacitance balance of voltage, from the angle of combination clamping topology, disclose a kind of novel Five-level converter topology with capacitor voltage balance and output boost function, this topological device used is less.Simultaneously for carry the Five-level converter of topology, disclose a kind of modulation strategy, while realizing the fast automatic balance of capacitance voltage, reduce the switching frequency of main switch.
Above content further illustrates in conjunction with specific embodiment is made for the present invention; can not assert that specific embodiment of the invention is confined to these explanations; for technical staff belonging to the present invention; make without departing from the inventive concept of the premise and somely equivalent substitute or be obviously out of shape; and performance or purposes identical, then should be considered as belonging to the protection range that the present invention is determined by submitted to claims.
Open-loop simulation result when Fig. 5 is one-phase five-level inverter modulation degree m=0.8 of the present invention.Condition of work is as follows: input direct-current busbar voltage is 400V, i.e. each level 200V; Dc-link capacitance and clamping capacitance capacitance are 2mF, and export and adopt L filter, filter inductance is 5mH; Load resistance is 20 Ω, and switching frequency is 5KHz.From Fig. 5 (a), exporting phase voltage is 5 level, and maximum level is 400V, is the twice of DC side bus total voltage; The current waveform degree of distortion is lower.From Fig. 5 (b), dc-link capacitance C
1, C
2with clamping capacitance C
3, C
4capacitance voltage substantially all maintains level an about 200V, and ripple is less than 5V.
Open-loop simulation result when Fig. 6 is one-phase five-level inverter modulation degree m=0.3 of the present invention, now exporting phase voltage is 3 level, and all capacitance voltages all maintain near 200V, and ripple is less than 0.5V.Therefore, topology provided by the present invention and modulation strategy all effectively can solve five level capacitor voltage balance problems within the scope of complete modulation degree.
Although the present invention is illustrated hereinbefore according to preferred embodiment, this does not represent that scope of the present invention is confined to above-mentioned structure, if the structure that covers by this invention claim all within protection range.The equivalent substitution structure that those skilled in the art can develop easily after reading above-mentioned explanation, the equalization done under the spirit not departing from the present invention and scope changes and modifies, and all should be covered by within scope.
Claims (2)
1. a combination clamping type Five-level converter, is characterized in that, includes the single-phase brachium pontis that three structures are identical, and wherein, every phase brachium pontis comprises: 2 dc-link capacitance C
1, C
2; 2 clamping capacitance C
3, C
4; 4 main switch S
1, S
2, S
1 ', S
2 'with 8 clamp switch pipe S
c1, S
c1 ', S
c2, S
c2 ', S
c3, S
c3 ', S
c4, S
c4 '; 2 clamping diode D
c1and D
c2;
Wherein, dc-link capacitance C
1and C
2for each phase brachium pontis shares;
Described dc-link capacitance C
1and C
2mutual dc-link capacitance branch road in series; Described clamp switch pipe S
c1, S
c2, S
c1 'and S
c2 'first clamp switch pipe branch road in series mutually, described clamp switch pipe S
c3, S
c4, S
c3 'and S
c4 'second clamp switch pipe branch road in series mutually; Described clamping capacitance C
3and C
4mutual clamping capacitance branch road in series; Described clamping diode D
c1with clamping diode D
c2mutual clamping diode branch road in series; Described main switch S
1, S
2, S
1 'and S
2 'mutual main switch branch road in series; Described dc-link capacitance branch road, the first clamp switch pipe branch road, the second clamp switch pipe branch road, clamping capacitance branch road, clamping diode branch road, main switch branch road are interconnected from front to back successively;
Two end points of described dc-link capacitance branch road, the first clamp switch pipe branch road are connected with the first DC side positive bus-bar, the first DC side negative busbar respectively; Described second clamp switch pipe branch road, clamping capacitance branch road are connected with the second DC side positive bus-bar, the second DC side negative busbar respectively with two end points of main switch branch road;
Described dc-link capacitance branch road, the first clamp switch pipe branch road, the second clamp switch pipe branch road, clamping capacitance branch road, clamping diode branch road and main switch branch road are the chain type branch road of series connection mutually, have 6 chain type branch roads, connection parallel with one another between described 6 chain type branch roads;
2 dc-link capacitance C
1, C
2a dc-link capacitance branch road in series, connected mode is, C
1negative pole and C
2positive pole be connected, each junction forms a tie point, and this dc-link capacitance branch road amounts to 3 tie points; 3 tie points of dc-link capacitance branch road number consecutively 1-1,1-2 and 1-3, wherein electric capacity C from top to down in order
1positive pole and electric capacity C
2negative pole respectively as initial tie point 1-1 and Termintion connection point 1-3, be connected respectively to the positive and negative bus of the first DC side; The sequence number of dc-link capacitance branch road, the first clamp switch pipe branch road, the second clamp switch pipe branch road, clamping capacitance branch road, clamping diode branch road and main switch branch road is followed successively by 1 ~ 6;
8 clamp switch pipes form two-way clamp switch pipe branch road; Wherein, clamp switch pipe S
c1, S
c1 ', S
c2, S
c2 'in before the emitter of a switching tube be connected with the collector electrode of a switching tube below, series connection formation first clamp switch pipe branch road, each junction forms a tie point, always has 5 tie points; 5 tie points of the first clamp switch pipe branch road from top to bottom number consecutively are 2-1 ~ 2-5, first switching tube S
c1collector electrode and last switching tube S
c2 'emitter be connected respectively on the positive and negative bus of the first direct current; Tie point 2-1,2-3 of being numbered odd number in first clamp switch pipe branch road and 2-5 and 3 in dc-link capacitance branch road tie point 1-1,1-2 and 1-3 by number ascending order are connected successively; In like manner, clamp switch pipe S
c3, S
c3 ', S
c4, S
c4 'in before the emitter of a switching tube be connected with the collector electrode of a switching tube below, series connection formation second clamp switch pipe branch road, each junction forms a tie point, always has 5 tie points; 5 tie points of the second clamp switch pipe branch road from top to bottom number consecutively are 3-1 ~ 3-5, first switching tube S
c3collector electrode and last switching tube S
c4 'emitter be connected respectively on the positive and negative bus of the second direct current, wherein, be numbered in the second clamp switch pipe branch road tie point 3-2 with 3-4 of even number tie point 2-2 with 2-4 corresponding with the first clamp switch pipe branch road by number ascending order be connected successively;
2 clamping capacitance C
3~ C
4a clamping capacitance branch road in series, connected mode is, C
3negative pole and C
4positive pole be connected, each junction forms a tie point, and this clamping capacitance branch road amounts to 3 tie points; 3 tie point number consecutively 4-1 in order ~ 4-3 of clamping capacitance branch road; Wherein, electric capacity C
3positive pole and electric capacity C
4negative pole respectively as initial tie point 4-1 and Termintion connection point 4-3, be connected respectively on the positive and negative bus of the second DC side, 3 tie points 4-1,4-2 in clamping capacitance branch road and 4-3 and tie point 3-1,3-3 of being numbered odd number in the second clamp switch pipe branch road and 3-5 by number ascending order are connected successively;
4 main switch S
1, S
2, S
1 ', S
2 'in above the emitter of a switching tube is connected with the collector electrode of a switching tube below, formation main switch branch road of connecting, each junction forms a tie point, always has 5 tie points; 5 tie points of main switch branch road from top to bottom number consecutively are 6-1 ~ 6-5; First switching tube S
1collector electrode and last switching tube S
2 'emitter be connected respectively on the positive and negative bus of the second direct current, namely tie point 6-1 with 6-5 is connected with the positive and negative bus of the second direct current respectively; In main switch branch road, the 3rd tie point 6-3 is as single-phase output connection A;
2 clamping diode D
c1~ D
c2form 1 clamping diode branch road, its connected mode is: D
c1anode and D
c2negative electrode be connected, each junction forms a tie point, always has 3 tie points; 3 tie point number consecutivelies of clamping diode branch road are 5-1 ~ 5-3;
D
c1negative electrode and D
c2anode be designated as initial tie point 5-1 and Termintion connection point 5-3,5-1,5-3 are connected with the 4th tie point 6-4 with the 2nd tie point 6-2 in main switch branch road respectively, the tie point 5-2 being numbered 2 in clamping diode branch road is connected with the tie point 4-2 being numbered 2 in clamping capacitance branch road, and tie point 4-2 is connected with the tie point 3-3 of the second clamp switch pipe branch road.
2. for controlling a control method for combination clamping type Five-level converter as claimed in claim 1, it is characterized in that, main switch branch road breaker in middle pipe S
1with S
1 ', S
2with S
2 'complementary conducting, namely the two drive singal is complementary; S in first clamp switch pipe branch road and the second clamp switch pipe branch road
cxwith S
cx 'complementary conducting, wherein x=1,2,3,4, and S
c1with S
c2, S
c3with S
c4drive singal is consistent;
Step 1: first by every phase modulating wave m=U
msinwt/U
dcwith 4, there is same frequency f
c, identical peak-to-peak value 0.5 be spatially closely connected successively and be symmetrically distributed in zero and compare with reference to the triangular carrier of positive and negative both sides, obtain level wayside signaling and level signal; Wherein U
msinwt is brachium pontis side desired output voltage, U
dcit is the first DC bus-bar voltage;
Step 2: the level wayside signaling obtained by step 1 and level signal, the on off state table according to presetting directly obtains switching tube S
c1, S
c3, S
1with S
2on off state, wherein in each level interval, the redundancy mode of same level switches once every a carrier cycle Tc; Between complementary actuating switch device, add dead band according to the switching tube state principle preset, namely obtain the PWM drive singal of single-phase 12 switching tubes;
In described step 1, by four triangular carriers from top to bottom number consecutively be 1,2,3,4; When sinusoidal modulation wave is crossing with triangular carrier 1, if the amplitude of modulating wave is greater than triangular carrier 1, outputs level signals is designated as 2, otherwise is designated as 1, and now level wayside signaling is designated as (+2U ~+U); When sinusoidal modulation wave is crossing with triangular carrier 2, if the amplitude of modulating wave is greater than triangular carrier 2, outputs level signals is designated as 1, otherwise be designated as 0, now level wayside signaling is designated as (+U ~ 0); When sinusoidal modulation wave is crossing with triangular carrier 3, if the amplitude of modulating wave is greater than triangular carrier 3, outputs level signals is designated as 0, otherwise be designated as-1, now level wayside signaling is designated as (0 ~-U); When sinusoidal modulation wave is crossing with triangular carrier 4, if the amplitude of modulating wave is greater than triangular carrier 4, outputs level signals is designated as-1, otherwise be designated as-2, now level wayside signaling is designated as (-U ~-2U).
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| CN103986350B (en) | 2014-05-23 | 2016-09-14 | 台达电子企业管理（上海）有限公司 | Five level rectifiers |
| CN111869072B (en) * | 2018-08-01 | 2021-10-01 | 华为技术有限公司 | Control circuit of voltage conversion circuit |
| CN112886842B (en) * | 2021-02-25 | 2021-10-15 | 燕山大学 | Boost converter and control method thereof |
| CN113726206B (en) * | 2021-07-26 | 2023-08-22 | 西安交通大学 | Five-level power electronic converter and method |
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| US6058031A (en) * | 1997-10-23 | 2000-05-02 | General Electric Company | Five level high power motor drive converter and control system |
| CN102035420A (en) * | 2009-09-25 | 2011-04-27 | 富士电机控股株式会社 | Five-level converter |
| EP2568591A1 (en) * | 2011-09-12 | 2013-03-13 | Green Power Technologies, S.L. | Multilevel-clamped multilevel converters (MLC2) |
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| US6058031A (en) * | 1997-10-23 | 2000-05-02 | General Electric Company | Five level high power motor drive converter and control system |
| CN102035420A (en) * | 2009-09-25 | 2011-04-27 | 富士电机控股株式会社 | Five-level converter |
| EP2568591A1 (en) * | 2011-09-12 | 2013-03-13 | Green Power Technologies, S.L. | Multilevel-clamped multilevel converters (MLC2) |
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