JP2013255308A - Semiconductor power conversion device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a low-cost and small-sized semiconductor power conversion device that allows suppressing harmonics to a low level.SOLUTION: A semiconductor power conversion device includes: a series circuit in which two complimentarily operating semiconductor switching elements are connected in series and receiving a DC voltage; a step-down chopper circuit INVincluding a series circuit of a reactor and a capacitor connected at an interconnection point of the switching elements; a first H bridge circuit INVincluding two series circuits in which semiconductor switching elements are connected in series, the two series circuits being connected in parallel to each other, and receiving a voltage stepped down by the step-down chopper circuit INV; and second H bridge circuits INVhaving the same configuration as the first H bridge circuit and including a plurality of H bridge circuits INVeach receiving the DC voltage. Output ends of the first and second H bridge circuits INVand INVare connected in series to one another.

Description

  The present invention relates to a semiconductor power conversion device that converts DC power into AC power.

  In order to convert a high voltage, a semiconductor power conversion device that outputs a large amount of power needs to use a switching element with a high withstand voltage, or connect the elements in series to ensure a withstand voltage. Alternatively, the semiconductor power conversion device is multiplexed using a transformer to increase the output voltage. By multiplexing, a stepped voltage waveform close to a sine wave can be generated, and the effect of reducing harmonics can be obtained.

  A conventional three-phase multiple inverter generally has a configuration in which three-phase half-bridge circuits are connected in series. In such a three-phase multiple inverter, since the inverters use a common DC power source, the inverter outputs must be insulated from each other, and are connected in series via a transformer. Alternatively, there are three circuits in which three single-phase full-bridge inverters are connected in series and connected to the input of a three-phase load. In such an inverter, since the DC power sources of the single-phase inverter units are insulated from each other, a transformer is not required for output, and the apparatus can be miniaturized.

  In a conventional three-phase multiple inverter, a technique is often employed in which the output voltage of each inverter is pulse width modulated (PWM) and the harmonics of the output voltage are reduced by evenly shifting the phase of the pulse.

“Power Electronics Circuit” 1st edition, Ohmsha, November 30, 2000, p. 153, pp. 161-171 Ken Yoshii, Shigenori Inoue, Yasufumi Akagi: “6.6kV Transformerless Cascade PWM STATCOM”, Electronology D, Vol. 127, No. 8, pp.781-788 (2007)

  FIG. 7 shows a semiconductor power converter when the single-phase inverter INV has a three-stage configuration. By shifting the triangular carrier modulation wave phase of the three-stage single-phase inverter INV of FIG. 7 by 60 ° (= 180 ° ÷ 3 stages), the switching frequency of the output voltage is equivalently 6 times (= 3 stages × 2). Can be.

When the semiconductor power conversion device having this configuration is directly connected to, for example, a 6.6 kV system, the DC voltage of each single-phase inverter INV is required to be at least 1.8 kV, and the switching element used has a withstand voltage of 3.3 kV. use. At present, the 3.3 kV Si-IGBT has a limit of about 1 kHz switching frequency and the equivalent switching frequency is 6 kHz. However, the system guideline cannot be satisfied, and a filter is often installed. The filter is made up of reactors L ₁ , L ₂ , L ₃ and capacitors C ₁ , C ₂ , C ₃ , and in particular, the capacitor increases in volume as the voltage increases, and the total device volume at high voltages such as 6.6 kV. May account for more than half.

  If the number of stages is increased to about 6, 1.7 kV Si-IGBT can also be used, but the number of switching elements and DC power supplies increases, which may increase the failure rate and cost. Moreover, although SiC-MOSFET which can be used also on conditions with a high switching frequency is applicable, there exists a problem that cost is high compared with Si-IGBT.

  Embodiments of the present invention provide a low-cost and small-sized semiconductor power device that can suppress harmonics.

According to the embodiment, the semiconductor power converter INV _{0 in} which the H bridge circuit is connected to the output of the bidirectional step-down chopper circuit and the semiconductor power converter INV configured by n (n is a natural number) H bridge circuits insulated from each other. _{1 to n} . Then, the semiconductor power converter INV ₀ and the semiconductor power converters INV 1 to _n are connected in series, and an alternating voltage is output.

That is, a semiconductor power conversion device according to an embodiment includes a series circuit in which two complementary semiconductor switching elements are connected in series and supplied with a DC voltage, a reactor connected to an interconnection point of the switching elements, and A bi-directional step-down chopper circuit INV _BUCK including a series circuit of capacitors, and two series circuits each having a semiconductor switching element connected in series, the two series circuits being connected in parallel to each other, and the step-down chopper circuit INV _BUCK The first H bridge circuit INV _H to which the stepped down voltage is supplied and the first H bridge circuit having the same configuration as each of the first H bridge circuits, each including a plurality of H bridge circuits to which a DC voltage is supplied. ; and a H-bridge circuit _{INV U1 to U3,} the first and second H-bridge circuit _INV H, The output end of each H-bridge circuit of NV _UU1～U3 are connected in series with each other.

It is the figure which comprised the semiconductor power converter device which concerns on embodiment as a reactive power compensator which outputs a three-phase alternating voltage. It is a circuit block diagram which shows the H bridge circuit which each comprises the high voltage semiconductor power converter device INV _{U1-3 of} FIG. 1, INV _V1-3 , INV _W1-3 . FIG. 2 is a circuit configuration diagram of the low-voltage semiconductor power conversion devices INV _U0 , INV _V0 , and INV _W0 of FIG. 1. U-phase voltage command value _{V U} * output voltage _{V U0～3} semiconductor power converter _{INV U0～3} against, and is a waveform diagram of the step-down chopper output voltage _{V U0ABS} of _{INV U0.} FIG. 4 is a timing chart when the switching elements S _C1 and S _C2 of FIG. 3 are modulated using a carrier triangular wave. 4 is a waveform showing an output voltage V _U , an output current I _U , an output voltage V _{U0 of} INV _U0 , and a charge / discharge charge amount Q _U0 of the capacitor C _U0 of the semiconductor power conversion device according to the embodiment. It is a figure which shows the structural example of the conventional three-phase power converter device.

  Hereinafter, a semiconductor power conversion device according to an embodiment will be described with reference to the drawings.

[Embodiment 1]
FIG. 1 is a diagram in which the semiconductor power converter according to the embodiment is configured as a reactive power compensator that outputs a three-phase AC voltage. Corresponding to the system three-phase alternating currents U, V, W, single-phase semiconductor power converters INV _U , INV _V , INV _W are provided, respectively.

The U-phase semiconductor power converter INV _U is composed of one low voltage semiconductor power converter INV _U0 and three high voltage semiconductor power converters INV _U1-3 . The number of high-voltage semiconductor power conversion devices is not limited to three, and the number can be 1 to n according to the output AC voltage. The uppermost semiconductor power converter INV _U0 receives the DC voltage VDC _U0 , and the INV _U1-3 input the DC voltage VDC _U1-3 . The DC voltages VDC _{U1 to U3} are all the same voltage, and the DC voltage VDC _U0 is a voltage smaller than the DC voltage VDC _{U1 to U3} . The semiconductor power converters INV _U1 to _INV3 and INV _U0 are connected in series, that is, connected in series. The AC terminals T _{U to} T _W are connected to, for example, a 6.6 kV system via a reactor (not shown). Based on the U, V, and W phase voltage command values V _U *, V _V *, and V _W *, the controller 1 controls the gates of the semiconductor switching elements that constitute the semiconductor power converters INV _{U, V, and W.} Is output. Capacitors _CU0-3 are charged by the system voltage and generate DC voltages _VDCU0-3 .

Although FIG. 1 shows the case where the semiconductor power converter INV _U3 is the lowermost stage and the semiconductor power converter INV _U0 is the uppermost stage, the connection order is not limited to this. You may change it freely according to the ease. With this configuration, the DC voltages VDC _U0-3 are converted into voltages _VU0-3 via switching control, respectively, and the U-phase semiconductor power converter INV _U adds the voltages of the power converters INV _U0-3. The AC voltage _VU is output.

_Further, the DC voltage source of the DC voltage VDC _U0 to 3 is a capacitor, and a compensation operation for _keeping the value of the system voltage within a certain range by the input / output of reactive power can be performed (the power factor is always set to 0).

The V-phase semiconductor power converter INV _V and the W-phase semiconductor power converter INV _W are also a low-voltage semiconductor power converter INV _V0 , a high-voltage semiconductor power converter INV _V1-3 , and a low-voltage semiconductor power converter INV _W0. And high-voltage semiconductor power converters INV _W1 to _W3, and are configured to be connected in cascade as in the U-phase. With this configuration, in the V phase, the DC voltages VDC _V0 to _V3 are converted to voltages _VV0 to _V3 , respectively, and the V phase semiconductor power converter INV _V adds the voltages of the power converters INV _{V0 to V3. V} is output. The W-phase DC voltage _{VDC W0～3} are respectively converted into voltages _{V W0~3,} semiconductor power converter INV _W of W-phase outputs an AC voltage _{V W} obtained by adding the voltages of the power converter _{INV W0 to W3} .

FIG. 2 is a circuit configuration diagram showing an H-bridge circuit that constitutes each of the high-voltage semiconductor power converters INV _{U1 to IN3} , INV _{V1 to 3} , and INV _W1 to 3 according to the present embodiment. Each H-bridge circuit (semiconductor power converter) includes four switching elements S ₁ , S ₂ , S ₃ , S ₄ and free-wheeling diodes D ₁ , D ₂ , D ₃ , D ₄ that are anti-parallel to all switching elements, respectively. wherein the door, consists of two legs of the leg that are dependent connect the switching element S ₁ and switching element S _2, and legs were cascaded switching elements S ₃ and the switching element S _4. The output terminal of the leg composed of the switching elements S ₁ and S ₂ is connected to the output terminal of the upper semiconductor power converter, and the output terminal of the leg composed of the switching elements S ₃ and S ₄ is connected to the lower semiconductor power converter. Connected to the output terminal.

High voltage semiconductor power converter _{INV U1~3, INV V1~3,} 4 two switching elements _S 1 constituting the _{INV W1~3, S 2, S 3} , S 4 is a semiconductor device using silicon, a DC voltage An IGBT, a MOS-FET, or the like is used depending on the load current. The four free-wheeling diodes D ₁ , D ₂ , D ₃ , and D ₄ are also semiconductor devices using silicon. Moreover, when MOS-FET is used for switching element _S1-4 , you may substitute the free-wheeling diode _D1-4 with the parasitic diode of MOS-FET. That can be omitted reflux diode _{D 1 to 4.}

FIG. 3 is a circuit configuration diagram of the low-voltage semiconductor power converters INV _U0 , INV _V0 , and INV _{W0 according to} the present embodiment. Each UVW-phase low-voltage semiconductor power conversion device includes a step-down chopper circuit INV _BUCK and an H-bridge circuit INV _H. This step-down chopper circuit INV _BUCK can be said to be a bidirectional step-down chopper circuit because it can flow both in the direction of flowing current and in the direction of flowing out current. The bidirectional step-down chopper circuit INV _BUCK is composed of two switching elements S _C1 and S _C2 and an LC filter composed of free-wheeling diodes D _C1 and D _C2 , a reactor L _BUCK and a capacitor C _BUCK that are parallel to the switching elements, respectively. H-bridge circuit INV _H is the high voltage semiconductor power converter _{INV U1~n, INV V1~n,} has the same configuration as that of the _{INV W1~n,} the switching element _{S H1, S H2, S H3} , S H4, respectively The _free- wheeling diodes D _H1 , D _H2 , D _H3 , and D _H4 are connected in reverse parallel to each other.

The switching elements S _C1 and S _C2 constituting the low-voltage semiconductor power converters INV _U0 , INV _V0 and INV _W0 are semiconductor devices using SiC (silicon carbide) or GaN (gallium nitride), and can be used for DC voltage or load current. Depending on the case, an IGBT, a MOS-FET, or the like is used. The two free-wheeling diodes D _C1 and D _C2 are also semiconductor devices using silicon carbide or gallium nitride. Further, when MOS-FETs are used for the switching elements S _C1 and S _C2 , the free wheel diodes D _C1 and D _C2 may be substituted with parasitic diodes of MOS-FETs. The four switching elements _SH1-4 of the H-bridge circuit are semiconductor devices using silicon, and IGBTs, MOS-FETs, or the like are used according to the DC voltage or load current. The four _free- wheeling diodes _{DH1 to DH4} are also semiconductor devices using silicon. When MOS-FETs are used for the switching elements _SH1-4 , the _{free wheel} diodes _DH1-4 may be replaced with MOS-FET parasitic diodes.

Next, the operation of the first embodiment configured as described above will be described by taking the semiconductor power converter INV _U as an example. At this time, the DC voltage VDC _U1 to VDC _U1 to VDC _U1 to _U3 of the high voltage semiconductor power converters INV _U1 to 3 are equal to each other, and the DC voltage of the low voltage semiconductor power converter INV _U0 to VDC _U0 .

The high voltage semiconductor power converters INV _U1-3 output three levels of voltages -VDC, 0, + VDC. Now to FIG. 2 as an example, describes a method of driving the switching elements _{S 1 to 4} constituting the semiconductor power converter _{INV U1~3.}

The semiconductor power converter _{INV U1} is 3-level voltage -VDC by ON / OFF of the switching elements _{S 1 to 4,} 0, outputs the + VDC. Table 1 shows an example of the switching pattern of the semiconductor power converter INV _U1 .

Table 1 shows the ON / OFF state (gate command) of the switching element when the output voltage transits from 0 → + VDC → 0 → −VDC → 0. For example, the switching element _{S 1} and switching element _{S 4} is in ON, the switching element _{S 2} and the switching element _{S 3} is if OFF, the output voltage of + VDC. Further, the switching element _{S 2} when the switching element _{S 1} is ON OFF, so that the switching element _{S 3} is the switching element _{S 4} when the ON to OFF, always operate complementarily. Further, when the output voltage is changed, the four switching elements do not switch simultaneously, and only one of the upper and lower arm pairs S1 and S2 and S3 and S4 switches. That is, the upper and lower arm pairs S1 and S2 or the upper and lower arm pairs S3 and S4 are switched at a time.

Next, the operation of the entire U-phase semiconductor power converter including the semiconductor power converter INV _U0 will be described.

FIG. 4 _shows the output voltage V _U0-3 of the semiconductor power converters INV _{U0-3 to} the U-phase voltage command value V _U * of the U-phase semiconductor power converter according to this embodiment, and the step-down chopper output voltage V of the INV _U0. It is a wave form diagram of _U0ABS . The control unit 1 inputs the U-phase voltage command value V _U *, calculates voltage commands corresponding to various waveforms shown in FIG. 4, and controls each switching element. As a result, the voltage of each part is generated substantially as shown in FIG. The same applies to the V phase and the W phase.

The semiconductor power converters INV _{U1 to UV3} output one pulse voltage (a positive pulse and a negative pulse) in one cycle. Difference between U-phase voltage command value V _U * (substantially equal to U-phase output voltage V _U in FIG. 6) and the total output voltage value (= V _U1 + V _U2 + V _U3 ) of semiconductor power converters INV _{U1-3 Is} a voltage command value V _U0 * of the semiconductor power converter INV _U0 as shown in the following equation.

V _U0 * = V _U * − (V _U1 + V _U2 + V _U3 )
Since the control unit 1 controls each switching element of the semiconductor power converter INV _U so that the output voltage V _U0 of the semiconductor power converter INV _U0 matches the voltage command value V _U0 *, the power converter INV _U A voltage that precisely matches the U-phase voltage command value V _U * can be output. The output voltage V _U0 of the semiconductor power converter INV _U0 is a continuous analog voltage waveform as shown in FIG.

Next, the output voltage control method of the low-voltage power converter INV _{U0 in} the U-phase semiconductor power converter INV _U will be described in detail. The control unit 1 controls the switching elements S _C1 and S _C2 of the step-down chopper so that the step-down chopper output voltage V _{U0ABS of} INV _U0 matches the absolute value V _U0ABS * of the voltage command value V _U0 *.

FIG. 5 is a timing chart when the switching elements S _C1 and S _{C2 according} to the first embodiment are PWM controlled using a carrier triangular wave. In FIG. 5, the operation states of the switching elements S _C1 and S _C2 represent an ON state when the signal waveform is High, and an OFF state when the signal waveform is Low. The voltage command value V _U0ABS * has a waveform as shown in FIG. 4. However, since the amount of change in the voltage command value V _{U0 ABS} * is slight in one carrier cycle, in FIG. Yes.

Is compared with a triangular wave car and the voltage command value _{V U0ABS} * generated by a certain carrier frequency, the voltage command value _{V U0ABS} * to the switching element _{S C1} is ON when the triangular wave car larger, the switching element _{S C2} is turned OFF. When the voltage command value V _{U0 ABS} * is smaller than the triangular wave car, the switching element S _C1 is turned off and the switching element S _C2 is turned on.

The semiconductor power conversion device INV _U0 corresponds to the voltage command value V _U0 * by controlling the switching elements _SH1 to _H4 constituting the H bridge circuit with _respect to the LC filter output voltage V _U0ABS thus generated. The voltage _VU0 is output. As with the H bridge circuit of FIG. 2, the switching elements _SH1 to 4 can output a voltage of −V _U0ABS , 0, + V _U0ABS by ON / OFF control, but in this embodiment, only the voltage of −V _U0ABS or + V _U0ABS is output. Output. In the switching element _{S H1} and the switching element _{S H4} is ON, the switching element _{S H2} and the switching element _{S H3} is equal OFF, the power converter _{INV U0} outputs a voltage of _{+ V U0ABS.} On the contrary, the switching element _{S H1} and the switching element _{S H4} is in OFF, the switching element _{S H2} and the switching element _{S H3} is equal ON, the power converter _{INV U0} outputs a voltage of _{-V U0ABS.}

By controlling the switching elements _SH1 to _SH4 according to the polarity of the voltage command value V _U0 *, the output voltage V _U0 of the semiconductor power converter INV _U0 can be matched with the voltage command value V _U0 *.

Timing semiconductor power converter _{INV U1～3} outputs a positive or negative voltage, U-phase voltage command value _{V U} * DC voltage VDC × k (k is an integer of -3 + 2) coincides with the + VDC / 2 Is the time. Since the semiconductor power converter INV _U0 outputs an analog continuous waveform that has passed through the LC filter (L _BUCK , C _BACK ), the voltage cannot be changed rapidly. That is, when the polarity of the voltage command value V _U0 * is reversed, it is necessary to prevent the voltage command value V _{U0 ABS} * from changing sharply.

If the output of the semiconductor power converter _{INV U1～3} one pulse voltage in the above timing, when the polarity of the voltage command value _{V U0} * inverted voltage command value _{V U0ABS} (when change vertically) * is VDC / 2 are fixed by, it avoids distortion of the overall output voltage V _U. That is, the capacitor voltage VDC _U1-U3 of power converters INV _U1-3 is initially charged to VDC when the device is turned on. Output voltage command value _{V U} is, when crossing the rising or falling of the voltage command value _{V U1 + V U2 + V U3} , voltage _{V U0} polarity is reversed by the switching of the low voltage H-bridge. The voltage command value V _{U0 ABS} * at this time is controlled to VDC / 2 as described above. Therefore, distortion of the overall output voltage V _U is avoided. In FIG. 4, for example, the region a of the voltage V _U0ABS is inverted in polarity by switching of the low voltage H bridge to become the region b of the voltage V _U0. The voltage of this region b is the voltage V _U1 + V _U2 as in the region c. The output voltage _VU is generated by adding (subtracting in the figure) to + _VU3 .

Here, since the voltage source of the direct-current voltages VDC _{U0 to U3} is a capacitor, it is necessary to balance the voltages (the charge amounts of charge and discharge are matched). Hereinafter, a method of balancing capacitor voltages will be described.

Charging / discharging of the capacitor charge is determined by the direction of the output voltages V _{U0 to} V _U3 and the output current I _U. When the polarity obtained by multiplying the output voltage and the output current is positive, the capacitor charge is discharged, and the capacitor voltage decreases. When the polarity obtained by multiplying the output voltage and the output current is negative, the capacitor charge is charged and the capacitor voltage rises.

Since the semiconductor power converter according to the present embodiment performs reactive power compensation (the power factor of the load is always controlled to 0), the case where the current phase is delayed by 90 ° with respect to the system voltage phase is taken as an example. At this time, _since the output voltage phase of the semiconductor power converters INV _{U1 to U3} is advanced by 90 ° with respect to the current phase, the charge / discharge charges of the capacitors _{CU1 to CU3} become zero per cycle of the output voltage frequency. That is, the voltage balance of the capacitors _CU1 to 3 is maintained in principle.

On the other hand, a method for balancing the voltage of the capacitor _CU0 will be described below.

FIG. 6 shows waveforms of the output voltage V _U , the output current I _U , the output voltage V _{U0 of} INV _U0 , and the charge / discharge charge amount Q _U0 of the capacitor C _U0 of the semiconductor power conversion device according to this embodiment. In the waveform _QUA , a positive region larger than zero is a discharge charge amount, and a negative region smaller than zero is a charge charge amount. In order to balance the voltages, it is necessary to match the charge charge amount with the discharge charge amount.

The charge / discharge charge amount is determined by the product of the output voltage V _U0 and the output current I _U. The output voltage _{V U0} is a value according to the output voltage command _{V U0} *, output voltage command _{V U0} * is the voltage sum _V U1 _{+ V} U2 _{+ V U3} output voltage command _{V U} * and the semiconductor power converter _{INV U1～3} Determined by difference. Here, the total voltage value V _U1 + V _U2 + V _U3 depends on the DC voltage VDC. Therefore, the charge / discharge charge amount Q _U0 of the capacitor C _U0 can be adjusted by dynamically changing the DC voltage VDC.

That is, the DC voltage VDC _U0 is detected, feedback control is performed to operate the DC voltage VDC so as to keep it at a constant target value, and the DC voltage VDC _U0 is kept constant. In order to operate the DC voltage VDC, it is only necessary to operate input / output of active power to the INV _U1 to INV _U3 , so the phase of one pulse voltage is changed.

The operation method has been described above by taking the U-phase semiconductor power converter INV _U as an example. However, the V-phase and W-phase semiconductor power converters INV _V and INV _W also follow the respective voltage command values V _V * and V _W *. A voltage is output in the same manner as the U-phase inverter.

Thus, the operation of each of the semiconductor power converters INV _{U0 to UV3} of the semiconductor power converter INV _U makes the output voltage a sine wave with less distortion, and can reduce harmonics.

Furthermore, since the high-voltage semiconductor power converters INV _{U1 to} INV _U3 output one pulse of voltage within one cycle, the number of switching operations can be minimized, and loss due to switching can be suppressed. For this reason, a high voltage | pressure-resistant element can be used.

The semiconductor power conversion device INV _U0 whose DC voltage is lower than VDC can be configured by a switching element having a low withstand voltage. For this reason, the switching elements S _C1 and S _C2 constituting the step-down chopper can be switched at a high frequency and can generate a continuous voltage V _{U0 ABS} with little distortion.

Furthermore, if a wide gap semiconductor such as SiC or GaN is applied to the switching elements S _C1 and S _C2 , the power loss can be reduced even with high frequency switching. Since the number of times of switching of _SH1 to _SH4 constituting the H bridge circuit is limited to 3 times per cycle, even if silicon is used, power loss is small.

  That is, in this embodiment, if two wide gap semiconductors are used per phase, a semiconductor power conversion device with small loss and harmonics can be obtained. In the configuration of Non-Patent Document 2, the number of wide gap semiconductors is 12 per phase, and the cost is higher than that of this embodiment.

Moreover, when all elements are comprised by Si in the structure of a nonpatent literature 2, although a filter ( _C1-3 , _L1-3 ) is required like FIG. 7, the filter in this embodiment is FIG. Thus, only the output part (C _BUCK , L _BUCK ) of the step-down chopper is provided, the withstand voltage is small, and the filter is downsized.

Even if the low voltage inverter INV _U0 is switched at a high frequency by PWM control or the like, the loss is small as compared with the whole semiconductor power converter. In this way, by combining a plurality of high voltage inverters VDC _{U1 to} VDC _UN and one low voltage inverter INV _U0 , a semiconductor power conversion device with small harmonics and low loss can be obtained.

[Embodiment 2]
Next, a semiconductor power conversion device according to Embodiment 2 of the present invention will be described. The second embodiment is characterized in that the direct-current voltages VDC _{U1 to U3} of the high-voltage semiconductor power converters INV _U1 to _U3 are different from each other, and is otherwise the same as the first embodiment. By _{providing the} DC voltage VDC _U1-3 with a degree of freedom, the condition for maintaining the DC voltage VDC _U0 constant is relaxed, and the DC voltage VDC _U0 can be further reduced.

With this configuration, switching elements having a lower withstand voltage can be applied as the switching elements S _C1 and S _C2 constituting the step-down chopper. Therefore, switching can be performed at a higher frequency, and a continuous voltage V _{U0 ABS} with less distortion can be generated. In addition, since the switching elements S _C1 , S _C2 , and _{SH 1 to 4} can be configured with switching elements having a lower withstand voltage, the apparatus cost is reduced. Further, the withstand voltage required for the output filter of the step-down chopper is reduced, and there is an advantage that the filter is downsized.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

INV _{U, V, W,} ... single-phase semiconductor power converter _{of, INV U0, INV V0, INV} W0 ... low-voltage semiconductor power _{converter, NV U1~U3, INV V1~V3, INV} W1~W3 ... high voltage semiconductor power converter (H-bridge _{circuit), S 1~4, S C1,} C2, S H1~H4 ... semiconductor switching _{element, D 1~4, D C1, C2} , D H1~H4 ... diodes.

Claims (9)

A bi-directional step-down chopper circuit including a series circuit in which two complementary semiconductor switching elements are connected in series and supplied with a DC voltage, and a series circuit of a reactor and a capacitor connected to an interconnection point of the switching elements;
A first H bridge circuit including two series circuits each having a semiconductor switching element connected in series, the two series circuits connected in parallel to each other, and supplied with a voltage stepped down by the step-down chopper circuit;
A second H bridge circuit having the same configuration as each of the first H bridge circuits and including a plurality of H bridge circuits to which a DC voltage is supplied.
The semiconductor power converter characterized by the output terminal of each H bridge circuit of the 1st and 2nd H bridge circuit being mutually connected in series. Each H bridge circuit of the second H bridge circuit outputs one positive pulse and one negative pulse in one cycle of the output voltage command of the semiconductor power converter,
The difference between the output voltage addition value of each H bridge circuit of the second H bridge circuit and the output voltage command is output as a continuous analog waveform voltage by the first H bridge circuit. 1. The semiconductor power conversion device according to 1.   The switching element constituting the step-down chopper circuit is constituted by a high-speed switching element, and the switching elements constituting the first and second H-bridge circuits are constituted by switching elements slower than the step-down chopper circuit. The semiconductor power conversion device according to claim 2.   4. The semiconductor power converter according to claim 3, wherein a DC voltage supplied to the step-down chopper circuit is smaller than a DC voltage supplied to each H bridge circuit of the second H bridge circuit.   5. The semiconductor power conversion device according to claim 4, wherein voltage values of DC voltages supplied to the respective H bridge circuits of the second H bridge circuit are different from each other.   Capacitors for supplying the DC voltage are respectively connected in parallel to the H bridge circuit and the step-down chopper circuit of the second H bridge circuit, and the semiconductor power converter compensates for reactive power. The semiconductor power conversion device according to claim 5.   7. The semiconductor power conversion device outputs reactive power by the capacitors connected in parallel to the H bridge circuits and the step-down chopper circuit of the second H bridge circuit, respectively. Semiconductor power converter.   8. The charge / discharge charge amount of the capacitor connected to the step-down chopper circuit is balanced by manipulating the DC voltage of each capacitor connected to the second H-bridge circuit. Semiconductor power conversion device.   A semiconductor power converter comprising three circuits of the semiconductor power converter according to claim 1 and outputting a three-phase AC voltage.

Images