JP2005094918A - Noise reduction circuit for power conversion apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress common mode potential fluctuation and reduce leakage current, and thereby enable reduction in the overall size of an apparatus and overall loss therein. <P>SOLUTION: Switching elements are driven by the combination of switching patterns illustrated in the figure. This driving is carried out so that of the outputs in three phases from an inverter circuit, outputs in two phase are brought to the positive potential +Ed/2 (or negative potential -Ed/2) of a direct-current intermediate circuit and the output in the remaining one phase is brought to the negative potential -Ed/2 (or positive potential +Ed/2) of the direct-current intermediate circuit. In other words, the switching elements are driven so that a period in which the output potentials in all the three phases are brought to the positive potential or negative potential of the direct-current intermediate circuit does not occur. Thus, the common mode potential fluctuation can be suppressed and the leakage current can be reduced without adding any special circuit. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a noise reduction circuit of a power conversion device including a semiconductor switching element such as an inverter device.

FIG. 7 shows an example of an induction motor drive system that drives a three-phase induction motor by a three-phase inverter.
In FIG. 7, the input of the rectifier 2 is input to the AC power source 1, the capacitor C ₀ is output to the output of the rectifier 2, and the three-phase inverter circuit 3 composed of semiconductor switching elements Q1 to Q6 is connected to the capacitor C _0. A motor (three-phase induction motor) 4 is connected to the output of the phase inverter circuit 3. The switching elements Q1 to Q6 of the three-phase inverter circuit 3 are on / off controlled by a pulse width modulation signal (also referred to as a PWM signal or a pulse signal) obtained by comparing each phase voltage command with a modulation wave. The motor 4 is driven by the output voltage of the three-phase inverter circuit 3.

Here, as a method for obtaining a three-phase sine wave output voltage, a sine wave-triangular wave comparison PWM pulse generation method using a three-phase sine wave signal and one triangular wave carrier is generally used. In FIG. 8, assuming that the three-phase output potential of the inverter is Vu, Vv, Vw and the common mode potential is Vc, the potential Vc is expressed by the following equation.
Vc = (Vu + Vv + Vw) / 3 (1)
As shown in FIG. 8, in the PWM pulse generation method of a general sine wave-triangular wave comparison,
It can be seen that the common mode potential in FIG. 8 (5) changes from −Ed / 2 to + Ed / 2 with the potential fluctuation range Ed / 3.

Due to the common mode potential fluctuation, the stray capacitance of the cable and the motor is charged / discharged, and the charge / discharge current becomes a leakage current, which may cause damage to the motor bearing and malfunction of peripheral devices.
As means for solving this, for example, there is one shown in Patent Document 1. FIGS. 9 and 10 show a switching state diagram and a connection diagram of a three-phase voltage source inverter for driving a delta connection load shown in FIGS.

  In the method of Patent Document 1, one of the three-phase outputs of the inverter 10 shown in FIG. 10 is set to the positive side potential of the DC intermediate circuit (corresponding to “1” in the switching state of FIG. 9), and the other one-phase. Is the negative potential of the DC intermediate circuit (corresponding to “−1” in the switching state of FIG. 9), and the remaining one phase is an intermediate potential between the positive potential and the negative potential of the DC intermediate circuit (switching state of FIG. 9). In this case, only the switching pattern that corresponds to “0” is sequentially repeated to drive the AC device 30 serving as a load. By using only such a switching pattern, the common mode potential expressed by the above equation (1) is always fixed, so that the problem caused by the common mode potential fluctuation can be solved.

Further, as another means for solving the problem, there is a method as shown in FIG.
This is because a common mode potential fluctuation is detected by using a capacitor 8 connected to the output section of the inverter, a voltage that cancels the common mode potential fluctuation is generated in the transistor circuit 9, and the voltage is applied to the common mode transformer 11. To be applied to the output of the inverter. By doing so, since the generated common mode potential fluctuation can be canceled regardless of the PWM pulse pattern of the inverter, the common mode potential fluctuation is eliminated, and the problem caused by the common mode potential fluctuation can be solved.

JP 2000-083387 A (page 4-5, FIG. 1-2) Japanese Patent No. 2863833 (page 3-4, FIG. 1)

In the device described in Patent Document 1, since the common mode potential is fixed, the following new problem occurs.
(1) Since the switching pattern is limited, the output voltage range of the inverter is lowered.
(2) An additional circuit for fixing one phase of the three-phase output to an intermediate potential between the positive side potential and the negative side potential of the DC intermediate circuit is required.
(3) The AC device that is the load is limited to the delta connection.
From the above, the motor drive range is limited, or the motor connection method is limited. Further, the additional circuit leads to an increase in the size of the entire system.

On the other hand, the one described in Patent Document 2 can eliminate the common mode potential fluctuation without limiting the motor drive range and the motor connection method, but has the following problems.
(4) In order to cope with the change of the common mode potential to four levels of ± Ed / 2 and ± Ed / 6, the circuit that generates the cancel voltage uses the active region of the transistor.
(5) Since the common mode potential changes to ± Ed / 2, the magnetic flux density used by the common mode transformer increases.

In short, there is a problem that the loss of the circuit that cancels the common mode potential fluctuation increases and the common mode transformer is enlarged.
Accordingly, the problem to be solved by the present invention is to reduce the size and loss of the entire motor drive system.

  In order to solve the above-described problem, in the invention of claim 1, in a power conversion device having a rectifier circuit connected to an AC power source, and a smoothing circuit and an inverter circuit connected to a DC output of the rectifier circuit, The inverter circuit has a three-phase output configuration composed of a bridge circuit of six switching elements, two of the three-phase outputs are at the positive side potential of the DC output of the rectifier circuit, and the remaining one phase is the rectifier circuit A switching pattern that provides a negative side potential of the DC output, and two phases of the three-phase outputs are negative side potentials of the DC output of the rectifier circuit, and the remaining one phase is a positive side potential of the DC output of the rectifier circuit. The switching element is turned on / off in combination with a switching pattern such that a desired voltage can be output.

According to a second aspect of the present invention, there is provided a power converter having a rectifier circuit connected to an AC power source, and a smoothing circuit and an inverter circuit connected to a DC output of the rectifier circuit. A series circuit of switching elements is connected, a primary side winding of a common mode transformer is connected to an output part of the inverter circuit, and one terminal of a secondary side winding of the common mode transformer is a DC output of the rectifier circuit And the other terminal of the secondary winding of the common mode transformer is connected to the midpoint of the series circuit of the switching elements, respectively. To do.
In the invention of claim 2, an impedance element can be connected between the midpoint of the series circuit of the switching elements and one terminal of the secondary winding of the common mode transformer. Invention).

According to the first aspect of the present invention, the common mode potential fluctuation can be reduced without using a special additional circuit. As a result, not only can the leakage current be reduced, but the size of the common mode reactor used for the filter can be reduced.
In particular, according to the second and third aspects of the invention, the common mode potential fluctuation can be suppressed with a simple configuration, and the entire system can be reduced in size and reduced in loss.

FIG. 1 is an explanatory diagram for explaining a first embodiment of the present invention.
This shows a pulse pattern obtained by a conventional triangular wave comparison method as shown in FIG. As shown in FIG. 1, by shifting the pulse of each phase, it is possible to prevent the occurrence of the case where all three phases are the positive potential of the DC intermediate circuit or the case where all three phases are the negative potential of the DC intermediate circuit. As shown in the figure, the mode potential repeats two levels of -Ed / 6 and + Ed / 6. As a result, the potential fluctuation range of the common mode potential can be reduced from Ed to Ed / 3. In addition, since the average value of the output voltage within the carrier period is the same as that in the conventional method for each phase, a desired voltage is output as the output voltage between the lines.

Here, it will be described below that the common mode potential can be set to two levels of -Ed / 6 and + Ed / 6 in the entire output voltage range when the output voltage of the inverter is a balanced three-phase output.
As shown in FIG. 3, the period during which the positive side potential of the DC intermediate circuit is output within one cycle of the carrier frequency is defined as tu, tv, tw, and the period during which the negative side potential of the DC intermediate circuit is output is 1 −tu, 1−tv, 1−tw. If the common mode potential is set to two levels of -Ed / 6 and + Ed / 6, it is necessary to prevent a period in which all the three-phase output potentials become the positive side potential or the negative side potential of the DC intermediate circuit. , At least the following formula must be satisfied.

(Tu + tv + tw)? 2 (2)
(1−tu) + (1−tv) + (1−tw)? 2 ... (3)
From the above equations (2) and (3), the following equation is derived.
1? (Tu + tv + tw)? 2 (4)

On the other hand, if the command signals of the three-phase output voltage are Vu ^* = a · sin ωt, Vv ^* = a · sin (ωt−2π / 3), Vw ^* = a · sin (ωt + 2π / 3), a triangular wave carrier wave Therefore, tu, tv, and tw are expressed as follows.
tu = (1 + sinωt) / 2 (5)
tv = [1 + sin (ωt−2π / 3)] / 2 (6)
tw = [1 + sin (ωt + 2π / 3)] / 2 (7)

From the above equations (5) to (7), the following equation is obtained.
tu + tv + tw = (1 + sin ωt) / 2 + [1 + sin (ωt−2π / 3)] / 2
+ [1 + sin (ωt + 2π / 3)] / 2
= [1 + sin ωt + sin (ωt−2π / 3)
+ Sin (ωt + 2π / 3)] / 2 = 1.5
Therefore, in the balanced three-phase output, tu + tv + tw = 1.5, and it can be seen that the above expression (4) is satisfied in the entire output range. Although not described in detail here, if the range satisfies the expression (4), the common mode potential fluctuation is −2 of −Ed / 6 and + Ed / 6 in the same way, for example, at the time of modulation and at the time of two-arm modulation. Can be operated on level.

FIG. 4 shows a second embodiment of the present invention.
This is configured by adding a series circuit 5 of switching elements and a common mode transformer 6 to the conventional circuit shown in FIG. The operation will be described. The PWM pulse pattern is assumed to be the same as in FIG. 1, and for example, a case is considered where the pulse pattern has shifted from the period T1 shown in FIG. 1 to the period T2. In this case, since the common mode potential changes from −Ed / 6 to + Ed / 6, a voltage in a direction to cancel the common mode potential fluctuation is supplied from the secondary winding of the common mode transformer 6 to the primary side. For example, the upper arm switch Q7 of the switching element series circuit 5 is turned on and the lower arm switch Q8 is turned off.

  As a result, a voltage of Ed / 2 in the direction shown in FIG. 4 is applied to the secondary side of the common mode transformer 6. Therefore, if the turns ratio of the common mode transformer 6 is set to 2: 3, a voltage of Ed / 3 is applied to the primary side of the common mode transformer 6 in the direction indicated by the dotted line in FIG. Thus, the common mode potential fluctuation is canceled out, and the charge / discharge current due to the stray capacitance does not flow.

  Similarly, when the period transitions from the period T2 to the period T3 in the figure, the common mode potential changes from Ed / 6 to -Ed / 6. Therefore, the series circuit 5 of the switching elements is arranged so as to cancel this common mode potential fluctuation. When the upper arm switch Q7 is turned off and the lower arm switch Q8 is turned on, the common mode potential fluctuation is canceled in the same manner as described above, and the charge / discharge current due to the stray capacitance does not flow.

FIG. 5 shows a third embodiment of the present invention which is a modification of FIG. (A) shows a system configuration diagram, and (b) shows a specific example of an impedance element.
As is apparent from FIG. 5A, the characteristic feature is that an impedance element 7 is connected between the series circuit 5 of the switching elements and the common mode transformer 6 with respect to FIG. The effect of the impedance element 7 is to act as a filter by applying only the common mode voltage in a desired frequency band to the secondary side of the common mode transformer 6. As an example of the impedance element, there is a series connection circuit of a capacitor 8 and a resistor 9 as shown in FIG.

  The basic operation is the same as in FIG. 4, but when applying a voltage to the secondary side of the common mode transformer 6, the low frequency component is cut by the capacitor 8, so the voltage applied to the common mode transformer 6 is Thus, the restriction is as shown by the solid line in FIG. As a result, the portion canceled by the common mode potential fluctuation is limited to a high frequency, but the common mode transformer 6 can be reduced in size accordingly. Although a series connection circuit of a capacitor and a resistor is used as an example of the impedance element, any circuit can be used as long as a desired frequency band can be applied to the secondary side of the common mode transformer.

Explanatory drawing explaining 1st Embodiment of this invention Waveform diagram explaining the pulse generation method of FIG. Definition explanatory diagram of the output potential period within the carrier period of the pulse pattern of FIG. The block diagram which shows 2nd Embodiment of this invention The block diagram which shows the modification of FIG. Cancel voltage waveform explanatory diagram in FIG. Diagram showing a general example of an induction motor drive system Illustration of output voltage waveform example by PWM control method Switching state diagram for explaining the first conventional example Inverter configuration diagram for explaining the first conventional example System configuration diagram showing a second conventional example

Explanation of symbols

1 ... AC power source, 2 ... a rectifier, 3 ... inverter circuit, 4 ... motor, the series connection circuit of 5 ... switching device, 6 ... common mode transformer, 7 ... impedance element, 8, C ₀ ... capacitor, 9 ... resistors, Q1-Q8 ... switching elements.

Claims (3)

In a power converter having a rectifier circuit connected to an AC power source, and a smoothing circuit and an inverter circuit connected to a DC output of the rectifier circuit,
The inverter circuit has a three-phase output configuration composed of a bridge circuit of six switching elements, two of the three-phase outputs are at the positive side potential of the DC output of the rectifier circuit, and the remaining one phase is the rectifier circuit A switching pattern that becomes a negative side potential of the DC output, and two phases of the three-phase outputs are at a negative side potential of the DC output of the rectifier circuit, and the remaining one phase is a positive side potential of the DC output of the rectifier circuit A noise reduction circuit for a power converter, wherein the switching element is turned on / off in combination with a switching pattern such that a desired voltage can be output. In a power converter having a rectifier circuit connected to an AC power source, and a smoothing circuit and an inverter circuit connected to a DC output of the rectifier circuit,
A series circuit of two switching elements is connected in parallel with the rectifier circuit, a primary winding of a common mode transformer is connected to the output of the inverter circuit, and one of the secondary windings of the common mode transformer is connected Is connected to the middle point obtained by dividing the DC output portion of the rectifier circuit with a capacitor having the same capacity, and the other terminal of the secondary winding of the common mode transformer is a series circuit of the switching elements. A noise reduction circuit for a power conversion device, characterized by being connected to each of the midpoints. The power conversion device according to claim 2, wherein an impedance element is connected between a midpoint of the series circuit of the switching elements and one terminal of the secondary winding of the common mode transformer. Noise reduction circuit.

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