JP2001169559A - Sine wave inverter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain the same sine wave with a high voltage as a reference sine wave voltage by responding to the demand for a large power of a load, and to reduce the power loss in a switching element in a sine wave inverter of the constitution for controlling ON, OFF two switching elements in a reverse relation according to two switching signals controlled under a control current using the reference voltage, in such a manner that that the two elements connected in series between DC power sources are connected at the center through an inductor and a capacitor led at its output terminals from both ends. SOLUTION: The other two switching elements connected in series between the DC power sources are connected at the center to the center of the DC power sources through the other inductor and the capacitor, and the other two switching elements are controlled ON, OFF in a reverse relation between the other two switching signals controlled under the difference of an output current and the current flowing to the other inductor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sine wave inverter for converting a direct current obtained from a direct current power supply into a sine wave alternating current.

[0002]

2. Description of the Related Art Conventionally, a sine-wave single-phase inverter described below with reference to FIG. 6 has been proposed. That is, it has a DC power supply 1 and a series circuit H of switching elements A1 and A2 connected between both ends of the DC power supply 1 and controlled to be turned on and off in an inverse relationship to each other. The middle point of connection between the H switching elements A1 and A2 is connected to the middle point of the DC power supply 1 through the smoothing inductor L and the smoothing capacitor C. Further, from both ends of the smoothing capacitor C, a pair of output terminals T1 and T2 has been derived.

In this case, the switching element A1 of the series circuit H is connected to the positive terminal of the DC power supply 1 of the series circuit H, and the switching element A2 of the series circuit H is connected to the DC power supply of the series circuit H. 1 is connected to the negative electrode end.

In the series circuit H, for example, an n-channel type field effect transistor 2 can be used as each of the switching elements A1 and A2, provided that the field effect transistor 2 is controlled to be "ON". In the field effect transistor in which the forward current flows from the source side to the drain side and the reverse current flows from the drain side to the source side in the same manner as the forward current during the period, the switching element A1 And A
2 only needs to use the field-effect transistor 2 alone, but the field-effect transistor 2 is a field-effect transistor that flows the above-described forward current but does not substantially flow the above-described reverse current. The field effect transistor 2 and the diode 3 connected in parallel to the field effect transistor 2 may be used for each of the switching elements A1 and A2.

In this case, in the series circuit H, the drain of the field effect transistor 2 used for the switching element A1 is connected to the source of the field effect transistor 2 used for the switching element A2, The terminal connected to the positive terminal and the negative terminal of the DC power supply 1 is led out from the source and the drain of the field effect transistor 2 used for the switching element A2.
When the diode 3 is used for 1 and A2, the diode 3 used for the switching element A1 has a polarity such that the anode side is the switching element A2 side, and the diode 3 used for the switching element A2 has the anode connected to the switching element A1 side. The polarity should be the opposite side,
Further, the diode 3 includes switching elements A1 and A
In the case where the field effect transistor 2 used for 2 has (usually has) a parasitic diode corresponding to the diode 3 between its source and drain, it may be the parasitic diode.

Further, with the reference sinusoidal voltage generation means 4 for outputting the reference sine wave voltage v _r having a frequency f _r.

Furthermore, with a load voltage detecting means VD which a voltage obtained between the output terminals T1 and T2 of the pair being derived from both ends of the smoothing capacitor C described above will be detected as a load voltage v _0.

Further, there is provided a capacitor current detecting means ICD for detecting a current flowing through the smoothing capacitor C as a capacitor current _ic .

Furthermore, the reference sinusoidal voltage v _r of the reference sinusoidal voltage generation means 4 occurs, the load voltage detecting means VD
Voltage v ₀ detected by the capacitor and the capacitor current detecting means I
Based on the capacitor current _ic detected by CD, (Y
(V _r -v ₀₎ is given by the -i _c) (although, Y is 0
Having a control current generating output means CG that generates output admittance) control current i _g having a value greater than.

In this case, the control current generation and output means CG is
(A) the reference sine wave voltage v _r of the reference sinusoidal voltage generation means 4 is generated, the load voltage v ₀ Metropolitan load voltage detecting means VD detects, their difference voltage (v _r -v ₀₎ the difference circuit 5 for outputting, multiplied by (b) the difference voltage output from the difference circuit 5 (v _r -v _0), admittance Y Y
Current given by _{(v r -v 0) (Y} (v r -v 0))
A multiplier circuit 6 for outputting, (c) and a current multiplication circuit 6 outputs _{(Y (v r -v 0)} ), the capacitor current i _c for detecting the capacitor current detecting means ICD, their difference current _{(Y (v r -v 0)} ) - i c) a control current i
and a difference circuit 7 that outputs the signal as _g .

Further, in both cases, "1" and "0" are sequentially repeated in a binary display, and "1" and "0" in a binary display are respectively inversely related to each other, and each of the two is represented.
The value display of "1" and the control current i switching signal _g is controlled to be 0 SW1 and SW2 by the control current i _g which period the control current generating output means CG generates outputs "0" A switching signal generation / output means SG is provided for generating and outputting the switching signals SW1 and SW2 to the switching elements A1 and A2 of the series circuit H so as to control on / off of the switching elements.

In this case, the switching signal generation / output means SG is provided with (a) a reference DC current I _r (for example, I _r = 0).
The reference DC current generating means 8 for generating, (b) inputs the control current i _g to the reference DC current generator 8 generates the reference DC current I _r and the control current generating output means CG generates output control current i _g is, the reference DC current I _r than atmospheric i.e. i _g> I _r (or reference DC current I _r or more, that i _g ≧ I _r) takes a "1" in a case if binary display, the reference direct current I _r or less, that i _g ≦ I if _r (or reference DC current I _r than that i _g <I _r), the comparator circuit 9 to output a comparison output SC to take "0" in the binary display
When a trigger pulse train generating circuit 9 for generating a trigger pulse train PL having a sufficiently high frequency f _H relative to the reference sine wave voltage v _r of the sinusoidal voltage generation means 4 generates a reference (c), (d ) The trigger terminal 11 to which the trigger pulse train PL generated by the trigger pulse train generating means 9 is supplied, the signal terminal 12 to which the comparison output SC output from the comparison circuit 9 is supplied, the positive (or negative) output terminal 13, and the negative A positive (or negative) output terminal 13 and a negative (or positive) output terminal 14.
And a flip-flop circuit 15 called a D-type, which outputs the outputs respectively output as switching signals SW1 and SW2.

The D-type flip-flop circuit 15 has a trigger terminal (a) and (i) when the comparison output SC supplied to the signal terminal 12 is "1" in binary display. If one pulse of the trigger pulse train PL supplied to 11 arrives, then the positive (or negative) output terminal 13 and the negative (or positive) output terminal 14
If the output which takes "0" and "1" in the binary display is output respectively, the positive (or negative) output terminal 13 and the negative (or positive) output terminal 14 output "1" and "1" in the binary display. Outputs each taking "0" are output. (Ii) Even if one pulse of the trigger pulse train PL arrives, at that time, the positive (or negative) output terminal 1
If an output which takes "1" and "0" in binary representation is output to the 3 and negative (or positive) output terminals 14, respectively, the positive (or negative) output terminal 13 and the negative (or positive) output terminal In FIG. 14, the state in which the outputs which take “1” and “0” in the binary display up to now, respectively, is continued, and (b) (i) the signal terminal 12
, When one pulse of the trigger pulse train PL supplied to the trigger terminal 11 arrives in a state where the comparison output SC supplied to the input terminal is “0” in binary display, then the positive (or negative) output If the output which takes "1" and "0" in binary display is output to the terminal 13 and the negative (or positive) output terminal 14, respectively, the positive (or negative) output terminal 13 and the negative (or positive) output terminal 14 outputs an output which takes "0" and "1" in binary display, respectively. (Ii) Even if one pulse of the trigger pulse train PL arrives, at that time, a positive (or negative) output terminal If the output which takes "1" and "0" in the binary display is output to the output terminal 13 and the negative (or positive) output terminal 14, respectively, the positive (or negative) output terminal 13 and the negative (or positive) output Continuing the state in which the output in binary display far the child 14 "1" and "0" to the take respective outputs, and performs the operation called.

The above is the configuration of the first example of the conventionally proposed sine wave inverter. According to the first example of the conventional sine wave inverter having such a configuration, the switching signals SW1 and SW2 generated and output by the switching signal generation and output means SG are both "1" in binary display.
And "0" are sequentially repeated, but "1" and "0" in binary display are in an inverse relationship to each other.
The switching elements A1 and A2 of the series circuit H connected between both ends of the
2 are sequentially controlled to "on" and "off" in an inverse relationship to each other.

The switching element A of the series circuit H
1 and A2 are "on" and "off," respectively, between the both ends of the series circuit of the smoothing inductor L and the smoothing capacitor C, between the positive terminal of the DC power supply 1 and the middle point. A state in which a current flows to a series circuit of the smoothing inductor L and the smoothing capacitor C through the switching element A1 in a state in which a DC power source having a positive connection point between the switching elements A1 and A2 of the inductor L is connected. And the switching element A of the series circuit H
1 and A2 are turned "off" and "on", respectively, between the two ends of the series circuit of the smoothing inductor L and the smoothing capacitor C, between the middle point and the negative end of the DC power supply 1 for smoothing. A state in which a current flows to a series circuit of the smoothing inductor L and the smoothing capacitor C through the switching element A2 in a state in which a DC power supply having a negative value at the connection point between the switching elements A1 and A2 of the inductor L is connected. Therefore, an AC voltage is obtained between the output terminals T1 and T2.

Therefore, the DC obtained from the DC power supply 1 is
An inverter function of converting into AC and outputting between the output terminals T1 and T2 is obtained.

In this case, the switching signal generation and output means SG controls the binary display of "1" and "0", which are sequentially and repeatedly taken by the switching signals SW1 and SW2 generated and output therefrom. load voltage v ₀ and the capacitor current detecting means ICD the reference sine wave voltage reference sinusoidal voltage generation means 4 for current generating output means CG produces output occurs v _r and the load voltage detecting means VD detects
There based on the capacitor current i _c of detecting, using the admittance _{Y, (Y (v r -v} 0) -i c) corresponding thereto or given by (hereinafter, for simplicity, (Y (v
_r −v ₀ ) −i _c )
by _g, so that the control current i _g is zero, i.e., Y (v _r -v ₀₎ is controlled to be _{-i c = 0 ......... (1)} , i.e., so-called sliding dengue mode Controlled.

[0018] Therefore, the output terminals T1 and the load voltage v ₀ obtained between T2 is also reference sinusoidal voltage generation means 4 as viewed from the reference sinusoidal voltage v _r and frequency generated also been seen from the waveform Are also obtained so as to be the same sine wave, so that the above-described inverter function can be performed by the output terminals T1 and T2.
In the meantime, the load voltage v ₀ is obtained in such a manner that it becomes the same sine wave as the reference sine wave voltage v _r generated by the reference sine wave voltage generation means 4.

[Conventional Example 2] A sine-wave single-phase inverter described below with reference to FIG. 7 has also been proposed. FIG.
In the figure, the same reference numerals are given to portions corresponding to those in FIG.

The conventional sine-wave single-phase inverter shown in FIG. 7 has the same configuration as the conventional sine-wave single-phase inverter shown in FIG. 6 except for the following.

That is, they are "on" and "off" controlled in an inverse relationship to each other according to the conventional sine-wave single-phase inverter series circuit H shown in FIG. And a series circuit H ″ of switching elements A1 ″ and A2 ″.

In this case, in the series circuit H ″, the switching element A1 ″ is
The end connected to the positive terminal of the DC power supply 1 of the series circuit H ″ is provided, and the switching element A2 ″ of the series circuit H is
The end is connected to the negative end of the DC power supply 1 of the series circuit H ″.

In the series circuit H ″, although not shown, the switching elements A1 ″ and A2 ″ can use only n-channel type field effect transistors as in the series circuit H. A field effect transistor and a diode connected in parallel with it may be used.

The switching element A of the series circuit H
1 and A2 is connected to the midpoint of the DC power supply 1 through the smoothing inductor L and the smoothing capacitor C, instead of the conventional single-phase sine-wave inverter shown in FIG. And the switching elements A1 "and A2" of the series circuit H "through the smoothing capacitor C.
Is connected to the midpoint of the connection.

[0025] In addition, "1" and "0" are both displayed in binary.
Is sequentially repeated, but a switching signal SW1 ″ that takes the binary display of “1” and “0” in an inverse relationship to each other.
And SW2 ″, and the switching signals SW
The switching elements A1 "and A2" of the series circuit H "are provided with switching signal generation and output means SG" for outputting ON / OFF control of the switching elements A1 "and SW2", respectively.

[0026] In this case, the "switching signal generating output means SG, compares the reference sine wave voltage v _r of the reference sinusoidal voltage generation means 4 generates the (a) reference DC voltage (e.g., ground voltage) Te, the switching signal a pulse train having a reference sinusoidal voltage v _r equal frequency f _r SW
A comparison circuit 16 "that outputs 1" and a comparison circuit 16 "
Circuit 1 that receives a pulse train from the input and outputs a pulse train of the opposite polarity as a switching signal SW2 ″
7 "a structure having, (b) in construction, the comparator circuit 16 ', and the reference sine wave voltage v _r and the sawtooth voltage generating means 18 for reference sinusoidal voltage generation means 4 generates"
By comparing the sawtooth wave voltage of the same frequency as the frequency f _r of the reference sine wave voltage v _r from, and outputs the same pulse train as the output from the comparator circuit 16 'in the configuration of the above-described (a) Except for this change, the same pulse train as the pulse train output from the comparison circuit 16 ″ having the same structure as the structure (a) and the structure (a) or (b) described above is used as the switching signal. A pulse train generating circuit 19 "generated as SW1" and a pulse train as an output thereof are inputted, and a pulse train having a polarity opposite to that of the pulse train is converted to a switching signal S.
A configuration such as a configuration having a knot circuit 17 ″ that outputs the signal as W2 ″ may be employed. The above is the configuration of another example of the conventionally proposed sine wave single-phase inverter.

According to the conventionally proposed sine-wave single-phase inverter having such a configuration, the switching elements A1 and A2 of the series circuit H are connected as described in the conventional sine-wave single-phase inverter shown in FIG. , Switching signal SW1 generated and output by switching signal generation and output means SG
And SW2, respectively, and sequentially repeats “on” and “off” in an inverse relationship to each other, and
The switching signals SW1 "and SW2" generated and output by the switching signal generation and output means SG "are both 2
Although "1" and "0" are sequentially repeated in the value display, "1" and "0" in the binary display have an inverse relationship to each other, and therefore, the switching elements A1 "and A2" of the series circuit H "
Are also controlled by the switching signals SW1 "and SW2", respectively, and sequentially repeat "on" and "off" in an inverse relationship to each other.

(A) A mode in which the switching elements A1 and A2 of the series circuit H are turned "ON" and "OFF", respectively, and overlap with the "ON" and "OFF" periods in time. So that the switching elements A1 "and A2" of the series circuit H "are" off "and" on ", respectively.
In this state, the DC power supply 1 is connected between both ends of the series circuit of the smoothing inductor L and the smoothing capacitor C such that the positive terminal of the DC power supply 1 is connected to the connection point of the switching elements A1 and A2 of the smoothing inductor L. In this state, the smoothing inductor L communicates with the switching elements A1 and A2.
And a current flows into a series circuit including the capacitor C and the smoothing capacitor C, and (b) the switching element A of the series circuit H.
1 and A2 are in the "off" and "on" states, respectively, and overlap in time with their "off" and "on" periods, so that switching element A of series circuit H "
When 1 "and A2" are turned on and off, respectively, the smoothing inductor L and the smoothing capacitor C
DC power supply 1 is connected through switching elements A2 ″ and A1 ″ in a state in which the negative terminal of the DC power supply 1 is connected as the middle point of connection between switching elements A1 and A2 of smoothing inductor L between both ends of the series circuit of A current flows into the series circuit of the smoothing inductor L and the smoothing capacitor C. Further, (c) the switching element A of the series circuit H
1 and A2 are "on" and "off" (or "off" and "on"), respectively, and overlap with their "on" and "off" (or "off" and "on") periods The switching elements A1 "and A2" of the series circuit H "are" on "and" off "respectively.
When the state is turned on (or “off” and “on”), the potential of the positive terminal (or the negative terminal) of the DC power supply 1 is applied to both ends of the series circuit of the smoothing inductor L and the smoothing capacitor C. In this state, a current flows through a series circuit of the smoothing inductor L and the smoothing capacitor C.
An AC voltage is obtained between the output terminals T1 and T2.

In this case, the switching signal S
The switching signal generation and output means SG for generating and outputting W1 and SW2, respectively, is controlled in the same manner as described for the conventional sine wave single-phase inverter shown in FIG. As in the case of the conventional sine-wave single-phase inverter shown in FIG.
It is clear that the load voltage v ₀ is obtained in such a manner that it becomes the same sine wave as the reference sine wave voltage v _r generated by the reference sine wave voltage generation means 4 between T 2 and T 2. .

[Conventional Example 3] Further, conventionally, a sine wave three-phase inverter described below with reference to FIG. 8 has also been proposed. That is, a series circuit H1 having switching elements A1 and A2, which is the same as the series circuit H in the case of the conventional sine wave single-phase inverter shown in FIG. And A4, and a series circuit H3 of switching elements A5 and A6.

In this case, in the series circuits H1, H2 and H3, the switching elements A1, A3 and A5 are connected to the positive terminal of the DC power supply 1 according to the conventional sine wave single-phase inverter shown in FIG. The switching elements A2, A4, and A6 are defined as the ends connected to the negative terminal of the DC power supply 1, respectively.

In the series circuits H1, H2 and H3, their switching elements A1 and A2, A3 and A4, and A5 and A6 are connected to the series circuits in the case of the conventional sine wave single-phase inverter shown in FIG. As in
Only an n-channel type field effect transistor can be used, and a field effect transistor and a diode connected in parallel thereto can be used.

The connection midpoint between the switching elements A1 and A2 in the series circuit H1, the connection midpoint between the switching elements A3 and A4 in the series circuit H2, and the connection midpoint between the switching elements A5 and A6 in the series circuit H3 are smoothed. The inductors L1, L2, and L3 are connected to one ends of smoothing capacitors C1, C2, and C3, respectively, while the other ends of the smoothing capacitors C1, C2, and C3 are connected to each other.

In this case, the other ends of the smoothing capacitors C1, C2 and C3 can be grounded together as shown by a dotted line, and accordingly, the middle point of the DC power supply 1 can be grounded.

The output from the middle point of the connection between the smoothing inductor L1 and the smoothing capacitor C1, the middle point of the connection between the smoothing inductor L2 and the smoothing capacitor C2, and the middle point of the connection between the smoothing inductor L3 and the smoothing capacitor C3. Terminals T1, T2 and T3 are respectively derived.

Furthermore, reference sinusoidal voltage having the same frequency f _r and the reference sine wave voltage v _r of the reference sinusoidal voltage generation means 4 of the conventional sinusoidal single-phase inverter is generated as shown in FIG. 6 v _r1 If, having the same frequency f _r and the reference sine wave voltage v _r1 between the reference sine wave voltage v _r1 12
0 and the reference sine wave voltage v _r2 having a phase difference of °, having the same frequency f _r and the reference sine wave voltage v _r1 having a phase difference of 240 ° between the reference sine wave voltage v _r1 Reference sine wave voltage generation means 4 'for generating the reference sine wave voltage v _r3 is provided.

Further, between the above-mentioned output terminals T1 and T2,
The voltages between the output terminals T2 and T3 and between the output terminals T3 and T1 are respectively changed to load voltages v ₀₁₂ , V ₀₂₃ and V ₀₃₁
Voltage detection means VD12, VD
D23 and VD31.

Further, the above-mentioned smoothing capacitor C1,
C2, and capacitor current the current flowing through each of C3, respectively i _c1, i _c2, and a capacitor current detecting means ICD1, ICD2 which detect as i _c3, and IC
D3.

Further, (a) and the reference sine wave voltage v _r1 of the reference sinusoidal voltage generation means 4 described above 'occurs, the load voltage v ₀₁₂ the load voltage detecting unit VD12 is detected, the capacitor current detecting means ICD1 There based on the capacitor current i _c1 to _{detect, (Y 1 (v r1 -v} 012) -i c1) is given by (where, Y ₁ is the admittance has a value greater than 0) generates and outputs the control current i _g1 a control current generating output means CG1 to a reference sinusoidal voltage v _r2 to be generated (b) reference sinusoidal voltage generation means 4 ', and the load voltage v ₀₂₃ the load voltage detecting unit VD12 is detected, the capacitor current detecting based on the capacitor current i _c2 which means ICD2 _{detects, (Y 2 (v r2 -v} 023) -i c2) is given by (wherein, Y ₂ is admittance has a value greater than 0) the control current i _{g 2} , a control current generation and output means CG2 for generating and outputting a reference sine wave voltage _vr3 generated by the reference sine wave voltage generation means 4 ', and a load voltage detection means V
A load voltage v ₀₃₁ that D13 is detected, based on the capacitor current i _c3 detected by the capacitor current detecting means _{ICD3, (Y 3 (v r3} -v 031) -i c3) is given by (where, Y ₃ is 0 Control current generation and output means CG3 for generating and outputting an admittance) control current _ig3 having a larger value.

In this case, the control current generation and output means CG1,
CG2 and CG3 may have a configuration similar to the control current generation and output means CG of the conventional sine wave single-phase inverter shown in FIG.

(A) In both cases, "1" and "0" are sequentially repeated in binary notation, but "1" and "0" in binary notation are in a reverse phase relationship to each other, and each binary The switching signals SW1 and SW2 are controlled such that the control current i _g1 is controlled to be 0 by the control current i _g1 generated and output by the control current generation and output means CG1 during the periods of “1” and “0” in the display. The switching signals SW1 and SW2 are output to the switching elements A1 and A2 of the series circuit H1 to control the on / off of the switching signals SW1 and SW2, respectively. In the value display, “1” and “0” are sequentially repeated, but “1” and “0” in the binary display are in opposite phase relation to each other, and “1” and “1” in the respective binary display. Generates a switching signal SW3 and SW4 period control current generating output means CG2 is controlled such that the control current i _g2 by a control current i _g2 to produce output becomes zero "0", they switching signals SW3 and SW4 are connected to the series circuit H described above.
The two switching elements A3 and A4 control the on / off of the switching elements A3 and A4, respectively, and the switching signal generation / output means SG2 for outputting the signals, respectively, and (c) sequentially repeat "1" and "0" in binary display. Take 2 each
The the value display of "1" and "0", "1" in a mutually and each of the binary display taken reversed phase relationship, and the control current i _g3 which period the control current generating output means CG3 produces output "0" The switching signals SW5 and SW6 that are controlled so that the control current _ig3 becomes 0 are generated, and the switching signals SW5 and SW6 are respectively turned on and off by the switching elements A5 and A6 of the series circuit H3. It has switching signal generation and output means SG3 for outputting the signals in order to perform the OFF control.

In this case, the switching signal generation and output means SG1, SG2 and SG3 are the switching signal generation and output means S of the conventional sine wave single-phase inverter shown in FIG.
A configuration according to G may be adopted. The above is an example of a conventionally proposed sine wave three-phase inverter.

According to the conventional sine-wave three-phase inverter having such a configuration, it will be apparent from the description of the conventional sine-wave single-phase inverter shown in FIGS. Although description is omitted, the switching elements A1 and A2 of the series circuit H1 and the series circuit H2
Switching signals A3 and A4, and a series circuit H3
Switching elements A5 and A6 generate switching signals SW1, SW2, and S3 generated and output by switching signal generation and output means SG1, SG2, and SG3, respectively.
Controlled by W3 and SW4, and SW5 and SW6, "ON" and "OFF" are sequentially repeated in an inverse relationship to each other.

(I) (a) Smoothing inductor L
1, a smoothing capacitor C1, a smoothing capacitor C2, and a smoothing inductor L2 in a series circuit, in which the switching elements A1 and A2 of the series circuit H1 are turned on and off, respectively. "off"
When the switching elements A3 and A4 of the series circuit H2 are turned "off" and "on", respectively, in a mode overlapping with the period of time, current flows through the switching elements A1 and A4, and ( b) Smoothing inductor L1, smoothing capacitor C1, and smoothing capacitor C2
And a smoothing inductor L2 in series with a series circuit H1
In a state in which the switching elements A1 and A2 are turned "off" and "on", respectively, and overlap with the "off" and "on" periods in time.
2 switching elements A3 and A4 are each "ON"
And when it is in the "off" state, the switching element A2
And a current flows through A3, and (c) the switching elements A1 and A2 of the series circuit H1 turn on in a series circuit of the smoothing inductor L1, the smoothing capacitor C1, the smoothing capacitor C2, and the smoothing inductor L2. And "off" (or "off" and "on") and in a manner that overlaps in time with its "on" and "off" (or "off" and "on") periods Even when the switching elements A3 and A4 of the series circuit H2 are turned on and off (or "off" and "on"), respectively, a current flows and (i
i) (a) Smoothing inductor L2 and smoothing capacitor C
2, the switching elements A3 and A4 of the series circuit H2 are "on" and "off" in the series circuit of the smoothing capacitor C3 and the smoothing inductor L3, respectively, and are in the "on" and "off" periods. When the switching elements A5 and A6 of the series circuit H3 are turned "off" and "on", respectively, in a manner overlapping in time, current flows through the switching elements A3 and A6, and (b) Smoothing inductor L2, smoothing capacitor C2, smoothing capacitor C3, and smoothing inductor L
3, the switching element A of the series circuit H2
3 and A4 are in the "off" and "on" states, respectively, and overlap in time with their "off" and "on" periods, so that switching element A of series circuit H3 is
5 and A6 are turned on and off, respectively, a current flows through the switching elements A4 and A5, and (c) the smoothing inductor L2, the smoothing capacitor C2, the smoothing capacitor C3, and the smoothing In the series circuit with the inductor L3, the switching elements A3 and A4 of the series circuit H2 are turned "ON" and "OFF" (or "OFF" and "ON"), respectively, and the "ON" and "OFF" ( Or the switching elements A5 and A6 of the series circuit H3 are "on" and "off" (or "off" and "on"), respectively, in a manner overlapping in time with the periods of "off" and "on". Even when the state is reached, the current flows, and (iii) (a) the smoothing inductor L3, the smoothing capacitor C3, the smoothing capacitor C1, and the smoothing inductor L3. The switching elements A5 and A6 of the series circuit H3 are in the "on" and "off" states, respectively, in the series circuit with the inductor L1, and overlap with the "on" and "off" periods in time. When the switching elements A1 and A2 of the series circuit H1 are turned "off" and "on", respectively, current flows through the switching elements A5 and A2, and (b) the smoothing inductor L3 and the smoothing capacitor C3 The switching elements A5 and A6 of the series circuit H3 are "off" and "on" in the series circuit of the capacitor C1 and the smoothing inductor L1, respectively, and the "off"
When the switching elements A1 and A2 of the series circuit H1 are turned "on" and "off", respectively, in a manner overlapping with the "on" period in terms of time, current flows through the switching elements A6 and A1. And (c)
In a series circuit of the smoothing inductor L3, the smoothing capacitor C3, the smoothing capacitor C1, and the smoothing inductor L1, the switching elements A5 and A6 of the series circuit H3 are turned "on" and "off" (or "off" and "off", respectively). ON)) and its "ON" and "OFF"
(Or “off” and “on”) in a manner overlapping in time with the switching element A1 of the series circuit H1.
Even if A2 and A2 are turned on and off (or "off" and "on"), respectively, a current flows, so that between output terminals T1 and T2, between output terminals T2 and T3.
Between the output terminals T3 and T1.

In this case, the switching signal S
W1 and SW2, SW3 and SW4, SW5 and SW6
The switching signal generation and output means SG1, SG2, and SG3 for generating and outputting respectively the control current according to the switching signal generation and output means SG in the conventional sine wave single-phase inverter shown in FIG. by generating output means CG1, CG2, and the control current i _g1 which CG3 generated output, i _g2, and i _g3, since is adapted to be controlled in a so-called sliding dengue mode, the detailed description is omitted, the inverter functions Is the output terminal T1 according to the conventional sine-wave single-phase inverter shown in FIG.
And T2, between output terminals T2 and T3, and output terminal T
3 and T1, the load voltages v ₀₁₂ , v ₀₂₃ , and v ₀₃₁
Is obtained in such a manner that the reference sine wave voltages _vr1 , _vr2 , and _vr3 are respectively the same as the sine waves generated by the reference sine wave voltage generating means 4 '. .

[Conventional Example 4] A sine-wave three-phase inverter described below with reference to FIG. 9 has also been proposed. FIG.
In the figure, the same reference numerals are given to portions corresponding to those in FIG. 8, and detailed description is omitted.

The conventional sine-wave three-phase inverter shown in FIG. 9 is different from the conventional sine-wave three-phase inverter shown in FIG.
The ends of the smoothing capacitors C1, C2, and C3 opposite to the sides to which the smoothing inductors L1, L2, and L3 are connected are connected to each other instead of the smoothing inductor L2 and the smoothing inductor L2. Connection midpoint of capacitor C2, connection midpoint of smoothing inductor L3 and smoothing capacitor C3, smoothing inductor L1 and smoothing capacitor C
1 except that they are connected to the midpoint of
It has the same configuration as the conventional sine wave three-phase inverter shown in FIG.

The conventional sine-wave three-phase inverter having such a configuration has the same configuration as that of the conventional sine-wave three-phase inverter shown in FIG. The capacitors C1, C2 and C3 are the series circuit of the smoothing capacitors C1 and C2, the series circuit of the smoothing capacitors C2 and C3, and the smoothing capacitors C3 and C1 in the conventional sine wave three-phase inverter shown in FIG. Except that it has the same configuration as that of the conventional sine-wave three-phase inverter shown in FIG. Although detailed description is omitted, the same operation as that of the conventional sine wave three-phase inverter shown in FIG.
It is clear that the effect is obtained.

[Conventional Example 5] Further, conventionally, a sine wave three-phase inverter described below with reference to FIG. 10 has been proposed.
10, parts corresponding to those in FIG. 8 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The conventional sine-wave three-phase inverter shown in FIG. 10 has the same configuration as that of the conventional sine-wave three-phase inverter shown in FIG. 8 except for the following.

(A) In the conventional sine wave three-phase inverter shown in FIG. 8, its series circuit H3, smoothing inductor L3, smoothing capacitor C3, control current generation output means CG3, load voltage detection means VD12, capacitor The current detection means ICD3 and the switching signal generation / output means SG3 are omitted, and accordingly (b) the smoothing capacitors C1 and C2 (the smoothing capacitor C3 is omitted in (a) above). The connected end is
Both are connected to the midpoint of the DC power supply 1, so that the midpoint of the connection of the switching elements A1 and A2 of the series circuit H1 and the midpoint of the connection of the switching elements A3 and A4 of the series circuit H2 are equal to the smoothing inductors C1 and C2. Are connected together to the midpoint of the DC power supply 1, and the midpoint of the connection between the smoothing inductor L1 and the smoothing capacitor C1, the midpoint of the connection between the smoothing inductor L2 and the smoothing capacitor C2, and the DC power supply 1 From the output terminal T1,
T2, and T3 are respectively derived, (c) the control current generating output means CG1 is, the reference sinusoidal voltage v _r1 of the reference sinusoidal voltage generation means 4 'is generated load voltage detecting means VD
31 and the load voltage v ₀₃₁ to be detected is, based on the capacitor current i _c1 for detecting the capacitor current detecting means ICD1, generate outputs _{(Y 1 (v r1 -v 031} ) -i c1) the control current i _g1 given by The configuration is such that the The above is the configuration of another example of the conventionally proposed sine wave three-phase inverter.

According to the sine-wave three-phase inverter having such a configuration, it has the same configuration as the conventional sine-wave three-phase inverter shown in FIG. A configuration in which a series circuit of the inductor L1 and the smoothing capacitor C1 is connected to the DC power supply 1 through the switching elements A1 and A2 of the series circuit H1, and a series circuit of the smoothing inductor L2 and the smoothing capacitor C2 is connected to the DC power supply 1 Is connected through switching elements A3 and A4 of a series circuit H2 to the conventional single-phase sine-wave inverter shown in FIG. , A series circuit of the smoothing inductor L1 and the smoothing capacitor C1, the smoothing inductor L2 and the smoothing The series circuit of the capacitor C2, FIG. 6
Current flows in a series circuit of the conventional smoothing inductor L and the smoothing capacitor C of the sine wave single-phase inverter shown in FIG. 1, and the switching elements A1 and A2 of the series circuit H1 and the series circuit H2 Since the switching elements A3 and A4 are controlled in accordance with the case of the conventional sine wave three-phase inverter shown in FIG. 8, detailed description is omitted, but between the output terminals T1 and T2, between the output terminals T2 and T2.
3, and between the output terminals T3 and T1, a load voltage v ₀₁₂ ,
v _023, and v ₀₃₁ is, as in the case of the conventional sine-wave three-phase inverter shown in FIG. 8, reference sinusoidal voltage v _r1, v _r2
, And v _r3 .

[0053]

In the case of the conventional sine wave single-phase inverter shown in FIG. 6, the switching signal SW1 generated and output by the switching signal generation and output means SG is used.
The switching elements A1 and A2 constituting a series circuit H connected between both ends of the DC power supply 1 at the maximum frequency thereof, that is, the switching frequency A1 and A2 sequentially take "1" and "0" in binary notation. Is controlled by the switching signals SW1 and SW2, respectively, and sequentially repeats “ON” and “OFF”, that is, performs switching. The maximum frequency (hereinafter, this is referred to as a maximum switching frequency f _s-max ) (for switching) As described above, the signal generation and output means SG is configured to supply the trigger pulse train PL having the frequency f _H from the trigger pulse train generation means 10 to the trigger terminal 11 and to provide the comparison circuit 9 to the signal terminal 12. And a positive (or negative) output terminal 1
3 and the output of the negative (or positive) output terminal 14 as the switching signals SW1 and SW2, that is, a configuration having a so-called D-type flip-flop circuit 15, the frequency f of the trigger pulse train PL _H ), the higher the output terminal T1
Even when a load (not shown) externally connected between the output terminals T1 and T2 fluctuates, or when a load externally connected between the output terminals T1 and T2 is a non-linear load, a load is applied between the output terminals T1 and T2. The voltage v ₀ is the reference sine wave voltage v _r
, With higher identities, resulting in the same sine wave.

On the other hand, if the load connected between the output terminals T1 and T2 demands a large current (large power), the switching element A1 and the switching element A2 of the series circuit H respond accordingly, and the current capacity that can flow therethrough ( Hereinafter, when the switching elements A1 and A2 are the field-effect transistors 2 having a large current capacity, the field-effect transistors 2 have a large current-carrying capacity through the source and the drain. Transistors) can satisfy the load requirements.

However, in general, the switching element has a characteristic that the larger the current capacity, the lower the maximum switching operation frequency at which a switching operation can be performed, as is apparent from the case where the switching element is a field effect transistor. .

For this reason, if the load requires a large current (large power), the switching elements A1 and A2 are controlled and switched by the switching signals SW1 and SW2, respectively. The maximum switching frequency f _s-max Have to be lowered, and
In this case, since the maximum switching frequency f _s-max is low, even if a large current (large power) can be supplied to the load connected between the output terminals T1 and T2, the output terminals T1 and T1 to which the load is connected are connected. between T2, the load voltage v _0, the reference sinusoidal voltage v _r, drives out higher same is, obtained as the same sine wave, can not be said that, also, the maximum switching frequency f _{s Even if -max} is low, the current flowing through the switching elements A1 and A2 is large, so that the power loss forced to be caused by the switching of the switching elements A1 and A2 is large. If conversion is performed, the conversion efficiency can be reduced only.

Since this will be apparent from the above description, detailed description is omitted, but FIG.
In the case of the conventional sine-wave single-phase inverter shown in
The same applies to the case of the conventional sine wave three-phase inverter shown in FIGS. 8, 9 and 10.

As is apparent from the above description, according to the conventional sine wave inverter, if the load connected between the output terminals requires a large current (power), even if the load can respond to this, The load voltage (v ₀ (v ₀₁₂ ,
v ₀₂₃ , v ₀₃₁ )), if the load fluctuates,
The switching elements (A1 and A2, A3 and A4, A5 and A) that cannot be obtained to have the same sine wave with higher identities as the reference sine wave voltage
6) has a drawback that a large power loss accompanies, and therefore, high conversion efficiency cannot be obtained.

Thus, the present invention is free from the disadvantages described above,
That is, even if the load connected between the output terminals requires a large current (large power), it can respond to it, and the load voltage between the output terminals can be changed even if the load fluctuates. With the higher sine wave voltage, the same can be obtained with the same sine wave, and the switching elements used can be without significant power loss, thus obtaining high conversion efficiency A new sine-wave inverter that can do this is proposed.

[0060]

The sine wave single-phase inverter according to the first invention of the present application comprises (A) and (i) a DC power supply;
(Ii) a series circuit of first and second switching elements that are connected between both ends of the DC power supply and that are on / off controlled in an inverse relationship to each other, and (iii) a series circuit of the series circuit. A connection midpoint between the first and second switching elements is connected to the midpoint of the DC power supply through a smoothing inductor and a smoothing capacitor, and (v) a pair of output terminals is derived from both ends of the smoothing capacitor. Along with
(B) (i) reference sine wave voltage generating means for generating a reference sine wave voltage, (ii) load voltage detecting means for detecting a voltage between the pair of output terminals as a load voltage, and (ii)
i) capacitor current detecting means for detecting a current flowing through the smoothing capacitor as a capacitor current; and (iv)
The difference between the current corresponding to the difference between the reference sine wave voltage generated by the reference sine wave voltage generating means and the load voltage detected by the load voltage detecting means and the capacitor current detected by the capacitor current detecting means is controlled. A control current generation and output means for generating and outputting a current; and (vi) both of "1" and "0" are sequentially repeated in a binary display, and "1" and "0" of the binary display are inversely related to each other. The first and second switching signals are controlled such that the control current is controlled to be 0 during the periods of “1” and “0” of the binary display, respectively, and the first and second switching signals are generated. To the first and second switching elements of the series circuit for on / off control of the switching signals, respectively.
(C) (i) a third inverter connected between both ends of the DC power supply and controlled to turn on and off in an inverse relationship to each other. And another series circuit of the fourth switching element, and (ii) a third series circuit of the other series circuit.
And a connection midpoint of the fourth switching element is connected to the midpoint of the DC power supply through another smoothing inductor and the smoothing capacitor, and (D) (i).
Load current detecting means for detecting a current flowing through the pair of output terminals as a load current; (ii) inductor current detecting means for detecting a current flowing through the other smoothing inductor as an inductor current; and (iii) the load current. Another control current generating and outputting means for generating and outputting, as another control current, a difference between the load current detected by the detecting means and the inductor current detected by the inductor current detecting means; And "0" are sequentially repeated, but "1" and "0" of the binary display are inversely related to each other, and the period of "1" and "0" of the binary display is the other control current. Is controlled to be 0
And a fourth switching signal which is output to the third and fourth switching elements so as to turn them on and off, respectively. Signal generation and output means.

The sine-wave single-phase inverter according to the second aspect of the present invention comprises: (A) (i) a DC power supply; and (ii) an on / off connection between both ends of the DC power supply. A first series circuit of the controlled first and second switching elements; and (iii) third and fourth connected between both ends of the DC power supply, which are on / off controlled in an inverse relationship to each other. A second series circuit of the switching elements of
(Iv) The connection middle point of the first and second switching elements of the first series circuit is connected to the third and fourth switching elements of the second series circuit through a smoothing inductor and a smoothing capacitor.
(V) a pair of output terminals is derived from both ends of the smoothing capacitor, and (B) (i) a reference sine wave for generating a reference sine wave voltage Voltage generating means, (ii) load voltage detecting means for detecting a voltage between the pair of output terminals as a load voltage, and (iii) capacitor current detecting means for detecting a current flowing through the smoothing capacitor as a capacitor current. (Iv) A control current generation output for generating and outputting, as a control current, a difference between a reference sine wave voltage generated by the reference sine wave voltage generation means and a current corresponding to a difference between load voltages detected by the load voltage detection means. Means and (vi) both of "0" and "1" are sequentially repeated in a binary display, but "1" and "0" of the binary display are inversely related to each other, and the respective binary display is performed. The first and second switching signals that are controlled such that the control current becomes 0 during the periods of “1” and “0” are generated, and the first and second switching signals are generated by the first and second switching signals. 1st and 2nd series circuits
The first switching signal generation / output means respectively outputting the switching elements so as to perform on / off control of the switching elements, and (vii) sequentially repeating "1" and "0" in binary display. It generates third and fourth switching signals that take the binary representation of “1” and “0” in an inverse relationship to each other, and outputs the third and fourth switching signals to the second series circuit. In a sine-wave single-phase inverter having second and third switching signal generation and output means for outputting to the third and fourth switching elements to control the on and off of the third and fourth switching elements, respectively.
(C) (i) connected between both ends of the DC power supply;
A third series circuit of fifth and sixth switching elements that are on / off controlled in an inverse relationship to each other; and (ii) while the fifth and sixth switching elements of the third series circuit are connected. A point is connected to the connection point of the third and fourth switching elements of the second series circuit through another smoothing inductor and the smoothing capacitor,
(D) (i) load current detection means for detecting a current flowing through a load connected to the pair of output terminals as a load current;
(Ii) inductor current detecting means for detecting a current flowing through the smoothing inductor as an inductor current;
ii) other control current generating and outputting means for generating and outputting, as another control current, a difference between the load current detected by the load current detecting means and the inductor current detected by the inductor current detecting means; In the display, "1" and "0" are sequentially repeated, but "1" and "0" in the binary display are inversely related to each other, and the periods of "1" and "0" in the binary display are respectively as described above. Other control current is 0
And generating the fifth and sixth switching signals which are controlled so as to provide the fifth and sixth switching signals to the fifth and sixth switching elements, respectively. And a third switching signal generating / outputting means for outputting each signal for control.

The sine-wave three-phase inverter according to the third invention of the present application comprises (A) (i) a DC power supply, and (ii) first and second switching elements connected between both ends of the DC power supply. A first series circuit; (iii) a second series circuit of third and fourth switching elements connected between both ends of the DC power supply; and (iv) a second series circuit connected between both ends of the DC power supply. And (v) a connection midpoint between the first and second switching elements of the first series circuit, and a second series circuit of the fifth and sixth switching elements.
The middle point of the connection between the third and fourth switching elements of the series circuit and the middle point of the connection of the fifth and sixth switching elements of the third series circuit are the first, second, and third smoothing points. (Vi) connected to one ends of the first, second, and third smoothing capacitors through the respective inductors.
The other ends of the first, second, and third smoothing capacitors are connected to each other, or the middle point of connection between the second smoothing inductor and the second smoothing capacitor,
Are connected to a connection midpoint between the smoothing inductor and the third smoothing capacitor and a connection midpoint between the first smoothing inductor and the first smoothing capacitor, respectively.
(Vii) a connection middle point between the first smoothing inductor and the first smoothing capacitor, a connection middle point between the second smoothing inductor and the second smoothing capacitor, and the third smoothing capacitor. First, second, and third output terminals are respectively derived from a connection midpoint of the inductor and the third smoothing capacitor, and (B) (i) first output terminals are provided.
And a second reference sine wave having the same frequency as the first reference sine wave voltage, but having a phase difference of 120 ° between the first reference sine wave voltage and the first reference sine wave voltage. A voltage and a third reference sine wave voltage having the same frequency as the first reference sine wave voltage but having a 240 ° phase difference between the first reference sine wave voltage. (Ii) a voltage between the first and second output terminals, a voltage between the second and third output terminals, and a voltage between the third and first output terminals, or The voltages across the first, second, and third smoothing capacitors are respectively set to the first, second, and third smoothing capacitors.
First, second and third load voltage detecting means for detecting as second and third load voltages, respectively; and (iii) currents flowing through the first, second and third smoothing capacitors, respectively. First, second, and third capacitor current detecting means for detecting as first, second, and third capacitor currents, respectively; and (iv) a first sine wave voltage generating means for generating the reference sine wave voltage. The difference between the current corresponding to the difference between the reference sine wave voltage and the first load voltage detected by the first load voltage detecting means and the first capacitor current detected by the first capacitor current detecting means is calculated. First control current generation and output means for generating and outputting as a first control current;
(V) a current corresponding to a difference between a second reference sine wave voltage generated by the reference sine wave voltage generation means and a second load voltage detected by the second load voltage detection means; And (vi) the reference sine wave voltage generating means for generating and outputting, as a second control current, a difference from the second capacitor current detected by the capacitor current detecting means. A current corresponding to a difference between the third reference sine wave voltage and the third load voltage detected by the third load voltage detecting means, and a third capacitor current detected by the third capacitor current detecting means. A third control current generating and outputting means for generating and outputting the difference of
i) In both cases, “1” and “0” are sequentially repeated in a binary display, but “1” and “0” in a binary display are inversely related to each other, and “1” and “1” in a binary display respectively. 0 "
, The first and second switching signals are controlled such that the first control current becomes 0, and the first and second switching signals are transmitted to the first series circuit. A first switching signal generating / outputting means for outputting to the first and second switching elements, respectively, so as to control on / off of the first and second switching elements, respectively; (viii)
In both cases, “1” and “0” are sequentially repeated in binary display, but “1” and “0” in binary display are inversely related to each other, and “1” and “0” in binary display respectively. , The third and fourth switching signals are controlled such that the second control current becomes 0, and the third and fourth switching signals are generated by the second series circuit. A second switching signal generating and outputting means for outputting to each of the third and fourth switching elements so as to control on / off of each of them, and "1" and "0" in binary notation for both (ix). The third control current is repeatedly and sequentially taken, but the binary control "1" and "0" are inversely related to each other, and the third control current is 0 during the period of each binary display "1" and "0". And sixth switches controlled in the same manner It generates a use signal, fifth their fifth and sixth switching signal, the third series circuit
And (c) (i) the DC power supply of the sine wave three-phase inverter having third switching signal generation / output means for outputting the switching signals to the sixth switching element for on / off control thereof. A fourth series circuit of seventh and eighth switching elements connected between both ends, and (ii) a fifth series of ninth and tenth switching elements connected between both ends of the DC power supply. And (iii) a sixth series circuit of eleventh and twelfth switching elements connected between both ends of the DC power supply, and (iv) seventh and fourth series circuits of the fourth series circuit. 8
The connection middle point of the switching elements of the above, the connection middle point of the ninth and tenth switching elements of the fifth series circuit, and the connection middle point of the fifth and sixth switching elements of the sixth series circuit, Through the fourth, fifth, and sixth smoothing inductors, respectively, the connection midpoint between the first smoothing inductor and the first smoothing capacitor, the second smoothing inductor, and the second smoothing inductor. (D) (i) the first, second and third connection points are respectively connected to the connection middle point of the smoothing capacitor and the connection middle point of the third smoothing inductor and the third smoothing capacitor. A first, a second, and a third load current detecting means for detecting currents flowing through the output terminals of the first, second and third load currents as first, second, and third load currents, respectively; Third
First, second, and third inductor current detecting means for detecting currents flowing through the smoothing inductors as first, second, and third inductor currents, respectively;
(Iii) the first load current detected by the first load current detecting means;
A fourth control current generation / output unit that generates and outputs a difference between the load current of the first inductor current and the first inductor current detected by the first inductor current detection unit as a fourth control current;
v) A fifth control current which generates and outputs, as a fifth control current, a difference between the second load current detected by the second load current detection means and the second inductor current detected by the second inductor current detection means. (V) calculating the difference between the third load current detected by the third load current detection means and the third inductor current detected by the third inductor current detection means; A sixth control current generation and output means for generating and outputting the control current of (vi), (vi) sequentially repeating "1" and "0" in binary display,
The values “1” and “0” in the value display are inversely related to each other, and the periods of the respective “1” and “0” in the binary display are controlled such that the fourth control current becomes 0. 7th and 8th
And outputs the seventh and eighth switching signals to the seventh and eighth switching elements of the fourth series circuit so as to turn them on and off, respectively. 4. The switching signal generation / output means of No. 4 and (vii) are both "1" in binary display
And "0" are sequentially repeated, but "1" and "0" of the binary representation are inversely related to each other, and the two
The ninth and tenth switching signals are generated in such a manner that the fifth control current is controlled to be 0 during the periods of “1” and “0” of the value display, and the ninth and tenth switching signals are generated. Signals for the ninth and first circuits of the fifth series circuit.
Fifth switching signal generation and output means for respectively outputting the switching elements of 0 to turn them on and off, and (viii) sequentially repeating "1" and "0" in binary display for both. Controls the binary display "1" and "0" in opposite phase relationship to each other, and controls the sixth control current to be 0 during the period of each binary display "1" and "0". 11th and 12th switching signals are generated, and the 11th and 12th switching signals are turned on and off to the 11th and 12th switching elements of the sixth series circuit, respectively. And a sixth switching signal generation / output means for outputting the respective signals in order to perform the OFF control.

The sine-wave three-phase inverter according to the fourth aspect of the present invention comprises (A) (i) a DC power supply, and (ii) first and second switching elements connected between both ends of the DC power supply. A first series circuit, and (iii) a second series circuit of third and fourth switching elements connected between both ends of the DC power supply, and (iv) a second series circuit of the first series circuit. A connection midpoint between the first and second switching elements,
And the connection midpoint between the third and fourth switching elements of the second series circuit is a first smoothing inductor and a first smoothing capacitor, and a second smoothing inductor and a second smoothing capacitor. Respectively, and are connected together to the midpoint of the DC power supply, and (v) the midpoint of connection between the first smoothing inductor and the first smoothing capacitor, the second smoothing inductor and the second From the middle point of connection of the smoothing capacitor and the middle point of the DC power supply,
The second and third output terminals are respectively derived, and (B) (i) the first reference sine wave voltage and the first reference sine wave voltage having the same frequency as the first reference sine wave voltage. 1
A reference sine wave voltage generating means for generating a second reference sine wave voltage having a phase difference of 120 ° with the reference sine wave voltage, and (ii) the first and third output terminals The first and second voltages are respectively detected as first and second load voltages, respectively, between the first and second output terminals.
And (iii) first and second capacitor currents for respectively detecting currents flowing through the first and second smoothing capacitors as first and second capacitor currents, respectively. Detecting means; (i
v) a current corresponding to a difference between the first reference sine wave voltage generated by the reference sine wave voltage generation means and the first load voltage detected by the first load voltage detection means; First control current generating and outputting means for generating and outputting a difference from the first capacitor current detected by the capacitor current detecting means as a first control current; and (v) a second control current generating and outputting means for generating the reference sine wave voltage generating means. 2 and a second capacitor current detected by the second capacitor current detecting means and a current corresponding to a difference between the reference sine wave voltage and the second load voltage detected by the second load voltage detecting means. A second control current generating and outputting means for generating and outputting the difference as a second control current; and (vi) both of "1" and "0" are sequentially repeated in a binary display, but "1" in a binary display is used. And "0" are inversely related to each other and “1” and “0” in the value display generate first and second switching signals that are controlled so that the first control current becomes 0, and the first and second switching signals are generated. To the first and second switching elements of the first series circuit, respectively.
In order to perform the OFF control, the first switching signal generation and output means for outputting the respective signals, and (vii) both of "1" and "0" are sequentially repeated in a binary display, but "1" and "1" of the binary display are respectively obtained. "0" in an inverse relationship to each other, and "1" and "0" in the respective binary representations generate third and fourth switching signals in which the second control current is controlled to be 0. The second switching signal generation circuit outputs the third and fourth switching signals to the third and fourth switching elements of the second series circuit so as to control the on / off of the third and fourth switching signals, respectively. A three-phase sine wave inverter having output means
(C) (i) a third series circuit of fifth and sixth switching elements connected between both ends of the DC power supply;
(Ii) a fourth series circuit of seventh and eighth switching elements connected between both ends of the DC power supply,
(Iii) a connection midpoint between the fifth and sixth switching elements of the third series circuit, and a seventh connection point of the fourth series circuit.
And a connection midpoint between the eighth switching element and a connection midpoint between the first smoothing inductor and the first smoothing capacitor through third and fourth smoothing inductors, respectively. And the second smoothing inductor and the second
(D) (i) detecting currents flowing through the first and second output terminals as first and second load currents, respectively. First and second load current detecting means, and (ii) first and second inductor currents for detecting currents flowing through the first and second smoothing inductors as first and second inductor currents, respectively. Detecting means; and (iii) a difference between the first load current detected by the first load current detecting means and the first inductor current detected by the first inductor current detecting means as a third control current. Third control current generation and output means for generating and outputting; and (iv) a second load current detected by the second load current detection means and a second control current generation output means detected by the second inductor current detection means. And a fourth control current generating and outputting means for generating and outputting a difference from the inductor current as a fourth control current, and (v) sequentially repeating "1" and "0" in a binary display, each of which has a binary value. The fifth is controlled so that the displayed “1” and “0” are in an inverse relationship to each other, and the respective periods of the binary display “1” and “0” are such that the third control current becomes 0. And a sixth switching signal, and the fifth and sixth switching signals are respectively supplied to the fifth and sixth switching elements of the third series circuit so as to be turned on and off, respectively. Third switching signal generation / output means for outputting; (vi)
In both cases, “1” and “0” are sequentially repeated in binary display, but “1” and “0” in binary display are inversely related to each other, and “1” and “0” in binary display respectively. And generating the seventh and eighth switching signals during which the fourth control current is controlled to be 0, and converting the seventh and eighth switching signals into the fourth series circuit. The seventh and eighth switching elements have fourth switching signal generation and output means for respectively outputting the on and off control.

[0064]

Embodiment 1 Next, referring to FIG. 1, a first embodiment of a sine-wave inverter according to the present invention will be described with reference to FIG. The embodiment of the single-phase inverter will be described. In FIG.
Parts corresponding to those in FIG. 6 are denoted by the same reference numerals.

The sine-wave single-phase inverter according to the present invention shown in FIG. 1 is different from the conventional sine-wave single-phase inverter described above with reference to FIG. Has a series circuit H 'of switching elements A1' and A2 'which are controlled to be turned on and off, and a connection point between the switching elements A1' and A2 'of the series circuit H' is connected to a smoothing inductor L 'and It is connected to the midpoint of the DC power supply 1 through the smoothing capacitor C described in the conventional sine-wave single-phase inverter shown in FIG.

In this case, in the series circuit H ', the switching element A1' is
The end of the series circuit H 'connected to the positive terminal of the DC power supply 1 is connected to the switching element A2'.
Of the DC power supply 1 is connected to the negative terminal side.

In the series circuit H ', only the n-channel field effect transistor 2 is used for each of the switching elements A1' and A2 ', as in the series circuit H (the field effect transistor in this case). The transistor 2 is a field-effect transistor that can flow both a forward current and a reverse current during a period that is controlled to be “ON”. In addition, the transistor 2 and the diode 3 connected in parallel to the (In this case, the field-effect transistor 2 is a field-effect transistor that does not substantially pass a forward current and a reverse current during a period that is controlled to “on”).

The current flowing through the output terminals T1 and T2 is detected as a load current i ₀ (current actually flowing through the output terminals T1 and T2 or a current corresponding thereto) at the output terminal T1 as shown in the figure. Load current detecting means IOD.

Further, there is provided inductor current detecting means ILD for detecting a current flowing through the smoothing inductor L 'as an inductor current i _L ' (current actually flowing through the smoothing inductor L 'or a current corresponding thereto).

Also, based on the load current i ₀ detected by the load current detecting means IOD and the inductor current i _L 'detected by the inductor current detecting means ILD, (i _L ' -i
₀₎ given or corresponding thereto (hereinafter, for simplicity, (i _L having a '-i ₀₎ states that given by) the control current i _g' control current generating output means CG for generating and outputting a '.

In this case, the control current generation and output means CG '
From the inductor current i _L ′ detected by the inductor current detection means ILD and the current i ₀ detected by the load current detection means IOD, a difference between them (i _L ′ −i ₀ ) or a current corresponding thereto is calculated as a control current It may be configured to have a difference circuit 7 'for outputting as i _g '.

Further, it is repeated that both "1" and "0" are sequentially displayed in the binary display, but "1" and "0" in the binary display are inversely related to each other and each of the two is displayed.
Switching signal period of "1" and "0" values display control by the current generator output unit CG 'control current i _g that generates output' is the control current i _g 'is controlled to be 0 SW1 And SW2 ', and outputs the switching signals SW1' and SW2 'to the switching elements A1' and A2 'of the series circuit H' so as to turn them on and off, respectively. It has signal generation and output means SG '.

In this case, the switching signal generation / output means SG 'is replaced with (a) the reference DC current I _r ' (for example, I _r '= 0) according to the switching signal generation / output means SG'.
And (b) the reference DC current I _r ′ generated by the reference DC current generating means 8 ′.
Control current generating output means CG inputs the 'control current i _g that generates output' and the control current i _g 'is the reference DC current I
'larger than, that _{i g'r> I r '} ( or reference DC current I _r' or more, that i _g '≧ I _r') if 2
In the value display, "1" is taken. If the value is equal to or less than the reference DC current I _r ′, ie, _ig ′ ≦ I _r ′ (or less than the reference DC current I _r ′, ie, _ig ′ <I _r ′), the binary value is displayed. A comparison circuit 9 'for outputting a comparison output SC' which takes "0", and (c) a reference sine wave voltage v generated by the reference sine wave voltage generation means 4.
sufficiently high compared with the frequency f _r of _r, but the frequency f _H of the trigger pulse train PL trigger pulse train generating means 10 constituting the switching signal generation output means SG is generated
Trigger pulse train PL 'having a lower frequency f _L than
(D) a trigger pulse train generating means 10 'for generating
The trigger terminal 11 'to which the trigger pulse train PL' generated by the trigger pulse train generating means 10 'is supplied and the signal terminal 12' to which the comparison output SC 'output from the comparison circuit 9' is supplied are affirmed (or denied). It has an output terminal 13 'and a negative (or positive) output terminal 14', and outputs outputs respectively output from the positive (or negative) output terminal 13 'and the negative (or positive) output terminal 14' as switching signals. A configuration having a so-called D-type flip-flop circuit 15 'that outputs as SW1' and SW2 'may be employed. The above-described flip-flop circuit 15 ′ performs an operation similar to that described for the flip-flop circuit 15, although detailed description is omitted.

The above is the configuration of the sine wave single-phase inverter according to the first embodiment of the present invention. According to the sine wave single-phase inverter according to the present invention having such a configuration, the series circuit H 'of the switching elements A1' and A2 'is connected between both ends of the DC power supply 1, and the switching elements A1' and A
The connection midpoint of 2 'is the connection midpoint between the smoothing inductor L' and the switching elements A1 and A2 of the series circuit H connected between both ends of the DC power supply 1 in the conventional sine wave inverter shown in FIG. Even if it has a configuration in which it is connected to the midpoint of the DC power supply 1 through the inductor L and the capacitor C, and is connected to the midpoint of the DC power supply 1 through the smoothing capacitor C, FIG. According to the configuration of the conventional sine wave inverter shown in FIG. 6, the detailed description is omitted, but the operation described in the case of the conventional sine wave inverter shown in FIG.
The inverter function described for the conventional sine wave inverter shown in FIG. 6 is the same as the conventional sine wave inverter shown in FIG. 6 except that the load voltage v ₀ is applied between the output terminals T1 and T2. Obviously, it can be obtained in such a manner that it is obtained to have the same sine wave as the reference sine wave voltage v _r generated by the generation means 4.

According to the sine-wave single-phase inverter according to the present invention shown in FIG. 1, the series circuit H 'of the switching elements A1' and A2 'is connected between both ends of the DC power supply 1 as described above. The switching elements A1 'and A
The connection midpoint of 2 'is the connection midpoint between the smoothing inductor L' and the switching elements A1 and A2 of the series circuit H connected across the DC power supply 1 in the conventional sine wave inverter shown in FIG. It is configured to be connected to the midpoint of the DC power supply 1 through the inductor L and the capacitor C, and to be connected to the midpoint of the DC power supply 1 through the smoothing capacitor C. According to such a configuration, the following operation is performed according to the configuration of the conventional sine-wave single-phase inverter shown in FIG. 6 and described in the conventional sine-wave single-phase inverter shown in FIG.

That is, both the switching signals SW1 'and SW2' generated and output by the switching signal generation and output means SG 'are 2 in the same manner as the switching signals SW1 and SW2 generated and output by the switching signal generation and output means SG. "1" and "0" are sequentially repeated in the value display, but "1" and "0" in the binary display have an inverse relationship to each other, so a series circuit connected between both ends of the DC power supply 1. H 'switching elements A1' and A2 '
However, like the switching elements A1 and A2 of the series circuit H connected between both ends of the DC power supply 1, "ON" and "OFF" are sequentially repeated in an inverse relationship to each other.

The switching elements A1 'and A
2 'is turned on and off, respectively, the switching element A1 of the series circuit H is connected between both ends of the series circuit of the smoothing inductor L' and the smoothing capacitor C.
And A2 are turned "ON" and "OFF", respectively, and the connection middle point side of the switching elements A1 'and A2' of the smoothing inductor L 'between the positive terminal and the middle point of the DC power supply 1 is positive. When the DC power supply is connected, a current flows through a series circuit of the smoothing inductor L 'and the smoothing capacitor C through the switching element A1', and the switching elements A1 'and A2' In the "off" and "on" states, the switching elements A1 and A2 of the series circuit H are "on" and "off" between both ends of the series circuit of the smoothing inductor L and the smoothing capacitor C, respectively. In accordance with the case, the DC power supply between the middle point and the negative terminal of the DC power supply 1 having a negative connection point at the connection point between the switching elements A1 'and A2' of the smoothing inductor L 'is connected. And in a state in which, 'through, smoothing inductor L' switching element A2 becomes state current flows through the series circuit of the a smoothing capacitor C.

By the way, in this case, the switching signal generation and output means SG 'repeatedly generates the switching signals SW1' and SW2 'which are generated and output therefrom sequentially.
During the period of “1” and “0” of the value display, the load current detection means IO generated and output by the control current generation and output means CG ′
D detects the load current i ₀ and the inductor current detecting means I
Based on the inductor current i _L detected by the LD, (i
_L′− i ₀ ) is controlled so that it becomes 0, that is, i _L′− i ₀ = 0 (2) by a control current _ig ′ given by _L′− i ₀ ). Controlled to riding mode.

Therefore, the current required by the load connected to the output terminals T1 and T2 is reflected on the load current i _0, and the reflected load current i ₀ is applied to the switching elements A1 ′ and A2 of the series circuit H ′. ′ Is reflected on the inductor current i _L ′ flowing through the smoothing inductor L ′, so that even if the current required by the load is large, almost all of the switching elements A1 ′ and A1
2 'will be supplied by the current flowing by their switching.

For this reason, even if the load requires a large current (power), in the series circuit H, the current flowing through the switching elements A1 and A2 due to their switching is sufficiently small. As A1 and A2, a switching element having a small current capacity can be used. Therefore, when the switching elements A1 and A2 of the series circuit H switch, the maximum switching frequency f _s-max can be sufficiently increased, and To this extent, between the output terminals T1 and T2,
The load voltage v _0, the reference sinusoidal voltage v _r, drives out higher same is, it is possible to obtain to be the same sine wave.

The switching element A1 of the series circuit H
And A2, even if a power loss is caused by the current flowing through the switching elements A1 and A2 of the series circuit H, as described above, the power loss can be reduced sufficiently.

Further, it is assumed that the switching elements A1 'and A2' of the series circuit H 'switch even if the switching elements A1' and A2 'of the series circuit H' are accompanied by a power loss due to the current flowing therethrough.
The maximum switching frequency f _s-max ′ (the switching signal generation / output means SG ′ receives the trigger pulse train PL ′ having the frequency f _L from the trigger pulse train generation means 10 ′ at the trigger terminal 11 ′ as described above. And a comparison output SC 'from a comparison circuit 9' to a signal terminal 12 ', and a positive (or negative) output terminal 13' and a negative (or positive) output terminal 14 ′ Output to the switching signal SW
In the case where a configuration having a so-called D-type flip-flop circuit 15 ′ that outputs as 1 ′ and SW 2 ′ is used, if the frequency f _L of the trigger pulse train PL ′ is 1
/ 2 times) can be made sufficiently low (as described above, the trigger pulse train PL having the frequency f _L from the trigger pulse train generating means 10 ′ at the trigger terminal 11 ′ as described above) , And a comparison output SC 'from a comparison circuit 9' is supplied to a signal terminal 12 ', and a positive (or negative) output terminal 13' and a negative (or positive) output are provided. The output of the terminal 14 'is connected to the switching signal SW.
In the case of having a configuration having a so-called D-type flip-flop circuit 15 'that outputs signals as 1' and SW2 ', by sufficiently lowering the frequency f _L of the trigger pulse train PL'), The loss can be made sufficiently small.

As described above, according to the sine wave single-phase inverter according to the present invention shown in FIG. 1, the output terminals T1 and T2
Even if the load connected between them requires a large current (large power), it can respond to it, and the output terminal T
The load voltage v ₀ between 1 and T2 can be obtained to have the same sine wave as the reference sine wave voltage v _r , even when the load fluctuates, with the same higher level, In addition, the switching elements A1 and A2, A1 'and A2' used can be prevented from being accompanied by a large power loss.
High conversion efficiency can be obtained.

The excellent operation and effect of the sine wave single-phase inverter according to the present invention shown in FIG. 1 can be obtained by the way. The switching elements A1 and A2 and A1 'of the series circuits H and H' are obtained. and using a field effect transistor of n-channel type as A2 ', the voltage of the DC power source 1 and 160 v, the voltage of the reference sine wave voltage v _r of the reference sinusoidal voltage generation means 4 outputs and frequency f _r respectively 80V And 50 Hz, and the inductances of the smoothing inductors L and L 'are 3.0 mH and 0.3, respectively.
mH, the capacitance of the smoothing capacitor C is 40 μF,
The switching signal generation and output means SG and SG 'have a configuration having flip-flop circuits 15 and 15' triggered by the above-described trigger pulse trains PL and PL ', respectively.
The frequency f _H and f _L of L and PL 'respectively 500K
Hz and 62.6 KHz, and the series circuit H
The maximum switching frequency of the switching elements A1 and A2 is set to 250 KHz (ＰＬ times the frequency of the trigger pulse train PL).
When the switching elements A1 'and A2' of the series circuit H 'are switched, the maximum switching frequency is 31.3 KHz (1/3 of the frequency of the trigger pulse train PL).
2) and the admittance Y for determining the control current i _g output by the control current generation / output means CG was set to 2.0 S.

[0085]

Embodiment 2 Next, with reference to FIG. 2, a second embodiment of a sine wave inverter according to the present invention will be described in a second embodiment of a sine wave single-phase inverter. 2, parts corresponding to those in FIGS. 1 and 7 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The sine-wave single-phase inverter according to the present invention shown in FIG. 2 is different from the conventional sine-wave single-phase inverter shown in FIG. 7 in that the sine-wave single-phase inverter according to the present invention shown in FIG. A series circuit H 'of switching elements A1' and A2 'that are controlled to be "on" and "off" in an inverse relationship to each other according to the series circuit H of the wave single-phase inverter;
Switching elements A1 'and A2' of the series circuit H '
Is connected to the switching elements A1 "and A2" of the series circuit H "through the smoothing inductor L 'and the smoothing capacitor C according to the case of the sine wave single-phase inverter according to the present invention shown in FIG. Connected to midpoint.

Further, as in the case of the sine wave single-phase inverter according to the present invention shown in FIG. 1, (a) output terminals T1 and T1
(B) a load current detecting means IOD for detecting a current flowing in the current 2 as a load current i ₀ , (b) an inductor current detecting means ILD for detecting a current flowing in the smoothing inductor L ′ as an inductor current i _L ′, and (c). Load current detecting means I
A load current i ₀ which OD is detected, 'based on a, (i _L' inductor current i _L that inductor current detector ILD detects generation control current for generating and outputting a control current i _g 'given by -i ₀₎ The output means CG 'and (d) both repeat successively taking "1" and "0" in binary representation, but take "1" and "0" in binary representation in an inverse relationship to each other, and switching signal period of "1" and "0" values display control by the current generator output unit CG 'control current i _g that generates output' is the control current i _g 'is controlled to be 0 SW1 'And SW
2 ', and outputs the switching signals SW1' and SW2 'to the switching elements A1' and A2 'of the above-described series circuit H' so as to turn them on and off, respectively. And output means SG '.

The configuration of the second embodiment of the sinusoidal-wave single-phase inverter according to the present invention has been described above. According to the sine-wave single-phase inverter according to the present invention having such a configuration, the conventional sine-wave single-phase inverter shown in FIG. A series circuit H 'of switching elements A1' and A2 'is connected between both ends of the power supply 1, and a connection point between the switching elements A1' and A2 'is connected in series through a smoothing inductor L' and a smoothing capacitor C. The switching elements A1 'and A2' of the series circuit H 'are connected to the connection point of the switching elements A1 "and A2" of the circuit H ", and the switching elements A1' and A2 'of the series circuit H' are the same as those of the sine wave single-phase inverter according to the present invention shown in FIG. Switching signal SW generated and output by switching signal generation / output means SG ′ controlled in a similar manner.
1 'and SW2', respectively, so that detailed description is omitted, but the same excellent operation and effect as in the case of the sinusoidal single-phase inverter according to the present invention shown in FIG. 1 can be obtained. Clearly what you can do.

[0089]

Third Embodiment Next, referring to FIG. 3, a third embodiment of a sine wave inverter according to the present invention will be described.
This will be described in the first embodiment of the phase inverter. 3, parts corresponding to those in FIGS. 1 and 8 are denoted by the same reference numerals.

The sine wave three-phase inverter according to the present invention shown in FIG. 3 is different from the conventional sine wave three-phase inverter shown in FIG. 8 in that the sine wave three-phase inverter according to the present invention shown in FIG. A series circuit H1 'of switching elements A1' and A2 ', which are controlled to be "on" and "off" in an inverse relationship to each other according to the series circuit H' of the wave single-phase inverter;
A series circuit H2 'of switching elements A3' and A4 'controlled to be "on" and "off" in a reciprocal relationship, and switching elements A5' and A6 controlled to be "on" and "off" in a reciprocal relationship. 'Series circuit H3' and switching elements A1 'and A1 of series circuit H1'.
2 'connection midpoint, switching element A of series circuit H2'
The connection midpoint between 3 'and A4' and the connection midpoint between the switching elements A5 'and A6' of the series circuit H3 'are based on the sinusoidal single-phase inverter according to the present invention shown in FIG.
It is connected to one end of smoothing capacitors C1, C2 and C3 through smoothing inductors L1 ', L2' and L3 ', respectively.

Further, according to the case of the sine wave single-phase inverter according to the present invention shown in FIG. 1, (a) output terminals T1 and T1
2, and the currents flowing through the T3, respectively the load current i _01, i _02, and the load current detection means IOD1, IOD2 detected as i _03, and a IOD3, (b) smoothing inductor L1 ', L2', and Inductor current detecting means ILD for detecting currents flowing through L3 'as inductor currents i _L1 ', i _L2 ', and i _L3 ', respectively.
1, ILD2, and a ILD3, (c-1) and the load current i ₀₁ that the load current detection means IOD1 detects the inductor current i _L1 inductor current detecting means ILD1 detects'
Based on bets, (i _L1 control current generating output means generates and outputs a '-i ₀₁₎ the control current i _g1 given by' CG1 '
And (c-2) the load current i ₀₂ detected by the load current detection means IOD2 and the inductor current i _L2 'detected by the inductor current detection means ILD2, and (i _L2 ' -i
And 'control current generating output means CG2 for generating and outputting a' control current i _g2 given by _02), and load current i ₀₃ to be detected is (c-3) a load current detecting means IOD3, inductor current detector ILD3 detects 'based on the, (i _L3' inductor current i _L3 -i ₀₃₎ the control current i _g1 given by 'control current generating output means for generating output CG3'
And (d-1) are repeated to sequentially take "1" and "0" in binary display, but take "1" and "0" of binary display in an inverse relationship to each other and display each binary display Of the control current generation and output means CG
1 'generates and outputs switching signals SW1' and SW2 'which are controlled so that the control current i _g1 ' becomes 0 by the control current i _g1 'generated and output, and generates the switching signals SW1' and SW2 '. (D-2) switching signal generation / output means SG1 'for outputting to the switching elements A1' and A2 'of the series circuit H1' so as to turn them on and off, respectively;
In both cases, it is repeated to sequentially take "1" and "0" in binary display, but "1" and "0" in binary display are inversely related to each other, and "1" and "0" in binary display respectively. "
Generates a period of 'switching signal is controlled so becomes 0 SW3' the control current i _g2 by a control current generating output means CG2 'control current i _g2 which produces outputs' and SW4', they switching Signal SW3 '
And SW4 'to the switching elements A3' and A4 'of the above-described series circuit H2', respectively, in order to turn them on and off, respectively. It repeats taking "1" and "0" sequentially in the binary display, but taking "1" and "0" in the binary display in an inverse relationship to each other and "1" and "0" in the binary display respectively. generates a period of 'switching signal SW5 are controlled to become 0' the control current i _g3 by a control current generating output means CG3 'control current i _g3 which produces outputs' and SW6', they switching Signals SW5 'and SW6'
Is connected to the switching element A5 'of the series circuit H3'.
And A6 'have switching signal generation and output means SG3' for outputting the signals so as to turn them on and off, respectively.

The above is the configuration of the first embodiment of the sine wave three-phase inverter according to the present invention. According to the sine-wave three-phase inverter according to the present invention having such a configuration, the conventional sine-wave single-phase inverter shown in FIG. A series circuit H1 'of switching elements A1' and A2 ', a series circuit H2' of switching elements A3 'and A4', and a switching element A
The series circuits H3 'of 5' and A6 'are connected, the connection midpoint of the switching elements A1' and A2 'of the series circuit H1', the connection midpoint of the switching elements A3 'and A4' of the series circuit H2 ', and The connection midpoint of the switching elements A5 'and A6' of the series circuit H3 'is connected to one end of the smoothing capacitors C1, C2 and C3 through the smoothing inductors L1', L2 'and L3', respectively. , The switching elements A1 'and A of the series circuit H1'
2 ', switching elements A3' and A of series circuit H2 '
4 'and the switching elements A5' and A6 'of the series circuit H3' are controlled in the same manner as the switching signal generation and output means SG of the sine wave single-phase inverter according to the present invention shown in FIG. Output means SG
1 ', SG2', and SG3 'are controlled by switching signals SW1' and SW2 ', SW3' and SW4 ', and SW5' and SW6 ', respectively, which are generated and output, respectively. Although omitted, it is apparent that the excellent operation and effect as the sine wave three-phase inverter can be obtained according to the description of the sine wave single-phase inverter according to the present invention shown in FIG.

[0093]

Fourth Embodiment Next, referring to FIG. 4, a fourth embodiment of the sine wave inverter according to the present invention will be described.
The second embodiment of the phase inverter will be described. 4, parts corresponding to those in FIGS. 3 and 9 are denoted by the same reference numerals.

The sine wave three-phase inverter according to the present invention shown in FIG. 4 is the same as the sine wave three-phase inverter according to the present invention shown in FIG. 3, except that the other ends of the smoothing capacitors C1, C2, and C3 are connected to each other. Instead of the output terminal T
It has the same configuration as the sine-wave three-phase inverter according to the present invention shown in FIG. 3, except that it is connected to 2, T3 and T1.

The configuration of the sine wave three-phase inverter according to the second embodiment of the present invention has been described above. According to the sine-wave three-phase inverter according to the present invention having such a configuration, since it has the same configuration as that of the sine-wave three-phase inverter according to the present invention shown in FIG. Although a detailed description is omitted, a sine wave 3 similar to that described in the case of the sine wave three-phase inverter according to the present invention shown in FIG.
It is clear that excellent operation and effects as a phase inverter can be obtained.

[0096]

Embodiment 5 Next, referring to FIG. 5, a fifth embodiment of the sine wave inverter according to the present invention will be described.
A third embodiment of the phase inverter will be described. 5, parts corresponding to those in FIGS. 3 and 10 are denoted by the same reference numerals.

The sine-wave three-phase inverter according to the present invention shown in FIG. 5 is different from the conventional sine-wave three-phase inverter shown in FIG. 10 in that the sine wave three-phase inverter according to the present invention shown in FIG. According to the case of wave single-phase inverter,
A series circuit H1 'of switching elements A1' and A2 'controlled to be "on" and "off" in an inverse relationship to each other, and switching elements A3' and A4 controlled to be "on" and "off" in an inverse relationship to each other. 'Series circuit H2' and switching elements A1 'and A1 of series circuit H1'.
The connection midpoint of 2 'and the connection midpoint of the switching elements A3' and A4 'of the series circuit H2' are connected to the smoothing inductor L1 ', as in the case of the sine wave three-phase inverter according to the present invention shown in FIG. And L2 ', respectively, and are connected to one ends of smoothing capacitors C1 and C2, respectively.

Further, according to the case of the sine wave three-phase inverter according to the present invention shown in FIG. 3, (a) output terminals T1 and T1
The current flowing through the secondary, respectively, each load current i _01, and the load current detection means IOD1 detected as i _02, and a IOD2, (b) smoothing inductor L1 ', and L
Inductor current detecting means ILD1 and ILD2 for detecting currents flowing through 2 'as inductor currents i _L1 ' and i _L2 ', respectively; (c-1) load current i ₀₁ detected by load current detecting means IOD1; Based on the inductor current i _L1 ′ detected by the inductor current detection means ILD1, the control current i given by (i _L1 ′ -i ₀₁ )
control current generation and output means CG1 'for generating and outputting _g1 ';
And (c-2) load current i ₀₂ that the load current detection means IOD2 detects the inductor current detector ILD2 is 'based on the, (i _L2' inductor current i _L2 for detecting -i ₀₂₎
The control current generation and output means CG2 'for generating and outputting the control current _ig2 ' given by (d-1) and (d-1) are repeatedly displayed in the binary display to sequentially take "1" and "0". The control current i _g1 ′ generated and output by the control current generation and output means CG1 ′ takes “1” and “0” in an inverse relationship to each other, and the respective periods of the binary display “1” and “0” are controlled by the control current _ig1 ′. It generates switching signals SW1 'and SW2' which are controlled so that i _g1 'becomes 0, and generates the switching signals SW1' and SW2 '.
With the switching element A1 'of the series circuit H1'.
And A2 ', the switching signal generation and output means SG1' for outputting the signals in order to turn them on and off, respectively, and that (d-2) sequentially takes "1" and "0" in binary display. Again, the binary representations of "1" and "0" are inversely related to each other and
Switching signal period of "1" and "0" value display is controlled so that the control current i _g2 'by the control current generating output means CG2' control current i _g2 which produces outputs' becomes 0 SW3 And SW4 ', and the switching signals SW3' and SW4 'are supplied to the switching elements A3' and A4 'of the series circuit H2'.
In order to perform on / off control of each of them, a switching signal generation / output means SG2 'for outputting each is provided.

The above is the configuration of the third embodiment of the sine wave three-phase inverter according to the present invention. According to the sine-wave three-phase inverter according to the present invention having such a configuration, the conventional sine-wave single-phase inverter shown in FIG.
According to the case of the sine-wave single-phase inverter according to the present invention, a series circuit H1 'of switching elements A1' and A2 'and a switching element A
3 'and A4' are connected to a series circuit H2 ', a connection midpoint between the switching elements A1' and A2 'of the series circuit H1', and a switching element A3 'of the series circuit H2'.
And A4 'are connected to one ends of smoothing capacitors C1 and C2 through smoothing inductors L1' and L2 ', respectively, and a series circuit H
1 'and A3' and A4 'of the series circuit H2'
The switching signal generation / output means SG controlled similarly to the switching signal generation / output means SG1 'and SG2' of the sine wave single-phase inverter according to the present invention shown in FIG.
1 'and SG2' respectively generate and output switching signals SW1 'and SW2', and SW3 'and SW
4 ', the detailed description is omitted, but the sine wave 3 is the same as that described in the case of the sine wave three-phase inverter according to the present invention shown in FIG.
It is clear that excellent operation and effects as a phase inverter can be obtained.

[0100]

Other embodiments of the present invention have been described above only by showing a few embodiments of the present invention. For example, in the sine wave single-phase inverter according to the present invention shown in FIG.
Assuming that the load current i ₀ flowing through the output terminals T1 and T2 is a current not including the current flowing through the smoothing capacitor C, instead of being detected by the load current detecting means IOD, as shown by a dotted line in FIG. It may be detected as a current including a current flowing through the smoothing capacitor C, and the detected current may be used in the control current generation and output means CG '. Of course, the load current detected by such load current detection means may be used. Although not shown, it is clear that the present invention can be applied to the sine wave single-phase inverter according to the present invention shown in FIG. 2 and the sine wave three-phase inverter according to the present invention shown in FIGS. 3, 4 and 5 mutatis mutandis.

In the sine wave three-phase inverter according to the present invention shown in FIGS. 3 and 4, the output terminals T1 and T2
, The voltage between T2 and T3, and the voltage between T3 and T1 are respectively converted to load voltage detection means VD12, VD23, and VD.
31, instead of detecting them as load voltages v ₀₁₂ , v ₀₂₃ , and v ₀₃₁ respectively, as shown by dotted lines, the voltages across smoothing capacitors C1, C2, and C3 are respectively detected by load voltage detection means VD1, VD2. , And VD3, respectively, as load voltages v ₀₁₂ , v ₀₂₃ , and v ₀₃₁ , respectively, and these can be used in the control current generation and output means CG1, CG2, and CG3, respectively. This can also be applied to the sine-wave three-phase inverter according to the present invention shown in FIG. 5 as shown by the dotted line, and various modifications and changes can be made without departing from the spirit of the present invention. Will.

[0102]

According to the sine wave inverter of the present invention, even if the load connected between the output terminals requires a large current (large power), the load can be responded to. Can be obtained so as to have the same sine wave as the reference sine wave voltage, even if the load fluctuates, and to use the switching element used with a large power loss. Therefore, high conversion efficiency can be obtained.

[Brief description of the drawings]

FIG. 1 is a connection diagram showing a first embodiment of a sine-wave inverter according to the present invention, together with a first embodiment of a sine-wave single-phase inverter.

FIG. 2 is a connection diagram showing a second embodiment of a sine-wave inverter according to the present invention, together with a second embodiment of a sine-wave single-phase inverter.

FIG. 3 is a connection diagram showing a third embodiment of a sine wave inverter according to the present invention, together with a first embodiment of a sine wave three-phase inverter.

FIG. 4 is a connection diagram showing a fourth embodiment of a sine wave inverter according to the present invention, together with a second embodiment of a sine wave three-phase inverter.

FIG. 5 is a connection diagram showing a fifth embodiment of a sine wave inverter according to the present invention, together with a third embodiment of a sine wave three-phase inverter.

FIG. 6 is a connection diagram showing a conventional sine-wave single-phase inverter.

FIG. 7 is a connection diagram showing another conventional sine-wave single-phase inverter.

FIG. 8 is a connection diagram showing a conventional sine wave three-phase inverter.

FIG. 9 is a connection diagram showing another conventional sine wave three-phase inverter.

FIG. 10 is a connection diagram showing still another conventional sine wave three-phase inverter.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 DC power supply 2 Field effect transistor 3 Diode 4, 4 'Reference sine wave voltage generation means 5, 5' Difference circuit 6, 6 'Multiplication circuit 7, 7' Difference circuit 8, 8 'Reference DC current generation means 9, 9 'Comparison circuit 10, 10' Trigger pulse train generating means 11, 11 'Trigger terminal 12, 12' Signal terminal 13, 13 'Positive output terminal 14, 14' Negative output terminal 15, 15 'Flip-flop circuit 16 Comparison circuit A1 A6, A1 'to A4' A1 "and A2" Switching elements C, C1 to C3 Smoothing capacitors CG, CG1 to CG3, CG1 'to CG3' Control current generation and output means D1, D2 Diodes H, H ', H ", H1-H3, H1'-H3 'series circuit ICD, ICD1-ICD3 Capacitor current detection means ILD, ILD1-ILD3 Inductor voltage Current detection means IOD, IOD1 to IOD3 Load current detection means L, L1 to L3, L1 'to L3' Smoothing inductor SG, SG1 to SG3, SG1 'to SG3' Switching signal generation and output means T1 to T3 Output terminals VD, VD12, VD23, VD31 Load voltage detecting means

Claims (4)

[Claims] (A) (i) a DC power supply, and (ii) an ON / OFF connection between both ends of the DC power supply.
And (iii) the first and second switching elements of the series circuit.
(V) A pair of output terminals is led out from both ends of the smoothing capacitor, and a connection middle point of the switching element is connected to a middle point of the DC power supply through a smoothing inductor and a smoothing capacitor. B) (i) reference sine wave voltage generation means for generating a reference sine wave voltage, (ii) load voltage detection means for detecting a voltage between the pair of output terminals as a load voltage, and (ii)
i) capacitor current detecting means for detecting a current flowing through the smoothing capacitor as a capacitor current; and (iv)
The difference between the current corresponding to the difference between the reference sine wave voltage generated by the reference sine wave voltage generating means and the load voltage detected by the load voltage detecting means and the capacitor current detected by the capacitor current detecting means is controlled. A control current generation and output means for generating and outputting a current; and (vi) both of "1" and "0" are sequentially repeated in a binary display, and "1" and "0" of the binary display are inversely related to each other. The first and second switching signals are controlled such that the control current is controlled to be 0 during the periods of “1” and “0” of the binary display, respectively, and the first and second switching signals are generated. To the first and second switching elements of the series circuit for on / off control of the switching signals, respectively.
(C) (i) connected between both ends of the DC power supply.
It has another series circuit of the third and fourth switching elements that are on / off controlled in an inverse relationship to each other, and (ii) the connection midpoint of the third and fourth switching elements of the other series circuit is (D) (i) load current detecting means for detecting a current flowing through the output terminals of the pair as a load current, wherein the load current detecting means is connected to the midpoint of the DC power supply through another smoothing inductor and the smoothing capacitor. (Ii) an inductor current detecting means for detecting a current flowing through the other smoothing inductor as an inductor current; and (iii) a load current detected by the load current detecting means and an inductor current detecting by the inductor current detecting means. Other control current generation and output means for generating and outputting the difference between the control current and another control current,
(Iv) In both cases, “1” and “0” are sequentially repeated in a binary display, but “1” and “0” in a binary display are inversely related to each other, and “1” and “1” in a binary display, respectively. The third and fourth switching signals are generated such that the other control current is controlled to be 0 during the period of “0”, and the third and fourth switching signals are generated by the third and fourth switching signals. A sine-wave single-phase inverter, characterized in that the fourth switching element has another switching signal generating and outputting means for outputting each of them so as to control on / off of the fourth switching element. (A) (i) a DC power supply; and (ii) an ON / OFF connection between both ends of the DC power supply.
The first of the first and second switching elements to be turned off
And (iii) a second series circuit of third and fourth switching elements that are connected between both ends of the DC power supply and that are on / off controlled in an inverse relationship to each other,
(Iv) The connection middle point of the first and second switching elements of the first series circuit is connected to the third and fourth switching elements of the second series circuit through a smoothing inductor and a smoothing capacitor.
(V) a pair of output terminals is derived from both ends of the smoothing capacitor, and (B) (i) a reference sine wave for generating a reference sine wave voltage Voltage generating means, (ii) load voltage detecting means for detecting a voltage between the output terminals of the pair as a load voltage, and (ii)
i) capacitor current detecting means for detecting a current flowing through the smoothing capacitor as a capacitor current; and (iv)
Control current generation and output means for generating and outputting, as a control current, a difference between a reference sine wave voltage generated by the reference sine wave voltage generation means and a current corresponding to a difference between load voltages detected by the load voltage detection means, (Vi) In both cases, "0" and "1" are sequentially repeated in a binary display, but "1" and "0" in a binary display are inversely related to each other, and each of the two is displayed.
The first and second switching signals that are controlled so that the control current becomes 0 during the periods of “1” and “0” in the value display are generated, and the first and second switching signals are generated. In order to control on / off of the first and second switching elements of the first series circuit, respectively,
The first switching signal generation and output means for outputting each of them, and (vii) both of "1" and "0" are sequentially repeated in a binary display, and "1" and "0" of the binary display are mutually exchanged. It generates third and fourth switching signals in an inverse relationship, applies the third and fourth switching signals to the third and fourth switching elements of the second series circuit, and turns them on and off, respectively. (C) (i) connected between both ends of the DC power supply, the sine wave single-phase inverter having a second switching signal generating and outputting means for outputting each of the signals so as to be turned off.
A third series circuit of fifth and sixth switching elements that are on / off controlled in an inverse relationship to each other; and (ii) while the fifth and sixth switching elements of the third series circuit are connected. A point connected to the connection point of the third and fourth switching elements of the second series circuit through another smoothing inductor and the smoothing capacitor; and (D) (i) the output of the pair. Load current detecting means for detecting a current flowing through a load connected to the terminal as a load current;
(Ii) inductor current detecting means for detecting a current flowing through the smoothing inductor as an inductor current;
ii) other control current generating and outputting means for generating and outputting, as another control current, a difference between the load current detected by the load current detecting means and the inductor current detected by the inductor current detecting means; In the display, "1" and "0" are sequentially repeated, but "1" and "0" in the binary display are inversely related to each other, and the periods of "1" and "0" in the binary display are respectively as described above. Other control current is 0
And generating the fifth and sixth switching signals which are controlled so that the fifth and sixth switching signals are turned on / off by the fifth and sixth switching elements, respectively. And a third switching signal generating / outputting means for outputting respective signals for control. 3. (A) (i) a DC power supply, (ii) a first series circuit of first and second switching elements connected between both ends of the DC power supply, and (iii) the DC power supply. A second series circuit of third and fourth switching elements connected between both ends of the power supply, and (iv) a third series circuit of fifth and sixth switching elements connected between both ends of the DC power supply. (V) a connection midpoint between the first and second switching elements of the first series circuit, and a connection midpoint between the third and fourth switching elements of the second series circuit. , And the connection midpoint of the fifth and sixth switching elements of the third series circuit passes through the first, second, and third smoothing inductors, respectively, to form the first, second, and third switching inductors.
Respectively connected to one end of a smoothing capacitor of
i) the other ends of the first, second, and third smoothing capacitors are connected to each other, or a connection midpoint between the second smoothing inductor and the second smoothing capacitor; And (vii) the first smoothing inductor and the third smoothing capacitor are connected to the middle point of connection between the first smoothing inductor and the first smoothing capacitor, respectively. Midpoint of connection between the inductor and the first smoothing capacitor, midpoint of connection between the second smoothing inductor and the second smoothing capacitor,
And first, second, and third output terminals are respectively derived from a connection midpoint between the third smoothing inductor and the third smoothing capacitor, and (B) (i) first output terminal And a second reference sine wave having the same frequency as the first reference sine wave voltage, but having a phase difference of 120 ° between the first reference sine wave voltage and the first reference sine wave voltage. A voltage and a third reference sine wave voltage having the same frequency as the first reference sine wave voltage but having a 240 ° phase difference between the first reference sine wave voltage. (Ii) a voltage between the first and second output terminals, a voltage between the second and third output terminals, and a voltage between the third and first output terminals, or The voltages across the first, second, and third smoothing capacitors are first, second, and third, respectively. First, second, and third load voltage detecting means for detecting the load voltages as the first, second, and third smoothing capacitors, respectively; and (iii) the first, second, and third currents flowing through the first, second, and third smoothing capacitors, respectively. , And third capacitor current detecting means for detecting as the third capacitor current, respectively, and (iv) a first reference sine wave voltage generated by the reference sine wave voltage generating means. The first load voltage detected by the first load voltage detecting means
First control current generation and output means for generating and outputting, as a first control current, a difference between a current corresponding to the difference between the load voltage and the first capacitor current detected by the first capacitor current detection means, (V) a current corresponding to a difference between a second reference sine wave voltage generated by the reference sine wave voltage generation means and a second load voltage detected by the second load voltage detection means; And (vi) the reference sine wave voltage generating means for generating and outputting, as a second control current, a difference from the second capacitor current detected by the capacitor current detecting means. A current corresponding to a difference between the third reference sine wave voltage and the third load voltage detected by the third load voltage detecting means, and a third capacitor current detected by the third capacitor current detecting means. Is generated as the third control current The third control current generation and output means to be input, and (vii) both of "1" and "0" are sequentially repeated in binary display, but "1" and "0" of binary display are inversely related to each other. And the first and second switching signals are controlled such that the first control current becomes 0 during the periods of “1” and “0” in the binary display, respectively. First switching signal generation and output means for outputting the second switching signal to the first and second switching elements of the first series circuit so as to control on / off of the first and second switching elements, respectively; (Viii) In both cases, “1” and “0” are sequentially repeated in a binary display, but “1” and “0” in a binary display are inversely related to each other, and “1” and “1” in a binary display respectively. The period of “0” corresponds to the second control current. Generating third and fourth switching signals that are controlled to be 0, and applying the third and fourth switching signals to the third and fourth switching elements of the second series circuit; In order to control the on / off of each of them, a second switching signal generating / outputting means for outputting each of them, and (ix) both of "1" and "0" are sequentially repeated in a binary display. "1" and "0"
And generating the fifth and sixth switching signals in which the third control current is controlled to be 0 during the periods of “1” and “0” in the binary display, respectively. Then, the fifth and sixth switching signals are output to the fifth and sixth switching elements of the third series circuit so as to turn them on and off, respectively. (C) (i) a fourth series circuit of seventh and eighth switching elements connected between both ends of the DC power supply;
(Ii) a fifth series circuit of ninth and tenth switching elements connected between both ends of the DC power supply;
ii) a sixth series circuit of eleventh and twelfth switching elements connected between both ends of the DC power supply, and (iv) seventh and eighth switching elements of the fourth series circuit. , The connection middle point of the ninth and tenth switching elements of the fifth series circuit, and the connection middle point of the sixth series circuit.
The connection midpoint of the fifth and sixth switching elements of the series circuit of the first through the fourth, fifth, and sixth smoothing inductors respectively, the first smoothing inductor and the first
, The connection middle point of the second smoothing inductor and the second smoothing capacitor, and the connection middle point of the third smoothing inductor and the third smoothing capacitor. And (D) (i) a first and a second, respectively, detecting currents flowing through the first, second and third output terminals as first, second and third load currents, respectively. Second and third load current detection means, and (ii) currents flowing through the first, second, and third smoothing inductors, respectively, to the first and second load inductors.
First, second, and third inductor current detecting means for detecting the inductor current as the third inductor current and the third inductor current, respectively, (ii)
i) a fourth step of generating and outputting a difference between the first load current detected by the first load current detecting means and the first inductor current detected by the first inductor current detecting means as a fourth control current; And (iv) determining the difference between the second load current detected by the second load current detection means and the second inductor current detected by the second inductor current detection means in the fifth. And (v) a third load current detected by the third load current detecting means and a third control current generated and output by the third inductor current detecting means. A sixth control current generating and outputting means for generating and outputting a difference from the inductor current as a sixth control current;
And "0" are sequentially repeated, but "1" and "0" of the binary representation are inversely related to each other, and the two
The seventh and eighth switching signals are generated such that the period of “1” and “0” of the value display is controlled such that the fourth control current becomes 0, and the seventh and eighth switching signals are generated. A fourth switching signal generating and outputting means for respectively outputting a switching signal to the seventh and eighth switching elements of the fourth series circuit so as to control on / off thereof, respectively, and (vii) both binary signals. In the display, "1" and "0" are sequentially repeated.
The ninth and tenth switching signals are generated in such a manner that the fifth control current is controlled to be 0 during the periods of “1” and “0” of the value display, and the ninth and tenth switching signals are generated. Signals for the ninth and first circuits of the fifth series circuit.
Fifth switching signal generation / output means for outputting to the switching elements of 0, respectively, in order to control on / off of each of them, and (viii) sequentially repeat "1" and "0" in binary display. Controls the binary display "1" and "0" in opposite phase relationship to each other, and controls the sixth control current to be 0 during the period of each binary display "1" and "0". 11th and 12th switching signals are generated, and the 11th and 12th switching signals are turned on and off to the 11th and 12th switching elements of the sixth series circuit, respectively. A sine-wave three-phase inverter, comprising: a sixth switching signal generating / outputting means for outputting the respective signals so as to perform an off control. (A) (i) a DC power supply, (ii) a first series circuit of first and second switching elements connected between both ends of the DC power supply, and (iii) the DC power supply. A second series circuit of third and fourth switching elements connected between both ends of the power supply, and (iv) a connection midpoint between the first and second switching elements of the first series circuit. And the middle point of connection between the third and fourth switching elements of the second series circuit is the first smoothing inductor and the first smoothing capacitor, and the second smoothing inductor and the second smoothing inductor. (V) a connection point between the first smoothing inductor and the first smoothing capacitor, a second connection point between the second smoothing inductor and the second connection point, Connection middle point of 2 smoothing capacitor And from the midpoint of the DC power source,
(B) (i) having a first reference sine wave voltage and the same frequency as the first reference sine wave voltage, wherein the first, second, and third output terminals are respectively derived. Means for generating a second reference sine wave voltage having a phase difference of 120 ° with the first reference sine wave voltage; and (ii) the first and second sine wave voltages. 1 and 2 for detecting the voltage between the output terminals of the third and third output terminals and between the second and third output terminals as the first and second load voltages, respectively.
And (iii) first and second capacitor current detecting means for detecting currents flowing through the first and second smoothing capacitors as first and second capacitor currents, respectively. (Iv) a current corresponding to a difference between the first reference sine wave voltage generated by the reference sine wave voltage generation means and the first load voltage detected by the first load voltage detection means, A first control current generating and outputting means for generating and outputting a difference from the first capacitor current detected by the first capacitor current detecting means as a first control current; and (v) generating the reference sine wave voltage generating means. Current corresponding to the difference between the second reference sine wave voltage to be detected and the second load voltage detected by the second load voltage detecting means, and the second capacitor current detected by the second capacitor current detecting means. Difference with A second control current generating and outputting means for generating and outputting as a second control current, and (vi) both of "1" and "0" in binary display are sequentially repeated, and "1" and "1" of binary display are respectively used. "0" in an inverse relationship to each other, and "1" and "0" in the respective binary representations generate first and second switching signals in which the first control current is controlled to be 0. A first switching signal generation circuit that outputs the first and second switching signals to first and second switching elements of the first series circuit so as to turn them on and off, respectively. Both the output means and (vii) sequentially take "1" and "0" in binary display, but take "1" and "0" in binary display in an inverse relationship to each other, and
"1" and "0" in the value display generate third and fourth switching signals in which the second control current is controlled to be 0, and the third and fourth switching signals are generated. To a third and a fourth switching element of the second series circuit, and a second switching signal generating and outputting means for respectively outputting the third and fourth switching elements for on / off control thereof. (C) (i) a third series circuit of fifth and sixth switching elements connected between both ends of the DC power supply;
(Ii) a fourth series circuit of seventh and eighth switching elements connected between both ends of the DC power supply,
(Iii) a connection midpoint between the fifth and sixth switching elements of the third series circuit, and a seventh connection point of the fourth series circuit.
And a connection midpoint between the eighth switching element and a connection midpoint between the first smoothing inductor and the first smoothing capacitor through third and fourth smoothing inductors, respectively. And the second smoothing inductor and the second
(D) (i) detecting currents flowing through the first and second output terminals as first and second load currents, respectively. First and second load current detecting means;
i) first and second inductor current detecting means for detecting currents flowing through the first and second smoothing inductors as first and second inductor currents, respectively; and (iii) the first load. A third control current generating and outputting means for generating and outputting a difference between the first load current detected by the current detecting means and the first inductor current detected by the first inductor current detecting means as a third control current; (Iv) generating and outputting a difference between the second load current detected by the second load current detecting means and the second inductor current detected by the second inductor current detecting means as a fourth control current. Fourth control current generation / output means;
(V) In both cases, "1" and "0" are sequentially repeated in a binary display, but "1" and "0" in a binary display are inversely related to each other, and "1" and "1" in a binary display are respectively taken. The fifth and sixth switching signals are generated such that the third control current is controlled to be 0 during the period of “0”, and the fifth and sixth switching signals are generated by the third switching current. (Vi) third switching signal generation / output means for outputting to the fifth and sixth switching elements of the series circuit for on / off control thereof, respectively;
In both cases, “1” and “0” are sequentially repeated in binary display, but “1” and “0” in binary display are inversely related to each other, and “1” and “0” in binary display respectively. And generating the seventh and eighth switching signals during which the fourth control current is controlled to be 0, and converting the seventh and eighth switching signals into the fourth series circuit. A sine-wave three-phase inverter, characterized in that the seventh and eighth switching elements have fourth switching signal generation and output means for outputting the respective switching elements for on / off control.