CN103107728A - Voltage and current mixed source type grid-connected inverter topology - Google Patents
Voltage and current mixed source type grid-connected inverter topology Download PDFInfo
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- CN103107728A CN103107728A CN2013100691541A CN201310069154A CN103107728A CN 103107728 A CN103107728 A CN 103107728A CN 2013100691541 A CN2013100691541 A CN 2013100691541A CN 201310069154 A CN201310069154 A CN 201310069154A CN 103107728 A CN103107728 A CN 103107728A
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Abstract
The invention discloses a voltage and current mixed source type grid-connected inverter topology which comprises a first field-effect tube, a first inductor, a third diode, a third field-effect tube, a sixth field-effect tube, a fourth diode, a second inductor and a fourth field-effect tube that are connected with one another by a loop circuit, wherein a second field-effect tube and a fifth field-effect tube are respectively connected in parallel between the third field-effect tube and the sixth field-effect tube as well as between the third diode and the fourth diode; a first diode and a second diode are respectively connected in parallel between the first inductor and the second field-effect tube as well as between the second inductor and the fifth field-effect tube; a current input end of the first diode is respectively connected with a connecting point between a first direct current (DC) voltage source and a second DC voltage source, a connecting point between the second field-effect tube and the fifth field-effect tube, an output filter capacitor and an alternating current (AC) power supply by a circuit; the output filter capacitor and a third inductor are connected between the third field-effect tube and the sixth field-effect tube by a circuit; and the other end of the third inductor is connected with the AC power supply. The voltage and current mixed source type grid-connected inverter topology is low in conduction loss and switching loss, and maintains high efficiency under the condition of high frequency.
Description
Technical field
The present invention relates to a kind of combining inverter for electric power system, be specifically related to the mixed source type interconnected inverter topology of a kind of electric current and voltage.
Background technology
As depicted in figs. 1 and 2, be two kinds of traditional typical electrical potential source types in the combining inverter topology of the single transformation of single-stage and current source type combining inverter topology.
The conventional voltage source inventer is a kind of voltage-dropping type current transformer, and the peak value of its output AC voltage must be less than input direct voltage.The conventional current source inventer is a kind of booster type current transformer, and the peak value of its output AC voltage must be greater than input direct voltage.In regenerative resource was generated electricity by way of merging two or more grid systems process, the voltage of Equivalent DC power supply may be in wide variation; Such as same photovoltaic cell group, in the different temperatures situation, direct voltage may change at 300V-700V.Under this condition, traditional electrical potential source or current inverter often need extra one-level DC/DC translation circuit to realize the voltage adjustment as the low pressure and low power conversion interface of 220V/380V.On classical combining inverter topology basis, for the application demand, can develop multiple respective electrical potential source or current source inverter topology.
Stream is conveniently modulated because the conventional current source inventer needs galvanic current, so its DC filtering inductance L
DDirect outputting inductance L much larger than voltage source inverter
1, causing larger power and cost allowance, this is that current source inverter is used one of limited main constraints.
As shown in Figure 3 and Figure 4, at two kinds of canonical topologies of the combining inverter topology of single stage type lifting press: Z-source inverter (Z-source inverter) and Natural Soft-Switching inverter topology.
In order to overcome the shortcoming of traditional electrical potential source and current source inverter transformation restriction, F. Z. professor Peng has proposed famous Z-source inverter, as shown in Figure 3.It can realize the buck conversion by the one-level circuit, reduces power device quantity; But home and overseas has famous seminar to find that in contrast test the Z-source inverter boosts than Boost() the topological combined efficiency of DC/DC translation circuit+two level bridge-type inverters is low.Fig. 4 is the Natural Soft-Switching inverter topology.It is compared with traditional two-stage type hard switching inverter, and the control switch of original Boost DC/DC translation circuit is moved to the flat wave capacitor branch road, becomes auxiliary switch; The boost function of Boost switch is also made way for main inverter bridge.At normal vector operation time, auxiliary switch is opened, and whole converter is a voltage source inverter; And in the change of current or the moment of boosting, auxiliary switch turn-offs, and whole converter becomes the current source inverter that voltage can be clamped.
The Z-source inverter has changed the character of equivalent input power, and it had not only been possessed has voltage source but also have current source characteristic; The Natural Soft-Switching inverter is in different operating demand stage, and its input power presents voltage source or current source characteristic.At present, the principle of other single-stage lifting press inverter circuits and similar with this two classes circuit.But this class has a common shortcoming: with respect to the conventional voltage source type interconnected inverter, additionally be connected in series one, two even a plurality of flat ripple inductance in loop of power circuit, will have caused extra power loss.
As Fig. 5 and in conjunction with Fig. 6 and shown in Figure 7, in prior art aspect the combining inverter of two-stage type lifting press topology.Inverter is when DC input voitage is higher than the absolute value of alternating voltage, and the Boost circuit is not worked, output bridge high frequency chopping, and this moment, circuit equivalent was voltage source inverter.When DC input voitage is lower than the absolute value of alternating voltage, Boost circuit high-frequency work only, this moment, circuit can equivalence be current source inverter.Inverter only has the one-level circuit working at the high frequency state because of any moment, thereby minimum switching loss is arranged.But during Boost circuit high-frequency work, the output filter equivalence is the CL-CL filter; Although strengthened filter effect, also therefore increased loss, strengthened simultaneously the control difficulty.Topology shown in Fig. 5 is because output inverter is wanted high frequency chopping, so can not adopt common MOSFET device to reduce conduction loss.
Shortcoming due to inverter topology in above-mentioned Fig. 5, as Fig. 8 and in conjunction with Fig. 9 and shown in Figure 10, the combining inverter topology of three grades of formula lifting press has been proposed, but, it and the compound inverter of traditional timesharing are similar, during Boost circuit high-frequency work, equivalent output filter is the CL-CL filter, also can lose part efficient because of " crossing filtering ".
Known by above analysis, in the 220V/380V of DC input voitage wide variation low-pressure grid-connection inverter applications occasion, three effective ways of raising the efficiency are: 1, reduce switching loss; 2, replace the IGBT device to reduce conduction loss with metal-oxide layer-semiconductor-field-effect transistor (metal-oxide half field effect transistor, MOSFET, Metal-Oxide-Semiconductor Field-Effect Transistor) device; 3, allow the inductance value of loop of power circuit minimize.
Summary of the invention
The invention provides the mixed source type interconnected inverter topology of a kind of electric current and voltage, have that inductive drop is little, conduction loss is little, switching loss is little, high efficiency characteristics under high frequency.
For achieving the above object, the present invention provide a kind of electric current and voltage mixed source type interconnected inverter topology, be characterized in, this combining inverter topology comprises: the first direct voltage source, the first field effect transistor, the first inductance, the 3rd diode, the 3rd field effect transistor, the 6th field effect transistor, the 4th diode, the second inductance, the 4th field effect transistor and the second direct voltage source that loop connects;
Above-mentioned the 3rd diode current output is connected to the 3rd field effect transistor, and the 4th diode current input is connected to the 6th field effect transistor;
Also be connected in parallel to the second field effect transistor and the 5th field effect transistor between above-mentioned the 3rd diode, the 3rd field effect transistor, the 6th field effect transistor, the 4th diode;
Above-mentioned combining inverter topology also includes the first diode and the second diode; This first diode current output is connected between the first field effect transistor and the first inductance, and current input terminal is connected to the second diode current output, and the second diode current input is connected between the 4th field effect transistor and the second inductance;
Above-mentioned the first diode current input also is connected to respectively between the first direct voltage source and the second direct voltage source, and between the second field effect transistor and the 5th field effect transistor;
Above-mentioned combining inverter topology also includes output filter capacitor and the 3rd inductance;
Above-mentioned output filter capacitor one terminal circuit connects the first diode current input, and other end circuit connects between described the 3rd field effect transistor and the 6th field effect transistor;
Above-mentioned the 3rd inductance one terminal circuit connects between the 3rd field effect transistor and the 6th field effect transistor, and other end circuit connects an end of AC power;
Above-mentioned AC power one terminal circuit connects the first diode current input, and the other end is connected with the 3rd inductive circuit.
The 3rd diode of the mixed source type interconnected inverter topology of above-mentioned electric current and voltage and the physical location of the 3rd field effect transistor can exchange.
The 4th diode of the mixed source type interconnected inverter topology of above-mentioned electric current and voltage and the physical location of the 6th field effect transistor can exchange.
The 3rd diode of the mixed source type interconnected inverter topology of above-mentioned electric current and voltage and the 3rd field effect transistor can adopt an inverse-impedance type gated transistor to replace.
The 4th diode of the mixed source type interconnected inverter topology of above-mentioned electric current and voltage and the 6th field effect transistor can adopt an inverse-impedance type gated transistor to replace.
The first field effect transistor of the mixed source type interconnected inverter topology of above-mentioned electric current and voltage, the second field effect transistor, the 4th field effect transistor and the 5th field effect transistor can adopt the high frequency power switching tube of any type to replace.
The 3rd field effect transistor and the 6th field effect transistor of the mixed source type interconnected inverter topology of above-mentioned electric current and voltage can adopt respectively brilliant circle pipe belt to replace.
The 3rd inductance of the mixed source type interconnected inverter topology of above-mentioned electric current and voltage can be replaced by power transformer leakage inductance or power circuit impedance.
The converter method of the mixed source type interconnected inverter topology of a kind of above-mentioned electric current and voltage is characterized in, this converter method comprises:
In the situation of DC input voitage higher than the absolute value of grid ac voltage of the first direct voltage source and the second direct voltage source, during positive half cycle, the 3rd field effect transistor is often opened, the first field effect transistor high-frequency work, the second field effect transistor, the 4th field effect transistor, the 5th field effect transistor and the 6th field effect transistor are closed; During negative half period, the 6th field effect transistor is often opened, the 4th field effect transistor high-frequency work, and the first field effect transistor, the second field effect transistor, the 3rd field effect transistor and the 5th field effect transistor are closed;
When the first direct voltage source and the second direct voltage source DC input voitage in the situation lower than the absolute value of grid ac voltage, during positive half cycle, the first field effect transistor and the 3rd field effect transistor are often opened, the second field effect transistor high-frequency work, the 4th field effect transistor, the 5th field effect transistor and the 6th field effect transistor are closed; During negative half period, the 4th field effect transistor and the 6th field effect transistor are often opened, the 5th field effect transistor high-frequency work, and the first field effect transistor, the second field effect transistor and the 3rd field effect transistor are closed.
The inverter of the mixed source type interconnected inverter topological sum prior art of electric current and voltage of the present invention is compared, its advantage is, the present invention is minimum with respect to the pressure drop of the various inverter power loop inductance of tradition, when half of input direct voltage during higher than the absolute value of the instantaneous value of alternating voltage, this topological equivalent electric circuit is the voltage source inverter that adopts the LCL filter, is exactly the current source inverter that adopts CL filtering on the contrary;
The present invention can adopt full field effect transistor (MOSFET) as switching device, and conduction loss can be very little; Whenever only have the one-level circuit working at the high frequency state, switching loss is little; Thereby can under high frequency situations, keep high efficiency.
Description of drawings
Fig. 1 is the circuit diagram of prior art voltage source combining inverter topology;
Fig. 2 is the circuit diagram of prior art current source combining inverter topology;
Fig. 3 is the circuit diagram of prior art Z-source inverter topology;
Fig. 4 is the circuit diagram of prior art Natural Soft-Switching inverter topology;
Fig. 5 is the circuit diagram of the compound inverter of prior art two-stage type timesharing;
Fig. 6 is that the BOOST(of the compound inverter of two-stage type timesharing boosts) working state figure;
Fig. 7 is the BUCK(step-down of the compound inverter of two-stage type timesharing) working state figure;
Fig. 8 is the circuit diagram of three grades of compound inverters of formula timesharing of prior art;
Fig. 9 is the BOOST working state figure of three grades of compound inverters of formula timesharing;
Figure 10 is the BUCK working state figure of three grades of compound inverters of formula timesharing;
Figure 11 is the circuit diagram of the embodiment one of the mixed source type interconnected inverter topology of electric current and voltage of the present invention;
Figure 12 is the fast-changing oscillogram of given value of current of the mixed source type interconnected inverter topology of electric current and voltage of the present invention;
Figure 13 is the oscillogram of the line voltage sudden change of the mixed source type interconnected inverter topology of electric current and voltage of the present invention;
Figure 14 is the circuit diagram of the embodiment two of the mixed source type interconnected inverter topology of electric current and voltage of the present invention;
Figure 15 is the circuit diagram of the embodiment three of the mixed source type interconnected inverter topology of electric current and voltage of the present invention.
Embodiment
Below in conjunction with accompanying drawing, further illustrate specific embodiments of the invention.
As shown in figure 11, be the embodiment one of the mixed source type interconnected inverter topology of electric current and voltage of the present invention, this embodiment one discloses a kind of combining inverter topology of non-delimitation order phase voltage current source.
This combining inverter topology comprises: the first direct voltage source E that loop connects
1, the first field effect transistor (MOSFET) S
1, the first inductance L
P, the 3rd diode D
3, the 3rd field effect transistor S
3, the 6th field effect transistor S
6, the 4th diode D
4, the second inductance L
N, the 4th field effect transistor S
4With the second direct voltage source E
2Wherein, the 3rd diode D
3Current output terminal be connected to the 3rd field effect transistor S
3, and the 4th diode D
4Current input terminal be connected to the 6th field effect transistor S
6
At the 3rd diode D
3, the 3rd field effect transistor S
3, the 6th field effect transistor S
6, the 4th diode D
4Between also be connected in parallel to the second field effect transistor S
2With the 5th field effect transistor S
5
A kind of first diode D that also includes of this embodiment
1With the second diode D
2This first diode D
1Current output terminal be connected to the first field effect transistor S
1With the first inductance L
PBetween, the first diode D
1Current input terminal be connected to the second diode D
2Current output terminal, the second diode D
2Current input terminal be connected to the 4th field effect transistor S
4With the second inductance L
NBetween.
The first diode D in the present embodiment one
1Current input terminal connect an end of AC power, the first diode D
1Current input terminal also be connected to the first direct voltage source E
1With the second direct voltage source E
2Between, the first diode D
1Current input terminal also be connected to the second field effect transistor S
2With the 5th field effect transistor S
5Between.
The described combining inverter topology of embodiment one also includes output filter capacitor C and the 3rd inductance L.
The terminal circuit of output filter capacitor C connects the first diode D
1Current input terminal, other end circuit is connected to the 3rd field effect transistor S
3With the 6th field effect transistor S
6Between.
The 3rd inductance L one terminal circuit connects the 3rd field effect transistor S
3With the 6th field effect transistor S
6Between, other end circuit is connected to AC power V
gAn end.
AC power V
gOne terminal circuit connects the first diode D
1Current input terminal, the other end is connected with the 3rd inductance L circuit.
The 3rd diode D in the present embodiment one
3With the 3rd field effect transistor S
3Physical location can exchange.The 4th diode D
4With the 6th field effect transistor S
6Physical location can exchange.The 3rd diode D
3With the 3rd field effect transistor S
3Can adopt an inverse-impedance type insulated gate bipolar transistor (RBIGBT) to replace.The 4th diode D
4With the 6th field effect transistor S
6Can adopt an inverse-impedance type insulated gate bipolar transistor (RBIGBT) to replace.The first field effect transistor S
1, the second field effect transistor S
2, the 4th field effect transistor S
4With the 5th field effect transistor S
5Can adopt the general high frequency power switching tube of any type to replace.The 3rd field effect transistor S
3With the 6th field effect transistor S
6Can adopt respectively brilliant circle pipe belt to replace.The 3rd inductance can be replaced by power transformer leakage inductance or power circuit impedance.
The converter method of the embodiment one of the mixed source type interconnected inverter topology of above-mentioned electric current and voltage is as follows, and its converter method comprises:
As the first direct voltage source E
1With the second direct voltage source E
2The situation of DC input voitage higher than the absolute value of grid ac voltage under, during positive half cycle, the 3rd field effect transistor S
3Often open the first field effect transistor S
1High-frequency work, the second field effect transistor S
2, the 4th field effect transistor S
4, the 5th field effect transistor S
5With the 6th field effect transistor S
6Close.During negative half period, the 6th field effect transistor S
6Often open the 4th field effect transistor S
4High-frequency work, the first field effect transistor S
1, the second field effect transistor S
2, the 3rd field effect transistor S
3With the 5th field effect transistor S
5Close.
As the first direct voltage source E
1With the second direct voltage source E
2In the situation of DC input voitage lower than the absolute value of grid ac voltage, during positive half cycle, the first field effect transistor S
1With the 3rd field effect transistor S
3Often open the second field effect transistor S
2High-frequency work, the 4th field effect transistor S
4, the 5th field effect transistor S
5With the 6th field effect transistor S
6Close.The 4th field effect transistor S during negative half period
4With the 6th field effect transistor S
6Often open the 5th field effect transistor S
5High-frequency work, the first field effect transistor S
1, the second field effect transistor S
2With the 3rd field effect transistor S
3Close.
As Figure 12 and in conjunction with shown in Figure 13, simulation waveform in the time of for above-described embodiment one given value of current and line voltage sudden change, electric current and voltage of the present invention mixes the good dynamic of source type interconnected inverter topology as can be seen from the figure: under the electric current rapid jumping, its voltage can still keep stable state.And when line voltage suddenlyd change, its electric current also can keep stable state.
As shown in figure 14, be the embodiment two of the mixed source type interconnected inverter topology of electric current and voltage of the present invention, this embodiment two discloses the combining inverter topology of another kind of non-delimitation order phase voltage current source.
These embodiment two combining inverter topologys comprise: the first direct voltage source E that loop connects
1, the first field effect transistor S
1, the first inductance L
P, the 3rd diode D
3, the 3rd field effect transistor S
3, the 6th field effect transistor S
6, the 4th diode D
4, the second inductance L
N, the 4th field effect transistor S
4With the second direct voltage source E
2Wherein, the 3rd diode D
3Current output terminal be connected to the 3rd field effect transistor S
3, and the 4th diode D
4Current input terminal be connected to the 6th field effect transistor S
6
At the 3rd diode D
3, the 3rd field effect transistor S
3, the 6th field effect transistor S
6, the 4th diode D
4Between also be connected in parallel to the second field effect transistor S
2, the 5th field effect transistor S
5, the 6th diode D
6With the 5th diode D
5The 6th diode D wherein
6With the second field effect transistor S
2Be in series and be combined to form a reverse blocking switching tube, the 5th diode D
5With the 5th field effect transistor S
5Be in series and be combined to form a reverse blocking switching tube.The tie point of two combination reverse blocking switching tubes, the tie point of both DC power supply E1, E2, the first diode D
1With the second diode D
2Tie point link together.
In the present embodiment two, the 5th diode D
5With the 5th field effect transistor S
5Physical location can exchange, the 6th diode D
6With the second field effect transistor S
2Physical location can exchange, the 3rd diode D
3With the 3rd field effect transistor S
3Physical location can exchange, the 4th diode D
4With the 6th field effect transistor S
6Physical location can exchange.
Also include the first diode D in this embodiment two
1With the second diode D
2This first diode D
1Current output terminal be connected to the first field effect transistor S
1With the first inductance L
PBetween, the first diode D
1Current input terminal be connected to the second diode D
2Current output terminal, the second diode D
2Current input terminal be connected to the 4th field effect transistor S
4With the second inductance L
NBetween.
The combining inverter topology also comprises output filter capacitor C and the 3rd inductance L.The terminal circuit of output filter capacitor C connects the first diode D
1Current input terminal, other end circuit is connected to the 3rd field effect transistor S
3With the 6th field effect transistor S
6Between.The 3rd inductance L one terminal circuit connects the 3rd field effect transistor S
3With the 6th field effect transistor S
6Between, other end circuit is connected to AC power V
gAn end.AC power V
gOne terminal circuit connects the first diode D
1Current input terminal, the other end is connected with the 3rd inductance L circuit.
In the present embodiment two, the 3rd diode D
3With the 3rd field effect transistor S
3Can adopt an inverse-impedance type insulated gate bipolar transistor to replace.The 4th diode D
4With the 6th field effect transistor S
6Can adopt an inverse-impedance type insulated gate bipolar transistor to replace.The 6th diode D
6With the second field effect transistor S
2Can adopt an inverse-impedance type insulated gate bipolar transistor to replace.The 5th diode D
5With the 5th field effect transistor S
5Can adopt an inverse-impedance type insulated gate bipolar transistor to replace.The first field effect transistor S
1, the second field effect transistor S
2, the 4th field effect transistor S
4With the 5th field effect transistor S
5Can adopt the general high frequency power switching tube of any type to replace.The 3rd field effect transistor S
3With the 6th field effect transistor S
6Can adopt respectively brilliant circle pipe belt to replace.The 3rd inductance can be replaced by power transformer leakage inductance or power circuit impedance.
Can process harmonic wave and reactive power by the mixed source type interconnected inverter topology of the electric current and voltage of above-described embodiment two.
As shown in figure 15, be the embodiment three of the mixed source type interconnected inverter topology of electric current and voltage of the present invention, this embodiment three discloses the combining inverter topology in a kind of non-isolation three-phase voltage current source.
The combining inverter topology in this three-phase voltage current source comprises the combining inverter topology of three single-phase voltage current sources, and the input of the combining inverter topology of these three single-phase voltage current sources connects same DC source, and the output three-phase alternating current.
Single-phase voltage current source combining inverter topology in the present embodiment three is identical with the non-delimitation order phase voltage current source combining inverter topological structure in embodiment one, wherein only for three single-phase voltage current source combining inverter topologys are connected same direct current input, with two DC source (first direct voltage source E of non-delimitation order phase voltage current source combining inverter topology in embodiment one
1With the second direct voltage source E
2) replace with two electric capacity, and with the first field effect transistor S of three single-phase voltage current source combining inverter topologys
1Circuit links together, and jointly is connected to same DC source.
By the disclosed combining inverter of above-described embodiment three, disclosed single-phase topology in embodiment one and embodiment two is extended to the three-phase topology.
Although content of the present invention has been done detailed introduction by above preferred embodiment, will be appreciated that above-mentioned description should not be considered to limitation of the present invention.After those skilled in the art have read foregoing, for multiple modification of the present invention with to substitute will be all apparent.Therefore, protection scope of the present invention should be limited to the appended claims.
Claims (9)
1. the mixed source type interconnected inverter topology of electric current and voltage, is characterized in that, this combining inverter topology comprises: the first direct voltage source (E that loop connects
1), the first field effect transistor (S
1), the first inductance (L
P), the 3rd diode (D
3), the 3rd field effect transistor (S
3), the 6th field effect transistor (S
6), the 4th diode (D
4), the second inductance (L
N), the 4th field effect transistor (S
4) and the second direct voltage source (E
2);
Described the 3rd diode (D
3) current output terminal is connected to the 3rd field effect transistor (S
3), the 4th diode (D
4) current input terminal is connected to the 6th field effect transistor (S
6);
Described the 3rd diode (D
3), the 3rd field effect transistor (S
3), the 6th field effect transistor (S
6), the 4th diode (D
4) between also be connected in parallel to the second field effect transistor (S
2) and the 5th field effect transistor (S
5);
Described combining inverter topology also includes the first diode (D
1) and the second diode (D
2); This first diode (D
1) current output terminal is connected to the first field effect transistor (S
1) and the first inductance (L
P) between, current input terminal is connected to the second diode (D
2) current output terminal, the second diode (D
2) current input terminal is connected to the 4th field effect transistor (S
4) and the second inductance (L
N) between;
Described the first diode (D
1) current input terminal also is connected to respectively the first direct voltage source (E
1) and the second direct voltage source (E
2) between, and the second field effect transistor (S
2) and the 5th field effect transistor (S
5) between;
Described combining inverter topology also includes output filter capacitor (C) and the 3rd inductance (L);
Described output filter capacitor (C) terminal circuit connects described the first diode (D
1) current input terminal, other end circuit connects described the 3rd field effect transistor (S
3) and the 6th field effect transistor (S
6) between;
Described the 3rd inductance (L) terminal circuit connects described the 3rd field effect transistor (S
3) and the 6th field effect transistor (S
6) between, other end circuit connects AC power (V
g) an end;
Described AC power (V
g) terminal circuit connection first a diode (D
1) current input terminal, the other end is connected with the 3rd inductance (L) circuit.
2. the mixed source type interconnected inverter topology of electric current and voltage as claimed in claim 1, is characterized in that the 3rd diode (D of described combining inverter topology
3) and the 3rd field effect transistor (S
3) physical location can exchange.
3. the mixed source type interconnected inverter topology of electric current and voltage as claimed in claim 1, is characterized in that the 4th diode (D of described combining inverter topology
4) and the 6th field effect transistor (S
6) physical location can exchange.
4. the mixed source type interconnected inverter topology of electric current and voltage as claimed in claim 1, is characterized in that the 3rd diode (D of described combining inverter topology
3) and the 3rd field effect transistor (S
3) can adopt an inverse-impedance type insulated gate bipolar transistor to replace.
5. the mixed source type interconnected inverter topology of electric current and voltage as claimed in claim 1, is characterized in that the 4th diode (D of described combining inverter topology
4) and the 6th field effect transistor (S
6) can adopt an inverse-impedance type insulated gate bipolar transistor to replace.
6. the mixed source type interconnected inverter topology of electric current and voltage as claimed in claim 1, is characterized in that the first field effect transistor (S of described combining inverter topology
1), the second field effect transistor (S
2), the 4th field effect transistor (S
4) and the 5th field effect transistor (S
5) can adopt the high frequency power switching tube of any type to replace.
7. the mixed source type interconnected inverter topology of electric current and voltage as claimed in claim 1, is characterized in that the 3rd field effect transistor (S of described combining inverter topology
3) and the 6th field effect transistor (S
6) can adopt respectively brilliant circle pipe belt to replace.
8. the mixed source type interconnected inverter topology of electric current and voltage as claimed in claim 1, is characterized in that, described the 3rd inductance (L) can be replaced by power transformer leakage inductance or power circuit impedance.
9. the converter method of the mixed source type interconnected inverter topology of electric current and voltage as claimed in claim 1, is characterized in that, this converter method comprises:
As the first direct voltage source (E
1) and the second direct voltage source (E
2) the situation of DC input voitage higher than the absolute value of grid ac voltage under, the 3rd field effect transistor (S during positive half cycle
3) often open the first field effect transistor (S
1) high-frequency work, the second field effect transistor (S
2), the 4th field effect transistor (S
4), the 5th field effect transistor (S
5) and the 6th field effect transistor (S
6) close; The 6th field effect transistor (S during negative half period
6) often open the 4th field effect transistor (S
4) high-frequency work, the first field effect transistor (S
1), the second field effect transistor (S
2), the 3rd field effect transistor (S
3) and the 5th field effect transistor (S
5) close;
As the first direct voltage source (E
1) and the second direct voltage source (E
2) in the situation of DC input voitage lower than the absolute value of grid ac voltage, the first field effect transistor (S during positive half cycle
1) and the 3rd field effect transistor (S
3) often open the second field effect transistor (S
2) high-frequency work, the 4th field effect transistor (S
4), the 5th field effect transistor (S
5) and the 6th field effect transistor (S
6) close; The 4th field effect transistor (S during negative half period
4) and the 6th field effect transistor (S
6) often open the 5th field effect transistor (S
5) high-frequency work, the first field effect transistor (S
1), the second field effect transistor (S
2) and the 3rd field effect transistor (S
3) close.
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| CN2013100691541A CN103107728A (en) | 2013-03-05 | 2013-03-05 | Voltage and current mixed source type grid-connected inverter topology |
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| CN105356784A (en) * | 2015-12-08 | 2016-02-24 | 上海海事大学 | Grid connected inverter with DC bus voltage balance function |
| CN105515041A (en) * | 2015-12-08 | 2016-04-20 | 上海海事大学 | Grid-connected inverter for providing active current and reactive current support for power grid |
| CN106374770A (en) * | 2016-10-28 | 2017-02-01 | 燕山大学 | Input and output common-ground boost-buck photovoltaic grid-connected inverter and control method thereof |
| CN107769592A (en) * | 2017-12-06 | 2018-03-06 | 上海海事大学 | A kind of both ends shape of the mouth as one speaks AC/DC current transformers based on coupling inductance |
| CN108418416A (en) * | 2018-03-19 | 2018-08-17 | 盐城工学院 | A kind of cooperative control method of Partial Power processing boosting unit and gird-connected inverter |
| CN108712096A (en) * | 2018-06-08 | 2018-10-26 | 广州视源电子科技股份有限公司 | Boost inverter circuit, method and converter |
| CN111342693A (en) * | 2020-02-18 | 2020-06-26 | 上海海事大学 | Boost-buck photovoltaic grid-connected inverter |
| CN113765346A (en) * | 2021-08-30 | 2021-12-07 | 河北科技大学 | Current source grid-connected inverter based on transformer filtering and double-carrier modulation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105356784A (en) * | 2015-12-08 | 2016-02-24 | 上海海事大学 | Grid connected inverter with DC bus voltage balance function |
| CN105515041A (en) * | 2015-12-08 | 2016-04-20 | 上海海事大学 | Grid-connected inverter for providing active current and reactive current support for power grid |
| CN105356784B (en) * | 2015-12-08 | 2017-10-20 | 上海海事大学 | A kind of combining inverter with DC bus-bar voltage equilibrium function |
| CN105515041B (en) * | 2015-12-08 | 2017-12-22 | 上海海事大学 | The combining inverter of active and reactive current support is provided for power network |
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| CN107769592A (en) * | 2017-12-06 | 2018-03-06 | 上海海事大学 | A kind of both ends shape of the mouth as one speaks AC/DC current transformers based on coupling inductance |
| CN108418416A (en) * | 2018-03-19 | 2018-08-17 | 盐城工学院 | A kind of cooperative control method of Partial Power processing boosting unit and gird-connected inverter |
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| CN111342693A (en) * | 2020-02-18 | 2020-06-26 | 上海海事大学 | Boost-buck photovoltaic grid-connected inverter |
| CN111342693B (en) * | 2020-02-18 | 2021-07-13 | 上海海事大学 | Boost-buck photovoltaic grid-connected inverter |
| CN113765346A (en) * | 2021-08-30 | 2021-12-07 | 河北科技大学 | Current source grid-connected inverter based on transformer filtering and double-carrier modulation method thereof |
| CN113765346B (en) * | 2021-08-30 | 2024-03-26 | 河北科技大学 | Current source grid-connected inverter based on transformer filtering and dual-carrier modulation method thereof |
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