CN102394553A - Modulation method and device of double-Buck circuit - Google Patents
Modulation method and device of double-Buck circuit Download PDFInfo
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- CN102394553A CN102394553A CN2011103795312A CN201110379531A CN102394553A CN 102394553 A CN102394553 A CN 102394553A CN 2011103795312 A CN2011103795312 A CN 2011103795312A CN 201110379531 A CN201110379531 A CN 201110379531A CN 102394553 A CN102394553 A CN 102394553A
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Abstract
The invention provides a modulation method and device of a double-Buck circuit. According to the invention, a mode C and a mode D present in the first half period and second half period of a modulation wave at intervals, which can effectively offset the voltage fluctuation generated on a first capacitor C1 and a second capacitor C2 in the double-Buck circuit when in the mode C and the mode D; and the continuous discharge and charge times of C1 and C2 as well as L1 and L2 are short, thereby greatly reducing the end voltage fluctuation of C1 and C2 as well as L1 and L2, reducing the ripple wave of the output voltage and improving output wave forms. In the prior art, the mode C continuously presents in the first half period of the modulation wave, and the mode D continuously presents in the second half period of the modulation wave, so as not to well offset the fluctuated voltages accumulated on C1 and C2.
Description
Technical field
The present invention relates to electric and electronic technical field, particularly the modulator approach of a kind of pair of Buck circuit and device.
Background technology
In the photovoltaic combining inverter, it is common circuit topology that two Buck circuit are added the power frequency commutation circuit.Referring to Fig. 1, this figure is the circuit topology figure of photovoltaic inversion of the prior art.
There are four kinds of operation modes in two Buck circuit 200 shown in Figure 1.Introduce one by one below in conjunction with accompanying drawing.
Referring to Fig. 2 a, this figure is first kind of operation mode sketch map of two Buck circuit.
First switch transistor T 1 and second switch pipe T2 conducting simultaneously.
First capacitor C 1 is through the C1-T1-L1-C3-C1 discharge, and first inductance L 1 is charged; Second capacitor C 2 is through the C2-C4-L2-T2-C2 discharge, and second inductance L 2 is charged.
Under this operation mode, T1 and T2 conducting is simultaneously supplied power to load-side when DC power supply charges with C2 to C1 always.Therefore, can think that the voltage of DC power supply is constant, the mid point electric current of C1 and C2 is zero, and it is constant that the voltage of C1 and C2 keeps, and can not squint.
Referring to Fig. 2 b, this figure is second kind of operation mode sketch map of two Buck circuit.
T1, T2 ends simultaneously.
L1 discharges through the L1-C3-D1-L1 afterflow, the C1 charging; L2 discharges through the L2-D2-C4-L2 afterflow, the C2 charging.
Under this operation mode, T1 and T2 end simultaneously, and C1 and C2 do not supply power to load-side, therefore, can think that the mid point electric current of C1 and C2 is zero, and it is constant that the voltage of C1 and C2 keeps, and can not squint.
Referring to Fig. 2 c, this figure is the third operation mode sketch map of two Buck circuit.
Under this operation mode, the T1 conducting, T2 ends.To load discharge, the mid point of C1 and C2 is for flowing to load current through T1, L1, C3, C4 and D2 for C1, and therefore, C1 discharges, the C2 charging.The voltage of C1 and C2 squints like this.
The output voltage V of two buck circuit
BusEqual the terminal voltage of C1, i.e. V
Bus=u
C1
Referring to Fig. 2 d, this figure is the 4th a kind of operation mode sketch map of two Buck circuit.
T1 ends, the T2 conducting.
Under this operation mode, T1 ends, the T2 conducting.C2 discharges to load through D1, L1, C3, C4 and T2, and the mid point of C1 and C2 is for flowing out load current, and therefore, C1 charges, the C2 discharge.Like this, the voltage of C1 and C2 squints.
The output voltage V of two buck circuit
BusEqual the terminal voltage of C2, i.e. V
Bus=u
C2
More than four kinds of operation modes be defined as A, B, C and four kinds of operation modes of D respectively, as seen from the above analysis, the voltage fluctuation on C1 and the C2 is produced down by C and these two kinds of operation modes of D.
Introduce the modulator approach of two Buck circuit in the prior art below.
Referring to Fig. 3, this figure is the schematic diagram of the modulator approach of two Buck circuit in the prior art.
Fig. 3 shows: t
0-t
4Time period, A, B mode and C mode alternate conduction are according to each time period among the figure, i.e. t
0-t
1, t
1-t
2, t
2-t
3, t
3-t
4Because A and B mode can not cause the voltage fluctuation of C1 and C2.Therefore, t
0-t
4Time period, C mode makes C1 be in the continuous discharge state basically, and the last voltage of C1 descends, and C2 is in lasting charged state, and the last voltage of C2 rises.
In like manner, t
4-t
8Time period, the alternate conduction of A, B mode and D mode is according to each time period among the figure, i.e. t
4-t
5, t
5-t
6, t
6-t
7, t
7-t
8Because A and B mode can not cause the voltage fluctuation of C1 and C2.Therefore, t
4-t
8Time period, D mode makes C2 be in the continuous discharge state basically, and the last voltage of C2 descends, and C1 is in lasting charged state, and the last voltage of C1 rises.
Analyze the shortcoming that modulator approach of the prior art exists below in conjunction with Fig. 3 and Fig. 4.
Fig. 4 be existing two Buck circuit modulator approach corresponding first capacitor C1 discharge and recharge sketch map.Because charge status and C1 on the C2 are similar, therefore, only are that example describes with C1.
Analyzed among Fig. 3 at t
0-t
4Time period, C mode makes C1 be in the continuous discharge state basically, and the last voltage of C1 descends, and is as shown in Figure 4, the linearly downward trend of voltage that C1 is last.t
4-t
8Time period, D mode makes C1 be in lasting charged state, and the last voltage of C1 rises.As shown in Figure 4, the last voltage of C1 is ascendant trend linearly.Since in one-period T, the energy maintenance conservation that C1 is last, therefore the electric weight of charging and discharge should be identical, therefore, among Fig. 4, the above leg-of-mutton area of X axle should equate with the following leg-of-mutton area of X axle.
The time of discharging and recharging long in this modulator approach shown in Figure 3 will cause the voltage undulation of C1, C2 and L1, inductance L 2 bigger, cause the ripple current of L1, L2 bigger, and loss is bigger; And it is bigger to work as the DC side current fluctuation, and (THD, Total Harmonic Distortion) is bigger for the total harmonic distortion of the modulating wave of grid-connected current, causes sinusoidal degree relatively poor.
Summary of the invention
The technical problem that the present invention will solve provides the modulator approach and the device of a kind of pair of Buck circuit, and that can shorten electric capacity and inductance continues the time of discharging and recharging, and reduces voltage fluctuation and ripple current.
The present invention provides the modulator approach of a kind of pair of Buck circuit, and the voltage of first electric capacity in two Buck circuit and the common port of second electric capacity is half Vdc/2 of direct voltage Vdc;
Modulating wave has three zero crossings in one-period T, be designated as t respectively
0, t
4And t
8t
4Mid point for cycle T; Obtain this three zero crossing t
0, t
4And t
8
With t
0Postpone 1/4 mid point t that cycle T then was first half period
2With t
0Postpone 3/4 mid point t that cycle T then was second half period
6
The straight line that the waveform of first half period of modulating wave and the waveform of second half period are corresponding with Vdc/2 respectively has two intersection points, and two intersection point time corresponding of the straight line that the waveform of note first half period of modulating wave is corresponding with Vdc/2 are respectively t
1And t
3, two intersection point time corresponding of the straight line that the waveform of note second half period of modulating wave is corresponding with Vdc/2 are respectively t
5And t
7
t
0-t
1Time period, first switching tube in the two Buck circuit of control is according to sinusoid pulse width modulation modulation conducting and shutoff, and the second switch pipe in the two Buck circuit of control ends;
t
1-t
2Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control the conducting of said second switch pipe;
t
2-t
3Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control the said first switching tube conducting;
t
3-t
4Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control said first switching tube and end;
t
4-t
5Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control said first switching tube and end;
t
5-t
6Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control the said first switching tube conducting;
t
6-t
7Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control the conducting of said second switch pipe;
t
7-t
8Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control said second switch pipe and end.
Preferably, said first switching tube is according to sinusoid pulse width modulation modulation conducting and shutoff, and said second switch pipe is disconnected with pipe according to sinusoid pulse width modulation modulation conducting, is specially:
t
0-t
1Time period, the conducting sequential of said first switching tube compares generation by the said modulating wave and second triangular wave, the first switching tube conducting during of said modulating wave greater than second triangular wave, on the contrary end;
t
1-t
2Time period, the conducting sequential of said first switching tube compares generation by the said modulating wave and first triangular wave, the first switching tube conducting during of said modulating wave greater than said first triangular wave, on the contrary end;
t
6-t
7Time period, the conducting sequential of said first switching tube and said t
1-t
2The conducting time sequence control of first switching tube is identical during the time period;
t
7-t
8Time period, the conducting sequential of said first switching tube and said t
0-t
1The conducting time sequence control of first switching tube is identical during the time period;
t
2-t
3Time period, the conducting sequential of said second switch pipe compares generation by said modulating wave and said first triangular wave, and said modulating wave is the conducting of second switch pipe during greater than said first triangular wave, otherwise ends;
t
3-t
4Time period, the conducting sequential of said second switch pipe compares generation by said modulating wave and said second triangular wave, and said modulating wave is the conducting of second switch pipe during greater than said second triangular wave, otherwise ends;
t
4-t
5Time period, the conducting sequential of said second switch pipe and said t
3-t
4The conducting time sequence control of second switch pipe is identical during the time period;
t
5-t
6Time period, the conducting sequential of said second switch pipe and said t
2-t
3The conducting time sequence control of second switch pipe is identical during the time period;
Said first triangular wave, second triangular wave have identical frequency and identical amplitude, and the trough of said first triangular wave equals the crest of second triangular wave.
Preferably, said cycle T is determined by mains frequency.
Preferably, when mains frequency was 50Hz, said cycle T was 20ms.
The present invention also provides the modulating device of a kind of pair of Buck circuit, comprising: the time is confirmed unit and control unit;
The said time is confirmed the unit, is used for confirming the time period of modulation; Be specially: modulating wave has three zero crossings in one-period T, be designated as t respectively
0, t
4And t
8t
4Mid point for cycle T; Obtain this three zero crossing t
0, t
4And t
8With t
0Postpone 1/4 mid point t that cycle T then was first half period
2With t
0Postpone 3/4 mid point t that cycle T then was second half period
6The straight line that the waveform of first half period of modulating wave and the waveform of second half period are corresponding with Vdc/2 respectively has two intersection points, and two intersection point time corresponding of the straight line that the waveform of note first half period of modulating wave is corresponding with Vdc/2 are respectively t
1And t
3, two intersection point time corresponding of the straight line that the waveform of note second half period of modulating wave is corresponding with Vdc/2 are respectively t
5And t
7
Said control unit is used for controlling first switching tube of two Buck circuit and the on off state of second switch pipe, is specially: t
0-t
1Time period, first switching tube in the two Buck circuit of control is according to sinusoid pulse width modulation modulation conducting and shutoff, and the second switch pipe in the two Buck circuit of control ends; t
1-t
2Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control the conducting of said second switch pipe; t
2-t
3Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control the said first switching tube conducting; t
3-t
4Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control said first switching tube and end; t
4-t
5Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control said first switching tube and end; t
5-t
6Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control the said first switching tube conducting; t
6-t
7Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control the conducting of said second switch pipe; t
7-t
8Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control said second switch pipe and end.
6, the modulating device of according to claim 5 pair of Buck circuit is characterized in that, said first switching tube is according to sinusoid pulse width modulation modulation conducting and shutoff, and said second switch pipe is disconnected with pipe according to sinusoid pulse width modulation modulation conducting, is specially:
t
0-t
1Time period, the conducting sequential of said first switching tube compares generation by the said modulating wave and second triangular wave, the first switching tube conducting during of said modulating wave greater than second triangular wave, on the contrary end;
t
1-t
2Time period, the conducting sequential of said first switching tube compares generation by the said modulating wave and first triangular wave, the first switching tube conducting during of said modulating wave greater than said first triangular wave, on the contrary end;
t
2-t
3Time period, the conducting sequential of said second switch pipe compares generation by said modulating wave and said first triangular wave, and said modulating wave is the conducting of second switch pipe during greater than said first triangular wave, otherwise ends;
t
3-t
4Time period, the conducting sequential of said second switch pipe compares generation by said modulating wave and said second triangular wave, and said modulating wave is the conducting of second switch pipe during greater than said second triangular wave, otherwise ends;
t
4-t
5Time period, the conducting sequential of said second switch pipe and said t
3-t
4The conducting time sequence control of second switch pipe is identical during the time period;
t
5-t
6Time period, the conducting sequential of said second switch pipe and said t
2-t
3The conducting time sequence control of second switch pipe is identical during the time period;
t
6-t
7Time period, the conducting sequential of said first switching tube and said t
1-t
2The conducting time sequence control of first switching tube is identical during the time period;
t
7-t
8Time period, the conducting sequential of said first switching tube and said t
0-t
1The conducting time sequence control of first switching tube is identical during the time period; Said first triangular wave, second triangular wave have identical frequency and identical amplitude, and the trough of said first triangular wave equals the crest of second triangular wave.
Preferably, said cycle T is determined by mains frequency.
Preferably, when mains frequency was 50Hz, said cycle T was 20ms.
Compared with prior art, the present invention has the following advantages:
The modulator approach and the device of two Buck circuit that the embodiment of the invention provides are that mode C and mode D appear in the compartment of terrain in first half period and second half period of modulating wave, and C1 and C2 go up the voltage fluctuation that produces in the time of can effectively offsetting mode C and mode D like this.And the continuous discharge of C1, C2 and L1, L2 and lasting charging interval are all shorter,, reduce the voltage undulation of C1, C2 and L1, L2 greatly, thereby reduced the ripple of output voltage, improved output waveform.And continue to occur mode C in first half period of modulating wave in the prior art, and continue to occur mode D in second half period of modulating wave, can not offset the fluctuation voltage that C1 and C2 go up accumulation so preferably.
Description of drawings
Fig. 1 is the circuit topology figure of photovoltaic inversion of the prior art;
Fig. 2 a is first kind of operation mode sketch map of two Buck circuit;
Fig. 2 b is second kind of operation mode sketch map of two Buck circuit;
Fig. 2 c is the third operation mode sketch map of two Buck circuit;
Fig. 2 d is the 4th a kind of operation mode sketch map of two Buck circuit;
Fig. 3 is the schematic diagram of the modulator approach of two Buck circuit in the prior art;
Fig. 4 is the sketch map that discharges and recharges of modulator approach corresponding first capacitor of the prior art;
Fig. 5 is the schematic diagram of the modulator approach of provided by the invention pair of Buck circuit;
Fig. 6 is the win sequential chart of switching tube and second switch pipe of modulator approach correspondence provided by the invention;
Fig. 7 is the sketch map that discharges and recharges of modulator approach corresponding first capacitor provided by the invention;
Fig. 8 is the structure chart of the modulating device of provided by the invention pair of Buck circuit.
Embodiment
For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, does detailed explanation below in conjunction with the accompanying drawing specific embodiments of the invention.
Referring to Fig. 5, this figure is the schematic diagram of the modulator approach of provided by the invention pair of Buck circuit.
This embodiment can combine A, B, C and four kinds of mode sketch mapes of D of two Buck circuit of Fig. 2 a-Fig. 2 d to analyze.
The instantaneous value of absolute value of voltage of being incorporated into the power networks among Fig. 5 is u, and the instantaneous value of grid-connected current is i.
The modulator approach of two Buck circuit that present embodiment provides, the voltage of first capacitor C 1 in two Buck circuit and the common port of second capacitor C 2 is half Vdc/2 of direct voltage Vdc;
Modulating wave has three zero crossings in one-period T, be designated as t respectively
0, t
4And t
8t
4Mid point for cycle T; Obtain this three zero crossing t
0, t
4And t
8
With t
0Postpone 1/4 mid point t that cycle T then was first half period
2With t
0Postpone 3/4 mid point t that cycle T then was second half period
6
The straight line that the waveform of first half period of modulating wave and the waveform of second half period are corresponding with Vdc/2 respectively has two intersection points, and two intersection point time corresponding of the straight line that the waveform of note first half period of modulating wave is corresponding with Vdc/2 are respectively t
1And t
3, two intersection point time corresponding of the straight line that the waveform of note second half period of modulating wave is corresponding with Vdc/2 are respectively t
5And t
7
t
0-t
1Time period, first switch transistor T 1 in the two Buck circuit of control is according to sinusoid pulse width modulation modulation conducting and shutoff, and the second switch pipe T2 in the two Buck circuit of control ends;
t
1-t
2Time period, control said first switch transistor T 1 according to sinusoid pulse width modulation modulation conducting and shutoff, control said second switch pipe T2 conducting;
t
2-t
3Time period, control said second switch pipe T2 according to sinusoid pulse width modulation modulation conducting and shutoff, control 1 conducting of said first switch transistor T;
t
3-t
4Time period, control said second switch pipe T2 according to sinusoid pulse width modulation modulation conducting and shutoff, control said first switch transistor T 1 and end;
t
4-t
5Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control said first switching tube and end;
t
5-t
6Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control the said first switching tube conducting;
t
6-t
7Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control the conducting of said second switch pipe;
t
7-t
8Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control said second switch pipe and end.
Need to prove; Control T1 or T2 are according to sinusoid pulse width modulation modulation conducting and shutoff; Be to realize, for example, drive pulse signal be provided for the control end of T1 by drive pulse signal; Then T1 conducting in the high level time section of drive pulse signal, then T1 then turn-offs in the low level time section of drive pulse signal.The conducting of T2 and shutoff situation are similar.This drive pulse signal is modulated out according to sinusoid pulse width modulation.
The drive pulse signal of T1 and T2 is as shown in Figure 6.
When the drive pulse signal high-low level of T1 replaces, the conducting of corresponding T1 and shutoff, during high level, the T1 conducting, during low level, T1 turn-offs.When the drive pulse signal of T1 continued low level, promptly T1 kept turn-offing; When the drive pulse signal of T1 continued high level, promptly T1 kept conducting.
As shown in Figure 6, at t
0-t
2Time period, the drive pulse signal high-low level of T1 replaces, therefore, and corresponding T1 conducting and shutoff.At t
2-t
3Time period, the drive pulse signal of T1 keeps high level, and therefore, T1 keeps conducting.At t
3-t
4Time period, the drive pulse signal of T1 keeps low level, and therefore, T1 keeps turn-offing.The other times section is similar, repeats no more at this.
In addition, the conducting of T2 and shutoff situation and T1's is similar, specifically can repeat no more at this referring to the drive pulse signal of Fig. 6.
Said first switch transistor T 1 is according to sinusoid pulse width modulation modulation conducting and shutoff, and said second switch pipe T2 is disconnected with pipe according to sinusoid pulse width modulation modulation conducting, is specially:
t
0-t
1Time period, the conducting sequential of said first switch transistor T 1 compares generation by the said modulating wave Z and the second triangular wave B, and said modulating wave Z is 1 conducting of first switch transistor T during greater than the second triangular wave B, otherwise ends;
t
1-t
2Time period, the conducting sequential of said first switch transistor T 1 compares generation by the said modulating wave Z and the first triangular wave A, and said modulating wave Z is 1 conducting of first switch transistor T during greater than the said first triangular wave A, otherwise ends;
t
2-t
3Time period, the conducting sequential of said second switch pipe T2 compares generation by said modulating wave Z and the said first triangular wave A, and said modulating wave Z is second switch pipe T2 conducting during greater than the said first triangular wave A, otherwise ends;
t
3-t
4Time period, the conducting sequential of said second switch pipe T2 compares generation by said modulating wave Z and the said second triangular wave B, and said modulating wave Z is second switch pipe T2 conducting during greater than the said second triangular wave B, otherwise ends;
t
4-t
5Time period, the conducting sequential of said second switch pipe T2 and said t
3-t
4The conducting time sequence control of second switch pipe is identical during the time period; That is: second switch pipe T2 conducting when said modulating wave Z is greater than the said second triangular wave B, on the contrary end;
t
5-t
6Time period, the conducting sequential of said second switch pipe and said t
2-t
3The conducting time sequence control of second switch pipe is identical during the time period; That is: second switch pipe T2 conducting when said modulating wave Z is greater than the said first triangular wave A, on the contrary end;
t
6-t
7Time period, the conducting sequential of said first switch transistor T 1 and said t
1-t
2The conducting time sequence control of first switch transistor T 1 is identical during the time period; That is: first switch transistor T, 1 conducting when said modulating wave Z is greater than the said first triangular wave A, on the contrary end; Specifically referring to the sequential chart of Fig. 6.
t
7-t
8Time period, the conducting sequential of said first switch transistor T 1 and said t
0-t
1The conducting time sequence control of first switch transistor T 1 is identical during the time period; That is: first switch transistor T, 1 conducting when said modulating wave Z is greater than the second triangular wave B, on the contrary end; Specifically referring to the sequential chart of Fig. 6.
The said first triangular wave A, the second triangular wave B have identical frequency and identical amplitude, and the trough of the said first triangular wave A equals the crest of the second triangular wave B.
t
0-t
1Time period, mode B and mode C switch; t
1-t
2Time period, mode A and mode D switch;
t
2-t
3Time period, mode A and mode C switch;
t
3-t
4Time period, mode B and mode D switch;
t
4-t
5Time period, mode B and mode D switch;
t
5-t
6Time period, mode A and mode C switch;
t
6-t
7Time period, mode A and mode D switch;
t
7-t
8Time period, mode B and mode C switch.
That as can beappreciated from fig. 5, switch in first half period of modulating wave is respectively BC, AD, AC and BD.Because circuit structure is symmetrical among mode A and the mode B, the state of C1, C2 is identical in mode A, simultaneously power supply; Therefore, can think during mode A that the voltage of DC power supply is constant, the mid point electric current of C1 and C2 is zero; It is constant that the voltage of C1 and C2 keeps, and can not squint.In mode B, the state of C1 and C2 also is identical, does not supply power simultaneously, therefore, can think during mode B that the mid point electric current of C1 and C2 is zero, and it is constant that the voltage of C1 and C2 keeps, and can not squint.Therefore, when mode A and mode B, the voltage of the last voltage of C1 and C2 is stable can not to produce fluctuation.Therefore, in modulation, the voltage fluctuation in the time of can not considering mode A and mode B on C1 and the C2.During mode C, C1 discharge, C2 charging.The voltage of C1 and C2 squints like this.During mode D, C1 charging, C2 discharge.Like this, the voltage of C1 and C2 squints.Voltage fluctuation when therefore, mainly considering mode C and mode D on C1 and the C2.So in the embodiment of the invention, in first half period of modulating wave, that can regard switching as is mode C, D, C, D.Mode C and mode D appear in the compartment of terrain like this, can effectively offset C1 and the upward voltage fluctuation of generation of C2 among mode C and the mode D.
Particularly, can be referring to Fig. 7, in first half period of modulating wave, t
0-t
1Time period C mode makes the C1 discharge, and voltage descends; t
1-t
2Time period D mode makes the C1 charging, and voltage rises; t
2-t
3Time period, C mode makes the C1 discharge, and voltage descends; t
3-t
4Time period, D mode makes the C1 charging, and voltage rises.
In the switching of second half period of modulating wave is mode D, C, D, C.Like this, in second half period, switch mode D and mode C compartment of terrain, can offset C1 and C2 and go up the fluctuation voltage that produces.Particularly, can be referring to Fig. 7, in second half period of modulating wave, t
4-t
5Time period D mode makes the C1 charging, and voltage rises; t
5-t
6Time period C mode makes the C1 discharge, and voltage descends; t
6-t
7Time period, D mode makes the C1 charging, and voltage rises; t
7-t
8Time period, C mode makes the C1 discharge, and voltage descends.
And; As can be seen from Figure 5; The order that second half period and the first half period mode are switched is opposite; There is faint error in the result of phase-locked loop of being incorporated into the power networks if this is, accumulation that then can the generation deviation on C1 and C2, and the symmetrical control method shown in Figure 5 that can adopt the embodiment of the invention to provide is like this eliminated the accumulation of deviation.The utilization phase-locked loop that is incorporated into the power networks obtains t among Fig. 5
2, t
6The error that exists constantly, the first half period t
0-t
4With the second half period t
4-t
8Adopt about t in two time periods
4Symmetrical fully constantly operation mode reduces the adverse effect of above-mentioned error with this.
And, can find out more significantly through Fig. 4 of Fig. 7 more of the present invention and prior art, the modulator approach of provided by the invention pair of Buck circuit, the voltage fluctuation of the C1 that the modulator approach that the last voltage fluctuation of C1 provides than prior art is corresponding reduces significantly.Because similar on fluctuation voltage on the C2 and the C1 repeated no more at this.
The modulator approach of two Buck circuit that the embodiment of the invention provides; Mode C and mode D appear in the first half period compartment of terrain at modulating wave; Second half period was that mode D and mode C appear in the compartment of terrain, and C1 and C2 go up the voltage fluctuation that produces in the time of can effectively offsetting mode C and mode D like this.And the continuous discharge of C1, C2 and L1, L2 and lasting charging interval are all shorter; Be approximately prior art and continue the half the of the time of discharging and recharging; Reduce the voltage undulation of C1, C2 and L1, L2 greatly, thereby reduced the ripple of output voltage, improved output waveform.And continue to occur mode C in first half period of modulating wave in the prior art, and continue to occur mode D in second half period of modulating wave, can not offset the fluctuation voltage that C1 and C2 go up accumulation so preferably.
Need to prove, obtain three each and every one the zero crossing ts of modulating wave at one-period T
0, t
4And t
8A lot of middle implementations can be arranged, for example, can find out the moment of line voltage zero crossing, obtain this three zero crossings through the phase-locked loop that is incorporated into the power networks.
Need to prove that said cycle T is determined by mains frequency.For example, when mains frequency was 50Hz, said cycle T was 20ms.
Based on the modulator approach of above-mentioned pair of Buck circuit, the present invention also provides the modulating device of two Buck circuit, specifies its part below in conjunction with specific embodiment.
Referring to Fig. 8, this figure is the structure chart of the modulating device of provided by the invention pair of Buck circuit.
The embodiment of the invention provides the modulating device of a kind of pair of Buck circuit, comprising: the time is confirmed unit 100 and control unit 200;
The said time is confirmed unit 100, is used for confirming the time period of modulation; Be specially: modulating wave has three zero crossings in one-period T, be designated as t respectively
0, t
4And t
8t
4Mid point for cycle T; Obtain this three zero crossing t
0, t
4And t
8With t
0Postpone 1/4 mid point t that cycle T then was first half period
2With t
0Postpone 3/4 mid point t that cycle T then was second half period
6The straight line that the waveform of first half period of modulating wave and the waveform of second half period are corresponding with Vdc/2 respectively has two intersection points, and two intersection point time corresponding of the straight line that the waveform of note first half period of modulating wave is corresponding with Vdc/2 are respectively t
1And t
3, two intersection point time corresponding of the straight line that the waveform of note second half period of modulating wave is corresponding with Vdc/2 are respectively t
5And t
7
Said control unit 200, first switching tube of the two Buck circuit of time periods control that are used for confirming unit 100 to confirm according to the time and the on off state of second switch pipe are specially: t
0-t
1Time period, first switching tube in the two Buck circuit of control is according to sinusoid pulse width modulation modulation conducting and shutoff, and the second switch pipe in the two Buck circuit of control ends; t
1-t
2Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control the conducting of said second switch pipe; t
2-t
3Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control the said first switching tube conducting; t
3-t
4Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control said first switching tube and end; t
4-t
5Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control said second switch pipe and end; t
5-t
6Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control the conducting of said second switch pipe; t
6-t
7Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control the said first switching tube conducting; t
7-t
8Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control said first switching tube and end.
Need to prove; Control T1 or T2 are according to sinusoid pulse width modulation modulation conducting and shutoff; Be to realize, for example, drive pulse signal be provided for the control end of T1 by drive pulse signal; Then T1 conducting in the high level time section of drive pulse signal, then T1 then turn-offs in the low level time section of drive pulse signal.The conducting of T2 and shutoff situation are similar.This drive pulse signal is modulated out according to sinusoid pulse width modulation.
The sequential chart of the drive pulse signal of T1 and T2 is as shown in Figure 6.
When the drive pulse signal high-low level of T1 replaces, the conducting of corresponding T1 and shutoff, during high level, the T1 conducting, during low level, T1 turn-offs.When the drive pulse signal of T1 continued low level, promptly T1 kept turn-offing; When the drive pulse signal of T1 continued high level, promptly T1 kept conducting.
As shown in Figure 6, at t
0-t
2Time period, the drive pulse signal high-low level of T1 replaces, therefore, and corresponding T1 conducting and shutoff.At t
2-t
3Time period, the drive pulse signal of T1 keeps high level, and therefore, T1 keeps conducting.At t
3-t
4Time period, the drive pulse signal of T1 keeps low level, and therefore, T1 keeps turn-offing.The other times section is similar, repeats no more at this.
In addition, the conducting of T2 and shutoff situation and T1's is similar, specifically can repeat no more at this referring to the drive pulse signal of Fig. 6.
Said first switch transistor T 1 is according to sinusoid pulse width modulation modulation conducting and shutoff, and said second switch pipe T2 is disconnected with pipe according to sinusoid pulse width modulation modulation conducting, is specially:
t
0-t
1Time period, the conducting sequential of said first switch transistor T 1 compares generation by the said modulating wave Z and the second triangular wave B, and said modulating wave Z is 1 conducting of first switch transistor T during greater than the second triangular wave B, otherwise ends;
t
1-t
2Time period, the conducting sequential of said first switch transistor T 1 compares generation by the said modulating wave Z and the first triangular wave A, and said modulating wave Z is 1 conducting of first switch transistor T during greater than the said first triangular wave A, otherwise ends;
t
6-t
7Time period, the conducting sequential of said first switch transistor T 1 and said t
1-t
2The conducting time sequence control of first switch transistor T 1 is identical during the time period; That is: first switch transistor T, 1 conducting when said modulating wave Z is greater than the said first triangular wave A, on the contrary end; Specifically referring to the sequential chart of Fig. 6.
t
7-t
8Time period, the conducting sequential of said first switch transistor T 1 and said t
0-t
1The conducting time sequence control of first switch transistor T 1 is identical during the time period; That is: first switch transistor T, 1 conducting when said modulating wave Z is greater than the second triangular wave B, on the contrary end; Specifically referring to the sequential chart of Fig. 6.
t
2-t
3Time period, the conducting sequential of said second switch pipe T2 compares generation by said modulating wave Z and the said first triangular wave A, and said modulating wave Z is second switch pipe T2 conducting during greater than the said first triangular wave A, otherwise ends;
t
3-t
4Time period, the conducting sequential of said second switch pipe T2 compares generation by said modulating wave Z and the said second triangular wave B, and said modulating wave Z is second switch pipe T2 conducting during greater than the said second triangular wave B, otherwise ends;
t
4-t
5Time period, the conducting sequential of said second switch pipe T2 and said t
3-t
4The conducting time sequence control of second switch pipe is identical during the time period; That is: second switch pipe T2 conducting when said modulating wave Z is greater than the said second triangular wave B, on the contrary end;
t
5-t
6Time period, the conducting sequential of said second switch pipe and said t
2-t
3The conducting time sequence control of second switch pipe is identical during the time period; That is: second switch pipe T2 conducting when said modulating wave Z is greater than the said first triangular wave A, on the contrary end;
The said first triangular wave A, the second triangular wave B have identical frequency and identical amplitude, and the trough of the said first triangular wave A equals the crest of the second triangular wave B.
That as can beappreciated from fig. 5, switch in first half period of modulating wave is respectively BC, AD, AC and BD.Because circuit structure is symmetrical among mode A and the mode B, the state of C1, C2 is identical in mode A, simultaneously power supply; Therefore, can think during mode A that the voltage of DC power supply is constant, the mid point electric current of C1 and C2 is zero; It is constant that the voltage of C1 and C2 keeps, and can not squint.In mode B, the state of C1 and C2 also is identical, does not supply power simultaneously, therefore, can think during mode B that the mid point electric current of C1 and C2 is zero, and it is constant that the voltage of C1 and C2 keeps, and can not squint.Therefore, the voltage of the last voltage of C1 and C2 is stable can not produce fluctuation.Therefore, in modulation, the voltage fluctuation in the time of can not considering mode A and mode B on C1 and the C2.During mode C, C1 discharge, C2 charging.The voltage of C1 and C2 squints like this.During mode D, C1 charging, C2 discharge.Like this, the voltage of C1 and C2 squints.Voltage fluctuation when therefore, mainly considering mode C and mode D on C1 and the C2.So in the embodiment of the invention, in first half period of modulating wave, that can regard switching as is mode C, D, C, D.Mode C and mode D appear in the compartment of terrain like this, can effectively offset C1 and the upward voltage fluctuation of generation of C2 among mode C and the mode D.
Particularly, can be referring to Fig. 7, in first half period of modulating wave, t
0-t
1Time period C mode makes the C1 discharge, and voltage descends; t
1-t
2Time period D mode makes the C1 charging, and voltage rises; t
2-t
3Time period, C mode makes the C1 discharge, and voltage descends; t
3-t
4Time period, D mode makes the C1 charging, and voltage rises.
In the switching of second half period of modulating wave is mode D, C, D, C.Like this, in second half period, switch mode D and mode C compartment of terrain, can offset C1 and C2 and go up the fluctuation voltage that produces.
Particularly, can be referring to Fig. 7, in second half period of modulating wave, t
4-t
5Time period D mode makes the C1 charging, and voltage rises; t
5-t
6Time period C mode makes the C1 discharge, and voltage descends; t
6-t
7Time period, D mode makes the C1 charging, and voltage rises; t
7-t
8Time period, C mode makes the C1 discharge, and voltage descends.
And; As can be seen from Figure 5; The order that second half period and the first half period mode are switched is opposite; There is faint error in the result of phase-locked loop of being incorporated into the power networks if this is, accumulation that then can the generation deviation on C1 and C2, and the symmetrical control method shown in Figure 5 that can adopt the embodiment of the invention to provide is like this eliminated the accumulation of deviation.The utilization phase-locked loop that is incorporated into the power networks obtains t among Fig. 5
2, t
6The error that exists constantly, the first half period t
0-t
4With the second half period t
4-t
8Adopt about t in two time periods
4Symmetrical fully constantly operation mode reduces the adverse effect of above-mentioned error with this.
The modulating device of two Buck circuit that the embodiment of the invention provides; Mode C and mode D appear in the first half period compartment of terrain at modulating wave; Second half period was that mode D and mode C appear in the compartment of terrain, and C1 and C2 go up the voltage fluctuation that produces in the time of can effectively offsetting mode C and mode D like this.And the continuous discharge of C1, C2 and L1, L2 and lasting charging interval are all shorter, have reduced the voltage undulation of C1, C2 and L1, L2 greatly, thereby reduce the ripple of output voltage, have improved output waveform.And continue to occur mode C in first half period of modulating wave in the prior art, and continue to occur mode D in second half period of modulating wave, can not offset the fluctuation voltage that C1 and C2 go up accumulation so preferably.
Need to prove, obtain three each and every one the zero crossing ts of modulating wave at one-period T
0, t
4And t
8A lot of middle implementations can be arranged, for example, can find out the moment of line voltage zero crossing, obtain this three zero crossings through the phase-locked loop that is incorporated into the power networks.
Need to prove that said cycle T is determined by mains frequency.For example, when mains frequency was 50Hz, said cycle T was 20ms.
The above only is preferred embodiment of the present invention, is not the present invention is done any pro forma restriction.Though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention.Any those of ordinary skill in the art; Do not breaking away under the technical scheme scope situation of the present invention; All the method for above-mentioned announcement capable of using and technology contents are made many possible changes and modification to technical scheme of the present invention, or are revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical scheme of the present invention, all still belongs in the scope of technical scheme protection of the present invention any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.
Claims (8)
1. the modulator approach of two Buck circuit is characterized in that the voltage of first electric capacity in two Buck circuit and the common port of second electric capacity is half Vdc/2 of direct voltage Vdc;
Modulating wave has three zero crossings in one-period T, be designated as t respectively
0, t
4And t
8t
4Mid point for cycle T; Obtain this three zero crossing t
0, t
4And t
8
With t
0Postpone 1/4 mid point t that cycle T then was first half period
2With t
0Postpone 3/4 mid point t that cycle T then was second half period
6
The straight line that the waveform of first half period of modulating wave and the waveform of second half period are corresponding with Vdc/2 respectively has two intersection points, and two intersection point time corresponding of the straight line that the waveform of note first half period of modulating wave is corresponding with Vdc/2 are respectively t
1And t
3, two intersection point time corresponding of the straight line that the waveform of note second half period of modulating wave is corresponding with Vdc/2 are respectively t
5And t
7
t
0-t
1Time period, first switching tube in the two Buck circuit of control is according to sinusoid pulse width modulation modulation conducting and shutoff, and the second switch pipe in the two Buck circuit of control ends;
t
1-t
2Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control the conducting of said second switch pipe;
t
2-t
3Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control the said first switching tube conducting;
t
3-t
4Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control said first switching tube and end;
t
4-t
5Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control said first switching tube and end;
t
5-t
6Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control the said first switching tube conducting;
t
6-t
7Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control the conducting of said second switch pipe;
t
7-t
8Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control said second switch pipe and end.
2. the modulator approach of according to claim 1 pair of Buck circuit is characterized in that, said first switching tube is according to sinusoid pulse width modulation modulation conducting and shutoff, and said second switch pipe is disconnected with pipe according to sinusoid pulse width modulation modulation conducting, is specially:
t
0-t
1Time period, the conducting sequential of said first switching tube compares generation by the said modulating wave and second triangular wave, the first switching tube conducting during of said modulating wave greater than second triangular wave, on the contrary end;
t
1-t
2Time period, the conducting sequential of said first switching tube compares generation by the said modulating wave and first triangular wave, the first switching tube conducting during of said modulating wave greater than said first triangular wave, on the contrary end;
t
6-t
7Time period, the conducting sequential of said first switching tube and said t
1-t
2The conducting time sequence control of first switching tube is identical during the time period;
t
7-t
8Time period, the conducting sequential of said first switching tube and said t
0-t
1The conducting time sequence control of first switching tube is identical during the time period;
t
2-t
3Time period, the conducting sequential of said second switch pipe compares generation by said modulating wave and said first triangular wave, and said modulating wave is the conducting of second switch pipe during greater than said first triangular wave, otherwise ends;
t
3-t
4Time period, the conducting sequential of said second switch pipe compares generation by said modulating wave and said second triangular wave, and said modulating wave is the conducting of second switch pipe during greater than said second triangular wave, otherwise ends;
t
4-t
5Time period, the conducting sequential of said second switch pipe and said t
3-t
4The conducting time sequence control of second switch pipe is identical during the time period;
t
5-t
6Time period, the conducting sequential of said second switch pipe and said t
2-t
3The conducting time sequence control of second switch pipe is identical during the time period;
Said first triangular wave, second triangular wave have identical frequency and identical amplitude, and the trough of said first triangular wave equals the crest of second triangular wave.
3. the modulator approach of according to claim 1 and 2 pair of Buck circuit is characterized in that said cycle T is determined by mains frequency.
4. the modulator approach of according to claim 3 pair of Buck circuit is characterized in that, when mains frequency was 50Hz, said cycle T was 20ms.
5. the modulating device of two Buck circuit is characterized in that comprise: the time is confirmed unit and control unit;
The said time is confirmed the unit, is used for confirming the time period of modulation; Be specially: modulating wave has three zero crossings in one-period T, be designated as t respectively
0, t
4And t
8t
4Mid point for cycle T; Obtain this three zero crossing t
0, t
4And t
8With t
0Postpone 1/4 mid point t that cycle T then was first half period
2With t
0Postpone 3/4 mid point t that cycle T then was second half period
6The straight line that the waveform of first half period of modulating wave and the waveform of second half period are corresponding with Vdc/2 respectively has two intersection points, and two intersection point time corresponding of the straight line that the waveform of note first half period of modulating wave is corresponding with Vdc/2 are respectively t
1And t
3, two intersection point time corresponding of the straight line that the waveform of note second half period of modulating wave is corresponding with Vdc/2 are respectively t
5And t
7
Said control unit is used for controlling first switching tube of two Buck circuit and the on off state of second switch pipe, is specially: t
0-t
1Time period, first switching tube in the two Buck circuit of control is according to sinusoid pulse width modulation modulation conducting and shutoff, and the second switch pipe in the two Buck circuit of control ends; t
1-t
2Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control the conducting of said second switch pipe; t
2-t
3Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control the said first switching tube conducting; t
3-t
4Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control said first switching tube and end; t
4-t
5Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control said first switching tube and end; t
5-t
6Time period, control said second switch pipe according to sinusoid pulse width modulation modulation conducting and shutoff, control the said first switching tube conducting; t
6-t
7Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control the conducting of said second switch pipe; t
7-t
8Time period, control said first switching tube according to sinusoid pulse width modulation modulation conducting and shutoff, control said second switch pipe and end.
6. the modulating device of according to claim 5 pair of Buck circuit is characterized in that, said first switching tube is according to sinusoid pulse width modulation modulation conducting and shutoff, and said second switch pipe is disconnected with pipe according to sinusoid pulse width modulation modulation conducting, is specially:
t
0-t
1Time period, the conducting sequential of said first switching tube compares generation by the said modulating wave and second triangular wave, the first switching tube conducting during of said modulating wave greater than second triangular wave, on the contrary end;
t
1-t
2Time period, the conducting sequential of said first switching tube compares generation by the said modulating wave and first triangular wave, the first switching tube conducting during of said modulating wave greater than said first triangular wave, on the contrary end;
t
2-t
3Time period, the conducting sequential of said second switch pipe compares generation by said modulating wave and said first triangular wave, and said modulating wave is the conducting of second switch pipe during greater than said first triangular wave, otherwise ends;
t
3-t
4Time period, the conducting sequential of said second switch pipe compares generation by said modulating wave and said second triangular wave, and said modulating wave is the conducting of second switch pipe during greater than said second triangular wave, otherwise ends;
t
4-t
5Time period, the conducting sequential of said second switch pipe and said t
3-t
4The conducting time sequence control of second switch pipe is identical during the time period;
t
5-t
6Time period, the conducting sequential of said second switch pipe and said t
2-t
3The conducting time sequence control of second switch pipe is identical during the time period;
t
6-t
7Time period, the conducting sequential of said first switching tube and said t
1-t
2The conducting time sequence control of first switching tube is identical during the time period;
t
7-t
8Time period, the conducting sequential of said first switching tube and said t
0-t
1The conducting time sequence control of first switching tube is identical during the time period; Said first triangular wave, second triangular wave have identical frequency and identical amplitude, and the trough of said first triangular wave equals the crest of second triangular wave.
7. according to the modulating device of claim 5 or 6 described pairs of Buck circuit, it is characterized in that said cycle T is determined by mains frequency.
8. the modulating device of according to claim 7 pair of Buck circuit is characterized in that, when mains frequency was 50Hz, said cycle T was 20ms.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102710133A (en) * | 2012-06-12 | 2012-10-03 | 阳光电源股份有限公司 | Seven-level circuit, a grid-connected inverter and modulation method and device of seven-level circuit |
| CN102751895A (en) * | 2012-06-12 | 2012-10-24 | 阳光电源股份有限公司 | Multi-level circuit, grid-connected inverter and modulation method of grid-connected inverter |
| CN102821531A (en) * | 2012-08-29 | 2012-12-12 | 湖北宝努斯照明电器有限公司 | 'AC-AC (alternating current) regulation and control' based numerical-control HID (high intensity discharge) driving method and driver applying same |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102710133A (en) * | 2012-06-12 | 2012-10-03 | 阳光电源股份有限公司 | Seven-level circuit, a grid-connected inverter and modulation method and device of seven-level circuit |
| CN102751895A (en) * | 2012-06-12 | 2012-10-24 | 阳光电源股份有限公司 | Multi-level circuit, grid-connected inverter and modulation method of grid-connected inverter |
| CN102710133B (en) * | 2012-06-12 | 2014-09-17 | 阳光电源股份有限公司 | Seven-level circuit, a grid-connected inverter and modulation method and device of seven-level circuit |
| CN102751895B (en) * | 2012-06-12 | 2014-12-03 | 阳光电源股份有限公司 | Multi-level circuit, grid-connected inverter and modulation method of grid-connected inverter |
| CN102821531A (en) * | 2012-08-29 | 2012-12-12 | 湖北宝努斯照明电器有限公司 | 'AC-AC (alternating current) regulation and control' based numerical-control HID (high intensity discharge) driving method and driver applying same |
| CN102821531B (en) * | 2012-08-29 | 2015-03-11 | 孝感市捷能特种光源照明器具有限公司 | 'AC-AC (alternating current) regulation and control' based numerical-control HID (high intensity discharge) driving method and driver applying same |
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