WO2021186841A1

WO2021186841A1 - Power conversion device and method for controlling power conversion device

Info

Publication number: WO2021186841A1
Application number: PCT/JP2020/049081
Authority: WO
Inventors: 矩也中尾; 公久古川
Original assignee: 株式会社日立製作所
Priority date: 2020-03-18
Filing date: 2020-12-28
Publication date: 2021-09-23
Also published as: JP2021151077A; CN115176406A

Abstract

There has been a problem that, when it is impossible to set the frequency of a carrier wave to be sufficiently high with respect to a voltage command value, the symmetry of an output voltage is broken in association with the phase shift between the voltage command value and the carrier wave and harmonic waves contained in the voltage/current generated by a power conversion unit are increased.　This power conversion device is provided with: a power conversion unit for converting power by controlling the on/off of a plurality of switching elements; and a gate pulse generation unit for generating a gate pulse signal for controlling the on/off of the plurality of switching elements on the basis of first voltage command values by which desired output voltages are instructed and which have a plurality of phases. The gate pulse generation unit generates, on the basis of the respective first voltage command values having the plurality of phases, carrier waves synchronized with the first voltage command values in phase and generates second voltage command values by adding the carrier waves to the first voltage command values.

Description

Power converter and control method of power converter

The present invention relates to a power conversion device and a control method for the power conversion device.

For example, various circuit methods are known for the power conversion unit that mutually converts DC power and AC power. For high-voltage applications, a multi-stage type in which a plurality of power converters composed of a single-phase bridge circuit are connected in series is often used.

The switching element in the power conversion unit operates by inputting a gate pulse signal instructing on or off. PWM (Pulse Width Modulation) control is generally used as a method for generating a gate pulse signal. In this control, a gate pulse signal is generated based on a voltage command value indicating a desired output voltage and a separately generated carrier wave such as a triangular wave. In the power conversion unit, heat is generated due to the switching loss of the switching element. Therefore, in practice, there is an upper limit to the frequency of the carrier wave, and control is performed while suppressing the number of switchings (number of pulses) as much as possible.

Patent Document 1 describes a control method in which a carrier wave and an output voltage command are compared with each other to create a PWM pulse, and the carrier wave amplitude or carrier wave frequency is gradually reduced.

Japanese Unexamined Patent Publication No. 2003-319662

When the carrier frequency could not be set sufficiently high with respect to the voltage command value, the problem was to increase the harmonics contained in the voltage and current output from the power converter.

The power conversion device according to the present invention has a power conversion unit that controls on / off of a plurality of switching elements to convert power, and an on / off of the switching element based on a plurality of phases of first voltage command values that indicate a desired output voltage. A power conversion device including a gate pulse generation unit that generates a gate pulse signal for controlling the above, and the gate pulse generation unit sets the first voltage command value based on each first voltage command value of the plurality of phases. On the other hand, a carrier whose phase is synchronized is generated, and the carrier is added to the first voltage command value to generate a second voltage command value.
The control method of the power conversion device according to the present invention is based on a power conversion unit that controls on / off of a plurality of switching elements to convert power and a plurality of phases of first voltage command values that indicate a desired output voltage. It is a control method of a power conversion device including a gate pulse generation unit that generates a gate pulse signal that controls on / off of an element, and is based on the first voltage command value of each of the plurality of phases by the gate pulse generation unit. A carrier whose phase is synchronized with the first voltage command value is generated, and the carrier is added to the first voltage command value to generate a second voltage command value.

According to the present invention, harmonics can be suppressed even when the carrier frequency cannot be set sufficiently high with respect to the voltage command value.

It is a block diagram of a power conversion device. It is a circuit block diagram of a converter cell. It is a block diagram of the primary side gate pulse generation part. It is a block diagram of a carrier wave generation part. It is a figure which shows the waveform of the signal and the like when (a)-(e) "k = 3". It is a block diagram of the primary side gate pulse generation part in the comparative example. It is a figure which shows the waveform of the signal or the like in the comparative example (a)-(e). It is a figure which shows the waveform of the signal and the like when (a)-(e) "k = 5". It is a figure which shows the waveform of the signal and the like in the 2nd Embodiment in the case of (a)-(e) "k = 3". It is a block diagram of the power conversion apparatus in 3rd Embodiment. It is a circuit block diagram of the power conversion part in 3rd Embodiment. It is a block diagram of the carrier wave generation part in 4th Embodiment. It is a figure which shows the waveform of the signal and the like in the 4th Embodiment in the case of (a)-(e) "k = 4".

[First Embodiment] FIG. 1 is a block diagram of a power conversion device 100 according to the first embodiment.
The power conversion device 100 includes a power conversion unit 101, a primary side gate pulse generation unit 102, and a secondary side gate pulse generation unit 103. The power conversion device 100 performs bidirectional or unidirectional power conversion between the primary side system 30 which is a three-phase AC system and the secondary side system 40. Here, the primary side system 30 has a neutral wire 30N and an R phase wire 30R, an S phase wire 30S, and a T phase wire 30T in which the voltages of the R phase, the S phase, and the T phase appear, respectively. .. Further, the secondary side system 40 has a neutral wire 40N and a U-phase wire 40U, a V-phase wire 40V, and a W-phase wire 40W in which U-phase, V-phase, and W-phase voltages appear, respectively. Here, a power conversion device 100 similar to that shown in FIG. 1 is provided between the neutral wire 30N and the T-phase wire 30T, and between the neutral wire 40N and the W-phase wire 40W, although not shown. .. Further, a power conversion device 100 similar to that shown in FIG. 1 is provided between the neutral wire 30N and the S phase wire 30S, and between the neutral wire 40N and the V phase wire 40V, although not shown.

The voltage amplitude, frequency and phase of the primary side system 30 and the secondary side system 40 are independent of each other. The R-phase, S-phase, and T-phase voltages have a phase difference of "2π / 3" from each other at the primary frequency, and the U-phase, V-phase, and W-phase voltages have "2π / 3" from each other at the secondary frequency. It has a phase difference of "/ 3". As the primary side and

secondary side systems

30 and 40, various power generation facilities and power receiving facilities such as a commercial power supply system, a photovoltaic power generation system, and a motor can be adopted.

The power conversion unit 101 has P units (P is a natural number of 2 or more) of converter cells 20-1 to 20-P. Hereinafter, converter cells 20-1 to 20-P may be collectively referred to as "converter cell 20". The converter cells 20-1 to 20-P are connected in series between the R phase wire 30R on the primary side and the neutral wire 30N. Similarly, the secondary side is also connected in series between the U-phase wire 40U and the neutral wire 40N.

The primary side control unit 104 detects the voltage and current of the primary side system 30 and outputs the primary side voltage command values VREFR, VREFS, and VREFT. Similarly, the secondary side control unit 105 detects the voltage and current of the secondary side system 40 and outputs the secondary side voltage command values VREFU, VREFV, and VREFW.

The primary side gate pulse generation unit 102 generates gate pulse signals GT11 to GT1P and GT11'to GT1P' for controlling the switching element contained in the primary side of the converter cells 20-1 to 20-P. .. Similarly, the secondary side gate pulse generation unit 103 has gate pulse signals GT21 to GT2P and GT21'to GT2P' for controlling the switching element contained in the secondary side of the converter cells 20-1 to 20-P. To generate.

FIG. 2 is a circuit configuration diagram of converter cell 20-1. Since the converter cells 20-2 to 20-P are the same as the converter cells 20-1, detailed description thereof will be omitted.
The converter cell 20-1 includes a pair of primary side terminals 21a and 21b, a pair of

secondary side terminals

22a and 22b, AC / DC power converters 23 to 26, capacitors 27 and 28, and a high frequency transformer 29. Have.

The AC / DC power converter 23 has four switching elements Q1 to Q4 connected in an H-bridge shape, and an FWD (Free Wheeling Diоde, unsigned) connected in antiparallel to these switching elements Q1 to Q4. ing. The switching elements Q1 to Q4 are controlled by the gate pulse signals GT11 to GT1P and GT11'to GT1P'.

Further, the AC / DC power converter 26 has four switching elements Q5 to Q8 connected in an H-bridge shape, and an FWD connected to these switching elements Q5 to Q8 in antiparallel. Similarly, the AC / DC power converters 24 and 25 have four switching elements connected in an H-bridge shape and an FWD connected in antiparallel to these switching elements (both are unsigned). The switching elements Q5 to Q8 are controlled by the gate pulse signals GT11 to GT1P and GT11'to GT1P'.
In this embodiment, these switching elements are, for example, MOSFETs (Metal-Oxide-Semiconductor Field-Effective Transistors).

The voltage appearing between the primary side terminals 21a and 21b is called the primary side AC terminal voltage V1-1, and the voltage appearing between both ends of the capacitor 27 is called the primary side DC link voltage Vdc1. Then, the AC / DC power converter 23 converts the primary side AC terminal voltage V1-1 and the primary side DC link voltage Vdc1 in both directions or in one direction, and transmits power.

The high frequency transformer 29 has a primary winding 29a and a secondary winding 29b, and transmits electric power between the primary winding 29a and the secondary winding 29b at a predetermined frequency. The current input / output from the AC / DC power converters 24 and 25 to / from the high frequency transformer 29 is high frequency. Here, the high frequency is, for example, a frequency of 100 Hz or higher, but it is preferable to adopt a frequency of 1 kHz or higher, and it is more preferable to adopt a frequency of 10 kHz or higher. The AC / DC power converter 24 converts the primary side DC link voltage Vdc1 and the AC voltage appearing in the primary winding 29a in both directions or in one direction to transmit power.

The voltage appearing between the

secondary side terminals

22a and 22b is called the secondary side AC terminal voltage V2-1, and the voltage appearing between both ends of the capacitor 28 is called the secondary side DC link voltage Vdc2. The AC / DC power converter 25 converts the secondary side DC link voltage Vdc2 and the AC voltage appearing in the secondary winding 29b in both directions or in one direction to transmit power. Then, the AC / DC power converter 26 converts the secondary side AC terminal voltage V2-1 and the secondary side DC link voltage Vdc2 in both directions or in one direction, and transmits power.

Here, the primary side gate pulse generation unit 102 (see FIG. 1) has gate pulse signals GT11 to GT1P and GT11'to of "LOW" or "HIGH" based on the primary side voltage command values VREFR, VREFS, and VREFT. Generates GT1P'. Taking the converter cell 20-1 as an example, the gate signal GT11 is supplied to the switching elements Q1 and Q4 of the AC / DC power converter 23 to control their on / off states. If the gate signal GT11 is "HIGH", the switching elements Q1 and Q4 are turned on, and if the gate signal GT11 is "LOW", the switching elements Q1 and Q4 are turned off. Similarly, the gate signal GT11'is supplied to the switching elements Q2 and Q3 of the AC / DC power converter 23 to control their on / off states.

In the AC / DC power converter 23, when the switching elements Q1 and Q4 are in the ON state, the voltage appearing between the primary side terminals 21a and 21b is Vdc1, and when the switching elements Q2 and Q3 are in the ON state, the primary side terminals 21a , The voltage appearing between 21b is -Vdc1. Further, when all of the switching elements Q1 to Q4 are in the off state, the voltage appearing between the primary side terminals 21a and 21b is zero. That is, the AC / DC power converter 23 can output voltages of three levels (−Vdc1,0, Vdc1).

The secondary side gate pulse generation unit 103 (see FIG. 1) has a “LOW” or “HIGH” gate based on the secondary side voltage command values VREFU, VREFV, and VREFW, similarly to the primary side gate pulse generation unit 102. Pulse signals GT21 to GT2P and GT21'to GT2P'are generated. Taking the converter cell 20-1 as an example, the gate signal GT21 is supplied to the switching elements Q5 and Q8 of the AC / DC power converter 26 to control their on / off states. That is, if the gate signal GT21 is "HIGH", the switching elements Q5 and Q8 are turned on, and if the gate signal GT21 is "LOW", the switching elements Q5 and Q8 are turned off. Similarly, the gate signal GT21'is supplied to the switching elements Q6 and Q7 of the AC / DC power converter 26 to control their on / off states.

In the AC / DC power converter 26, when the switching elements Q5 and Q8 are in the ON state, the voltage appearing between the

secondary side terminals

22a and 22b is Vdc2, and when the switching elements Q6 and Q7 are in the ON state, the primary side terminal 22a , The voltage appearing between 22b is -Vdc2. Further, when all of the switching elements Q5 to Q8 are in the off state, the voltage appearing between the

secondary side terminals

22a and 22b is zero. That is, the AC / DC power converter 26 of the power conversion unit 101 can output three levels (−Vdc2, 0, Vdc2) of voltage, similarly to the AC / DC power converter 23.

FIG. 3 is a block diagram of the primary side gate pulse generation unit 102. The primary side gate pulse generation unit 102 includes a carrier wave generation unit 300, an adder 301, and comparators CMP11 to CMP1P and CMP11'to CMP1P'.

The carrier wave generation unit 300 generates a carrier wave Sm whose phase is synchronized with respect to the voltage command value VREFR based on the voltage command values VREFR, VREFS, and VREFT of the R phase, S phase, and T phase that indicate a desired output voltage. .. Then, the voltage command value VREFR (first voltage command value) and the carrier wave Sm are added by the adder 301, and the voltage command value VREFR'(second voltage command value) is generated.

FIG. 3 shows a carrier wave generation unit 300 corresponding to the R phase, but the carrier wave generation unit 300 corresponding to the S phase (not shown) indicates voltage command values of the R phase, S phase, and T phase that indicate a desired output voltage. Based on VREFR, VREFS, and VREFT, a carrier wave Sm whose phase is synchronized with respect to the voltage command value VREFS is generated. Then, the voltage command value VREFS (first voltage command value) and the carrier wave Sm are added by the adder 301, and the voltage command value VREFS'(second voltage command value) is generated.

Further, the carrier wave generation unit 300 corresponding to the T phase (not shown) has a voltage command value VREFT based on the voltage command values VREFR, VREFS, and VREFT of the R phase, S phase, and T phase that indicate a desired output voltage. Generates a carrier wave Sm whose phase is synchronized with each other. Then, the voltage command value VREFT (first voltage command value) and the carrier wave Sm are added by the adder 301, and the voltage command value VREFT'(second voltage command value) is generated.

As shown in FIG. 3, the second voltage command value VREFR'has threshold values 1 to P, which are preset with respect to the magnitude of the voltage in the comparators CMP11 to CMP1P and CMP11' to CMP1P'. , And threshold 1'to threshold P', respectively. The comparators CMP11 to CMP1P and CMP11'to CMP1P' generate gate pulse signals GT11 to GT1P and GT11' to GT1P'. For example, the comparator CMP11 sets the gate pulse signal GT11 to LOW when the second voltage command value VREFR'is smaller than the threshold value 1, and the gate pulse when the second voltage command value VREFR'is larger than the threshold value 1. The signal GT11 is set to HIGH. Further, the comparator CMP11'sets the gate pulse signal GT11'to LOW when the second voltage command value VREFR'is larger than the threshold value 1', and the second voltage command value VREFR'is smaller than the threshold value 1'. Sometimes the gate pulse signal GT11'is set to HIGH. The gate pulse signals GT11 and GT11'are output to the converter cell 20-1.

The operations of the other comparators CMP12 to CMP1P and the comparators CMP12'to CMP1P'are the same except that the set threshold values are different.

Although not shown, the second voltage command value VREFS'and the second voltage command value VREFT' also have threshold values 1 to P and threshold values in the comparators CMP11 to CMP1P and CMP11'to CMP1P'. It is compared with 1'to threshold value P', respectively, and a gate pulse signal is generated.

FIG. 4 is a block diagram of the carrier wave generation unit 300 corresponding to the R phase. The carrier wave generation unit 300 includes a voltage command comparison unit 400, a voltage amplitude calculation unit 401, a triangular wave generation unit 402, a subtractor 403, a limiter 404, and a multiplier 405. The carrier wave generation unit 300 corresponding to the S phase and the T phase has the same configuration, and the description thereof will be omitted.

The voltage command comparison unit 400 compares the first voltage command values VREFR, VREFS, and VREFT with each other, and outputs the maximum value Vmax and the minimum value Vmin from them.

The voltage amplitude calculation unit 401 calculates the voltage amplitude value Va from the first voltage command values VREFR, VREFS, and VREFT according to the following equations (1) to (3).
VREFA = √ (2/3) ・ (VREFR-1 / 2 ・ VREFS-1 / 2 ・ VREFT) ・・・ (1)
VREFB = √ (2/3) ・ (√ (3) / 2 ・ VREFS-√ (3) / 2 ・ VREFT) ・・・ (2)
Va = √ (2/3) √ (VREFA ^ 2 + VREFB ^ 2) ・・・ (3)

Further, the triangular wave generating unit 402 generates a triangular wave Stri having an amplitude of 1 according to the following equation (4) or (5).
In the case of [k = 1,5,9,13, ...], Stri = (2 / π) · arcsin (sin ((k · π / Va) · (Vmax + Vmin))) ... (4)
In the case of [k = 3,7,11,15, ...], Stri =-(2 / π) · arcsin (sin ((k · π / Va) · (Vmax + Vmin))) ...・ (5)

In equations (4) and (5), the coefficient k is an odd number of 1 or more. Strictly speaking, the calculation results of the equations (4) and (5) are not triangular waves that increase or decrease linearly, but in the present embodiment, Stri will be referred to as a triangular wave. The triangular wave Stri is a signal having an amplitude of 1 and fluctuating at a frequency 3 k times the frequency of the first voltage command value VREFR (or VREFS, VREFT). In addition, "arcsin" represents the inverse function of sin.

The subtractor 403 subtracts the voltage amplitude Va from the maximum voltage Vlim that can be output by the power converter 100, and calculates "Vlim-Va". The maximum voltage Vlim is the maximum voltage that can be output by the power conversion unit 101. For example, when the number of series connections P of the converter cells is 3, if the primary side DC link voltage of each converter cell is Vdc1, it is “Vlim = 3 · Vdc1”.

The limiter 404 outputs the calculation result "Vlim-Va" of the subtractor 403 as it is in the case of "Va≤Vlim", and limits the calculation result of the subtractor 403 to zero in the case of "Vlim <Va". That is, the limiter 404 limits the calculation result "Vlim-Va" of the subtractor 403 so that it does not become a negative value (so that the minimum value becomes 0 or more).

The multiplier 405 generates a carrier wave Sm by multiplying the triangular wave Stri generated by the triangular wave generating unit 402 with the calculation result of the subtractor 403 via the limiter 404. Specifically, the calculation result "Vlim-Va" of the subtractor 403 is multiplied by the multiplier 405 via the limiter 404 to the triangular wave having an amplitude of 1. That is, the value multiplied by the triangular wave Stri by the multiplier 405 corresponds to the amplitude value of the carrier wave Sm (hereinafter, the signal after passing through the limiter 404 is also referred to as the carrier wave amplitude Ma). The carrier wave Sm output by the carrier wave generation unit 300 becomes zero by the action of the limiter 404 when the voltage amplitude Va becomes larger than the maximum voltage Vlim (Vlim <Va).

The primary side gate pulse generating part of the primary side S phase and T phase and the secondary side gate pulse generating part of the secondary side U phase, V phase, and W phase are not shown, but as described above. The main configuration is the same as that of the primary R phase shown in FIG. For example, in the primary side S phase, the first voltage command value VREFS and the carrier wave Sm are added to generate the second voltage command value VREFS'. After that, the second voltage command value VREFS'is compared with the threshold value in each of a plurality of comparators, and a gate pulse signal is generated. In the primary side T phase, the first voltage command value VREFT and the carrier wave Sm are added to generate the second voltage command value VREFT'. After that, the second voltage command value VREFT'is compared with the threshold value in each of a plurality of comparators, and a gate pulse signal is generated. The secondary U phase, V phase, and W phase are also configured in the same manner. The carrier wave generator 300 is commonly used in all phases. That is, the carrier wave Sm added to the first voltage command value is common in all phases.

5 (a) to 5 (e) are diagrams showing waveforms of signals and the like when “k = 3” is set in the equation (5). However, the number of series connections P of the converter cells is "1". Further, the output voltage range of the power conversion unit 101 is set to -1 to 1 (Vlim = Vdc1 = 1), and the threshold values 1 and 1'are set to 0.5 and −0.5, respectively.

FIG. 5A shows the first voltage command value VREFR and the carrier wave Sm, where the horizontal axis is the phase and the vertical axis is the voltage. In FIG. 5B, the gate pulse signal GT11 is shown by a solid line, the gate pulse signal GT11'is shown by a broken line, the horizontal axis is the phase, and the vertical axis is the voltage. FIG. 5C shows the second voltage command value VREFR'and the phase voltage between the R phase line 30R and the neutral line 30N, with the horizontal axis representing the phase and the vertical axis representing the voltage. FIG. 5D shows the second voltage command value VREFR'-the second voltage command value VREFS', and the line voltage between the R phase line 30R and the S phase line 30S. The horizontal axis is the phase and the vertical axis is the voltage. Is. FIG. 5E shows the harmonic component of the line voltage, the horizontal axis is the order, and the vertical axis is the voltage.

As shown in FIG. 5A, since the carrier wave Sm is generated by the carrier wave generation unit 300 based on the first voltage command values VREFR, VREFS, and VREFT, the phases of the carrier wave Sm and the first voltage command value VREFR. The relationship is in sync. As a result, as shown in FIG. 5B, the gate pulse signal GT11 obtained from the comparison result between the second voltage command value VREFR', which is the addition result of the carrier wave Sm and the first voltage command value VREFR, and the threshold value, GT11'is the same signal with a phase difference of 180 °.

Then, as shown in FIG. 5C, the phase voltage of the power conversion unit 101 appearing between the R phase line 30R and the neutral line 30N has a symmetrical waveform with 180 ° as a boundary. Further, the second voltage command value VREFR'is controlled so as not to exceed the output voltage range of -1 to 1, and the voltage corresponding to the first voltage command value VREFR can be output with high accuracy. This is because the primary side gate pulse generation unit 102 straddles the threshold value set by the primary voltage command value VREFR'for the magnitude of the voltage a plurality of times within one cycle of the first voltage command value VREFR. This is because the amplitude of the carrier wave is controlled in this way.

The line voltage of the power conversion unit 101 appearing between the R phase line 30R and the S phase line 30S corresponds to "VREFR'-VREFS'" and has a sinusoidal waveform as shown in FIG. 5 (d). There is. From this, the influence of the carrier wave Sm does not appear. This is because the carrier wave Sm is a signal that fluctuates in a degree that is a multiple of 3, and cancels each other out in the line voltage. From the result of the harmonic component of the line voltage shown in FIG. 5 (e), it can be confirmed that the harmonic component of the order of a multiple of 3 does not appear in the line voltage.

FIG. 6 is a block diagram of the primary side gate pulse generation unit 600 in the comparative example. This comparative example is an example to which the present embodiment is not applied, and is described for comparison with the present embodiment. The difference from the primary side gate pulse generation unit 300 in this embodiment is that the carrier wave generation unit 601 that generates the carrier wave Sm is provided independently. Therefore, the phase relationship between the carrier wave Sm and the voltage command value VREFR is not always synchronized.

The operation after the adder 602 adds the first voltage command value VREFR and the carrier wave Sm to generate the second voltage command value VREFR'is the same as that of the primary side gate pulse generator 300 in the present embodiment. ..

7 (a) to 7 (e) are diagrams showing waveforms of signals and the like in the comparative example shown in FIG. However, the number of series connections P of the converter cells is "1". Further, the output voltage range of the power conversion unit 101 is set to -1 to 1 (Vlim = Vdc1 = 1), and the threshold value 1 and the threshold value 1'are set to 0.5 and −0.5, respectively.

FIG. 7A shows the first voltage command value VREFR and the carrier wave Sm, where the horizontal axis is the phase and the vertical axis is the voltage. In FIG. 7B, the gate pulse signal GT11 is shown by a solid line, the gate pulse signal GT11'is shown by a broken line, the horizontal axis is the phase, and the vertical axis is the voltage. FIG. 7C shows the second voltage command value VREFR'and the phase voltage between the R phase line 30R and the neutral line 30N, with the horizontal axis representing the phase and the vertical axis representing the voltage. FIG. 7D shows the second voltage command value VREFR'-the second voltage command value VREFS', and the line voltage between the R phase line 30R and the S phase line 30S. The horizontal axis is the phase and the vertical axis is the voltage. Is. FIG. 7E shows the harmonic component of the line voltage, the horizontal axis is the order, and the vertical axis is the voltage.

In the comparative example, the carrier wave Sm is a triangular wave that fluctuates at a frequency 12 times the frequency of the first voltage command value VREFR, and the second voltage command value VREFR', which is the sum of the carrier wave Sm and the first voltage command value VREFR, is the output voltage. Adjusted so that the range-1 to 1 was not exceeded.

As shown in FIG. 7A, the phase relationship between the carrier wave Sm and the first voltage command value VREFR is not synchronized. Then, as shown in FIG. 7C, the phase voltage appearing between the R phase line 30R and the neutral line 30N does not have a symmetrical waveform with 180 ° as a boundary, and voltage imbalance occurs. There is. This is because the phase relationship between the carrier wave Sm and the first voltage command value VREFR is not synchronized. This voltage imbalance can contribute to increasing the harmonic content of the output voltage. As shown in FIG. 7 (e), it can be confirmed that the harmonic components of the line voltage are distributed as a whole except for the order components that are multiples of 3.

As described above, the power conversion device 100 according to the present embodiment generates the carrier wave Sm based on the first voltage command values VREFR, VREFS, and VREFT, and the gate pulse signals GT11 to GT1P for controlling the switching elements Q1 to Q4. , And GT11'to GT1P'.

As a result, the phase relationship between the carrier wave Sm and the first voltage command values VREFR, VREFS, and VREFT can be synchronized. Even under the condition that the frequency of the carrier wave Sm has an upper limit and the number of switchings (the number of pulses) is small, the power conversion device 100 according to the present embodiment can effectively suppress the harmonics contained in the voltage / current.

Further, the power conversion device 100 according to the present embodiment controls the carrier wave amplitude Ma so that the peak values of the second voltage command values VREFR', VREFS', and VREFT' match the maximum output voltage Vlim of the power conversion unit 101. .. As a result, the error between the first voltage command values VREFR, VREFS, VREFT and the output voltage can be suppressed.

The power conversion device 100 according to the present embodiment can increase the number of switchings (number of pulses) by increasing the number of converter cells connected in series (P) or the coefficient k in the equations (4) and (5). It is possible.

8 (a) to 8 (e) are diagrams showing waveforms of signals and the like when "k = 5" is set in this embodiment. However, the number of series connections P of the converter cells is "2". Further, the output voltage range of the power conversion unit 101 is set to -1 to 1 (Vlim = (Vdc1) / 2 = 1), and the threshold value 1 and the threshold value 1'are set to 0.25 and -0.25, respectively. The threshold value 2 and the threshold value 2'are set to 0.75 and -0.75, respectively.

Compared with the waveforms shown in FIGS. 5 (a) to 5 (e), the frequency of the carrier wave Sm is increased as shown in FIG. 8 (a). Further, the threshold value within the output voltage range is set more finely according to the number of connected converter cells in series, as shown in FIG. 8 (c). As a result, the number of times the second voltage command VREFR'crosses the threshold value, that is, the number of times of switching (number of pulses) is increased. As a result, as shown in FIG. 8E, the power conversion device 100 can output a voltage having a smaller harmonic component.

[Second Embodiment] In the first embodiment, in the multi-stage type power conversion device 100 in which a plurality of converter cells 20 are connected in series, a case where each converter cell 20 outputs a voltage of three levels has been described. In the second embodiment, the case where each converter cell 20 outputs a voltage of two levels will be described with reference to FIG. Also in the second embodiment, the block diagram of the power conversion device 100 shown in FIG. 1, the circuit configuration diagram of the converter cell 20 shown in FIG. 2, and the block diagram of the primary side gate pulse generation unit 102 shown in FIG. , The block diagram of the carrier wave generation unit 300 shown in FIG. 4 has the same configuration.

In the second embodiment, in the configuration of the converter cell 20-1 shown in FIG. 2, in order for the AC / DC power converter 23 on the primary side to output a voltage of two levels, all of the switching elements Q1 to Q4 are turned off. The period of the state is eliminated, and control is performed so that any pair of the switching elements Q1 and Q4 or the switching elements Q2 and Q3 is always turned on. As a result, the AC / DC power converter 23 of the power conversion unit 101 outputs two levels (−Vdc1, Vdc1) of voltage.

9 (a) to 9 (e) are diagrams showing waveforms of signals and the like in the second embodiment when “k = 3” is set. However, the number of series connections P of the converter cell 20 is "1". Further, the output voltage range of the power conversion unit 101 is set to -1 to 1 (Vlim = Vdc1 = 1), and the threshold value 1 and the threshold value 1'are both set to 0.

FIG. 9A shows the first voltage command value VREFR and the carrier wave Sm, where the horizontal axis is the phase and the vertical axis is the voltage. In FIG. 9B, the gate pulse signal GT11 is shown by a solid line, the gate pulse signal GT11'is shown by a broken line, the horizontal axis is the phase, and the vertical axis is the voltage. FIG. 9C shows the second voltage command value VREFR'and the phase voltage between the R phase line 30R and the neutral line 30N, with the horizontal axis representing the phase and the vertical axis representing the voltage. FIG. 9D shows the second voltage command value VREFR'-the second voltage command value VREFS', and the line voltage between the R phase line 30R and the S phase line 30S. The horizontal axis is the phase and the vertical axis is the voltage. Is. FIG. 9E shows the harmonic component of the line voltage, the horizontal axis is the order, and the vertical axis is the voltage.

Similar to the first embodiment, as shown in FIG. 9A, the phase relationship between the carrier wave Sm and the first voltage command value VREFR is synchronized. As shown in FIG. 9C, the phase voltage of the power conversion unit 101 appearing between the R phase line 30R and the neutral line 30N has a symmetrical waveform with 180 ° as a boundary. Further, the second voltage command value VREFR'is controlled so as not to exceed the output voltage range of -1 to 1. From the result of the harmonic component of the line voltage shown in FIG. 9 (e), it can be confirmed that the harmonic component of the order of a multiple of 3 does not appear in the line voltage.

As described above, in the multi-stage type power conversion device 100 in which a plurality of converter cells 20 are connected in series, even when each converter cell 20 outputs a voltage of two levels, the same effect as that of the first embodiment is obtained. Is obtained.

[Third Embodiment] In the first embodiment and the second embodiment, the multi-stage type power conversion device 100 shown in FIG. 1 is targeted, but it may be applied to other types of power conversion devices. FIG. 10 is a block diagram of the power conversion device 1000 according to the third embodiment.

As shown in FIG. 10, the power conversion device 1000 includes a power conversion unit 1001 and a gate pulse generation unit 1002. The power conversion device 1000 performs bidirectional or unidirectional power conversion between the DC system 50 and the three-phase AC system 60. Here, the DC system 50 has a terminal 50P and a terminal 50N. Further, the AC system 60 has a U-phase terminal 60U, a V-phase terminal 60V, and a W-phase terminal 60W. As an example, a battery power source can be adopted as the DC system 50, and a motor or the like can be adopted as the AC system 60.

The control unit 1003 detects the voltage and current of the DC system 50 and the AC system 60, and outputs the first voltage command values VREFU, VREFV, and VREFW to the gate pulse generation unit 1002.
The gate pulse generation unit 1002 generates gate pulse signals GTup, GTun, GTbp, GTvn, GTwp, GTwn for controlling the switching elements Cup, Qun, Qbp, Qvn, Qwp, and Qwn contained in the power conversion unit 1001. Let me.

FIG. 11 shows a circuit configuration diagram of the power conversion unit 1001.
The power conversion unit 1001 has a pair of

DC system terminals

70a and 70b, a pair of

AC system terminals

71a, 71b and 71c, and

capacitors

72a and 72b. Further, in the power conversion unit 1001, the switching element Cup and the switching element Qun, the switching element Qvp and the switching element Qvn, and the switching element Qwp and the switching element Qwn are connected in series, and a circuit composed of a pair of these two switching elements is connected in parallel. It is connected to the. That is, each switching element constitutes a three-phase bridge circuit, and the power conversion unit 1001 performs power conversion between DC power and three-phase AC power. Further, each switching element Cup, Qun, Qbp, Qvn, Qwp, Qwn has an FWD connected in antiparallel. In the present embodiment, these switching elements Cup, Qun, Qbp, Qvn, Qwp, and Qwn are, for example, MOSFETs. In the power conversion unit 1001, the voltage that appears between both ends of the

capacitors

72a and 72b is called the DC link voltage Vdc.

The details of the gate pulse generation unit 1002 are the same as those of the primary side gate pulse generation unit 102 shown in FIG. 3, and the description thereof will be omitted. The gate pulse generation unit 1002 generates "LOW" or "HIGH" gate pulse signals GTup, GTun, GTbp, GTvn, GTwp, GTwn based on the first voltage command values VREFU, VREFV, and VREFW. These gate pulse signals GTup, GTun, GTbp, GTvn, GTwp, and GTwn are supplied to the switching elements Cup, Qun, Qbp, Qvn, Qwp, and Qwn, respectively, and control their on / off states.

In the power conversion unit 1001, in a circuit consisting of a pair of a switching element Cup and a switching element Qun, a switching element Qvp and a switching element Qvn, and a switching element Qwp and a switching element Qwn, when one of them is in the ON state, the other is always in the OFF state. It is controlled so as to be.

The voltage that appears between any two of the

AC system terminals

71a, 71b, and 71c of the power conversion unit 1001 is Vdc or -Vdc. That is, the power conversion unit 1001 is a power conversion unit that outputs two levels of voltage.

From this, in the third embodiment, the two-level power conversion device shown in the second embodiment described with reference to FIG. 9 can be applied. However, the gate pulse signals GTup and GTun in the third embodiment correspond to the gate pulse signals GT11 and GT11'in the second embodiment. The same applies to the gate pulse signals GTvp, GTvn, GTwp, and GTwn. Also in the third embodiment, the same effect as that of the first embodiment or the second embodiment can be obtained.

[Fourth Embodiment] In the fourth embodiment, the control when the coefficient k is set to an even number of 2 or more will be described.
FIG. 12 is a block diagram of the carrier wave generation unit 1200 according to the fourth embodiment. It differs from the carrier wave generation unit 300 in the first embodiment in that it includes an amplitude adjustment unit 1201 that adjusts the carrier wave amplitude Ma. Also in the fourth embodiment, the block diagram of the power conversion device 100 shown in FIG. 1, the circuit configuration diagram of the converter cell 20 shown in FIG. 2, and the block diagram of the primary side gate pulse generation unit 102 shown in FIG. Has a similar configuration.

As shown in FIG. 14, the output of the limiter 404 is multiplied by the triangular wave Stri by the multiplier 405 via the amplitude adjusting unit 1201.
The amplitude adjusting unit 1201 controls the carrier wave amplitude Ma so that the peak values of the second voltage command values VREFR', VREFS', and VREFT' match the maximum output voltage Vlim of the power converter 100. That is, the amplitude adjusting unit 1201 calculates the limiter 404 so that the sum of the amplitude values of the second voltage command values VREFR', VREFS', and VREFT'and the amplitude value of the carrier wave Sm matches the maximum voltage Vlim. To adjust.

When the coefficient k is set to an even number of 2 or more, the triangular wave generating unit 402 generates the triangular wave Stri according to the following equation (6).
In the case of [k = 2,4,6,8, ...], Stri = (2 / π) · arcsin (sin ((k · π / Va) · (Vmax + Vmin))) ... (6)

13 (a) to 13 (e) are diagrams showing waveforms of signals and the like in the fourth embodiment when "k = 4" is set. However, the number of series connections P of the converter cell 20 is "1". Further, the output voltage range of the power conversion unit 101 is set to -1 to 1 (Vlim = Vdc1 = 1), and the threshold value 1 and the threshold value 1'are set to 0.5 and −0.5, respectively.

As shown in FIG. 13A, the carrier wave Sm does not have a perfect triangular wave shape, but the phase relationship between the carrier wave Sm and the first voltage command value VREFR is synchronized. However, the timing at which the first voltage command value VRREF and the carrier wave Sm reach their peak values is different. When k is set to an odd number of 1 or more (k = 1, 3, 5, ...), The timing at which the first voltage command value VRREF and the carrier wave Sm become peak values coincide with each other. For this reason, in the fourth embodiment, in order to obtain the same effect as in the other embodiments, an amplitude adjusting unit 1201 that adjusts the carrier wave amplitude Ma according to the set value of the coefficient k is added.

Further, as shown in FIG. 13B, the gate pulse signals GT11 and GT11' obtained from the comparison result between the addition result VREFR'of the carrier wave Sm and the voltage command value VREFR and the threshold value have a phase difference of 180 °. It becomes the same signal. Then, as shown in FIG. 13C, the phase voltage of the power conversion unit 101 appearing between the R phase line 30R and the neutral line 30N has a symmetrical waveform with 180 ° as a boundary. Further, the second voltage command value VREFR'is controlled so as not to exceed the output voltage range of -1 to 1, and the voltage corresponding to the first voltage command value VREFR can be output with high accuracy. The line voltage of the power conversion unit 101 appearing between the R phase line 30R and the S phase line 30S corresponds to "VREFR'-VREFS'" and has a sinusoidal waveform as shown in FIG. 13 (d). There is. From the result of the harmonic component of the line voltage shown in FIG. 13 (e), it can be confirmed that the harmonic component of the order of a multiple of 3 does not appear in the line voltage.

<Modification 1> The present invention is not limited to the above-described embodiments, and includes various modifications. For example, each of the above embodiments has been described in detail to aid in understanding of the present invention and is not necessarily limited to those comprising all of the described configurations. Further, it is possible to replace a part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. Further, it is possible to add / delete / replace other configurations with respect to a part of the configurations of each embodiment.

Possible modifications for each of the above embodiments are, for example:
The AC / DC power converters 23 to 26 shown in FIG. 2 are H-bridges that use switching elements so that they can convert power in both directions. However, if it is sufficient to convert power in one direction, AC / DC power converters An H-bridge using a rectifying element may be applied in a part of 23 to 26. As an example, the AC / DC power converter 25 can be replaced with an AC / DC power converter to which four rectifying elements (not shown) are applied. Also in this modification, the transformer potential difference of the high-frequency transformer 29 is the same as in each of the above-described embodiments, so that the power conversion device 100 can be configured in a small size and at low cost. The four rectifying elements used in constructing this modification may be a semiconductor diode, a vacuum tube type mercury rectifier, or the like. When a semiconductor is applied, any material such as Si, SiC, and GaN can be applied as the material.

<Modification 2> It is assumed that the converter cell 20 in each of the above-described embodiments is an AC system on both the primary side and the secondary side. However, one of the primary side and the secondary side may be a DC system. As an example thereof, it is possible to replace the AC / DC power converter 26 shown in FIG. 2 with a configuration in which the AC / DC power converter 26 is removed. In this case, the voltage V1-1 appearing between the

terminals

22a and 22b becomes the secondary side DC link voltage Vdc2 appearing at both ends of the capacitor 28. In this modified example, the primary side is an AC system and the secondary side is a DC system, but the primary side may be a DC system and the secondary side may be an AC system.

According to the embodiment described above, the following effects can be obtained.
(1) The

power conversion devices

100 and 1000 include

power conversion units

101 and 1001 that control on / off of a plurality of switching elements Q1 to Q4 and Q5 to Q8 to convert power, and a plurality of phases that indicate a desired output voltage. Gate pulse signals GT11 to GT1P, GT11'to GT1P', GT21 to GT2P, GT21' to GT2P', which control the on / off of switching elements Q1 to Q4 and Q5 to Q8 based on the first voltage command values VREFR, VREFS, and VREFT. It is a power conversion device including gate

pulse generation units

102, 103, 1002 that generate GTup, GTbp, GTwp, GTun, GTvn, GTwn, and the gate

pulse generation units

102, 103, 1002 are the first of each of a plurality of phases. Based on the voltage command values VREFR, VREFS, and VREFT, a carrier Sm whose phase is synchronized with respect to the first voltage command values VREFR, VREFS, and VREFT is generated, and the carrier Sm is added to the first voltage command values VREFR, VREFS, and VREFT. Then, the second voltage command values VREFR', VREFS', and VREFT'are generated. As a result, harmonics can be suppressed even when the frequency of the carrier wave cannot be set sufficiently high with respect to the voltage command value.

(2) The control method of the

power conversion devices

100 and 1000 is to instruct the

power conversion units

101 and 1001 that control the on / off of a plurality of switching elements Q1 to Q4 and Q5 to Q8 to convert the power and a desired output voltage. Gate pulse signals GT11 to GT1P, GT11'to GT1P', GT21 to GT2P, GT21'- A control method for

power conversion devices

100, 1000 including

gate pulse generators

102, 103, 1002 for generating GT2P', GTup, GTbp, GTwp, GTun, GTvn, GTwn, wherein the

gate pulse generators

102, 103, With 1002, a carrier Sm whose phase is synchronized with respect to the first voltage command values VREFR, VREFS, and VREFT is generated based on the first voltage command values VREFR, VREFS, and VREFT of the plurality of phases, and the carrier Sm is set to the first voltage. The second voltage command values VREFR', VREFS', and VREFT'are generated by adding to the command values VREFR, VREFS, and VREFT. As a result, harmonics can be suppressed even when the frequency of the carrier wave cannot be set sufficiently high with respect to the voltage command value.

The present invention is not limited to the above-described embodiments, and other embodiments that can be considered within the scope of the technical idea of the present invention are also included within the scope of the present invention as long as the features of the present invention are not impaired. Is done. Further, the configuration may be a combination of each of the above-described embodiments and a plurality of modifications.

100, 1000 ... Power conversion device, 101, 1001 ... Power conversion unit, 102 ... Primary side gate pulse generation unit, 103 ... Secondary side gate pulse generation unit, 104 ... Primary Side control unit, 105 ... Secondary side control unit, 20-1 to 20-P ... Converter cell, 300, 600, 1200 ... Carrier generator, CMP11 to CMP1P ... Comparer, CMP11' ～ CMP1P'・・・ Comparison device, 400 ・・・ Voltage command comparison unit, 401 ・・・ Voltage amplitude calculation unit, 402 ・・・ Triangular wave generation unit, 404 ・・・ Limiter, 1002 ・・・ Gate pulse generation unit, 1003 ... Control unit, 1201 ... Vibration adjustment unit, Q1 to Q4, Q5 to Q8, Cup, Qun, Qbp, Qvn, Qwp, Qwn ... Switching element, GT11 to GT1P, GT11'to GT1P'.・・ Gate pulse signal (primary side), GT21 to GT2P, GT21'to GT2P' ・・・ Gate pulse signal (secondary side), GTup, GTbp, GTwp ・・・ Gate pulse signal (upper arm side), GTun , GTvn, GTwn ... Gate pulse signal (lower arm side), VREFR, VREFS, VREFT ... First voltage command value (primary side), VREFU, VREFV, VREFW ... First voltage command value (2) Next side), VREFR', VREFS', VREFT'... Second voltage command value (primary side), VREFU', VREFV', VREFW'... Second voltage command value (secondary side), Sm.・・ Carrier, Stri ・・・ Triangular wave, Ma ・・・ Carrier amplitude, Va ・・・ Voltage amplitude, Vlim ・・・ Maximum voltage.

Claims

A power converter that controls the on / off of a plurality of switching elements to convert power, and a gate pulse signal that controls the on / off of the switching element based on a multi-phase first voltage command value that indicates a desired output voltage are generated. A power conversion device including a gate pulse generator
The gate pulse generator generates a carrier wave whose phase is synchronized with the first voltage command value based on each first voltage command value of the plurality of phases, and adds the carrier wave to the first voltage command value. A power converter that generates a second voltage command value.
In the power conversion device according to claim 1,
The gate pulse generator has an amplitude of the carrier wave so that the second voltage command value straddles a preset threshold value with respect to the magnitude of the voltage a plurality of times within one cycle of the first voltage command value. A power conversion device that controls the above and generates the gate pulse signal based on the comparison result between the second voltage command value and the threshold value.
In the power conversion device according to claim 2,
The gate pulse generation unit includes a carrier wave generation unit.
The carrier wave generation unit includes a voltage command comparison unit, a voltage amplitude calculation unit, a triangle wave generator, a subtractor, a limiter, and a multiplier.
The voltage command comparison unit compares the first voltage command values of each phase with each other and outputs the maximum value Vmax and the minimum value Vmin from them.
The voltage amplitude calculation unit calculates the voltage amplitude Va based on the first voltage command value of each phase, and then calculates the voltage amplitude Va.
The triangular wave generating unit generates a triangular wave Stri having an amplitude of 1 based on the following equation.
The subtractor outputs the result of subtracting the voltage amplitude Va from the maximum voltage Vlim that can be output by the power converter.
The limiter limits the operation result of the subtractor so that it does not become a negative value.
The multiplier is a power conversion device that generates the carrier wave by multiplying the triangular wave Stri by the calculation result of the subtractor via the limiter.
In the case of [k = 1,5,9,13, ...], Stri = (2 / π) · arcsin (sin ((k · π / Va) · (Vmax + Vmin))) [k = 3,7,11, In the case of [15, ...], Stri =-(2 / π) · arcsin (sin ((k · π / Va) · (Vmax + Vmin))) However, k is an odd number of 1 or more (k = 1,3,5). ...).
In the power conversion device according to claim 2,
The gate pulse generation unit includes a carrier wave generation unit.
The carrier wave generation unit includes a voltage command comparison unit, a voltage amplitude calculation unit, a triangular wave generation unit, a subtractor, a limiter, an amplitude adjustment unit, and a multiplier.
The voltage command comparison unit compares the first voltage command values of each phase with each other and outputs the maximum value Vmax and the minimum value Vmin from them.
The voltage amplitude calculation unit calculates the voltage amplitude Va based on the first voltage command value of each phase, and then calculates the voltage amplitude Va.
The triangular wave generating unit generates a triangular wave Stri having an amplitude of 1 based on the following equation.
The subtractor outputs the result of subtracting the voltage amplitude Va from the maximum voltage Vlim that can be output by the power converter.
The limiter limits the calculation result of the subtractor so that it does not become negative.
The amplitude adjusting unit adjusts the calculation result of the limiter so that the sum of the amplitude value of the second voltage command value and the amplitude value of the carrier wave matches the maximum voltage Vlim.
The multiplier is a power conversion device that generates the carrier wave by multiplying the triangular wave Stri by the calculation result of the subtractor via the limiter.
In the case of [k = 2,4,6,8, ...], Stri = (2 / π) · arcsin (sin ((k · π / Va) · (Vmax + Vmin))) However, k is an even number of 2 or more ( k = 2, 4, 6, ...).
In the power conversion device according to any one of claims 2 to 4.
The power conversion unit is a power conversion device that outputs three levels of voltage, positive, negative, and zero.
In the power conversion device according to any one of claims 2 to 4.
The power conversion unit is a power conversion device that outputs two levels of positive and negative voltages.
In the power conversion device according to any one of claims 2 to 4.
The power conversion unit is a power conversion device that converts power between DC power and three-phase AC power.
A power converter that controls the on / off of a plurality of switching elements to convert power, and a gate pulse signal that controls the on / off of the switching element based on a multi-phase first voltage command value that indicates a desired output voltage are generated. It is a control method of a power conversion device including a gate pulse generator.
The gate pulse generator generates a carrier wave whose phase is synchronized with the first voltage command value based on each first voltage command value of the plurality of phases, and adds the carrier wave to the first voltage command value. A control method for a power converter that generates a second voltage command value.
In the control method of the power conversion device according to claim 8,
The amplitude of the carrier so that the second voltage command value straddles a preset threshold value for the magnitude of the voltage a plurality of times within one cycle of the first voltage command value by the gate pulse generation unit. A control method of a power conversion device that controls the above and generates the gate pulse signal based on the comparison result between the second voltage command value and the threshold value.