JPS6022679Y2 - D/A converter - Google Patents

Description

[Detailed Description of the Invention] This invention relates to a D/A converter that converts a digital input into a pulse train using a comparator and an up/down counter, and obtains an analog output by integrating this pulse train.

Conventionally proposed D/A converters generate analog voltage levels using a resistor whose resistance value corresponds to the weight of each bit of the digital input, and convert those analog voltage levels using an analog switch that responds to the digital input. There is a system in which the purpose of D/A conversion is distantly related by appropriately reading out the data.

However, this type of D/A converter has drawbacks in that it requires a highly accurate reference power source and resistor, and also has a complex configuration, making it unsuitable for IC implementation.

The purpose of this invention is to provide an A/A converter suitable for IC implementation that can perform D/A conversion with a relatively simple configuration without using a high-precision voltage source or resistor.

This invention is a distant relative of the above object, in which a comparator and an up/down counter are used to convert a digital input into a pulse train, and this pulse train is integrated to obtain an analog output. Examples will now be described in detail with reference to the accompanying drawings.

In FIG. 1, 10 is a comparator to which a digital input DIN is applied to one input terminal A, 12 is a clock pulse source that generates a high-frequency clock pulse CP, and 14 is a mode designation signal MS consisting of the comparison output of the comparator 10. The high frequency clock pulses CP are counted in up or down mode according to the
an up/down counter that supplies the other input terminal B of 0;
16 is an integrating circuit including a capacitor C and a resistor R for integrating the mode designation signal MS consisting of the output of the comparator 10, and the analog output AOUT is connected to the integrating circuit 16.
is taken out from the output end of.

Note that the frequency of the clock pulse CP generated from the clock pulse source 12 is determined in advance so as to be sufficiently higher than the rate of change of the digital input DIH.

FIG. 2 is for explaining the circuit operation of the D/A converter having the above configuration, and shows, as an example, the digital input Dr.
Nha sequential i:' 1010110110 J.

r1010111000J1101011011O indicates a change in numerical value.

The comparator 10 compares the numerical value A of the digital input DIN and the numerical value B of the count output from the up/down counter 14, and when A>B, it is 1°, and on the other hand, when A<B, it is 0°. A comparison output, that is, a mode designation signal MS, which assumes a logical level is generated.

Comparator 1 while numerical value A maintains a constant level
The output signal MS of 0 has the same pulse width and repeats "1" and 44099 alternately at the same pulse interval, but the numerical value A
When the value suddenly increases or decreases, a change occurs in the pulse width or pulse interval of the signal MS, as shown in FIG. 2, and the degree of this change corresponds to the magnitude of the numerical change.

Therefore, if the signal MS is passed through the integrating circuit 16 and integrated,
An analog output AOUT as shown in FIG. 2 can be obtained.

According to FIG. 2, it can be seen that the amplitude change pattern Q of the analog output AOUT corresponds to the numerical change pattern P of the digital input DIN shown at the top.

As described above, according to this invention, a D/A converter with a simple configuration can be realized without using a high-precision low resistor or voltage source.

In the circuit shown in FIG. 2, the entire system from the comparator 10 to the integrating circuit 16 can be easily integrated into an IC, making it possible to significantly reduce costs.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a D/A converter according to an embodiment of the invention, and FIG. 2 is a time chart for explaining the operation of the device shown in FIG. 10...◆... Comparator, 12... Clock pulse source, 14... Up/down counter, 16... Integrating circuit.

Claims (1)

[Scope of utility model registration request] (a) a clock pulse source that generates high-frequency clock pulses; (b) an up-down counter that counts the high-frequency clock pulses; and (C) a digital input and a count output of the up-down counter that compares and outputs the comparison output. A D/A converter comprising: a comparator that simultaneously supplies an up-down mode control signal to the up-down counter; and (d) an integrating circuit that integrates the comparison output and generates an analog output.