JPH0815394B2 - Connection / control method of multiple coupling inverter device - Google Patents
Connection / control method of multiple coupling inverter deviceInfo
- Publication number
- JPH0815394B2 JPH0815394B2 JP58204168A JP20416883A JPH0815394B2 JP H0815394 B2 JPH0815394 B2 JP H0815394B2 JP 58204168 A JP58204168 A JP 58204168A JP 20416883 A JP20416883 A JP 20416883A JP H0815394 B2 JPH0815394 B2 JP H0815394B2
- Authority
- JP
- Japan
- Prior art keywords
- phase
- voltage
- inverter
- reactor
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
Description
【発明の詳細な説明】 技術分野 本発明は、電圧形PWM制御インバータを複数、並列に
接続し、各インバータ同相出力端子間に相間リアクトル
を備えた多重結合インバータ装置に係り、特にその電流
リツプルを低減する制御方法に関する。Description: TECHNICAL FIELD The present invention relates to a multiple coupling inverter device in which a plurality of voltage-type PWM control inverters are connected in parallel and an interphase reactor is provided between the inverter in-phase output terminals. Control method to reduce.
従来技術 第１図は３相電圧形インバータの回路例、第２図はこ
れをPWM制御した場合の出力電圧および出力線間電圧の
波形図（Ｔは一周期）である。本例ではキヤリヤ信号の
周波数が常に出力周波数の整数倍となる同期形で、パル
ス幅が等しい等パルス幅制御の場合を示しているが、非
同期形や不等パルス幅制御（正弦波PWM等）が広く使わ
れている。また、運転条件に応じて同期形と非同期形を
切替えたり、周期形の一周期内のパルス数を切替える手
法が実用されている。Prior Art FIG. 1 is a circuit example of a three-phase voltage source inverter, and FIG. 2 is a waveform diagram (T is one cycle) of an output voltage and an output line voltage when the PWM control of the inverter is performed. In this example, the carrier type is a synchronous type in which the frequency of the carrier signal is always an integer multiple of the output frequency, and the case of equal pulse width control with equal pulse width is shown, but asynchronous type or unequal pulse width control (sine wave PWM, etc.) Is widely used. Further, a method of switching between the synchronous type and the asynchronous type or switching the number of pulses in one cycle of the periodic type according to the operating conditions has been put into practical use.
このようなPWM制御では、次のような問題点がある。 Such PWM control has the following problems.
（１） キヤリヤ信号の周波数を高くとれる高速スイツ
チング素子（例えばパワートランジスタ）では素子容量
が限られており、並列に接続してもインバータ出力は制
限される。(1) A high-speed switching element (for example, a power transistor) capable of increasing the frequency of the carrier signal has a limited element capacity, and even if they are connected in parallel, the inverter output is limited.
（２） スイツチングロスと制御性能からキヤリヤ信号
の周波数を上げるのに限度がある。(2) There is a limit to increase the frequency of the carrier signal due to switching loss and control performance.
（３） 出力電圧がキヤリヤ信号で直流電圧の全振幅に
わたつてフルスイツチングするので電流変化率（di/d
t）が大きい。(3) Since the output voltage is a carrier signal and is fully switched over the entire amplitude of the DC voltage, the current change rate (di / d
t) is large.
（４） （２），（３）のために電流リツプルが大きく
なり、電動機の振動、騒音、発熱を増大させる。また、
直流回路にリツプル電流耐量の大きいコンデンサが必要
となる。ピーク電流が大きいため定格出力電流を低下さ
せなければならない。(4) Due to (2) and (3), the current ripple becomes large, which increases vibration, noise, and heat generation of the electric motor. Also,
A capacitor with a large ripple current withstanding capability is required in the DC circuit. The rated output current must be reduced because the peak current is large.
このため、一般に複数個のインバータを多重結合して
波形改善と大容量化を実現する方法として同相出力端子
間に相間リアクトルを備えたトランス結合が実用されて
いる。この方法によると２重結合の場合、第５次、第７
次の高調波を除去できる（参考文献:IPEC−Tokyo Confe
rence 83'Record“Large Capacity Parallel Redundant
Transistor UPS"PP660〜671）。For this reason, generally, a transformer coupling having an interphase reactor between the in-phase output terminals is put into practical use as a method of realizing a waveform improvement and a large capacity by multiple coupling a plurality of inverters. According to this method, in the case of double bond, the fifth and seventh
Next harmonic can be removed (Reference: IPEC-Tokyo Confe
rence 83'Record “Large Capacity Parallel Redundant
Transistor UPS "PP660 ~ 671).
第３図（Ａ）はこの手法を適用したもので、第１図の
構成のインバータを２組、すなわちU1,V1,W1相のインバ
ータ１、U2,V2,W3相のインバータ２を組合せ、U,V,W相
の各出力端子を相間リアクトルLU,LV,LWで結合したもの
である。第３図（Ｂ）は第３図（Ａ）の等価回路であ
る。第４図は第３図の回路においてインバータ２の１
相、例えばU2相をインバータ１の対応する１相、例えば
U1相に対して位相を30゜遅らせて制御した場合の波形図
（Ｔは１周期）である。この出力線間電圧eU-Vの高調波
成分は第５次が5.9％、第７次が3.9％で、通常の場合の
20％（第５次）、14％（第７次）に比較すると格段に改
善されるが零にはならない。また、このような低次の高
調波成分は不等パルス幅PWM制御によつて容易に除去で
きるのでインバータの多重化の意義は薄い。This method is applied to FIG. 3 (A), and two sets of inverters having the configuration shown in FIG. 1 are used, that is, U 1 , V 1 , W 1 phase inverter 1, U 2 , V 2 , W 3 phase inverter Inverter 2 is combined and each output terminal of U, V, and W phases is connected by interphase reactors L U , L V , and L W. FIG. 3 (B) is an equivalent circuit of FIG. 3 (A). FIG. 4 shows the inverter 1 of the circuit of FIG.
Phase, eg U 2 phase, to the corresponding 1 phase of the inverter 1, eg
It is a waveform diagram (T is one cycle) when the phase is controlled by delaying 30 ° with respect to the U 1 phase. The harmonic components of this output line voltage e UV are 5.9% for the 5th order and 3.9% for the 7th order.
Compared to 20% (fifth) and 14% (seventh), it is markedly improved, but not zero. Further, since such low-order harmonic components can be easily removed by the unequal pulse width PWM control, the significance of multiplexing the inverters is small.
発明の目的 したがつて、本発明の目的は、電圧形PWM制御インバ
ータを複数、並列に接続し、各インバータの同相出力端
子間に相間リアクトルを備えた多重結合インバータ装置
において、キヤリヤ信号の周波数相当のリツプル電流を
低減する制御方法を提供することである。Therefore, the object of the present invention is to connect a plurality of voltage-type PWM control inverters in parallel and to provide a multi-coupled inverter device having an interphase reactor between the in-phase output terminals of each inverter. Is to provide a control method for reducing the ripple current of
発明の構成 本発明の多重結合インバータ装置の接続・制御方法
は、同相モードと逆相モードを有し、同相モードでは各
相の正側直流母線に接続されたスイッチング素子群また
は負側直流母線に接続されたスイッチング素子群を同時
にオンさせて前記リアクトルを電流バランサとして作用
させることにより正または負の直流母線電位をそのまま
出力させ、逆相モードでは一方のインバータの正側スイ
ッチング素子と他方のインバータの負側スイッチング素
子とをオンさせ前記リアクトルを単巻トランスとして作
用させることにより正負直流母線電位の中間の電位を出
力させ、ある周期内に前記リアクトルに印加される電圧
の平均値がほぼゼロになるように制御するものである。Configuration of the invention, the connection and control method of the multi-coupled inverter device of the present invention has a common mode and a negative phase mode, in the common mode, to the switching element group or the negative DC bus connected to the positive DC bus of each phase. A positive or negative DC bus potential is output as it is by simultaneously turning on the connected switching element group and causing the reactor to act as a current balancer, and in the negative phase mode, the positive side switching element of one inverter and the other inverter By turning on the negative side switching element and operating the reactor as a single-turn transformer, an intermediate potential between the positive and negative DC bus potentials is output, and the average value of the voltage applied to the reactor within a certain period becomes almost zero. To control it.
したがって、各インバータ装置から負荷に供給される
電流は常にほぼ等しく、自動的に電流がバランスする。
相間リアクトルは漏洩インダクタンスを除いてリアクト
ルとしての機能は無いので、電圧降下は発生しない。そ
のため、高調波を抑制する低域通過フィルタとしての機
能は果さないが、交流電動機駆動の場合は、電動機の漏
洩インダクタンスがあるため、外部リアクトルは一般的
に不要である。電圧パルスの振幅が1/n（ｎはインバー
タ装置の数）となるので、見かけ上のキャリア周波数が
ｎ倍になることに加え、電流リップルが低減される。リ
ツプルの周波数は大きい程、フイルタで平滑され易くな
る。Therefore, the currents supplied from the respective inverter devices to the load are always substantially equal, and the currents are automatically balanced.
Since the interphase reactor does not function as a reactor except for the leakage inductance, no voltage drop occurs. Therefore, it does not function as a low-pass filter that suppresses harmonics, but in the case of driving an AC motor, an external reactor is generally unnecessary because of the leakage inductance of the motor. Since the amplitude of the voltage pulse is 1 / n (n is the number of inverter devices), the apparent carrier frequency is increased by n times and the current ripple is reduced. The larger the ripple frequency, the easier it is to smooth the filter.
実施例 以下、本発明を第３図の２重結合インバータ装置の場
合について説明する。各インバータ1,2を制御する不図
示のインバータ制御回路のキヤリヤ信号C1,C2は360
゜/2＝180゜の位相差を有している。先づ、インバータ
装置の動作を第５図によりＵ相を例にとつて説明する。
同図（Ａ）は同相モード時、同図（Ｂ）は逆相モード時
の動作を示し、実線が電流が流れる部分、破線が電流が
流れない部分、矢印が電流の流れる方向を示す。同相モ
ードでは両相U1,U2ともＰ側またＮ側のパワートランジ
スタが同時にオンしているので、この場合相間リアクト
ルLUは電流バランサとして作用し、中間タツプの電位は
Ｐ側と同電位で、全体の電流をIUとすると各々のパワー
トランジスタを流れる電流は共にIU/2である。逆相モー
ドでは一方の相のＰ側のパワートランジスタがオン、他
方の相のＮ側のパワートランジスタがオンしている。こ
の場合、相間リアクトルLUは単巻トランスとして動作
し、中間タツプの電位は直流母線の中性点ｎと同電位と
なる。リアクトルLUによる励磁電流をI0とすると入力電
流、出力電流はそれぞれ IU（IU》L0）となり、出力電流は入力電流の２倍とな
る。Embodiment Hereinafter, the present invention will be described in the case of the double-coupled inverter device shown in FIG. Carrier signals C1 and C2 of an inverter control circuit (not shown) that controls each inverter 1 and 2 are 360
It has a phase difference of ° / 2 = 180 °. First, the operation of the inverter device will be described with reference to FIG. 5 by taking the U phase as an example.
The figure (A) shows the operation in the in-phase mode, and the figure (B) shows the operation in the anti-phase mode. The solid line indicates the portion where the current flows, the broken line indicates the portion where the current does not flow, and the arrow indicates the direction in which the current flows. In the common mode, the power transistors on the P side and the N side of both phases U 1 and U 2 are turned on at the same time, so in this case the interphase reactor L U acts as a current balancer, and the potential of the intermediate tap is the same potential as the P side. And, if the total current is I U , the current flowing through each power transistor is I U / 2. In the reverse phase mode, the P-side power transistor of one phase is on and the N-side power transistor of the other phase is on. In this case, the interphase reactor L U operates as a single-turn transformer, and the potential of the intermediate tap becomes the same potential as the neutral point n of the DC bus. If the exciting current by the reactor L U is I 0 , the input current and output current are I U (I U >> L 0 ), and the output current is twice the input current.
第6A図〜第6D図は、第２図のθ１〜θ２の任意の区間
の電圧波形のうちＵ相、Ｖ相間の出力線間電圧eU-Vに対
応する電圧波形図である。この場合、Ｖ相の電位eVをＮ
側の−Edc/2に固定し、Ｕ相の電位eUをＰ側、Ｎ側のEdc
/2と−Edc/2に切替えてＵ相、Ｖ相間の出力線間電圧e
U-Vを直流母線の中性点ｎの電位０を加えた±Edc, ０の５種類の電圧値に制御するものである。U1相はキヤ
リヤ信号C1で変調され、U2相はキヤリヤ信号C2で変
調される。キヤリヤ信号C1とC2は前述のように360
゜/2＝180゜の位相差が与えられている。U1相とU2相が
同相モード、すなわちU1相の出力電圧eU1とU2相の出力
電圧eU2が同電位のとき、その電位−Edc/2またはEdc/2
が電圧eUとして出力端子Ｕに現われ、相間リアクトルLU
には電圧が印加されず、U1相とU2相が逆相モード、すな
わちU1相の出力電圧eU1とU2相の出力電圧eU2が異電位の
とき、出力端子Ｕの電位eUは直流母線の中性点ｎの電位
と同電位の０となり、相間リアクトルLUには直流電圧Ed
c/2または−Edc/2が印加されている。以上から、Ｕ相、
Ｖ相間の出力線間電圧eU-Vの波形は図示のようになる。
出力線間電圧eV-W,eW-Uについても同様の電圧波形とな
る。Figure 6A-FIG. 6D is a U-phase voltage waveform corresponding to the output line voltage e UV between the V-phase of the second view of the theta 1 through? 2 of any section of the voltage waveform. In this case, the potential e V of the V phase is changed to N
Fixed at −Edc / 2 on the side, and the U-phase potential e U on the P and N sides of Edc
Output line voltage e between U and V phases by switching between / 2 and -Edc / 2
± Edc with UV added to the potential 0 of neutral point n of DC bus, It controls to five kinds of voltage value of 0. The U 1 phase is modulated by the carrier signal C 1 , and the U 2 phase is modulated by the carrier signal C 2 . The carrier signals C1 and C2 are 360 as described above.
A phase difference of ° / 2 = 180 ° is given. U 1 phase and U 2 phases common mode, that is, when the output voltage e U1 and U 2 phases of the output voltage e U2 of U 1 phase of the same potential, the potential-EDC / 2 or Edc / 2
Appears at the output terminal U as voltage e U , and the interphase reactor L U
No voltage is applied to, when U 1 phase and U 2 phases reversed-phase mode, that is, the output voltage e U1 and the output voltage e U2 of U 2 phases of U 1 phase is different potentials, the potential of the output terminal U e U becomes 0, which is the same potential as the neutral point n of the DC bus, and the DC voltage Ed is applied to the interphase reactor L U.
c / 2 or −Edc / 2 is applied. From the above, the U phase,
The waveform of the output line voltage e UV between the V phases is as shown in the figure.
The same voltage waveform is obtained for the output line voltages e VW and e WU .
以上の第6A図〜第6D図は、指令電圧Vrefにより変調信
号、この場合U1相の出力電圧eU1、U2相の出力電圧eU2の
パルス幅、すなわちデユーテイサイクルα（周期は一
定）を変えた場合で、デユーテイサイクルαはそれぞれ
約30％、40％、60％、80％である。出力線間電圧e
U-Vは、デユーテイサイクルα＝０〜50％では０とEdc/2
でスイツチングし、デユーテイサイクルα＝50〜100％
ではEdc/2とEdcでスイツチングする。この出力線間電圧
eU-Vの振幅、すなわちリツプル電圧は第２図の従来の場
合の半分のEdc/2であり、周波数はキヤリヤ信号C1,
C2の周波数の２倍であることがわかる。この周波数が大
きい程、フイルタ（平滑コンデンサ）で平滑され易くな
る。相間リアクトルLUに印加される電圧・電気角積はデ
ユーテイサイクルα＝50％で最大となる。実際のインバ
ータ制御では周波数にほぼ比例させて電圧を制御するの
で電圧・電気角積はα＝０〜50％の間でほぼ一定とな
る。したがつて、α＝50％付近の電圧・時間積が相間リ
アクトルLUの大きさを決定する重要な要素となる。Figure 6A-FIG. 6D above, the modulation signal by the command voltage Vref, the this case U 1 phase of the output voltage e U1, U 2-phase pulse width of the output voltage e U2, i.e. de Yu Tay cycle alpha (cycle When the constant is changed, the duty cycle α is about 30%, 40%, 60%, and 80%, respectively. Output line voltage e
UV is 0 and Edc / 2 at duty cycle α = 0 to 50%
And duty cycle α = 50 to 100%
Now switch with Edc / 2 and Edc. This output line voltage
The amplitude of e UV , that is, the ripple voltage is Edc / 2, which is half that in the conventional case of FIG. 2, and the frequency is the carrier signal C1 ,
It can be seen that it is twice the frequency of C2 . The higher this frequency, the easier it is to be smoothed by the filter (smoothing capacitor). The voltage-electrical angle product applied to the interphase reactor L U becomes maximum at the duty cycle α = 50%. In the actual inverter control, the voltage is controlled in proportion to the frequency, so the voltage-electrical angle product is almost constant between α = 0 to 50%. Therefore, the voltage-time product around α = 50% is an important factor that determines the size of the interphase reactor L U.
第７図は第6A図〜第6D図の出力線間電圧eU-Vを一周期
全区間に展開した波形図である。第８図は正弦波変調を
行なつた場合の波形例（Ｔは１周期）である。FIG. 7 is a waveform diagram in which the output line voltage e UV of FIGS. 6A to 6D is expanded in the entire section of one cycle. FIG. 8 shows a waveform example (T is one cycle) when sine wave modulation is performed.
第９図は三重結合の多重結合インバータ装置の例で、
各インバータのキヤリヤ信号C1,C2,C3の位相差36
0゜/3＝120゜で、出力電圧のリツプルの振幅はEdc/3、
周波数はキヤリヤ信号C1,C2,C3の周波数の３倍と
なる。FIG. 9 shows an example of a triple-coupling multiple-coupling inverter device.
Phase difference of carrier signals C1 , C2 , C3 of each inverter 36
At 0 ° / 3 = 120 °, the output voltage ripple amplitude is Edc / 3,
The frequency is three times the frequency of the carrier signals C1 , C2 , C3 .
以上説明した本発明の方法は、非同期形PWM制御やパ
ルス幅切替PWM制御の多重結合インバータ装置、さらに
は第10図のような電源回生回路にも適用できる。The method of the present invention described above can be applied to a multiple coupling inverter device for asynchronous PWM control or pulse width switching PWM control, and also to a power regeneration circuit as shown in FIG.
発明の効果 本発明は相間リアクトルを同相モードでは電流バラン
サとして、逆相モードでは単巻トランスとして動作させ
ることによって次のような効果がある。Effect of the Invention The present invention has the following effects by operating the interphase reactor as a current balancer in the in-phase mode and as a single-winding transformer in the anti-phase mode.
（１）電流バランスのすぐれた多重結合が可能になる
上、キャリア信号の周波数相当のリップルが低減される
ので、インバータの大容量化が可能となる。(1) In addition to enabling multiple coupling with excellent current balance, the ripple corresponding to the frequency of the carrier signal is reduced, so that the capacity of the inverter can be increased.
現行のトランジスタインバータでは、例えば1200
（Ｖ）、300（Ａ）のトランジスタの４個並列接続で、
その出力は200（KVA）であるが、本発明の方法により２
重結合の場合で400（KVA）、３重結合の場合で600（KV
A），……の出力が可能となる。さらに、波形改善によ
る容量アツプが期待できる。In the current transistor inverter, for example, 1200
(V), 300 (A) 4 transistors in parallel,
Its output is 200 (KVA), but 2 according to the method of the present invention.
400 (KVA) in case of heavy bond, 600 (KV in case of triple bond
A), ... can be output. Furthermore, capacity up due to waveform improvement can be expected.
（２）電動機の振動、騒音、発熱が大幅に低減する。(2) Vibration, noise, and heat generation of the electric motor are significantly reduced.
（３）平滑コンデンサのリツプル電流耐量が小さくてす
む。(3) The ripple current withstand capability of the smoothing capacitor is small.
（４）負荷に供給される電流が自動的にバランスする。(4) The current supplied to the load is automatically balanced.
（５）相間リアクトルによる電圧降下が殆んど発生しな
い。(5) Almost no voltage drop occurs due to the interphase reactor.
第１図は３相電圧形インバータの回路例、第２図はこれ
をPWM制御した場合の出力電圧および出力線間電圧の波
形図、第３図は第１図のインバータを２個、並列に接続
し、同相出力間に相間リアクトルLU,LV,LWを備えた多重
結合インバータ装置の回路図、第４図は第３図において
一方のインバータのＵ相を他方のインバータのＵ相に対
して位相を30゜遅らせて制御したときの各相の出力電
圧、出力線間電圧の波形図、第５図は第３図のインバー
タの動作を説明する図、第6A図〜第6D図は第３図の多重
結合インバータ装置において本発明の方法を適用し、指
令電圧Vrefを変えたときのＵ相のキヤリヤ信号U1,
U2、出力電圧eU1,eU2,eU、相間リアクトルLUの印加電
圧、出力線間電圧eU-Vの波形図、第７図は第6A図〜第6D
図の出力線間電圧eU-Vの波形をインバータ出力電圧１周
期全区間に適用した場合の波形図、第８図は正弦波変調
を行なつた場合の出力線間電圧eU-Vの波形例、第９図は
三重結合の多重結合インバータ装置の例、第10図は本発
明の方法を適用できる電源回生回路の例である。 1,2:インバータ、 U1,U2,U:U相出力端子、 V1,V2,V:V相出力端子、 W1,W2,W:W相出力端子、 LU,LV,LW:相間リアクトル、U1 ,U2:キヤリヤ信号、 Vref:指令電圧、 eU1,eU2,eU,eV:出力電圧、 eL:相間リアクトルLUの印加電圧、 eU-V:出力線間電圧。Fig. 1 is a circuit example of a three-phase voltage source inverter, Fig. 2 is a waveform diagram of the output voltage and the output line voltage when PWM control is applied to this, and Fig. 3 is two inverters of Fig. 1 in parallel. A circuit diagram of a multi-coupled inverter device which is connected and has interphase reactors L U , L V , L W between in-phase outputs. FIG. 4 shows the U phase of one inverter in FIG. 3 as the U phase of the other inverter. On the other hand, the waveform diagram of the output voltage and the output line voltage of each phase when the phase is controlled by delaying 30 °, Fig. 5 is a diagram for explaining the operation of the inverter in Fig. 3, and Figs. 6A to 6D are When the method of the present invention is applied to the multiple coupling inverter device of FIG. 3 and the command voltage Vref is changed, the U-phase carrier signal U1 ,
U2 , output voltage e U1 , e U2 , e U , applied voltage of interphase reactor L U , waveform diagram of output line voltage e UV , FIG. 7 shows FIGS. 6A to 6D.
The waveform diagram of the output line voltage e UV shown in the figure is applied to the entire period of one cycle of the inverter output voltage. Fig. 8 shows the waveform example of the output line voltage e UV when the sine wave modulation is performed. FIG. 9 is an example of a triple-coupling multiple-coupling inverter device, and FIG. 10 is an example of a power regeneration circuit to which the method of the present invention can be applied. 1,2: Inverter, U 1, U 2, U : U -phase output terminal, V 1, V 2, V : V -phase output terminal, W 1, W 2, W : W -phase output terminal, L U, L V , L W : Interphase reactor, U1 , U2 : Carrier signal, Vref: Command voltage, e U1 , e U2 , e U , e V : Output voltage, e L : Interphase reactor L U applied voltage, e UV : Output line Voltage
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭58−151877（ＪＰ，Ａ) 特開 昭53−57428（ＪＰ，Ａ) 特開 昭56−10079（ＪＰ，Ａ) ─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-58-151877 (JP, A) JP-A-53-57428 (JP, A) JP-A-56-10079 (JP, A)
Claims (1)
接続し、これら各インバータの同相出力端子間に相間リ
アクトルを備えた多重結合インバータ装置において、同
相モードと逆相モードを有し、同相モードでは各相の正
側直流母線に接続されたスイッチング素子群または負側
直流母線に接続されたスイッチング素子群を同時にオン
させて前記リアクトルを電流バランサとして作用させる
ことにより正または負の直流母線電位をそのまま出力さ
せ、逆相モードでは一方のインバータの正側スイッチン
グ素子と他方のインバータの負側スイッチング素子とを
オンさせ前記リアクトルを単巻トランスとして作用させ
ることにより正負直流母線電位の中間の電位を出力さ
せ、ある周期内に前記リアクトルに印加される電圧の平
均値がほぼゼロになるように制御することを特徴とする
多重結合インバータ装置の接続・制御方法。1. A multi-coupled inverter device having a plurality of voltage-type PWM control inverters connected in parallel and having an interphase reactor between the in-phase output terminals of these inverters, which has a common mode and a reverse phase mode. Then, by turning on the switching element group connected to the positive side DC bus of each phase or the switching element group connected to the negative side DC bus at the same time and making the reactor act as a current balancer, a positive or negative DC bus potential can be obtained. As it is, in the negative phase mode, the positive side switching element of one inverter and the negative side switching element of the other inverter are turned on, and the reactor acts as a single-winding transformer to output an intermediate potential between the positive and negative DC bus potentials. The average value of the voltage applied to the reactor within a certain period becomes almost zero. Connection and control method for multiple bond inverter device, characterized in that the controlled so.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58204168A JPH0815394B2 (en) | 1983-10-31 | 1983-10-31 | Connection / control method of multiple coupling inverter device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58204168A JPH0815394B2 (en) | 1983-10-31 | 1983-10-31 | Connection / control method of multiple coupling inverter device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6098875A JPS6098875A (en) | 1985-06-01 |
| JPH0815394B2 true JPH0815394B2 (en) | 1996-02-14 |
Family
ID=16485961
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58204168A Expired - Lifetime JPH0815394B2 (en) | 1983-10-31 | 1983-10-31 | Connection / control method of multiple coupling inverter device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0815394B2 (en) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6328274A (en) * | 1986-07-19 | 1988-02-05 | Yaskawa Electric Mfg Co Ltd | Large capacity transistor inverter |
| JPS63305759A (en) * | 1987-06-08 | 1988-12-13 | Fuji Electric Co Ltd | Control of multiplexed current type inverter |
| JPH0767310B2 (en) * | 1987-06-08 | 1995-07-19 | 富士電機株式会社 | AC motor power supply system |
| JP2685586B2 (en) * | 1989-06-30 | 1997-12-03 | 株式会社日立製作所 | Multiple inverter device |
| JP2888068B2 (en) * | 1992-11-30 | 1999-05-10 | 株式会社日立製作所 | Control method of parallel multiple inverter and device thereof |
| WO1995024069A1 (en) * | 1994-03-02 | 1995-09-08 | Kabushiki Kaisha Yaskawa Denki | Multi-coupled power converter and its controlling method |
| DE10060429A1 (en) * | 1999-12-16 | 2001-07-12 | Caterpillar Inc | Power transmitter; has control circuit to transmit n instruction signals to n power converter circuits, which are driven to transfer n pulse width modulated signals out of phase by 360/n degrees |
| DE10013672A1 (en) * | 2000-03-20 | 2001-10-18 | Siemens Ag | Converter circuit |
| JP4641124B2 (en) | 2001-08-02 | 2011-03-02 | 本田技研工業株式会社 | Multiple coupled inverter device |
| US7324360B2 (en) * | 2005-10-17 | 2008-01-29 | General Electric Company | Power converter methods and apparatus for variable speed high power machines |
| FR2915722B1 (en) * | 2007-05-03 | 2009-08-28 | Renault Sas | "DEVICE AND METHOD FOR CONTROLLING A POWER DERIVATION CIRCUIT, HYBRID VEHICLE HAVING THE SAME" |
| DE102007063434A1 (en) | 2007-06-29 | 2009-01-02 | Enasys Gmbh | Inverter system and control method |
| US8084972B2 (en) * | 2007-11-16 | 2011-12-27 | Honeywell International Inc. | Dual lane control of a permanent magnet brushless motor using non-trapezoidal commutation control |
| JP5354369B2 (en) * | 2009-09-09 | 2013-11-27 | 株式会社デンソー | Power converter |
| US9673736B2 (en) | 2014-09-05 | 2017-06-06 | Mitsubishi Electric Corporation | Power conversion system and power conversion device |
| JP6561663B2 (en) * | 2015-08-03 | 2019-08-21 | 富士電機株式会社 | Power converter |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5357428A (en) * | 1976-11-04 | 1978-05-24 | Toyo Electric Mfg Co Ltd | Method of suppressing cross current |
| JPS5610079A (en) * | 1979-06-30 | 1981-02-02 | Toshiba Corp | Inverter |
| JPS58151877A (en) * | 1982-03-03 | 1983-09-09 | Hitachi Ltd | Inverter device |
-
1983
- 1983-10-31 JP JP58204168A patent/JPH0815394B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6098875A (en) | 1985-06-01 |
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