JP3801834B2 - Control method of direct frequency conversion circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention does not require a DC smoothing circuit, can convert an input AC current into a sine wave with a high power factor, and can generate an M-phase having an arbitrary frequency from an N-phase (for example, single-phase or three-phase) AC input. The present invention relates to a direct link type power supply device that obtains an AC output (for example, single phase or three phase), that is, a control method of a so-called direct frequency conversion circuit.
[0002]
[Prior art]
FIG. 1 shows a three-phase to three-phase conversion circuit capable of a step-up / step-down operation described in FIG. 23 of Japanese Patent Application No. 11-286290, which is a prior application. This circuit is also a circuit to which the embodiment of the present invention is applied.
In FIG. 1, 12, 22, and 32 are series switch sections, C1, C2, and C3 are snubber capacitors that also serve as input filter capacitors, and 13, 23, and 33 are three-phase bridge inverter circuits. 10K, 20K, and 30K are respectively It is an alternating current switch part which consists of a series switch part and each three-phase bridge inverter circuit.
LR, LS, and LT are reactors, RP, RN, SP, SN, TP, TN, U1 to U3, V1 to V3, W1 to W3, X1 to X3, Y1 to Y3, and Z1 to Z3 are respectively diodes reversed. The switching elements PR1 to PR4, PS1 to PS4, and PT1 to PT4 connected in parallel are connection points between the switching elements. Further, R, S, and T are AC input terminals, and U, V, and W are AC output terminals.
[0003]
The control method at the time of step-down of this embodiment is the same as the control method described in JP-A-10-80147.
For example, during the period when the input line voltage between the RSs is positive, the switching elements U1, V1, W1 in the U-phase inverter circuit 13 and the switching elements X2, Y2, Z2 in the V-phase inverter circuit 23 are selectively selected. Turn on. That is, when U1 and Y2 are on, a positive voltage is applied between the output terminals U and V. When U1 and Z2 are on, a positive voltage is applied between the output terminals U and W. When V1 and X2 are on, the output terminal U is output. , V, a negative voltage between the output terminals V and W when V1 and Z2 are on, a negative voltage between the output terminals U and W when W1 and X2 are on, and W1, Y2 When is turned on, a negative voltage is generated between the output terminals V and W. At this time, a positive and negative voltage is distributed to the output terminals U, V, and W in accordance with the output frequency, thereby generating a three-phase AC voltage having an arbitrary frequency between the output terminals U, V, and W.
In the period when the input line voltage between the RSs is negative, the switching elements U2, V2, W2 in the U-phase inverter circuit 13 and the switching elements X1, Y1, Z1 in the V-phase inverter circuit 23 are selectively selected in the same manner. If it is turned on, a three-phase AC voltage having an arbitrary frequency can be generated between the output terminals U, V, and W.
[0004]
Next, the operation during boosting will be described.
Energy is stored in the reactors LR, LS, and LT by switching the switching elements RP, RN, SP, SN, TP, and TN of the series switch units 12, 22, and 32, respectively. For example, by turning on the switching element RN when the input line voltage V _RS is positive and the switching elements U1 and Y2 are on, the input terminal R → reactor LR → connection point PR4 → switching element RN → switching element Y1 reverse parallel diode → connection point PR2 → connection point PS2 → switching element Y2 → reverse parallel diode of switching element SN → connection point P S 4 → reactor LS → current flows through the path of the input terminal S, and the reactors LR and LS Energy is stored.
[0005]
Further, when the switching element RN is turned off, the input terminal R → the reactor LR → the connection point PR4 → the antiparallel diode of the switching element RP → the switching element U1 → the connection point PR1 → the output terminal U → the load → the output terminal V → the connection point PS2 → Current flows through the path of switching element Y2 → antiparallel diode of switching element SN → connection point P S 4 → reactor LS → input terminal S, and voltage is supplied to the load.
Therefore, the output voltage is the sum of the input line voltage _VRS and the voltage across the reactors LR and LS, and a voltage higher than the input voltage is supplied to the load.
By similarly controlling the switching elements RP, SP, SN, TP, and TN, it is possible to store energy in the reactors LR, LS, and LT, and supply the energy to a load to perform a boost operation.
[0006]
Here, a difference current between the current flowing through reactors LR, LS, and LT and the current supplied to the load flows through capacitors C1, C2, and C3. That is, the capacitors C1, C2, and C3 function as both an input filter capacitor and a snubber capacitor.
[0007]
The energy accumulated in these capacitors C1, C2, C3 is regenerated to the load side or the input power source side by simultaneously turning on the switching elements of the upper and lower arms of the inverter circuits 13, 23, 33.
For example, when the switching elements U1 and Y1 are turned on at the same time, a current flows through the path of the capacitor C1, the switching element U1, the connection point PR1, the output terminal U, the load, the output terminal V, the connection point PR2, the switching element Y1, and the capacitor C1. The energy of the capacitor C1 can be regenerated to the load side. Further, by simultaneously turning on the switching elements RP, SN, and X1, the capacitor C1 → the switching element RP → the connection point PR4 → the reactor LR → the input terminal R → the AC power source → the input terminal S → the reactor LS → the connection point PS4 → the switching element. A current flows through a path of SN → an antiparallel diode of the switching element X2 → connection point PS1 → connection point PR1 → switching element X1 → capacitor C1, and energy of the capacitor C1 is regenerated to the input power source side.
The energy stored in the snubber capacitors C2 and C3 can also be regenerated by the same method.
[0008]
A current having a polarity different from that of the output voltage, such as a low power factor load or a motor load, can be input by simultaneously turning on the switching elements of the upper and lower arms of different series switch units 12, 22, and 32 connected to the input side. Circulate in a path through the side.
For example, the current flowing from the V phase to the U phase simultaneously turns on the switching elements RP and SN, so that the output terminal V → the load → the output terminal U → the connection point PR1 → the antiparallel diode of the switching element U1 → the switching element RP → the connection. Current flows in the path of point PR4 → reactor LR → input terminal R → AC power supply → input terminal S → reactor LS → connection point PS4 → switching element SN → reverse parallel diode of switching element Y2 → connection point PS2 → output terminal V It recirculates along the path that passes through the input side.
Here, the difference between the instantaneous current flowing in the reactors LR and LS and the current flowing between the output terminals V and U on the load side flows in the capacitors C1, C2 and C3, and part of the energy of the load is temporarily stored in these capacitors C1. , C2, and C3, the stored energy is regenerated on the input power source side and the load side as described above.
[0009]
Next, FIG. 2 is a waveform diagram showing a control method for reducing input current-containing harmonics during the step-down operation in this prior art.
Since the direct frequency conversion circuit does not have a large energy storage element such as a large-capacity DC smoothing capacitor, the input current is easily affected by the output waveform, and has a waveform including many harmonic components that are an integral multiple of the output frequency. Further, the input current includes harmonic components due to the influence of the inrush current flowing into the capacitors C1, C2, and C3 inserted between the DC terminals of the AC switch units 10K, 20K, and 30K. That is, as shown in FIG. 2, for example, the input current I _R of the R-phase becomes including ripple under the influence of an output waveform such as waveform.
[0010]
Now, when the fundamental wave component I _R ′ is removed from the input current I _R , the harmonic component I _RD shown in FIG. 2 is obtained. Here, a direct-current bias voltage having an appropriate magnitude that can correct the harmonic component I _RD is V _A, and an inverted waveform of I _RD is added to the direct-current bias voltage V _A during the positive period of the R-phase voltage V _R. In addition, I _RD is added to V _A as it is while the R-phase voltage V _R is negative to obtain the input current correction control waveform I _E. That is, I _{E in} the interval where the R phase voltage V _R is positive is expressed by Equation 1, and I _E in the interval where the R phase voltage is negative is expressed by Equation 2.
The current amounts I _RD and I _E are actually handled as voltage amounts.
[0011]
[Expression 1]
I _E = V _A −I _RD
[0012]
[Expression 2]
I _E = V _A + I _RD
[0013]
Further, the carrier waveform CR and the input current correction control waveform _IE are compared, and a pulse of the PWM control signal for the switching elements RN and RP of the series switch unit 12 of FIG. 1 is created.
If, if V _A is zero (i.e., the inverted waveform of the I _RD is compared with the carrier wave CR a R-phase voltage V _R is positive interval, R-phase voltage V _R is the waveform of the I _RD is negative period as when compared to the carrier wave CR), the switching element RN, oN signal RP is input current I _R is the fundamental component I _R 'is spread pulse width at the time less than the input current I _R is the fundamental component I _R' When it becomes larger, the pulse width cannot be reduced.
[0014]
Therefore, if a DC bias voltage V _A of an appropriate magnitude that allows correction control of the input current is added to I _RD , the switching elements RN and RP of the switching elements RN and RP are irrespective of the magnitude of the input current I _R as shown in FIG. The pulse width of the control signal can be changed, thereby suppressing the increase or decrease of the input current I _R , and as a result, the input current I _R can be corrected in a sine wave shape.
In addition, with respect to the S-phase and T-phase input currents, the contained harmonics can be reduced by the same control.
[0015]
For example, by turning on and off the switching elements RN by using the control signal generated in the manner described above, the operation of reducing the content harmonic of the input current I _R below.
First, in the case of increasing the current flowing from the R phase to the S phase, when the switching element RN is turned on while the switching elements U1 and Y2 are turned on, the input terminal R (hereinafter, only the reference numeral is indicated) → LR → The power supply is short-circuited through the reactors LR and LS in the path of PR4 → RN → Y1 antiparallel diode → PR2 → PS2 → Y2 → SN antiparallel diode → PS4 → LS → S to increase the input current. In addition, when RN is turned off, R → LR → PR4 → RP antiparallel diode → U1 → PR1 → U → load → V → PS2 → Y2 → SN antiparallel diode → PS4 → LS → S Commutates and reduces input current. Therefore, the current flowing from the R phase to the S phase can be controlled by the control signal of the switching element RN, and the harmonic component of the input current can be reduced. Further, the harmonic component can be reduced by the same control method for the input current flowing in the opposite direction (from S phase to R phase) and the input current of other phases.
[0016]
[Problems to be solved by the invention]
As described above, the pulse width of the control signal of the switching elements RN and RP is determined by the magnitude of the harmonic component I _RD of the input current. However, in order to satisfy the condition for increasing the input current so as to reduce the contained harmonic component, the switching elements of the inverter circuit in FIG. 1 (for example, when current flows from the R phase to the S phase, X2, Y2, Z2 Either) must be on. Both the control signal for the switching element RN of the series switch unit 12 (simply referred to as an input side element if necessary) and the control signal for the logical sum of the switching elements (also simply referred to as output side elements) X2, Y2, Z2 of the inverter circuit If the on-state period is short, the input current cannot be sufficiently controlled, and the harmonics cannot be sufficiently reduced.
[0017]
For example, FIG. 3 shows the relationship between the control signal for the input side element RN and the output side element (logical sum of X2, Y2, and Z2), the input current, and I _R showing the operation of the above-mentioned prior application. Here, even if on the switching element RN is to increase the input current I _R, so only a period in which one of the switching elements X2, Y2, Z2 on the output side as shown is on increasing the I _R The input current I _R cannot be increased to the command value I _R ^* . In FIG. 3, OR (X2, Y2, Z2) is a period during which one of the switching elements X2, Y2, Z2 is on.
[0018]
Therefore, the present invention generates a control signal for the switching element of the series switch unit that increases or decreases the input current to follow the command value, and reduces the contained harmonic component by bringing the input current closer to a sine wave. An object of the present invention is to provide a method for controlling the direct frequency conversion circuit.
[0019]
[Means for Solving the Problems]
In order to solve the above-mentioned problems, the invention described in claim 1 is a direct frequency conversion circuit that converts an N-phase AC input voltage into an M-phase AC output voltage having an arbitrary frequency (N and M are integers of 2 or more). And
The inverter circuit is configured such that a series switch unit formed by connecting two switching elements each having a diode connected in antiparallel is connected in series so that a cathode side of the diode is a positive terminal side of an M-phase bridge inverter circuit including 2M switching elements. Are connected in parallel, and a snubber capacitor is connected in parallel to the series switch unit to form an AC switch unit for one phase, and N AC switch units are provided,
Each connection point between the diodes of the series switch unit is connected to an N-phase AC input terminal via a reactor, and among the AC output terminals of the bridge inverter circuit of each phase, those belonging to the same phase are collectively Connect to the M phase AC output terminals respectively.
By turning on / off the switching element of the series switch section of a certain phase, it is possible to increase / decrease the input current of that phase by flowing current through the switching element in the ON state of the bridge inverter circuit of the corresponding phase and the different phase. In the direct frequency conversion circuit
Set upper and lower limit values with a certain range on the positive and negative sides around the instantaneous value of the sinusoidal input current command value for each phase, and turn on and off when the input current detection value reaches the upper and lower limit values A control signal for the switching element of the series switch unit of the phase is determined, and a final product for the switching element of the series switch unit of the phase is determined by a logical product of the control signal and the control signal for the switching element of the bridge inverter of the other phase. The pulse pattern of the control signal is determined.
[0021]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 4 is a control block diagram to which the reference embodiment of the present invention is applied. In the figure, 100 is a main circuit of a direct frequency conversion circuit of FIG. 1 and the same configuration, each phase of the input current, for example, R-phase current (R-phase current detection value) I _R is detected by the current transformer, the control circuit 200. Here, although the current transformer 201a and the input current detection means 201b are shown separately in FIG. 4, these are collectively referred to as the input current detection means 201 for convenience.
[0022]
Reference numeral 202 denotes input current command means for outputting an input current command value for each phase, for example, an R-phase current command value I _R ^* .
R-phase current detection value I _R and the command value I _R ^* is input to the hysteresis comparator 203, the switching element RN of R-phase series switch unit 12 of FIG. 1 in accordance with the sign of the R-phase voltage V _R, the control signal for the RP A signal to be determined is output. The hysteresis comparator 203 has a hysteresis width I _r, the R-phase voltage V _R is positive period, to turn on the switching element RN When I _R becomes equal to I _R ^* -I _r, I _R is I _R ^* + I _r and with said switching element is turned off RN If equal, the period R-phase voltage V _R is negative, to turn on the switching element RP When I _R becomes equal to I _R ^* + I _r, I _R is I When it becomes equal to _R ^* −I _r , an output signal that turns off the switching element RP is generated.
The output signal of the hysteresis comparator 203 is input to the pulse distribution unit 204, and the distribution unit 204 generates an actual control signal for the switching elements RN and RP, and the R circuit series of the main circuit 100 via the gate drive unit 205. This is applied to the switching elements RN and RP of the switch unit 12.
[0023]
FIG. 5 shows an instantaneous value waveform of the input current detection value I _R and the command value I _R ^* depending on whether the R-phase voltage V _R is positive or negative, and a pulse pattern of a control signal for the switching elements RN and RP. Due to the operation of the hysteresis comparator 203, the pulse pattern for the switching elements RN and RP is changed according to the positive / negative of the R-phase voltage V _R and the magnitude relationship between I _R and I _R ^* + I _r and I _R ^* −I _r . It becomes like this. Here, the waveform of I _R ^* + I _r forms the upper limit value in the claims, and the waveform of I _R ^* −I _r forms the lower limit value in the claims.
[0024]
Input current detection value I _R shown in FIG. 5, but is depicted as containing many waveform ripple in order to facilitate the operation, the ripple by reducing the hysteresis width I _r decreases, less distortion It becomes a sine wave waveform.
In FIG. 5, when the R-phase voltage V _R is positive, the input current detection value I _R increases with respect to the switching element RN in the process of increasing from the lower limit value I _R ^* −I _r to the upper limit value I _R ^* + I _r . When the control signal is turned on and I _R decreases from the upper limit value I _R ^* + I _r to the lower limit value I _R ^* −I _{r, the} control signal for the switching element RN is turned off and the R-phase voltage V _R is negative. , the oN control signal for the switching element RP in the process of I _R decreases from I _R ^* + I _r to I _R ^* -I _r, I _R increases from I _R ^* -I _r to I _R ^* + I _r In the process, the control signal for the switching element RP is turned off.
[0025]
As a control method of the output side switching elements U1 to U3, V1 to V3, W1 to W3, X1 to X3, Y1 to Y3, and Z1 to Z3 of the main circuit 100 in FIG. Similarly to the above, the switching elements U1, V1, W1, X2, Y2, and Z2 are selectively turned on during a period in which the input line voltage between the RSs is positive. When U1 and Y2 are on, a positive voltage is applied between the output terminals U and V, when U1 and Z2 are on, a positive voltage is applied between the output terminals U and W, and when V1 and X2 are on, the output terminals U and V Negative voltage in between, positive voltage between output terminals V and W when V1 and Z2 are on, negative voltage between output terminals U and W when W1 and X2 are on, W1 and Y2 are on In this case, a negative voltage is generated between the output terminals V and W. Then, by assigning positive and negative voltages to the output terminals U, V, and W according to the output frequency, a three-phase AC voltage having an arbitrary frequency is generated between the output terminals U, V, and W.
If the switching elements U2, V2, W2, X1, Y1, and Z1 are selectively turned on in the same manner during a period in which the input line voltage between the RSs is negative, an arbitrary frequency is set between the output terminals U, V, and W. A three-phase AC voltage can be generated.
[0026]
The operation of the output side switching elements, for example, U1 and Y2, during boosting will be described in relation to the operation of the switching element RN of the series switch unit 12. For example, the input line voltage _VRS is positive and the switching elements U1, Y2 are positive. There is turned on the switching element RN when being turned on, R → LR → PR4 → RN → Y1 anti-parallel diodes → PR2 → PS2 → Y2 → antiparallel diode → P S 4 → LS → current path S of SN Flows and energy is accumulated in reactors LR and LS.
Further, when the switching element RN is turned off, the path of the R → LR → PR4 → antiparallel diode → U1 → PR1 → U → load RP → V → PS2 → Y2 → → SN anti-parallel diode P S 4 → LS → S Current flows and voltage is supplied to the load.
Therefore, the output voltage is the sum of the input line voltage and the voltage across reactors LR and LS, and a voltage higher than the input voltage is supplied to the load.
[0027]
Then, 6 to 8, to the input side element RN of FIG. 1 in the same display format as Figure 3, (a logical sum of X2, Y2, Z2) output device in order to explain the operation of the shape states shows the control signal and the input current I waveform of _R, and the like.
First, FIG. 6 shows a case where the output side element (any one of X2, Y2, and Z2) is turned on when the input side element RN is on. In FIG. 6, even when the input side element RN is turned on when the input current I _R decreases and becomes equal to I _R ^* −I _r , the control signals of the output side elements (all of X2, Y2, and Z2) are because it is turned off, I _R is not increased. However, is turned on thereafter (either X2, Y2, Z2) output device, increases the input current _{I R,} RN is turned off when _{the I R} is equal to _I ^R * + _{I r} of the upper limit value . Since RN is the input current I _R and off commutated to the load side, I _R decreases.
[0028]
Such control is possible to perform the so I _R is held ON signal input device RN until equal to I _R ^* + I _r, it is possible to sufficiently increase the input current.
Therefore, as can be seen from the comparison with FIG. 3, the input current I _R can be controlled to follow the command value I _R ^*, and the harmonic component of the input current I _R can be reduced as compared with the prior art. .
Here, the control of the input current flowing from the R phase to the S phase has been described, but the same control method is applied to the input current flowing in the opposite direction (from the S phase to the R phase) and the input currents of other phases. Thus, harmonic components can be reduced.
[0029]
In the case of FIG. 7, the previously (one of X2, Y2, Z2) output element is turned on when the I _R is turned on is input element RN decreased to I _R ^* -I _r, thereafter , I _R increases. Therefore, I _R is I _R ^* + I also output device before increasing to _r (X2, Y2, all Z2) is reduced off to I _R, then the output-side element (X2, Y2, Z2 since any) is turned to I _R oN signal RN to increase until I _R ^* + I _r is maintained, it is possible to sufficiently increase the I _R.
In the case of FIG. 8, since the period of the input-side element RN is on is a always-on state (either X2, Y2, Z2) output elements, the upper limit value without RN is the duration of the ON to lower the I _R Can be increased up to I _R ^* + I _r .
[0030]
In this form state as described above, generates a control signal for the switching elements of the series switch unit to increase or decrease the input current I _R in the range of the input current command value I _R ^* ± I _r by using a hysteresis comparator 203 Therefore, the input current I _R follows the command value I _R ^* better than in the example of FIG.
Thus, the input current command value I _R ^* waveform also actual input current I _R if a sine wave close to a sine wave, it is possible to reduce the content harmonic components.
[0031]
Next, an embodiment of the invention described in claim 1 will be described.
First, FIG. 9 shows that in this embodiment, the control signal of the input side element RN and the control signal of the output side element (logical sum of X2, Y2, and Z2) obtained by using the hysteresis comparator 203 are ANDed. A configuration for inputting to 206 and setting the output as a final control signal RN ′ for the input side element RN is shown. When such a logical product operation is performed, RN ′ becomes a control signal as shown in FIG. 10 or FIG. FIG. 10 is an operation explanatory diagram in the case of ON control signal is (either X2, Y2, Z2) input current I _R is the output element in the reduction, 11 output the input current I _R is in the increase It is operation | movement explanatory drawing when the control signal of a side element (all of X2, Y2, Z2) turns off.
[0032]
In FIG. 10, during the period in which the control signals of the output side elements (all of X2, Y2, and Z2) are off, the control signal RN ′ remains off by the logic of FIG. 9 even if RN is on. That is, if all of the output-side element X2, Y2, Z2 is off, input current I _R is because there is no path for power short-circuited via the reactor LR and LS of Figure 1, in this period to turn on the switching element RN since the it is not possible to increase the input current I _R, it is set to turn off the control signal RN 'to be supplied to the switching element RN.
Then, the control signal (one of X2, Y2, Z2) output side element is on, moreover, by turning on only the control signal RN 'period control signal RN is on, the power supply input current I _R A path to be short-circuited is secured to increase the input current I _R.
[0033]
Next, as shown in FIG. 11, when the switching element RN is turned on by the control signal RN ′ and the input current I _R is increasing, all of the output side elements X2, Y2, and Z2 are turned off. The control signal RN ′ is also turned off. Thereafter, the input current I _R decreases, and then when any of the output side elements X2, Y2, Z2 is turned on, the input current I _R increases until it becomes equal to I _R ^* + I _{r. When R} becomes equal to I _R ^* + I _r , the control signal RN is turned off and the control signal RN ′ is also turned off.
[0034]
Here, the control of the input current flowing from the R phase to the S phase has been described, but the same control method is applied to the input current flowing in the opposite direction (from the S phase to the R phase) and the input currents of other phases. Thus, the same operation as the reference embodiment described above can be realized.
[0035]
【The invention's effect】
As described above, according to the present invention, in the step-up / step-down direct frequency conversion circuit, the switching of the series switch unit is controlled so as to control the input current within a range having a certain width around the input current command value. By generating a control signal for the element, the contained harmonic component of the input current can be reduced as compared with the prior art and controlled to a sine wave shape without distortion.
[Brief description of the drawings]
FIG. 1 is a main circuit configuration diagram of a direct frequency conversion circuit to which the present invention and the control method of the prior application are applied.
FIG. 2 is an operation explanatory diagram of FIG. 1;
FIG. 3 is a diagram showing a pulse pattern and an input current of a control signal in the prior application.
FIG. 4 is a control block diagram for realizing a reference embodiment of the present invention.
FIG. 5 is a diagram showing a waveform of an input current detection value or the like and a pulse pattern of a control signal in the reference embodiment of the present invention.
FIG. 6 is an operation explanatory diagram of a reference embodiment of the present invention.
FIG. 7 is an operation explanatory diagram of a reference embodiment of the present invention.
FIG. 8 is an operation explanatory diagram of a reference embodiment of the present invention.
FIG. 9 is a diagram for explaining control signal generation means in the embodiment of the invention of claim 1 ;
FIG. 10 is an operation explanatory diagram of the embodiment of the first aspect of the present invention.
FIG. 11 is an operation explanatory diagram of the embodiment of the first aspect of the present invention.
[Explanation of symbols]
R, S, T ... Input terminals U, V, W ... Output terminals LR, LS, LT ... Reactors RP, RN, SP, SN, TP, TN, U1-U3, V1-V3, W1 ˜W3, X1 to X3, Y1 to Y3, Z1 to Z3... Switching elements C1, C2, C3... Snubber capacitors PR1 to PR4, PS1 to PS4, PT1 to PT4. ... Series switch part 13, 23, 33 ... Three-phase bridge inverter circuit 10K, 20K, 30K ... AC switch part 100 ... Main circuit 200 ... Control circuit 201 ... Input current detection means 202 ... Input current command means 203 ... Hysteresis comparator 204 ... Pulse distribution means 205 ... Gate drive unit

Claims (1)

A direct frequency conversion circuit for converting an N-phase AC input voltage into an M-phase AC output voltage having an arbitrary frequency (N and M are integers of 2 or more),
The inverter circuit is configured such that a series switch unit formed by connecting two switching elements each having a diode connected in antiparallel is connected in series so that a cathode side of the diode is a positive terminal side of an M-phase bridge inverter circuit including 2M switching elements. Are connected in parallel, and a snubber capacitor is connected in parallel to the series switch unit to form an AC switch unit for one phase, and N AC switch units are provided,
Each connection point between the diodes of the series switch unit is connected to an N-phase AC input terminal via a reactor, and among the AC output terminals of the bridge inverter circuit of each phase, those belonging to the same phase are collectively Connect to the M phase AC output terminals respectively.
By turning on / off the switching element of the series switch section of a certain phase, it is possible to increase / decrease the input current of that phase by flowing current through the switching element in the ON state of the bridge inverter circuit of the corresponding phase and the different phase. In the direct frequency conversion circuit
Set upper and lower limit values with a certain range on the positive and negative sides around the instantaneous value of the sinusoidal input current command value for each phase, and turn on and off when the input current detection value reaches the upper and lower limit values The control signal for the switching element of the serial switch unit of the phase is determined, and the final product for the switching element of the serial switch unit of the phase is determined by the logical product of the control signal and the control signal for the switching element of the bridge inverter of the other phase. A control method for a direct frequency conversion circuit, wherein a pulse pattern of a control signal is determined .

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