JPH05328728A - Ac/dc converter - Google Patents

Abstract

PURPOSE:To prevent the unbalance of voltage when a pair of loads are unbalanced in a half-bridge type AC/DC converter. CONSTITUTION:A reactor L is connected between a power supply 1 and a connecting center point 9 of a pair of transistors Q1 and Q2. Diodes D1 and D2 are respectively connected in parallel to a pair of the transistors Q1 and Q2. A pair of capacitors C1 and C2 are connected in series between the first and second DC output terminals 5 and 6. A connecting center point of a pair of capacitors C1 and C2 is connected to ground terminals 3 and 7. In order to detect a voltage unbalance between a pair of capacitor C1 and C2 due to the unbalance of the first and second load R1 and R2 connected between the first and second DC output terminals 5 and 6 and the ground terminal 7, detecting resistors Ra and Rb having the same resistance value is connected between the first and second DC output terminals 5 and 6 are connected. Electric potential at the center point of the detecting resistors Ra and Rb is used as unbalance potential for changing the width of control pulses of the transistors Q1 and Q2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a half-bridge type AC / DC converter, that is, an AC / DC converter, which can supply a balanced voltage regardless of an unbalanced load.

[0002]

2. Description of the Related Art A conventional half-bridge type AC / DC converter, as shown in FIG. 1, has an AC power supply terminal 2 connected to one end of an AC power supply 1 and a power supply side connected to the other end of the AC power supply 1. Common terminal, that is, ground terminal 3, power switch 4, reactor L, and first and second transistors Q
1, Q2 and first and second switching means S1 and S2 composed of first and second diodes D1 and D2, first and second capacitors C1 and C2, and first and second DC outputs. It is composed of terminals 5 and 6, an output side ground terminal 7, and a control circuit 8.

IGBT (insulated gate
The first and second transistors Q1 and Q2 as control switching elements composed of bipolar transistors are connected in series with each other, and the connection middle point 9 is a reactor L.
And the power switch 2 via the power switch 4. The emitter of the npn-type first transistor Q1 is connected to the midpoint 9, and this collector is connected to the first DC output terminal 5
It is connected to the. npn type second transistor Q2
Is connected to the midpoint 9 and its emitter is connected to the second DC output terminal 6. The first and second diodes D1 and D2 are connected to the first and second transistors Q1 and Q1,
It is connected in antiparallel between the emitter and collector of Q2. That is, the anodes of the first and second diodes D1 and D2 are connected to the emitters of the first and second transistors Q1 and Q2, and the cathodes are connected to the collectors.
The first capacitor C1 is connected between the first DC power supply terminal 5 and the ground terminals 3 and 7, and the second capacitor C2 is connected.
Is connected between the second DC power supply terminal 6 and the ground terminals 3 and 7. The control circuit 8 is connected to the gates (control terminals) of the first and second transistors Q1 and Q2,
The second transistors Q1 and Q2 are alternately turned on / off by a PWM wave (pulse width modulation wave) having a frequency sufficiently higher than the AC power supply voltage. The load 10 has a first load R1 and a second load R2, the first load R1 is connected between the first DC output terminal 5 and the ground terminal 7, and the second load R2 is the second load. It is connected between the DC output terminal 6 and the ground terminal 7.

AC power source 1 has an upward voltage (forward voltage)
The first transistor Q1
Is controlled to be on and the second transistor Q2 is controlled to be off, the first closed circuit consisting of the power source 1, the reactor L, the first diode D1 and the first capacitor C1 causes the first capacitor C1 to Be charged. At this time, when energy is stored in the reactor L, the first capacitor C1 is charged to a value higher than the power supply voltage Vin by both the power supply 1 and the stored energy of the reactor L.
At this time, since the first transistor Q1 is in the reverse bias state, it does not respond to the ON control and is kept OFF. During the positive voltage generation period, when the first transistor Q1 is off-controlled and the second transistor Q2 is on-controlled, the second capacitor C2, the power source 1, the reactor L, and the second transistor Q2 are formed. A closed circuit of 2 is formed, the sum of the voltage Vc2 of the second capacitor C2 and the voltage Vin of the power source 1 is added to the reactor L, and energy is stored in the reactor L. Next, when the first transistor Q1 is on-controlled and the second transistor Q2 is off-controlled during the period in which the power source 1 is generating a downward voltage, that is, a negative voltage, the power source 1 and the first capacitor are controlled. A third closed circuit composed of C1, the first transistor Q1 and the reactor L is formed, and the sum of the voltage Vin of the power source 1 and the voltage Vc1 of the capacitor C1 is the reactor L.
Energy is stored here. In the negative voltage period, when the second transistor Q2 is on-controlled and the first transistor Q1 is off-controlled,
Power supply 1, second capacitor C2 and second diode D2
And a reactor L, a fourth closed circuit is formed, and both the stored energy of the reactor L and the power source 1 charge the second capacitor C2 to a value higher than the power source voltage Vin.

[0005]

If the first and second loads R1 and R2 have the same resistance value or impedance value, the first and second capacitors C1 and
The voltage of C2 also becomes the same, and the first and second loads R1 and R
2 can be supplied with the same voltage. However, if the first and second loads R1 and R2 are not the same value, the first
And the voltage values of the second capacitors C1 and C2 change corresponding to the unbalance of the first and second loads R1 and R2.
For example, if the first load R1 is secondly smaller than the load R2, the voltage Vc1 of the first capacitor C1 will be lower than the voltage Vc2 of the second capacitor C2. As a result, it becomes impossible to supply a constant voltage to the first and second loads R1 and R2. There is a half-bridge type inverter (DC / AC converter) as an example of the unbalanced load 10.

Therefore, an object of the present invention is to provide an AC / DC converter capable of supplying a balanced voltage regardless of an unbalanced load.

[0007]

The present invention for achieving the above object comprises an AC power supply terminal to which one end of an AC power supply is connected, and a ground terminal to which the other end of the AC power supply is connected.
First and second direct-current output terminals, first switching means connected between the alternating-current power supply terminal and the first direct-current output terminal, the alternating-current power supply terminal and the second direct-current output terminal A second switching means connected between the first DC output terminal and the ground terminal, a first capacitor connected between the first DC output terminal and the ground terminal, and between the second DC output terminal and the ground terminal. A first closed circuit composed of a second capacitor connected to the AC power supply, the AC power supply, the first switching means and the first capacitor, and the AC power supply, the second capacitor and the second switching circuit. And a control circuit for alternately controlling ON / OFF of the first and second switching means, and a half-bridge type alternating current reactor connected in series in the second closed circuit. In the DC converter, the control circuit has a first output voltage between the first DC output terminal and the ground terminal and a second output between the second DC output terminal and the ground terminal. An unbalanced voltage detection circuit for obtaining an unbalanced detection voltage corresponding to a voltage difference, a triangular wave generation circuit for generating a triangular wave voltage having a frequency higher than an alternating current supplied from the alternating current terminal, and the unbalanced detection voltage A comparator for forming a pulse width modulation wave (PWM wave) by comparing with the triangular wave voltage, and first and second switching means for the first and second switching means based on the pulse width modulation wave obtained from the comparator. The present invention relates to an AC / DC converter, comprising: a control signal forming circuit that forms a second control signal. As described in claim 2, in order to keep the output voltage constant, the output voltage detection circuit, the voltage control error signal forming circuit, the voltage (eg, power supply voltage) that changes in a predetermined cycle, and the detection voltage. It is desirable to provide a circuit for forming a multiplication signal of 1) and a combining circuit for forming a combined signal of the unbalanced detection voltage and the multiplied signal and inputting the combined signal to the comparator. Further, in order to match the waveform of the input current with the waveform of the AC voltage and bring them into the same phase to improve the power factor and reduce the harmonic components, an input current detector is provided as described in claim 3, and the output and the synthesized signal are combined. It is desirable to form an error signal with the signal and input this to the comparator.

[0008]

In the present invention, the unbalanced state of the first and second output voltages corresponding to the charging voltage of the first and second capacitors is detected, and the pulse width modulated wave of the pulse width modulated wave is detected based on the detected state. Change the pulse width. As a result, the imbalance of the output voltage is eliminated.

[0009]

[First Embodiment] Next, a half bridge type AC / DC converter according to a first embodiment of the present invention will be described with reference to FIGS. However, in FIG. 2, the same parts as those in FIG. 1 are denoted by the same reference numerals and the description thereof is omitted. The main circuit of the AC / DC converter in FIG. 2 is the same as that in FIG. 1, and only the control circuit 8a is provided. It differs from FIG.

The control circuit 8a of FIG. 2 includes an unbalance detecting circuit 11 composed of first and second detecting resistors Ra and Rb connected between the first and second DC output terminals 5 and 6, and an unbalance detecting circuit. Detection differential amplifier 12 and triangular wave generation circuit 1
3, a voltage comparator 14, and a control signal forming circuit 15. The first and second detection resistors Ra and Rb have the same value and are connected in series. Therefore, the voltages Va and Vb across the first and second detection resistors Ra and Rb are equal. The unbalanced detection voltage V0 obtained between the ground and the midpoint 16 is obtained by changing the voltages of the resistors Ra and Rb to Va and Vb.
(However, Va = Vb), the first and second capacitors C1,
If the voltage of C2 is Vc1 and Vc2, then V0 = Vb-Vc2 or V0 = Vc1-Va. When the voltages Vc1 and Vc2 of the first and second capacitors C1 and C2 are equal, Vc1 = V
c2 = Va = Vb is established, and the unbalance detection voltage V0 is zero volt.

The inverting input terminal of the differential amplifier 12 has a midpoint 16
The non-inverting input terminal is connected to the ground, that is, the ground terminal 7. Therefore, the differential amplifier 12 functions as an inverting amplifier and generates the voltage Vd indicating the imbalance.

The triangular wave generating circuit 13 generates a triangular wave voltage at a frequency (for example, 20 kHz) sufficiently higher than the frequency of the voltage of the AC power source 1 (50 Hz or 60 HZ). The non-inverting input terminal of the comparator 14 is connected to the differential amplifier 12 for unbalance detection, and the inverting input terminal is connected to the triangular wave generating circuit 13.

The control signal forming circuit 15 is connected to the comparator 14 and supplies the first control signal, which is the output of the comparator 14 phase-inverted, to the gate of the first transistor Q1.
A second control signal in phase with the output of 4 is supplied to the gate of the second transistor Q2.

[0014]

[Operation] Since the AC / DC conversion operation in the main circuit of FIG. 2 is the same as that of FIG. 1, its description is omitted and only the operation of the control circuit 8a of FIG. 2 will be described with reference to FIG.

Prior to time t1 in FIG. 3, the first and second time points are set.
2 shows Vc, Vt, Vp, Vg1, and Vg2 of FIG. 2 when the loads R1 and R2 of the same have the same value and are balanced, and after t1, the first load R1 is the second load R2. Vd, Vt, V in FIG.
p, Vg1 and Vg2 are shown. First, the operation in the balance state before t1 will be described. Since R1 = R2, Vc1 =
Since Vc2 and Vc1 = Vc2 = Va = Vb,
The voltage V0 between the ground terminal 7 and the midpoint 16 is zero volt, and the unbalance detection voltage Vd obtained from the differential amplifier 12 is also a low value as shown in FIG. The triangular wave voltage Vt shown in FIG. 3 (B) generated from the triangular wave generating circuit 13 changes to the same amplitude up and down around the unbalance detection voltage Vd at R1 = R2 before t1 in FIG. 3 (A). The comparison output of the triangular wave voltage Vt and the unbalance detection voltage Vt in the comparator 14 is the PWM wave Vp with a duty ratio of 50% shown in FIG. As a result, the first and second control signals V shown in FIGS.
g1 and Vg2 also have a duty ratio of 50%, and the first and second
Transistors Q1 and Q2 are turned on under substantially the same conditions.
Driven off. Therefore, the first and second output voltages Vc
1, the balance state of Vc2 is maintained.

When R1 <R2 is unbalanced after t1 in FIG. 3, Vc1 <Vc2. On the other hand, since the resistors Ra and Rb of the unbalance detection circuit 11 have the same value, Va = V
b. Note that Va = Vb = (Vc1 + Vc2) / 2. After t1, Vb <Vc2, so midpoint 1
Although the voltage V0 of 6 is negative, it is inverted by the differential amplifier 12 and the imbalance detection voltage Vd becomes a positive value higher than t1 as shown after t1 in FIG. This allows
The position at which the unbalanced voltage detection voltage Vd crosses the triangular wave voltage Vt in the comparator 14 becomes higher after t1 than before t1 and the PWM wave Vp obtained from the comparator 14
The duty ratio of is larger than 50% as shown in FIG. The first transistor Q1 has a PWM wave Vp
Is turned on / off by the first control signal Vg1 shown in FIG. 3 (D) whose phase is inverted, and the second transistor Q2 is a phase inversion signal of the first control signal Vg1 shown in FIG. 3 (E). On / off control is performed by the control signal Vg2 of 2. Therefore, the ON control time width of the first transistor Q1 becomes smaller than that of the second transistor Q2. When the on-time width of the second transistor Q2 becomes long after t1 and the on-time width of the first transistor Q1 becomes short, the second capacitor C2 and the power supply 1 are supplied during the positive half cycle of the voltage of the power supply 1. Then, the discharge of the second capacitor C2 by the closed circuit composed of the reactor L and the second transistor Q2 becomes large, the voltage Vc2 becomes low, and the energy stored in the reactor L becomes large. As a result, the power supply 1, the reactor L, the first diode D1, and the first capacitor C formed during the off period of the second transistor Q1.
The closed circuit consisting of 1 and 1 charges the first capacitor C1 to a high voltage. In the period of the negative half cycle of the power supply voltage after t1, the first transistor Q1
Since the ON control time width of the first capacitor C becomes shorter,
The discharge of the first capacitor C1 in the closed circuit consisting of 1, 1, the first transistor Q1, the reactor L and the power supply 1 is reduced, and the energy stored in the reactor L is also reduced. While the first transistor Q1 is off, the second capacitor C2 is charged by the closed circuit of the reactor L, the power supply 1, the second capacitor C2 and the second diode D2, but the stored energy of the reactor L is small. Therefore, the charging voltage Vc2 of the second capacitor C2 rises by t1.
Smaller than before. Eventually, the voltage Vc1 of the first capacitor C1 increases and the voltage of the second capacitor C2 decreases,
Both voltages are almost the same.

[0017]

[Second Embodiment] Next, an AC / DC converter according to a second embodiment will be described with reference to FIGS. However, in FIG. 4, the same parts as those in FIGS. 1 and 2 are designated by the same reference numerals, and the description thereof will be omitted.

The AC / DC converter shown in FIG. 4 is obtained by modifying a part of the control circuit 8a shown in FIG. 2 and has the same structure as that shown in FIG. The control circuit 8b of FIG. 4 includes an output voltage detection circuit 17, a reference voltage source 18, a differential amplifier 19, a multiplier 20, a synthesizing circuit or adder 21, and an input current which are not included in FIG. Detector 22 and differential amplifier 2
3 and 3.

The output voltage detection circuit detects the voltage between the first and second DC output terminals 5 and 6 and outputs a detection voltage Vdc corresponding to the total DC output voltage. The reference voltage source 18 outputs a reference voltage Vr corresponding to a desired voltage value between the output terminals 5 and 6. Since one input terminal of the differential amplifier 19 is connected to the output voltage detecting circuit and the other input terminal is connected to the reference voltage source 18, Vdc and Vdc are connected to this output terminal.
The voltage corresponding to the difference from r is obtained. Therefore, the reference voltage source 18 and the differential amplifier 19 form a voltage control error signal forming circuit.

The multiplier 20 is connected to the power supply terminal 2 via the switch 4 and is also connected to the differential amplifier 19. Therefore, from the multiplier 20, the input AC voltage Vin
And the error output Ve obtained from the differential amplifier 19 is obtained.

One input terminal of the adder 21 is connected to the differential amplifier 12, and the other input terminal is connected to the multiplier 20. Therefore, the output terminal of the adder 21 is (V
A signal Ir corresponding to in * Ve) + Vd is obtained. This signal Ir shows a reference current waveform. One input terminal of the differential amplifier 23 is connected to the current detector 22, this other input terminal is connected to the adder 21, and this output terminal is connected to the comparator 14. The current detector 22 is a reactor L
Is coupled to the connected power supply line and outputs a signal Iin indicating the input current. Therefore, the differential amplifier 23 outputs the signal Vf corresponding to the difference between the input current detection signal Iin and the reference current signal Ir.

AC / DC of the AC / DC converter of FIG.
Since the conversion operation and the unbalance voltage detection operation are the same as those in FIG. 2, the description will be omitted and the unbalance correction operation will be described. First, the operation in the balanced state of R1 = R2 will be described with reference to FIG. Now, from AC power supply 1 to FIG.
The sine wave voltage Vin shown in FIG.
Assuming that a predetermined output voltage Vdc is obtained between them, the differential amplifier 19 generates an error signal indicating that it is the predetermined output voltage, and the output of the multiplier 20 is a sine wave voltage indicating the desired output voltage. become. The output of the multiplier 20 is synchronized with the power supply voltage. On the other hand, the unbalance detection voltage Vd obtained from the unbalance detection differential amplifier 12 is R1 =
Assuming that the output signal Ir of the adder 21 is the same as the output voltage of the multiplier 20, assuming that it is set to zero as shown in FIG. 5B when R2 is in the balanced state, for example, as shown in FIG. It becomes the sine wave of (C). Output signal I of adder 21
r functions as a reference signal for making the input current a predetermined sine wave. The current control differential amplifier 23 forms a signal Vf corresponding to the difference between the reference signal Ir of FIG. 5C and the detection signal Iin of FIG. 5D and sends it to the comparator 14. R1 = R2
Is set so that the center level of the difference signal Vf at the time of balancing coincides with the center level of the triangular wave voltage Vt shown in FIG. 5 (E). The difference signal Vf changes to the power supply voltage Vin in a reverse phase. As a result, the output of the comparator 14 is shown in FIG.
The PWM wave Vp shown in (G) is obtained. This PWM wave V
In the period of the positive half cycle of alternating current, p is a pulse with a narrow pulse width arranged near 90 degrees, and a pulse with a uniform pulse width is arranged near 0 degrees and 180 degrees. On the contrary, in the period of the negative half cycle, a pulse having a wide width is arranged near 270 degrees, and a pulse having a uniform on / off width is arranged near 180 degrees and 360 degrees. The first control signal Vg1 for the first transistor Q1 is a phase inversion signal of the PWM wave Vp as shown in FIG. 5 (F), and the second control signal Vg2 for the second transistor Q2 is As shown in FIG. 5 (G), it is in-phase with the PWM wave Vp. Therefore, in the balanced state, the ON control time width of the first transistor Q1 in the positive half cycle of AC is equal to the ON control time width of the second transistor Q2 in the negative half cycle, and finally, The voltages Vc1, Vc2 of the second capacitors C1, C2 are kept approximately equal.

FIG. 6 shows an unbalanced condition of R1 <R2.
The state of each part of is shown. In this case, since it is the same as after t1 in FIG. 3, the unbalanced detection voltage Vd shown in FIG. 6B is obtained from the differential amplifier 12. When the unbalanced detection voltage Vd is added to the sine wave corresponding to the power supply voltage Vin obtained from the multiplier 20, the signal Ir shown in FIG. 6C is obtained. This is a waveform obtained by shifting the waveform of FIG. 5C upward by Vd. From the differential amplifier 23, V of FIG.
A signal Vf obtained by slightly shifting f upward is obtained as shown in FIG. As a result, the PWM shown in FIG.
The pulse widths of the wave Vp and the second control signal Vg2 are shown in FIG.
Becomes wider after t1 and the pulse width of the first control signal Vg1 shown in FIG. 6F becomes narrower after t1 in FIG. 3D. Therefore, the same principle as in FIG.
The voltages Vc1 and Vc2 of the capacitors C1 and C2 are returned to substantially the same value.

Next, the operation when the DC output voltage Vdc falls below the desired value in the balanced state of R1 = R2 in FIG. 4 will be described with reference to FIG. At this time, the output voltage Ve of the differential amplifier 19 becomes high and the amplitude of the sine wave output from the multiplier 20 becomes large. As a result, the amplitude of the sine wave output from the adder 21 becomes higher than the normal state of the solid line as shown by the dotted line in FIG. Therefore, the amplitude of the input signal Vf of the comparator 14 also changes as shown by the dotted line in FIG. Since the central levels of Vf and Vt match, P
The width of the WM wave Vp becomes wider in the positive half cycle and becomes narrower in the negative half cycle as shown by the dotted line in FIG. Second
Control signal Vg2 is in phase with PWM wave Vp, and the first control signal Vg1 is the phase inversion of PWM wave Vp. Therefore, the pulse of first control signal Vg1 is shown by the dotted line in FIG. 7 (F). Thus, the positive half cycle narrows and the negative half cycle widens. The second capacitor C2 in the positive half cycle
The longer the energy storage time of the reactor L due to the closed circuit formed by the power source 1, the reactor L and the second transistor Q2, the higher the output voltage can be made. Figure 7 (G)
Since the pulse width of the second control signal Vg2 is wide in the positive half cycle of, the output voltage becomes high. In the negative half cycle, the longer the energy storage time in the reactor L due to the closed circuit of the first capacitor C1, the first transistor Q1, the reactor L and the power supply 1, the higher the output voltage can be. As shown in FIG. 7F, in the negative cycle, the pulse width of the first control signal Vg1 is wide, so the output voltage is high. The output voltage Vdc is returned to the desired value by the above operation.

In FIG. 4, a differential amplifier 23 is provided for making the input current Iin flowing through the reactor L follow the waveform of the AC voltage Vin. Therefore, the input current waveform becomes a waveform with few harmonic components. Also, the voltage becomes almost in phase with the voltage Vin, and the power factor becomes almost 1.

[0026]

MODIFICATION The present invention is not limited to the above-described embodiments, and the following modifications are possible, for example. (1) For example, as shown in FIG. 8, an insulated gate field effect transistor F in which a diode is built in parallel between the source and the drain by connecting the source to the substrate as the first and second switching means S1 and S2.
ET1 and FET2 can be used. In FIG. 8, F
The ET built-in diodes D1 and D2 are shown by dotted lines. Also,
Instead of the IGBT structure transistors Q1 and Q2, general bipolar transistors, FETs, and other semiconductor switches can be used. (2) As shown by the dotted line in FIG. 8, the reactor L can be connected in series to the common power supply line between the connection midpoint of the capacitors C1 and C2 and the power supply 1. (3) In FIG. 4, when it is not necessary to improve the waveform of the input current Iin and the power factor, the current detector 22 and the differential amplifier 23 can be omitted. (4) The triangular wave generating circuit 13 can generate an asymmetrical triangular wave (sawtooth wave). (5) Change the polarity of the input of the comparator 14 and change the PWM wave Vp
And the first control signal Vg1 have the same phase, and the second control signal Vg1
You may make g2 reverse phase. (6) The first and second storage batteries can be connected in parallel to the first and second capacitors C1 and C2. Also,
A storage battery can be connected between the output terminals 5 and 6. (7) Instead of connecting one input terminal of the multiplier 20 of FIG. 4 to the power supply terminal 2, it can be connected to another AC power supply or an oscillator.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a conventional AC / DC converter.

FIG. 2 is a circuit diagram showing an AC / DC converter of a first embodiment.

FIG. 3 is a waveform diagram showing a state of each part of FIG.

FIG. 4 is a circuit diagram showing an AC / DC converter of a second embodiment.

FIG. 5 is a waveform diagram showing in principle the state of each part at the time of load balancing in FIG.

FIG. 6 is a waveform diagram showing in principle the state of each part when the load is unbalanced in FIG.

FIG. 7 is a waveform diagram showing the state of each part for explaining the operation when the output voltage changes in FIG.

FIG. 8 is a circuit diagram showing a part of a modified AC / DC converter.

[Explanation of symbols]

 11 Unbalance detection circuit 13 Triangular wave generation circuit 14 Comparator

Claims (3)

[Claims] 1. An AC power supply terminal to which one end of an AC power supply is connected, a ground terminal to which the other end of the AC power supply is connected, first and second DC output terminals, the AC power supply terminal and the first DC output terminal, A first switching means connected to the first DC output terminal; a second switching means connected to the AC power supply terminal and the second DC output terminal; A first capacitor connected between an output terminal and the ground terminal, a second capacitor connected between the second DC output terminal and the ground terminal, the AC power supply, and the first capacitor Switching means and the first
A first closed circuit composed of the capacitor and a second closed circuit composed of the AC power supply, the second capacitor, and the second switching means, and a reactor commonly connected in series, And a control circuit for alternately controlling ON / OFF of the second switching means, wherein the control circuit is provided between the first DC output terminal and the ground terminal. An unbalanced voltage detection circuit for obtaining an unbalanced detection voltage corresponding to a difference between a first output voltage and a second output voltage between the second DC output terminal and the ground terminal, and the AC terminal A triangular wave generating circuit for generating a triangular wave voltage having a frequency higher than the alternating current supplied from the AC, and comparing the unbalance detection voltage with the triangular wave voltage to obtain a pulse width modulated wave (PW). Wave) and a control signal forming circuit that forms the first and second control signals of the first and second switching means based on the pulse width modulated wave obtained from the comparator. An AC-DC converter characterized by having. 2. An output voltage detection circuit for detecting an output voltage between the first DC output terminal and the second DC output terminal, the control circuit further comprising: A voltage control error signal forming circuit that forms a voltage control error signal corresponding to the difference between the output and the reference voltage, and a multiplication circuit that forms a multiplication signal of the voltage changing in a predetermined cycle and the voltage control error signal. And a combining circuit that forms a combined signal of the unbalanced detection voltage and the multiplication signal and inputs the combined signal to the comparator instead of the unbalanced detection voltage. The AC / DC converter according to Item 1. 3. An error between the combined signal and the output of the current detector, which is connected between the current detector for detecting an input current flowing through the reactor and the combining circuit and the comparator. An AC / DC converter according to claim 3, further comprising an error signal forming circuit for forming a signal and supplying the error signal to the comparator for comparing the error signal with the triangular wave voltage.