JPH05260665A - Parallel operation controller for ac output converter - Google Patents

Parallel operation controller for ac output converter

Info

Publication number
JPH05260665A
JPH05260665A JP4050466A JP5046692A JPH05260665A JP H05260665 A JPH05260665 A JP H05260665A JP 4050466 A JP4050466 A JP 4050466A JP 5046692 A JP5046692 A JP 5046692A JP H05260665 A JPH05260665 A JP H05260665A
Authority
JP
Japan
Prior art keywords
converter
output
parallel
current
converters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4050466A
Other languages
Japanese (ja)
Other versions
JP2730383B2 (en
Inventor
Nobuo Sashida
伸夫 佐志田
Touma Yamamoto
融真 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP4050466A priority Critical patent/JP2730383B2/en
Publication of JPH05260665A publication Critical patent/JPH05260665A/en
Application granted granted Critical
Publication of JP2730383B2 publication Critical patent/JP2730383B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To provide a parallel operation controller for balancing an allotted current at a high speed in a power source system in which a plurality of instantaneous control type AC output converters are connected in parallel and operated in parallel with a common load. CONSTITUTION:Outputs of converters are connected to simulated bus 9. A cross current DELTAI1 flowing between the converters is detected by the bus 9, Z x al) is obtained by a cross current limiting virtual impedance circuit 405, a signal V1* (=V*- ZXDELTAI1) obtained by subtracting this signal from a bus voltage command value V* by a subtracter 504 is used as a command value of an instantaneous voltage controller 403 to be so operated as to eliminate the cross current.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はインバータのような交流
出力変換器を複数台並列接続し,共通の負荷に対して並
列運転する電源システムにおいて,変換器間の電流バラ
ンスを制御する手段に関するものである.
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a means for controlling the current balance between converters in a power supply system in which a plurality of AC output converters such as inverters are connected in parallel and operated in parallel with a common load. Is.

【0002】[0002]

【従来の技術】図15は,例えば特公昭53-36137及び特
公昭56-13101に示された従来の交流出力変換器の並列運
転システムを示す構成図である.
2. Description of the Related Art FIG. 15 is a block diagram showing a parallel operation system of conventional AC output converters shown in, for example, Japanese Examined Patent Publications Sho 53-36137 and Sho 56-13101.

【0003】図において,1号インバータ装置1は同じ
構成の2号インバータ装置2と出力母線3を通じて並列
運転しつつ負荷4へ電力を供給している.1号インバー
タ装置1はインバータ本体100,フィルタ用リアクト
ル101,同コンデンサ102を主要構成要素とし,直
流電源5の電力を交流に変換し,出力開閉器103aを
通じて出力母線3へ接続されている.インバータ装置1
と2とが並列運転するためには,1号インバータ装置1
の出力電流 I1 からCT200aにより検出信号I1a
を得,同じく2号インバータ装置2から得られた検出信
号I2aとの差,即ち横流に相当する信号ΔI1 を横流検
出回路151により得る.次に移相器150より,直交
する2つの電圧ベクトルEA とEB を作り,ΔI1 信号
から演算回路152,153によりそれぞれ無効電力対
応成分ΔQと有効電力対応成分ΔPを得る.インバータ
は電圧設定回路7と電圧帰還回路300の信号にもとづ
き,電圧制御回路403が,パルス幅変調回路(以下P
WM回路)400を介して,インバータ本体100のパ
ルス巾変調を行ない,内部発生電圧を制御する.
In the figure, the No. 1 inverter unit 1 supplies electric power to the load 4 while operating in parallel through the No. 2 inverter unit 2 and the output busbar 3 having the same structure. The No. 1 inverter device 1 has an inverter body 100, a filter reactor 101, and the same capacitor 102 as main constituent elements, converts the power of a DC power supply 5 into AC, and is connected to an output bus bar 3 through an output switch 103a. Inverter device 1
And 2 operate in parallel, the 1st inverter device 1
Output current I 1 from CT 200a detected signal I 1a
Similarly, the difference from the detection signal I 2a obtained from the No. 2 inverter device 2, that is, the signal ΔI 1 corresponding to the cross current is obtained by the cross current detection circuit 151. Next, two orthogonal voltage vectors E A and E B are created from the phase shifter 150, and reactive power corresponding component ΔQ and active power corresponding component ΔP are obtained from the ΔI 1 signal by the arithmetic circuits 152 and 153, respectively. In the inverter, based on the signals from the voltage setting circuit 7 and the voltage feedback circuit 300, the voltage control circuit 403 detects that the pulse width modulation circuit (hereinafter referred to as P
The pulse width modulation of the inverter main body 100 is performed via the WM circuit) 400 to control the internally generated voltage.

【0004】前述の無効電流対応成分ΔQは電圧制御回
路403へ補助信号的に与えられ,インバータ本体10
0の内部発生電圧を数%程度調節することにより,ΔQ
を零にするように動作する.
The reactive current corresponding component ΔQ is given to the voltage control circuit 403 as an auxiliary signal, and the inverter body 10
By adjusting the internally generated voltage of 0 by several percent, ΔQ
Works to make zero.

【0005】一方前述の有効電力対応成分ΔPはPLL
(フェーズロックドループ)回路を構成するアンプ15
4を通し,基準発振器155の周波数の微調整を行うこ
とによりインバータ本体100の内部発生電圧の位相を
制御し,ΔPを零にするように動作する.
On the other hand, the active power corresponding component ΔP is the PLL
(Phase-locked loop) Amplifier 15 that constitutes the circuit
4, the phase of the internally generated voltage of the inverter main body 100 is controlled by finely adjusting the frequency of the reference oscillator 155, and ΔP is set to zero.

【0006】このようにして,ΔQとΔPをともに零と
するように,電圧と位相を制御するので,2台のインバ
ータ間の横流がなくなり,安定な負荷の分担が行なわれ
る.
In this way, since the voltage and phase are controlled so that both ΔQ and ΔP are zero, cross current between the two inverters is eliminated, and stable load sharing is performed.

【0007】[0007]

【発明が解決しようとする課題】従来の変換器の並列運
転システムは以上のように構成されているので,次の五
つの問題点があった.第一の問題点は,インバータの内
部発生電圧の位相及び電圧の平均値を制御することによ
って,分担電流をバランスさせるために,制御の応答速
度を向上することが難しく,特に瞬時の横流は制御でき
ないことである.第二の問題点は,横流を有効分と無効
分に分離検出する際にフィルタが必要なため横流制御を
高速にできないことである.このためインバータの出力
を歪の少ない高品質の正弦波に保つ瞬時波形制御などの
高速電圧制御系には適用限界がある.第三の問題点は,
変換器と他の電源とを並列運転することが難しく,特に
変換器と電力系統とを並列運転しようとしても横流を制
御することは難しい.
Since the conventional parallel operation system of converters is constructed as described above, there are the following five problems. The first problem is that it is difficult to improve the control response speed in order to balance the shared currents by controlling the phase of the voltage internally generated in the inverter and the average value of the voltage. It is not possible. The second problem is that the crossflow control cannot be performed at high speed because a filter is required to detect the crossflow into the effective component and the ineffective component separately. For this reason, there are application limits to high-speed voltage control systems such as instantaneous waveform control that keeps the output of the inverter a high-quality sine wave with little distortion. The third problem is
It is difficult to operate the converter and other power sources in parallel, and it is especially difficult to control the cross current even when trying to operate the converter and the power system in parallel.

【0008】第四の問題点は,並列運転の試験調整がむ
ずかしく,各インバータを実際に出力母線3に接続して
運転してみないと試験調整ができないことである.第五
の問題点は,インバータの出力電流には負荷電流に含ま
れる高調波分が含まれているために,横流検出回路に高
調波が流れて制御誤差がでることである.
The fourth problem is that the test adjustment in parallel operation is difficult, and the test adjustment cannot be performed unless the inverters are actually connected to the output busbar 3 and operated. The fifth problem is that since the output current of the inverter contains the harmonic components contained in the load current, the harmonics flow in the cross current detection circuit, resulting in a control error.

【0009】この発明は上記のような問題点を解決する
ためになされたもので,分担電流を高速にバランスさ
せ,かつ試験調整の容易な交流出力変換器の並列運転制
御装置を提供するものである.
The present invention has been made to solve the above problems, and provides a parallel operation control device for an AC output converter that balances the shared currents at high speed and facilitates test adjustment. is there.

【0010】また,インバータに限らず,他の瞬時制御
形交流出力変換器の並列運転にも汎用的に適用できる手
段を提供することを目的としている.
Another object of the present invention is to provide means that can be applied to parallel operation of not only inverters but also other instantaneous control type AC output converters.

【0011】[0011]

【課題を解決するための手段】この発明に係る交流出力
変換器の並列運転制御装置は,瞬時電圧制御形変換器の
出力を負荷とは分離された模擬母線に並列接続し,変換
器相互間に流れる電流の横流分を上記模擬母線に流れる
信号から得るように構成している.また,上記横流分を
主として変換器相互間の位相差に起因する成分と主とし
て出力電圧差に起因する成分とに分離して変換器の出力
電圧位相と平均値とを制御する.
A parallel operation control device for an AC output converter according to the present invention connects an output of an instantaneous voltage control type converter in parallel to a simulated bus bar separated from a load, and connects the converters to each other. The cross current component of the current flowing in is obtained from the signal flowing in the simulated bus. In addition, the cross current component is separated into a component mainly due to the phase difference between the converters and a component mainly due to the output voltage difference to control the output voltage phase and average value of the converter.

【0012】更に,各変換器毎に当該変換器の駆動制御
信号と同一の制御信号で駆動される模擬変換器を模擬母
線に接続して横流分を検出する構成としてもよい.
Further, for each converter, a simulated converter driven by the same control signal as the drive control signal of the converter may be connected to the simulated busbar to detect the cross current.

【0013】また,以上を,1台または複数台の交流出
力変換器と別の電源系統との並列運転時に適用すること
ができる.また,瞬時電圧制御回路に電流マイナールー
プを備えて,変換器の出力電流の瞬時値を制御する構成
としてもよい.
Further, the above can be applied during parallel operation of one or a plurality of AC output converters and another power supply system. The instantaneous voltage control circuit may be equipped with a current minor loop to control the instantaneous value of the converter output current.

【0014】[0014]

【作用】この発明では,模擬母線に流れる信号から変換
器および電源系統の相互間の横流分を検出してこの横流
分を抑制するように各変換器の出力電圧を制御する.
In the present invention, the cross current between the converter and the power supply system is detected from the signal flowing through the simulated bus, and the output voltage of each converter is controlled so as to suppress this cross current.

【0015】[0015]

【実施例】実施例1.以下,この発明の一実施例を図に
ついて説明する.図1において,1号インバータ装置1
は,図示簡略した同じ構成の2号インバータ装置2と出
力母線3を通じて並列運転しつつ,負荷4へ電力を供給
している.5は1号インバータ装置1に接続されている
直流電源,6は2号インバータ装置2に接続されている
直流電源,8は各インバータに出力電圧基準を与える出
力電圧基準回路,9は各インバータの出力が接続された
模擬母線である.そのほか,前述の図15と対応する機
能については同じ番号をつけているが,図15は出力電
圧の平均値を制御する形式のインバータ装置であるのに
対し,図1は出力電圧の瞬時値および平均値を制御する
形式のインバータ装置であるので,同一番号でも必ずし
も同じ機能の回路ではない.
EXAMPLES Example 1. An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, No. 1 inverter device 1
Supplies electric power to the load 4 while operating in parallel through the output busbar 3 and the No. 2 inverter device 2 having the same configuration as shown in the figure. Reference numeral 5 is a DC power supply connected to the No. 1 inverter device 1, 6 is a DC power supply connected to the No. 2 inverter device 2, 8 is an output voltage reference circuit which gives an output voltage reference to each inverter, and 9 is each inverter This is a simulated bus with the output connected. In addition, although the same numbers are given to the functions corresponding to those in FIG. 15 described above, FIG. 15 shows an inverter device of the type that controls the average value of the output voltage, while FIG. Since it is an inverter device of the type that controls the average value, circuits with the same number do not necessarily have the same function.

【0016】100番以降の番号は,インバータ装置の
構成要素であり,添え字のない番号と添え字がaの番号
は1号インバータ装置1の構成要素,添え字がbの番号
は2号インバータ装置2の構成要素である.
Numbers after 100 are constituent elements of the inverter device. Numbers without subscripts and numbers with subscript a are constituent elements of No. 1 inverter device 1 and numbers with subscript b are No. 2 inverter. It is a component of the device 2.

【0017】100はインバータ本体であり,例えば高
周波スイッチングの可能なトランジスタやMOSFETなどの
自己消弧形素子により構成され,図2(a)のような3相
ブリッジインバータや図2(b)のような単相ブリッジイ
ンバータのそれぞれのアームが出力周波数(例えば60
Hz)の10倍から数100倍程度の高周波でスイッチン
グするもので,直流電圧を正弦波の基本波を含んだ矩形
波状の高周波交流電圧に変換する.101,102は低
域通過フィルタを構成するリアクトルとコンデンサであ
り,インバータ本体100の発生した矩形波状の高周波
交流電圧から高調波を除去し,正弦波の出力電圧を得
て,出力開閉器103aを通じて出力母線3へ接続され
ている.
Reference numeral 100 denotes an inverter main body, which is composed of, for example, a self-extinguishing element such as a transistor or a MOSFET capable of high frequency switching, and is a three-phase bridge inverter as shown in FIG. Each arm of a simple single-phase bridge inverter has an output frequency (eg 60
It switches at a high frequency of 10 times to several hundred times of (Hz), and converts a DC voltage into a rectangular wave high-frequency AC voltage containing a sinusoidal fundamental wave. Reference numerals 101 and 102 denote a reactor and a capacitor that form a low-pass filter, which remove harmonics from the rectangular-wave-shaped high-frequency AC voltage generated by the inverter body 100 to obtain a sinusoidal output voltage and output the output switch 103a. It is connected to the output bus 3.

【0018】200aは1号インバータ装置の出力電流
1 を,201はインバータ本体100の出力電流 I
A1を,203aは模擬母線9に流れる電流をそれぞれ検
出する電流センサである.202aはインバータ出力と
模擬母線とを絶縁する絶縁変圧器である.204aは出
力開閉器103aと連動して模擬母線を開閉するスイッ
チである.300はコンデンサ102の電圧(並列運転
時は出力母線電圧となる.)を検出する電圧センサであ
る.
Reference numeral 200a is the output current I 1 of the No. 1 inverter device, and 201 is the output current I 1 of the inverter main body 100.
A1 and 203a are current sensors for detecting the currents flowing through the simulated bus bar 9, respectively. 202a is an isolation transformer that insulates the output of the inverter from the simulated busbar. Reference numeral 204a is a switch that opens and closes the simulated busbar in cooperation with the output switch 103a. Reference numeral 300 is a voltage sensor for detecting the voltage of the capacitor 102 (which is the output bus voltage during parallel operation).

【0019】400はインバータ本体100のスイッチ
ングのタイミングを決めるPWM回路であり,例えばイ
ンバータ本体100が出力すべき基本波分の電圧指令信
号と三角波キャリアの交点でインバータ本体100をス
イッチングさせる三角波比較形PWM回路である.40
1はインバータ本体100の出力電流IA1を制御する瞬
時電流制御回路である.402はインバータ本体100
の出力電流指令値を制限するリミッタ回路である.40
3はコンデンサ102の電圧を制御する瞬時電圧制御回
路である.404は所望の出力電圧を発生する為にコン
デンサ102に流すべき電流値を出力するコンデンサ電
流基準発生回路である.405は1号インバータ装置1
と2号インバータ装置2の間に仮想的にインピーダンス
Zを挿入し,横流を制限するように動作させる為の横流
制限用仮想インピーダンス回路である.
Reference numeral 400 denotes a PWM circuit that determines the switching timing of the inverter main body 100. For example, a triangular wave comparison type PWM for switching the inverter main body 100 at the intersection of the voltage command signal for the fundamental wave to be output from the inverter main body 100 and the triangular wave carrier. It is a circuit. 40
Reference numeral 1 is an instantaneous current control circuit for controlling the output current I A1 of the inverter body 100. 402 is the inverter main body 100
This is a limiter circuit that limits the output current command value of. 40
3 is an instantaneous voltage control circuit for controlling the voltage of the capacitor 102. Reference numeral 404 is a capacitor current reference generation circuit that outputs a current value to be passed through the capacitor 102 to generate a desired output voltage. 405 is the first inverter device 1
It is a virtual impedance circuit for limiting the cross current that inserts an impedance Z between the No. 2 inverter device 2 and the inverter device 2 and operates so as to limit the cross current.

【0020】500,501,502,503,504
は加減算器である.
500, 501, 502, 503, 504
Is an adder / subtractor.

【0021】2号インバータ装置2は,1号インバータ
装置1と同一の構成で,出力が出力母線3および模擬母
線9を通じて1号インバータ装置1と並列接続されてお
り,103bは2号インバータ装置2の出力開閉器,2
00bは2号インバータ装置2の出力電流I2 を検出す
る電流センサ,203bは2号インバータ装置から模擬
母線に流れる電流を検出する電流センサ,204bは模
擬母線を開閉するスイッチである.
The No. 2 inverter device 2 has the same structure as the No. 1 inverter device 1, and the output is connected in parallel with the No. 1 inverter device 1 through the output bus 3 and the simulated bus line 9, and 103b is the No. 2 inverter device 2. Output switch, 2
00b is a current sensor for detecting the output current I 2 of the No. 2 inverter device, 203b is a current sensor for detecting the current flowing from the No. 2 inverter device to the simulated busbar, and 204b is a switch for opening and closing the simulated busbar.

【0022】次に動作について説明する.Next, the operation will be described.

【0023】このインバータ装置には電流マイナールー
プが設けられており,瞬時電流制御回路401は,電流
センサ201によりフィードバックされたインバータ本
体100の出力電流IA1がリミッタ回路402からの電
流指令IA1 * と一致するようにリアクトル101に印加
すべき電圧の指令値を出力する.出力母線3にはコンデ
ンサ102及び2号インバータ装置2による電圧がある
ので,リアクトル101に所望の電圧を印加するには,
インバータ本体100が出力母線3の電圧とリアクトル
101に印加すべき電圧との和を発生する必要がある.
従って,電圧センサ300で検出したコンデンサ102
の電圧と電流制御回路401の出力とを加算器500に
て加算し,この信号を電圧指令として三角波比較形PW
M回路400に与える.
This inverter device is provided with a current minor loop. In the instantaneous current control circuit 401, the output current I A1 of the inverter main body 100 fed back by the current sensor 201 is the current command I A1 * from the limiter circuit 402 . The command value of the voltage to be applied to the reactor 101 is output so as to match with. Since the output bus 3 has a voltage from the capacitor 102 and the No. 2 inverter device 2, in order to apply a desired voltage to the reactor 101,
The inverter body 100 needs to generate the sum of the voltage of the output bus 3 and the voltage to be applied to the reactor 101.
Therefore, the capacitor 102 detected by the voltage sensor 300
And the output of the current control circuit 401 are added by the adder 500, and this signal is used as a voltage command for the triangular wave comparison type PW.
It is given to the M circuit 400.

【0024】コンデンサ電流基準発生回路404は,コ
ンデンサに流れるべき電流として,コンデンサ102の
電圧指令V1 *より90度位相の進んだ正弦波電流基準を
コンデンサ102の容量に応じて発生する.コンデンサ
102の電圧指令V1 *は減算器504の出力から得られ
ることは後述する.瞬時電圧制御回路403は,コンデ
ンサ102の電圧指令V1 *と電圧検出器300で検出し
たコンデンサ102の電圧との偏差を減算器503にて
演算した信号を入力とし,この偏差を少なくするために
インバータ本体100が出力すべき補正電流信号を出力
する.
The capacitor current reference generation circuit 404 generates a sine wave current reference which is 90 degrees out of phase with the voltage command V 1 * of the capacitor 102 according to the capacitance of the capacitor 102, as a current to flow through the capacitor. It will be described later that the voltage command V 1 * of the capacitor 102 is obtained from the output of the subtractor 504. The instantaneous voltage control circuit 403 receives the signal calculated by the subtractor 503 as the deviation between the voltage command V 1 * of the capacitor 102 and the voltage of the capacitor 102 detected by the voltage detector 300, and reduces the deviation. The inverter main body 100 outputs a correction current signal to be output.

【0025】インバータ本体100の出力電流指令値I
A1 * は,コンデンサ電流基準発生回路404,瞬時電圧
制御回路403の出力と,電流センサ200が出力する
1号インバータ装置1の負荷電流信号IL1 * を加算器5
02にて演算し,その結果をリミッタ回路402にて制
限した信号である.従って,無負荷状態においては,イ
ンバータ本体100がコンデンサ102に流れるべき電
流を供給することによって無負荷電圧を確立する.この
場合,瞬時電圧制御回路403は電流制御の誤差やコン
デンサ102の容量の設計値と実際値との誤差により生
じるコンデンサ電流基準発生回路404の出力の過不足
分を補正する.次に,負荷4が投入されると,負荷電流
信号IL1 * が電流センサ200から電流マイナーループ
へ指令として与えられ,インバータが負荷電流を分担す
ることになる.ここでリミッタ回路402は負荷起動時
における突入電流等の過電流をインバータ本体100が
供給しないように,電流制御回路401への指令値をイ
ンバータ本体100の電流許容値以下に制限するもので
ある.
Output current command value I of the inverter body 100
A1 * is an adder 5 that outputs the output of the capacitor current reference generation circuit 404 and the instantaneous voltage control circuit 403 and the load current signal I L1 * of the first inverter device 1 output from the current sensor 200.
This is a signal that is calculated in 02 and the result is limited by the limiter circuit 402. Therefore, in the no-load state, the inverter main body 100 supplies the current that should flow to the capacitor 102 to establish the no-load voltage. In this case, the instantaneous voltage control circuit 403 corrects the excess or deficiency of the output of the capacitor current reference generation circuit 404 caused by the error of the current control or the error between the design value and the actual value of the capacitance of the capacitor 102. Next, when the load 4 is turned on, the load current signal I L1 * is given from the current sensor 200 to the current minor loop as a command, and the inverter shares the load current. Here, the limiter circuit 402 limits the command value to the current control circuit 401 to the current allowable value of the inverter body 100 or less so that the inverter body 100 does not supply an overcurrent such as a rush current at the time of starting the load.

【0026】このように構成することによって,インバ
ータはそれ自身の電流マイナーループで過電流に対し保
護され,また,負荷電流の歪や急変に対して速やかに追
従することにより,出力電圧を常に正弦波に保つことが
できる.この方式の特徴はこのような制御がインバータ
の高周波PWMのスイッチングのたびに行われるため,
応答が非常に速いことである.例えば,10kHz のスイ
ッチング周波数を用いると100μsec 毎に制御が行わ
れるので,負荷の急変などの外乱に対する過渡現象はお
よそ100μsec の10倍程度で完了し,優れた制御性
能を得ることができる.
With this configuration, the inverter is protected against overcurrent by its own current minor loop, and the output voltage is always sinusoidal by quickly following the distortion or sudden change of the load current. You can keep on the waves. The feature of this method is that such control is performed each time the high frequency PWM switching of the inverter is performed.
The response is very fast. For example, when a switching frequency of 10 kHz is used, control is performed every 100 μsec, so transient phenomena for disturbances such as sudden changes in load are completed in about 10 times 100 μsec, and excellent control performance can be obtained.

【0027】1号インバータ装置1と2号インバータ装
置2の電圧制御系の応答と精度が全く同一の場合は,以
上の制御系構成で横流は流れないが,実際には構成部品
の精度,制御ゲイン,主回路定数などのばらつきによ
り,このままでは横流の少ない安定した並列運転が困難
である.例えば,1号インバータ装置1と2号インバー
タ装置2の電圧センサが,それぞれ−0.5%,+0.5
%の誤差を持っていたとすると,単独運転時の出力電圧
差ΔVが1%となり,仮にインバータ間の配線インピー
ダンスが1%以下だとすると,横流が100%以上流れ
ることになる.
When the response and accuracy of the voltage control system of the No. 1 inverter device 1 and that of the No. 2 inverter device 2 are exactly the same, the cross current does not flow in the above control system configuration, but in reality, the accuracy and control of the components are controlled. Due to variations in gain and main circuit constants, stable parallel operation with little cross current is difficult if left unchanged. For example, the voltage sensors of the first inverter device 1 and the second inverter device 2 are -0.5% and +0.5, respectively.
If there is an error of%, the output voltage difference ΔV during islanding becomes 1%, and if the wiring impedance between the inverters is 1% or less, the cross current will flow 100% or more.

【0028】本発明は,次のようにして,インバータ間
に流れる横流を検出し,この横流に対してのみインピー
ダンスがあたかも存在するように制御回路を構成するこ
とにより,横流を抑制する.
The present invention suppresses the cross current by detecting the cross current flowing between the inverters and configuring the control circuit so that the impedance exists only for the cross current as follows.

【0029】1号インバータ装置1の出力は絶縁変圧器
202a,スイッチ204aを介して模擬母線9に並列
接続されており,2号インバータ装置2の出力も同様に
絶縁変圧器202b,スイッチ204bを介して模擬母
線9に接続されている.今スイッチ204a,bがon
しているとすると,模擬母線9は主回路の等価回路から
負荷を除いた回路になっているので,ここを流れる電流
は各インバータ間の横流成分ΔI(例えば1号インバー
タ装置に対しては:ΔI1=I1−IL/n)のみとな
る.従って電流センサ203では変換器相互間に流れる
横流のみが検出される.
The output of the No. 1 inverter device 1 is connected in parallel to the simulated bus 9 via the insulating transformer 202a and the switch 204a, and the output of the No. 2 inverter device 2 also passes through the insulating transformer 202b and the switch 204b. Connected to the simulated bus bar 9. Now the switches 204a, b are on
If so, since the simulated bus 9 is a circuit obtained by removing the load from the equivalent circuit of the main circuit, the current flowing therethrough is a cross current component ΔI between the inverters (for example, for the No. 1 inverter device: ΔI 1 = I 1 becomes -I L / n) only. Therefore, the current sensor 203 detects only the cross current flowing between the converters.

【0030】横流制限用仮想インピーダンス回路405
は,ΔI1×Z(ΔI1は横流,Zは仮想的なインピーダ
ンスの伝達関数)を演算し,この信号を出力電圧基準回
路8から出力される出力電圧指令値V* から減じ,これ
をコンデンサ102の電圧指令V1 *とする.コンデンサ
102の電圧は前述の電圧制御系により,電圧指令V1 *
に瞬時に追従する.
Virtual impedance circuit 405 for limiting cross current
Calculates ΔI 1 × Z (ΔI 1 is a cross current, Z is a virtual impedance transfer function), subtracts this signal from the output voltage command value V * output from the output voltage reference circuit 8, and this is subtracted from the capacitor. The voltage command V 1 * of 102 is set. The voltage of the capacitor 102 is set to the voltage command V 1 * by the voltage control system described above .
Instantly follows.

【0031】ここで図3を用いて,横流制限用仮想イン
ピーダンス回路405によりインバータが横流に関して
のみZの出力インピーダンスを持ち,横流以外の電流成
分には低インピーダンスの電圧源として動作することを
説明する.図3は図1の瞬時横流制御部を簡略化したブ
ロック図であり,図において,700a,700bはそ
れぞれ1号インバータ装置1,2号インバータ装置2の
電圧指令値V1 *及びV2 *から出力電圧までの伝達関数を
示す.その他の番号は前述の図1で既に説明済みであ
り,同一機能については同一番号をつけている.既に使
用している記号もあるが,次の記号を改めて定義する. VB :出力母線電圧 V* :出力電圧指令値 V1 * :1号インバータコンデンサ電圧指令値 V2 * :2号インバータコンデンサ電圧指令値 IL :負荷電流 I1 :1号インバータ出力電流 I2 :2号インバータ出力電流 ΔI1:1号インバータ横流(=I1−IL/2) ΔI2:2号インバータ横流(=I2−IL/2) G1 :1号インバータ電圧制御系伝達関数 G2 :2号インバータ電圧制御系伝達関数 Z :横流制限用仮想インピーダンス値 これらの記号を用いて,次に,横流制限用仮想インピー
ダンスの効果を示す関係式を導く.
Here, it will be described with reference to FIG. 3 that the cross current limiting virtual impedance circuit 405 causes the inverter to have an output impedance of Z only with respect to the cross current and operate as a low impedance voltage source for current components other than the cross current. . FIG. 3 is a simplified block diagram of the instantaneous cross current control unit of FIG. 1. In the figure, 700a and 700b are derived from the voltage command values V 1 * and V 2 * of the first inverter device 1 and the second inverter device 2, respectively. The transfer function up to the output voltage is shown. The other numbers have already been described in FIG. 1 above, and the same functions are given the same numbers. Some symbols have already been used, but the following symbols will be defined again. V B : Output bus voltage V * : Output voltage command value V 1 * : No. 1 inverter capacitor voltage command value V 2 * : No. 2 inverter capacitor voltage command value IL : Load current I 1 : No. 1 inverter output current I 2 : No. 2 inverter output current ΔI 1 : No. 1 inverter cross current (= I 1 −I L / 2) ΔI 2 : No. 2 inverter cross current (= I 2 −I L / 2) G 1 : No. 1 inverter voltage control system transmission Function G 2 : No. 2 inverter voltage control system transfer function Z: Cross-current limiting virtual impedance value Using these symbols, the relational expression showing the effect of cross-current limiting virtual impedance is next derived.

【0032】キルヒホッフの法則より,次式が成立す
る. IL=I1+I2 (1) (1)式より,ΔI1,ΔI2は次式となる. ΔI1=I1−IL/2=(I1−I2)/2 (2) ΔI2=I2−IL/2=(I2−I1)/2 (3) ΔI2=−ΔI1 (4) 図3及び(4)式より,V1 *,V2 *は次式となる. V1 *=V*−Z×ΔI1 (5) V2 *=V*−Z×ΔI2=V*+Z×ΔI1 (6) G1,G2の定義より,次式が成立する. VB=V1 *×G1 (7) VB=V2 *×G2 (8) (5)〜(8)式より,次式が成立する. VB=V*×G1−Z×ΔI1×G1 (9) VB=V*×G2+Z×ΔI1×G2 (10) (9)−(10)式より,ΔI1を求めると次式となる.
From Kirchhoff's law, the following equation holds. I L = I 1 + I 2 (1) From the formula (1), ΔI 1 and ΔI 2 are as follows. ΔI 1 = I 1 −I L / 2 = (I 1 −I 2 ) / 2 (2) ΔI 2 = I 2 −I L / 2 = (I 2 −I 1 ) / 2 (3) ΔI 2 = − ΔI 1 (4) From FIGS. 3 and (4), V 1 * and V 2 * are as follows. V 1 * = V * −Z × ΔI 1 (5) V 2 * = V * −Z × ΔI 2 = V * + Z × ΔI 1 (6) From the definitions of G 1 and G 2 , the following equation holds. V B = V 1 * × G 1 (7) V B = V 2 * × G 2 (8) From the equations (5) to (8), the following equation is established. V B = V * × G 1 −Z × ΔI 1 × G 1 (9) V B = V * × G 2 + Z × ΔI 1 × G 2 (10) From formula (9)-(10), ΔI 1 The formula is as follows.

【数1】 [Equation 1]

【0033】(9)+(10)式を求め,2で除すと,次式と
なる.
When the equations (9) + (10) are obtained and divided by 2, the following equation is obtained.

【数2】 [Equation 2]

【0034】(11)式より,横流は仮想インピーダンス値
Zにより抑制できることがわかる.即ち,G1,G2は電
圧制御系を前述のような瞬時電圧制御形などで構成する
ことにより,出力周波数においてゲインをほぼ1とする
ことができるので,(11)式は次式となる.
From equation (11), it can be seen that the cross current can be suppressed by the virtual impedance value Z. That is, since the gain can be made almost 1 at the output frequency by constructing the voltage control system of G 1 and G 2 by the above-mentioned instantaneous voltage control type, the formula (11) becomes the following formula. .

【数3】 [Equation 3]

【0035】単独運転の場合の個々のインバータ装置の
出力電圧差をΔVとすると,(13)式は次式となる.
Assuming that the output voltage difference between the individual inverter devices in the case of the independent operation is ΔV, the equation (13) becomes the following equation.

【数4】 例えば,ΔVが1%の場合は,Z=50%に選ぶと,横
流はΔV/(2×Z)=1%/100%=1%となる.
[Equation 4] For example, if ΔV is 1% and Z = 50% is selected, the cross current becomes ΔV / (2 × Z) = 1% / 100% = 1%.

【0036】次に(12)式の右辺第2項は,(13)式を代入
すると次式となる.
Next, the second term on the right side of the equation (12) becomes the following equation when the equation (13) is substituted.

【数5】 [Equation 5]

【0037】ΔVは1%程度と小さいので,(ΔV)2
≒0 と考えることができる.従って,(12)式は右辺第
1項のみとなり,次式となる.
Since ΔV is as small as about 1%, (ΔV) 2
It can be thought of as ≈0. Therefore, Eq. (12) has only the first term on the right side, and becomes the following equation.

【数6】 (16)式より,並列運転時の母線電圧VB は,単独運転時
の個々のインバータ装置の出力電圧平均値になり,仮想
インピーダンス値Zの影響はない.
[Equation 6] From Eq. (16), the bus voltage V B during parallel operation is the average output voltage of the individual inverter devices during independent operation, and the virtual impedance value Z has no effect.

【0038】Zは出力周波数において横流を制限する為
の適当なインピーダンス値を持っていれば,どのような
伝達関数でもよい.例えば,この回路が比例回路であれ
ばZは抵抗として,微分回路であればZはリアクトルと
して,積分回路であればZはコンデンサとして,比例,
積分,微分の組み合わせ回路であればZは抵抗,コンデ
ンサ,リアクトルの組み合わせた回路として動作する.
また,Zは正負非対象のリミッタなどの非線形要素を含
む回路でも,出力周波数において横流を制限する為の適
当なインピーダンス値さえ持っていれば,安定に横流を
制限することができる.
Z may be any transfer function as long as it has an appropriate impedance value for limiting the cross current at the output frequency. For example, if this circuit is a proportional circuit, Z is a resistor, if it is a differentiating circuit, Z is a reactor, and if it is an integrating circuit, Z is a capacitor.
If it is a combination circuit of integration and differentiation, Z operates as a combination circuit of resistance, capacitor and reactor.
In addition, Z is a circuit that includes nonlinear elements such as positive and negative non-symmetrical limiters, but can stably limit the cross current as long as it has an appropriate impedance value for limiting the cross current at the output frequency.

【0039】以上の説明では単純化のため,電流,電圧
がベクトル量であることを無視した説明となっている
が,ベクトル量であっても同じ関係が成立する.
In the above description, for simplification, the current and the voltage are vector quantities, but the same relationship holds even for vector quantities.

【0040】次に,主回路を並列運転する前に模擬母線
だけを並列接続して,試験調整する方法について説明す
る.通常の並列運転時にはスイッチ204を出力開閉器
103と連動して開閉させることにより,インバータが
実際に並列運転しているときだけ並列制御を行うが,出
力開閉器103をoffしたままでスイッチ204だけ
onするとインバータを出力母線3から切り離したまま
で並列運転制御を調整することができる.従って,装置
をはじめて並列運転するときにも事前に十分な調整をす
ることができ,又,たとえば装置の点検時に1号インバ
ータ装置だけで負荷4に給電しながら負荷に影響を与え
ることなく2号インバータの調整をすることもできる.
Next, a method for performing test adjustment by connecting only the simulated buses in parallel before the main circuits are operated in parallel will be described. In normal parallel operation, the switch 204 is opened and closed in conjunction with the output switch 103 to perform parallel control only when the inverter is actually in parallel operation. However, the output switch 103 is kept off and only the switch 204 is operated. When turned on, parallel operation control can be adjusted with the inverter disconnected from the output bus 3. Therefore, even when the devices are operated in parallel for the first time, sufficient adjustment can be performed in advance, and, for example, when the device is inspected, the No. 1 inverter device supplies power to the load 4 without affecting the load. You can also adjust the inverter.

【0041】以上説明した図1の制御方式は単相インバ
ータの例であるが,各相ごとにあるいは2相分に同様の
制御回路を設けることにより3相インバータにも適用で
きる.
The control method of FIG. 1 described above is an example of a single-phase inverter, but it can be applied to a three-phase inverter by providing a similar control circuit for each phase or for two phases.

【0042】また以上の説明では簡単のために同じ容量
の2台のインバータで説明したが,異なる容量のn台の
変換器の並列運転にも適用できる.この場合は,全ての
変換器が容量に比例して負荷を分担するように構成すれ
ばよい.
In the above description, two inverters having the same capacity have been described for simplification, but the invention can be applied to parallel operation of n converters having different capacities. In this case, all converters should be configured to share the load in proportion to the capacity.

【0043】実施例2.次に,横流を2つの成分に分離
して平均値制御する例を図4により説明する.
Example 2. Next, an example in which the lateral flow is separated into two components and the average value is controlled will be described with reference to FIG.

【0044】実施例1のように,1号および2号インバ
ータ装置が仮想インピーダンスZだけによって並列運転
しているとすると,前述のように両者の間には,両者の
電圧差ΔVに対し,ΔI=ΔV/(2×Z)の横流が流
れる.この横流の有効電力成分は,インバータにより可
逆変換されるため,例えば2台のインバータが無負荷で
並列運転している場合には,一方のインバータの直流電
源から他方のインバータの直流電源に対して有効電力が
流れることになる.直流電源5,6がサイリスタ整流器
のように電力回生できないものである場合,この有効電
力の流入により直流電圧が上昇してしまい,過電圧にな
る恐れがある.
As in the first embodiment, assuming that the No. 1 and No. 2 inverter devices are operating in parallel only by the virtual impedance Z, as described above, the voltage difference ΔV between the two is ΔI. = ΔV / (2 × Z) cross current flows. Since the active power component of this cross current is reversibly converted by the inverters, for example, when two inverters are operating in parallel with no load, the DC power supply of one inverter is changed to the DC power supply of the other inverter. Active power will flow. If the DC power supplies 5 and 6 cannot regenerate power like a thyristor rectifier, the DC voltage rises due to the inflow of this active power, which may result in overvoltage.

【0045】図4では,各装置に個別の電圧基準発生回
路を持ち,このような有効電力の流入を抑制して,直流
過電圧にならないで安定に並列運転するために,横流Δ
1を2つの成分ΔI1P,ΔI1Qに分離して制御してい
る.
In FIG. 4, each device has an individual voltage reference generation circuit, and in order to suppress such an inflow of active power and stably operate in parallel without a DC overvoltage, a cross current Δ
I 1 is controlled by separating it into two components ΔI 1P and ΔI 1Q .

【0046】(14)式より横流 ΔI1From equation (14), the cross current ΔI 1 is

【数7】 である.図5はV1 *およびV2 *の絶対値が一致していて
2 *がV1 *よりも位相角θだけ遅れている場合について
のベクトル図を示す.ここで,仮想インピーダンスZの
抵抗分をR,リアクタンス分をXとすると,Z=R+j
Xと表すことができ,そのインピーダンス角αを α=argZ=tanー1(X/R) (17) とする.このベクトル図より横流ベクトルΔI1および
ΔI2は,母線電圧ベクトルVB よりもαだけ遅れた仮
想電圧ベクトルErに平行な成分を持たず,この仮想電
圧ベクトルよりも90゜進んだ別の仮想電圧ベクトルE
xに平行な成分だけしか持っていない.
[Equation 7] Is. FIG. 5 shows a vector diagram when the absolute values of V 1 * and V 2 * match and V 2 * lags V 1 * by a phase angle θ. Here, when the resistance component of the virtual impedance Z is R and the reactance component is X, Z = R + j
It can be expressed as X, and its impedance angle α is α = argZ = tan -1 (X / R) (17). From this vector diagram, the cross current vectors ΔI 1 and ΔI 2 do not have a component parallel to the virtual voltage vector Er delayed by α from the bus voltage vector V B , and another virtual voltage advanced by 90 ° from this virtual voltage vector. Vector E
It has only the component parallel to x.

【0047】図6はV1 *およびV2 *に位相差がなく,V
2 *の絶対値がV1 *の絶対値よりも小さい場合についての
ベクトル図を示す.このベクトル図より横流ベクトルΔ
1およびΔI2は,母線電圧ベクトル VB よりもαだ
け遅れた仮想電圧ベクトルErに平行な成分だけを持
ち,Exに平行な成分を持っていない.
FIG. 6 shows that there is no phase difference between V 1 * and V 2 *
A vector diagram for the case where the absolute value of 2 * is smaller than the absolute value of V 1 * is shown. From this vector diagram, the cross current vector Δ
I 1 and ΔI 2 have only a component parallel to the virtual voltage vector Er delayed by α from the bus voltage vector V B , and have no component parallel to Ex.

【0048】図5および図6から,各横流成分ΔI1
よび ΔI2のうちV1 *およびV2 *間の位相差に起因す
る成分は,これらの横流ベクトルの,仮想電圧ベクトル
Erに垂直な成分(仮想電圧ベクトルExに平行な成
分)であることが分かる.つまり,各横流成分ΔI1
よびΔI2のうち両電圧指令値V1 *およびV2 *間の位相
差に起因する成分は負荷母線電圧ベクトルVB を90°
−αだけ位相を進めて得た電圧Exを基準とした各横流
成分ΔI1, ΔI2の無効分に等しい.
From FIG. 5 and FIG. 6, the components due to the phase difference between V 1 * and V 2 * among the cross current components ΔI 1 and ΔI 2 are perpendicular to the virtual voltage vector Er of these cross current vectors. It can be seen that it is a component (a component parallel to the virtual voltage vector Ex). That is, of the cross current components ΔI 1 and ΔI 2 , the component caused by the phase difference between the voltage command values V 1 * and V 2 * is the load bus voltage vector V B of 90 °.
It is equal to the reactive component of each of the cross current components ΔI 1 and ΔI 2 with reference to the voltage Ex obtained by advancing the phase by −α.

【0049】また同様に,各横流成分ΔI1および Δ
2のうち両電圧指令値V1 *およびV2 *間の電圧絶対値
差に起因する成分は,これらの横流ベクトルの,仮想電
圧ベクトルErを基準とした各横流成分ΔI1, ΔI2
の有効分に等しいことが分かる.
Similarly, each of the cross current components ΔI 1 and ΔI
The components of I 2 caused by the voltage absolute value difference between the voltage command values V 1 * and V 2 * are the cross current components ΔI 1 and ΔI 2 of these cross current vectors with reference to the virtual voltage vector Er.
It turns out to be equal to the effective part of.

【0050】図4に戻って説明を続ける.411は電流
センサ203によって検出された横流ΔI1 を二つの直
交成分ΔI1P,ΔI1Q(直流信号)に変換する変換器で
あり,これらの変換器は同期整流回路または掛算器と平
滑フィルタにより構成される.成分ΔI1Pは電流ΔI1
の電圧Erを基準とした有効分であり,ΔI1Qは電流Δ
1 の電圧Erを基準とした無効分である.
Returning to FIG. 4, the explanation will be continued. Reference numeral 411 is a converter for converting the cross current ΔI 1 detected by the current sensor 203 into two quadrature components ΔI 1P and ΔI 1Q (DC signal). These converters are composed of a synchronous rectification circuit or a multiplier and a smoothing filter. Be done. The component ΔI 1P is the current ΔI 1
Is the effective component with reference to the voltage Er of ΔI 1Q is the current Δ
It is a reactive component based on the voltage Er of I 1 .

【0051】ΔI1Pは加減算器506により設定器40
9からの電圧指令値から減算され,基準電圧として平均
値電圧制御回路408に入力される.一方インバータ装
置の出力電圧は,電圧検出器300,平均値回路410
を介して平均値のフィードバック電圧として加減算器5
05により基準電圧から減算される.
ΔI 1P is set by the adder / subtractor 506 to the setter 40.
It is subtracted from the voltage command value from 9 and input to the average value voltage control circuit 408 as a reference voltage. On the other hand, the output voltage of the inverter device is the voltage detector 300, the average value circuit 410
Adder / subtractor 5 as an average feedback voltage via
It is subtracted from the reference voltage by 05.

【0052】ΔI1Qは位相調節器412の入力端に導か
れる.位相調整器412から出力された位相信号は,位
相器413により発振器414の出力位相を調整して,
出力電圧の位相基準となる正弦波信号sinωtを作成
する.
ΔI 1Q is guided to the input terminal of the phase adjuster 412. The phase signal output from the phase adjuster 412 adjusts the output phase of the oscillator 414 by the phase shifter 413,
Create a sinusoidal signal sinωt that serves as the phase reference for the output voltage.

【0053】掛算器407には平均値電圧制御回路40
8から出力される出力電圧基準の絶対値|V* |と位相
器413から出力される正弦波信号sinωtとが入力
され,出力電圧指令値 V* =|V*|・sinωtが
出力される.この信号V*が減算器504に入力され
る.
The multiplier 407 includes an average value voltage control circuit 40.
The output voltage reference absolute value | V * | output from 8 and the sine wave signal sinωt output from the phase shifter 413 are input, and the output voltage command value V * = | V * | · sinωt is output. This signal V * is input to the subtractor 504.

【0054】以上のように,横流ΔI1 のインバータ相
互間の位相差に起因する成分ΔI1Qにより出力電圧位相
を制御し,電圧絶対値差に起因する成分ΔI1Pにより電
圧を制御することにより,横流が少なくなるように制御
する.なお,この制御は,横流分が有害にならない範囲
で比較的ゆっくりと制御すればよい.
As described above, the output voltage phase is controlled by the component ΔI 1Q caused by the phase difference between the inverters of the cross current ΔI 1 , and the voltage is controlled by the component ΔI 1P caused by the voltage absolute value difference. Control so that the cross current is reduced. It should be noted that this control may be controlled relatively slowly within the range where the cross flow is not harmful.

【0055】実施例3.次に,横流の検出にインバータ
を模擬する模擬インバータを使用する例を,図7に基づ
いて説明する.図において,206はインバータ本体1
00と共通のPWM回路400によって駆動される模擬
インバータであり,その出力は,絶縁変圧器202,ス
イッチ204を介して模擬母線9に接続されている.な
お,模擬インバータ出力には,図示していないが,リア
クトル101,コンデンサ102と等価のフィルタが接
続されている.上記模擬インバータ206の直流入力に
は絶縁アンプ205が接続されているが,絶縁アンプ2
05によって主回路の直流電源5,6から絶縁するとと
もに直流電源の電圧と比例した直流電圧を得ることを目
的としている.模擬インバータ206はインバータ本体
100の容量が数十kVA以上であっても数十VA程度
の小さなものでよく,またその出力電圧は,上記絶縁ア
ンプの出力電圧と絶縁変圧器202とにより任意に選ぶ
ことができる.
Example 3. Next, an example of using a simulated inverter that simulates an inverter for detecting cross current will be described based on Fig. 7. In the figure, reference numeral 206 designates the inverter body 1
00 is a simulated inverter that is driven by a PWM circuit 400 that is common with 00, and its output is connected to the simulated bus bar 9 via an insulating transformer 202 and a switch 204. Although not shown, a filter equivalent to the reactor 101 and the capacitor 102 is connected to the simulated inverter output. The isolation amplifier 205 is connected to the DC input of the simulated inverter 206.
It is intended to insulate from the DC power supplies 5 and 6 of the main circuit by 05 and to obtain a DC voltage proportional to the voltage of the DC power supply. The simulated inverter 206 may be as small as several tens of VA even if the capacity of the inverter main body 100 is several tens of kVA or more, and its output voltage is arbitrarily selected by the output voltage of the isolation amplifier and the isolation transformer 202. be able to.

【0056】このように接続することにより,模擬母線
9の回路は,並列運転を行う主回路から負荷4をのぞい
た等価回路を構成する.従って電流センサ203によっ
て横流ΔIだけを検出することができ,上記実施例1,
2と同様の動作をする.この実施例ではインバータ本体
とは独立した模擬インバータを使用するので,負荷電流
に含まれる高調波成分によって実際の出力電圧が歪んだ
場合でも,横流制御が影響を受けることはなく,また,
並列変換器間の独立性をより高めることができる.な
お,絶縁アンプ205はDC/DCコンバータ等でもよ
く,直流電圧を入力してそれに比例した適当なレベルの
直流電圧を出力できればよく,絶縁もしなくても良い.
By connecting in this way, the circuit of the simulated bus bar 9 constitutes an equivalent circuit excluding the load 4 from the main circuit which operates in parallel. Therefore, the current sensor 203 can detect only the cross current ΔI.
Performs the same operation as 2. In this embodiment, since a simulated inverter independent of the inverter body is used, even if the actual output voltage is distorted by the harmonic component contained in the load current, the cross current control is not affected, and
The independence between parallel converters can be further increased. Note that the isolation amplifier 205 may be a DC / DC converter or the like, as long as it can input a DC voltage and output a DC voltage of an appropriate level proportional thereto, and it does not need to be insulated.

【0057】実施例4.次に,負荷電流を並列台数で割
って算出したインバータ1台当たりの分担する負荷電流
基準を電流マイナーループに与えて負荷電流分担させる
実施例を,図8により説明する.図において,406は
1号インバータ装置1が分担すべき負荷電流値を検出す
る電流検出回路である.
Example 4. Next, an embodiment in which the load current reference, which is calculated by dividing the load current by the number of parallel units and which is shared by each inverter, is given to the current minor loop to share the load current will be described with reference to FIG. In the figure, 406 is a current detection circuit for detecting a load current value to be shared by the No. 1 inverter device 1.

【0058】図9は電流検出回路406の詳細を示すブ
ロック図である.406tは加算器,406uは,イン
バータ装置の並列台数をnとすると,1/nのゲインを
持つ増幅回路である.加算器406tにて1号インバー
タ装置1の出力電流I1 と2号インバータ装置2の出力
電流I2 を加算して負荷電流IL を求め,この信号を増
幅回路406uに入力して,負荷電流IL を並列台数n
(この場合はn=2)で割った値IL/n を演算し,こ
れを1号インバータ装置1が分担すべき負荷電流値IL1
* として出力する.
FIG. 9 is a block diagram showing details of the current detection circuit 406. 406t is an adder, and 406u is an amplifier circuit having a gain of 1 / n, where n is the number of parallel inverter devices. Adder output current I 1 of the No. 1 inverter device 1 and adding the No.2 inverter device 2 of the output current I 2 in search of the load current I L at 406t, enter this signal to the amplifier circuit 406U, the load current I L in parallel number n
(In this case, n = 2) A value I L / n is calculated and the load current value I L1 to be shared by the No. 1 inverter device 1 is calculated.
Output as * .

【0059】電流検出回路406から出力された負荷電
流分担指令値IL1 * は,加算器502にてコンデンサ電
流基準発生回路404および瞬時電圧制御回路403の
出力と加算され,その結果をリミッタ回路にて制限した
信号がインバータの出力電流指令値IA1 * として瞬時電
流制御回路401に与えられる.負荷4が投入される
と,負荷電流IL の1/2を分担するように電流検出回
路406から電流マイナーループへ指令値(IL1 * )が
与えられ,それぞれのインバータが負荷電流を1/2ず
つ分担するように制御される.この実施例では,負荷電
流の分担制御はほとんど負荷電流指令によって行われる
ので,仮想インピーダンス回路405による横流制御は
わずかの分でよくなるため,より精度良く横流制御する
ことができる.
The load current sharing command value I L1 * output from the current detection circuit 406 is added by the adder 502 to the outputs of the capacitor current reference generation circuit 404 and the instantaneous voltage control circuit 403, and the result is sent to the limiter circuit. The signal thus limited is given to the instantaneous current control circuit 401 as the output current command value I A1 * of the inverter. When the load 4 is turned on, a command value (I L1 * ) is given to the current minor loop from the current detection circuit 406 so as to share 1/2 of the load current I L , and each inverter reduces the load current to 1 /. It is controlled so that it is divided into two. In this embodiment, since the sharing control of the load current is mostly performed by the load current command, the cross current control by the virtual impedance circuit 405 is sufficient in a few minutes, so that the cross current control can be performed more accurately.

【0060】実施例5.次に,実施例3の模擬インバー
タを使用した回路にインバータの分担する負荷電流指令
を与える例を図10によって説明する.図において,2
06は模擬母線9に接続された模擬インバータ,406
はインバータ装置1の分担する負荷電流を検出する電流
検出回路である.模擬インバータ206によって模擬母
線9に横流ΔIに相当する電流だけが流れ,この信号が
電流センサ203によって検出されて横流制御される.
一方,電流検出回路406によって各々のインバータ電
流I1,I2から検出された負荷電流分担指令値IL1 *
電流マイナーループへ与えられる.
Example 5. Next, an example of giving a load current command shared by the inverter to a circuit using the simulated inverter of the third embodiment will be described with reference to FIG. In the figure, 2
06 is a simulated inverter connected to the simulated bus bar 9, 406
Is a current detection circuit that detects the load current shared by the inverter device 1. Only the current corresponding to the cross current ΔI flows through the simulation bus 9 by the simulation inverter 206, and this signal is detected by the current sensor 203 and the cross current is controlled.
On the other hand, the load current sharing command value I L1 * detected from the respective inverter currents I 1 and I 2 by the current detection circuit 406 is given to the current minor loop.

【0061】実施例6.次に,変換器と他の電源系統と
を並列運転するシステムに本発明を適用した例を図11
により説明する.
Example 6. Next, an example in which the present invention is applied to a system in which the converter and another power supply system are operated in parallel is shown in FIG.
Will be explained.

【0062】図11はインバータ装置1と交流電源系統
10とが出力母線3を介して並列運転しながら負荷4に
電力を供給するとともに,模擬母線9により並列制御し
ている構成を示すブロック図である.なお,インバータ
1の内部で図1,3もしくは図4とほぼ同様の部分は簡
略化して表現している.また,添え字sは出力母線側の
構成要素を示している.
FIG. 11 is a block diagram showing a configuration in which the inverter device 1 and the AC power supply system 10 supply electric power to the load 4 while operating in parallel via the output bus 3 and are controlled in parallel by the simulated bus 9. is there. It should be noted that the inside of the inverter 1 is represented in a simplified manner in parts that are substantially the same as in FIGS. The subscript s indicates the component on the output bus side.

【0063】103sは交流電源系統側の開閉器,20
2sは交流電源系統10の電流Isを検出する電流セン
サ,415はインバータ装置1の分担する電流を決める
電流分担回路,415tは加算器,415uはインバー
タ装置の分担する電流の分担率β(0≦β≦1)を決め
るゲインβを持つ増幅回路である.
103s is a switch on the AC power system side, 20
2s is a current sensor that detects the current Is of the AC power supply system 10, 415 is a current sharing circuit that determines the current shared by the inverter device 1, 415t is an adder, and 415u is the current sharing ratio β (0 ≦ 0 for the inverter device. This is an amplifier circuit with a gain β that determines β ≤ 1).

【0064】電流分担回路415ではインバータ装置1
の出力電流I1 と交流電源系統10の電流Isとを加算
器415tで加算して負荷電流IL を求め,この信号を
増幅回路415uでβ倍してインバータ装置1の分担す
べき負荷電流IL1 * として出力する.インバータ装置1
は図1もしくは8の実施例と同様に電流分担回路415
の出力する指令値IL1 * を供給するように動作する.β
はインバータ装置の容量と負荷の容量との比率から決め
ればよく,また,外部からの指令により連続的に変化さ
せれば,インバータ装置と交流電源系統との間で負荷電
流の分担を緩やかに移行させることもできる.
In the current sharing circuit 415, the inverter device 1
Output current I 1 and the current Is of the AC power supply system 10 are added by an adder 415t to obtain a load current I L , and this signal is multiplied by β by an amplifier circuit 415u to multiply the load current I L by the inverter device 1. Output as L1 * . Inverter device 1
Is the current sharing circuit 415 as in the embodiment of FIG.
It operates so as to supply the command value I L1 * output by. β
Can be determined from the ratio of the capacity of the inverter device to the capacity of the load, and if it is continuously changed by a command from the outside, the sharing of the load current between the inverter device and the AC power system can be gradually changed. It can also be done.

【0065】この実施例でも,上記実施例1と同様に,
インバータ装置と交流電源系統との間の横流ΔI1 は,
仮想インピーダンスZとの制御によって実質的に零に制
御される.
Also in this embodiment, as in the first embodiment,
The cross current ΔI 1 between the inverter device and the AC power system is
It is controlled to be substantially zero by controlling the virtual impedance Z.

【0066】実施例7.次に,変換器と他の電源系統と
を並列運転するシステムに模擬インバータによる並列運
転制御を適用した例を図12により説明する.
Example 7. Next, an example in which parallel operation control by a simulated inverter is applied to a system in which a converter and another power supply system are operated in parallel will be described with reference to FIG.

【0067】図12でも,図11と同様にインバータ装
置1と交流電源系統10とが負荷4に電力を供給しなが
ら並列母線3によって並列運転している.インバータ本
体を模擬する模擬インバータ406aは,変圧器202
a,スイッチ204aを介して模擬母線9に接続されて
おり,交流電源系統は,同じように絶縁変圧器202s
とスイッチ204sを介して模擬母線9に接続されてい
る.
In FIG. 12, as in FIG. 11, the inverter device 1 and the AC power supply system 10 are operated in parallel by the parallel bus bar 3 while supplying electric power to the load 4. The simulated inverter 406a that simulates the inverter body is the transformer 202.
a is connected to the simulated bus 9 via the switch 204a, and the AC power supply system is the same as the insulation transformer 202s.
And the switch 204s to the simulated bus 9.

【0068】この実施例でも,上記実施例3,4と同様
に,インバータ装置と交流電源系統との間の横流ΔI1
は,仮想インピーダンスZと,ΔI1P,ΔI1Qの制御と
によって実質的に零に制御される.
Also in this embodiment, the cross current ΔI 1 between the inverter device and the AC power supply system is the same as in the third and fourth embodiments.
Is controlled to be substantially zero by the virtual impedance Z and the control of ΔI 1P and ΔI 1Q .

【0069】以上,説明した実施例では,電流マイナー
ループの指令値に,インバータの出力フィルタの並列コ
ンデンサ102に流れるべき電流値を与えることによっ
て,制御性を向上させているが,図1におけるコンデン
サ電流基準発生回路404は省略してもよい.これは電
圧制御回路403が1号インバータ装置1の出力電圧を
出力電圧基準V1 *に一致するように動作し,その結果コ
ンデンサ電流基準の信号に替る信号を発生するので,正
弦波インバータの制御系として支障なく動作するからで
ある.この場合は,電圧制御回路403の増巾率が充分
大きい方が電圧制御に偏差が少なくなる.
In the embodiment described above, the controllability is improved by giving the current minor loop command value the current value that should flow to the parallel capacitor 102 of the output filter of the inverter. The current reference generation circuit 404 may be omitted. This is because the voltage control circuit 403 operates so that the output voltage of the No. 1 inverter device 1 matches the output voltage reference V 1 *, and as a result, generates a signal that replaces the capacitor current reference signal, the control of the sine wave inverter This is because the system operates without any problems. In this case, the deviation in the voltage control decreases when the amplification rate of the voltage control circuit 403 is sufficiently large.

【0070】また,以上の説明では,制御回路の構成が
電流マイナーループを持つ瞬時電圧制御形となっている
場合について説明したが,電流マイナーループを持たな
くとも高速に出力電圧を制御できる電圧制御系であれ
ば,横流制限用仮想インピーダンス回路を追加すること
により,安定に交流出力変換器を並列運転することがで
きる.
Further, in the above description, the case where the control circuit is of the instantaneous voltage control type having the current minor loop has been described. However, the voltage control capable of controlling the output voltage at high speed without the current minor loop is described. If it is a system, it is possible to stably operate the AC output converters in parallel by adding a virtual impedance circuit for limiting the cross current.

【0071】実施例8.以上の説明では本発明をインバ
ータの並列運転に用いる場合について説明したが,他の
変換器でもよく,例えば図13に示すような,高周波の
インバータとサイクロコンバータを組合せ,直流から高
周波短形波さらに低周波正弦波に変換する高周波リンク
形変換器などの瞬時電圧制御の可能な変換器にも同じ原
理を適用できる.この場合,模擬変換装置は主回路を模
擬した変換器とする.
Example 8. In the above description, the case where the present invention is applied to the parallel operation of the inverters has been described, but other converters may be used. For example, a high frequency inverter and a cycloconverter are combined as shown in FIG. The same principle can be applied to converters capable of instantaneous voltage control, such as high-frequency link converters that convert to low-frequency sine waves. In this case, the simulated converter is a converter that simulates the main circuit.

【0072】図13に示す変換器では,トランジスタQ
1からQ4のスイッチングによりトランスTRの2次に
図14(a)に示すような短形波を得る.次に同図(b)に示
すようにインバータのスイッチングと同期した鋸歯状波
を作り,それと図中に線X1−X2で示す出力電圧指令信
号との交点を同図(c)のように求める.この信号とイン
バータの電圧RSの極性にもとづき,同図(e)のように
サイクロコンバータのスイッチを選択することにより同
図(d)のように信号X1−X2に対応した電圧を図13の
UN間に得ることができる.
In the converter shown in FIG. 13, the transistor Q
By switching from 1 to Q4, a secondary wave of the transformer TR is obtained as shown in Fig. 14 (a). Then make a sawtooth wave that is synchronized with the switching of the inverter as shown in FIG. (B), the same as the intersection of the output voltage command signal indicated by the line X 1 -X 2 of FIG. (C) in FIG. Ask for. Based on the polarity of this signal and the voltage RS of the inverter, by selecting the switch of the cycloconverter as shown in FIG. 13E, the voltage corresponding to the signals X 1 -X 2 as shown in FIG. Can be obtained during UN.

【0073】以上の説明から明らかなように,図13の
回路は図2の(b)と同等の単相PWM電圧を得ることが
できる.さらに3相出力の場合は図13のトランスTR
の2次側の回路を3組用いた3相高周波リンク変換器を
用いるようにしてもよい.
As is clear from the above description, the circuit of FIG. 13 can obtain the single-phase PWM voltage equivalent to that of FIG. In the case of 3-phase output, the transformer TR of FIG.
It is also possible to use a three-phase high-frequency link converter that uses three sets of secondary side circuits.

【0074】以上の説明では,横流の直交成分ΔI1P
ΔI1Qを横流ΔI1 と分離して検出しているが,出力電
流I1と分担すべき負荷電流IL1 *をそれぞれ直交成分I
1P,I1QとIL1 * P,IL1 * Qに分離し,次式から横流の直
交成分を検出してもよい. ΔI1P=I1P−IL1 * P ΔI1Q=I1Q−IL1 * Q
In the above description, the cross flow orthogonal component ΔI 1P ,
Although ΔI 1Q is detected separately from the cross current ΔI 1 , the output current I 1 and the load current I L1 * to be shared are respectively quadrature components I.
It is also possible to separate into 1P , I 1Q and I L1 * P , I L1 * Q and detect the orthogonal component of the cross current from the following equation. ΔI 1P = I 1P −I L1 * P ΔI 1Q = I 1Q −I L1 * Q

【0075】図1,図4,図7,図8,図10,図1
1,図12に示した原理を実現するには,アナログ演算
増巾器等を用いたディスクリート回路でもよいし,マイ
クロプロセッサやディジタルシグナルプロセッサなどに
よるディジタル制御でソフトウェア処理により実現する
こともできる.
1, FIG. 4, FIG. 7, FIG. 8, FIG.
To implement the principle shown in Fig. 1 and Fig. 12, it is possible to use a discrete circuit that uses an analog operation amplifier or the like, or it can be implemented by software processing by digital control by a microprocessor or digital signal processor.

【0076】[0076]

【発明の効果】以上のように,請求項1に係る発明によ
れば,出力電圧の瞬時値を制御する瞬時電圧制御回路
に,模擬母線で検出した変換器相互間に流れる電流の横
流分に応じた信号を与えることにより,簡単な回路構成
で,横流を速やかに抑制する効果がある.又,主回路を
接続しなくても並列運転の調整ができ,試験調整が容易
になるという効果もある.
As described above, according to the invention of claim 1, in the instantaneous voltage control circuit for controlling the instantaneous value of the output voltage, the cross current component of the current flowing between the converters detected by the simulated bus is detected. Providing a corresponding signal has the effect of quickly suppressing cross current with a simple circuit configuration. In addition, the parallel operation can be adjusted without connecting the main circuit, which has the effect of facilitating test adjustment.

【0077】また,請求項2に係る発明によれば,横流
を2つの成分に分離した平均値制御を加えることによ
り,上記請求項1に係る発明の効果に加えて,有効電力
の横流により変換器直流側電圧が上昇することを避ける
ことができ,より安定した並列運転をさせることができ
る.
Further, according to the invention of claim 2, by adding the average value control in which the cross current is separated into two components, in addition to the effect of the invention of claim 1, conversion is performed by the cross flow of active power. It is possible to avoid a rise in the DC side voltage of the reactor, and more stable parallel operation can be achieved.

【0078】また,請求項3に係る発明によれば,主回
路の変換器本体と独立した模擬変換器を模擬母線に接続
して横流を検出することにより,負荷電流の影響を避け
ることができ,また,変換器相互間の独立性をより高め
ることができる.
According to the third aspect of the present invention, the influence of the load current can be avoided by connecting the simulated converter, which is independent of the converter main body of the main circuit, to the simulated busbar to detect the cross current. , In addition, the independence between the converters can be increased.

【0079】また,請求項4に係る発明によれば,上記
請求項3に係る発明の効果に加えて,有効電力の横流に
より変換器直流側電圧が上昇することを避けることがで
き,より安定した並列運転をさせることができる.
Further, according to the invention of claim 4, in addition to the effect of the invention of claim 3, it is possible to prevent the converter DC side voltage from rising due to the cross current of the active power, so that it is more stable. The parallel operation can be performed.

【0080】また,請求項5ないし8に係る発明によれ
ば,変換器と別の電源系統とが共通母線に接続されてい
るシステムの場合に上述したそれぞれ請求項1ないし4
に係る発明と同様の効果を奏する.
Further, according to the inventions according to claims 5 to 8, in the case of a system in which the converter and another power supply system are connected to a common bus, each of the above-mentioned claims 1 to 4 is applied.
It has the same effect as the invention according to.

【0081】また,請求項9に係る発明によれば,電流
マイナーループにより,過電流に強く,かつ,いっそう
精度の高い装置を得ることができる.
According to the invention of claim 9, the current minor loop makes it possible to obtain a device that is resistant to overcurrent and has higher accuracy.

【0082】また,請求項10に係る発明によれば,分
担すべき負荷電流指令値を電流マイナーループに与える
ことより,負荷電流分担をいっそう精度良く制御するこ
とができる.
According to the tenth aspect of the present invention, the load current sharing can be controlled more accurately by giving the load current command value to be shared to the current minor loop.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の実施例1を示すブロック図である.FIG. 1 is a block diagram showing a first embodiment of the present invention.

【図2】この発明に用いる変換器の一例を示す回路図で
ある.
FIG. 2 is a circuit diagram showing an example of a converter used in the present invention.

【図3】図1を簡略化したブロック図である.FIG. 3 is a simplified block diagram of FIG.

【図4】この発明の実施例2を示すブロック図である.FIG. 4 is a block diagram showing a second embodiment of the present invention.

【図5】この発明の実施例2を説明するベクトル図であ
る.
FIG. 5 is a vector diagram illustrating a second embodiment of the present invention.

【図6】この発明の実施例2を説明するベクトル図であ
る.
FIG. 6 is a vector diagram illustrating a second embodiment of the present invention.

【図7】この発明の実施例3を示すブロック図である.FIG. 7 is a block diagram showing a third embodiment of the present invention.

【図8】この発明の実施例4を示すブロック図である.FIG. 8 is a block diagram showing a fourth embodiment of the present invention.

【図9】図8の電流検出回路のブロック図である.9 is a block diagram of the current detection circuit of FIG.

【図10】この発明の実施例5を示すブロック図であ
る.
FIG. 10 is a block diagram showing a fifth embodiment of the present invention.

【図11】この発明の実施例6を示すブロック図であ
る.
FIG. 11 is a block diagram showing Embodiment 6 of the present invention.

【図12】この発明の実施例7を示すブロック図であ
る.
FIG. 12 is a block diagram showing Embodiment 7 of the present invention.

【図13】この発明の実施例8の変換器を示す回路図で
ある.
FIG. 13 is a circuit diagram showing a converter according to an eighth embodiment of the present invention.

【図14】この発明の実施例8の変換器の動作説明図で
ある.
FIG. 14 is an operation explanatory diagram of the converter of Embodiment 8 of the present invention.

【図15】従来方式の構成を示すブロック図である.FIG. 15 is a block diagram showing a configuration of a conventional system.

【符号の説明】[Explanation of symbols]

1 1号インバータ装置 2 2号インバータ装置 3 出力母線 4 負荷 5,6 直流電源 8 出力電圧基準回路 9 模擬母線 10 交流電源系統 202 絶縁変圧器 205 絶縁アンプ 206 模擬インバータ 403 瞬時電圧制御回路 405 横流制限用仮想インピーダンス回路 406 電流検出回路 408 平均値電圧制御回路 411 横流を分離する変換器 412 位相調整器 413 移相器 414,417 発振器 415 電流分担回路 416 PLL回路 1 No. 1 inverter device 2 No. 2 inverter device 3 Output bus bar 4 Load 5, 6 DC power supply 8 Output voltage reference circuit 9 Simulated bus bar 10 AC power system 202 Insulation transformer 205 Insulation amplifier 206 Simulated inverter 403 Instantaneous voltage control circuit 405 Cross current limitation Virtual impedance circuit for use 406 Current detection circuit 408 Average value voltage control circuit 411 Converter for separating cross current 412 Phase adjuster 413 Phase shifter 414, 417 Oscillator 415 Current sharing circuit 416 PLL circuit

Claims (10)

【特許請求の範囲】[Claims] 【請求項1】 複数台の交流出力変換器の出力を共通の
母線に接続し,負荷電流を分担しつつ並列運転する並列
変換器システムにおいて,上記各々の変換器は,その出
力電圧の瞬時値を制御する瞬時電圧制御形変換器とし,
上記各々の変換器の出力を上記負荷とは分離された並列
運転制御用の模擬母線に並列接続し,上記模擬母線に流
れる信号を検出して,この検出信号により,上記変換器
相互間に流れる電流の横流分が抑制されるように上記変
換器の出力電圧を制御することを特徴とする交流出力変
換器の並列運転制御装置.
1. In a parallel converter system in which outputs of a plurality of AC output converters are connected to a common busbar and are operated in parallel while sharing a load current, each of the converters has an instantaneous value of its output voltage. An instantaneous voltage control type converter for controlling
The output of each of the converters is connected in parallel to a simulated busbar for parallel operation control that is separated from the load, a signal flowing through the simulated busbar is detected, and the detected signal causes a flow between the converters. A parallel operation control device for an AC output converter, characterized in that the output voltage of the converter is controlled so that the cross current of the current is suppressed.
【請求項2】 複数台の交流出力変換器の出力を共通の
母線に接続し,負荷電流を分担しつつ並列運転する並列
変換器システムにおいて,上記各々の変換器は,その出
力電圧の瞬時値を制御する瞬時電圧制御形変換器とし,
上記各々の変換器の出力を上記負荷とは分離された並列
運転制御用の模擬母線に並列接続し,上記模擬母線に流
れる信号を検出して,この検出信号により上記瞬時電圧
制御回路の出力を変化させるとともに,上記検出信号を
主として上記変換器間の位相差に起因する第1の成分と
主として上記変換器間の電圧差に起因する第2の成分と
として検出して,この検出信号により上記変換器の出力
電圧位相と平均値とを変化させることにより,上記変換
器相互間に流れる電流の横流分が抑制されるように上記
変換器の出力電圧を制御することを特徴とする交流出力
変換器の並列運転制御装置.
2. In a parallel converter system in which outputs of a plurality of AC output converters are connected to a common busbar and are operated in parallel while sharing a load current, each of the converters has an instantaneous value of its output voltage. An instantaneous voltage control type converter for controlling
The output of each of the converters is connected in parallel to a simulated bus for parallel operation control, which is separated from the load, and a signal flowing through the simulated bus is detected, and the output of the instantaneous voltage control circuit is detected by this detection signal. While changing, the detection signal is detected as a first component mainly due to a phase difference between the converters and a second component mainly due to a voltage difference between the converters, and the detection signal Altering the output voltage phase and the average value of the converter, the output voltage of the converter is controlled so that the cross current of the current flowing between the converters is suppressed. Controller for parallel operation of reactors.
【請求項3】 複数台の交流出力変換器の出力を共通の
母線に接続し,負荷電流を分担しつつ並列運転する並列
変換器システムにおいて,上記各々の変換器は,その出
力電圧の瞬時値を制御する瞬時電圧制御形変換器とし,
上記各変換器毎に当該変換器の駆動制御信号と同一の制
御信号で駆動される並列運転制御用の模擬変換器を設け
てその出力を上記負荷とは分離された並列運転制御用の
模擬母線に並列接続し,上記模擬母線に流れる信号を検
出して,この検出信号により,上記変換器相互間に流れ
る電流の横流分が抑制されるように上記変換器の出力電
圧を制御することを特徴とする交流出力変換器の並列運
転制御装置.
3. In a parallel converter system in which outputs of a plurality of AC output converters are connected to a common busbar and are operated in parallel while sharing a load current, each of the converters has an instantaneous value of its output voltage. An instantaneous voltage control type converter for controlling
For each of the converters, a simulated converter for parallel operation control driven by the same control signal as the drive control signal of the converter is provided, and its output is separated from the load to simulate bus for parallel operation control. Is connected in parallel with each other, detects a signal flowing through the simulated bus, and controls the output voltage of the converter by the detection signal so that the cross current of the current flowing between the converters is suppressed. AC output converter parallel operation control device.
【請求項4】 複数台の交流出力変換器の出力を共通の
母線に接続し,負荷電流を分担しつつ並列運転する並列
変換器システムにおいて,上記各々の変換器は,その出
力電圧の瞬時値を制御する瞬時電圧制御形変換器とし,
上記各変換器毎に当該変換器の駆動制御信号と同一の制
御信号で駆動される並列運転制御用の模擬変換器を設け
てその出力を上記負荷とは分離された並列運転制御用の
模擬母線に並列接続し,上記模擬母線に流れる信号を検
出して,この検出信号により上記瞬時電圧制御回路の出
力を変化させるとともに,上記検出信号を主として上記
変換器間の位相差に起因する第1の成分と主として上記
変換器間の電圧差に起因する第2の成分ととして検出し
て,この検出信号により上記変換器の出力電圧位相と平
均値とを変化させることにより,上記変換器相互間に流
れる電流の横流分が抑制されるように上記変換器の出力
電圧を制御することを特徴とする交流出力変換器の並列
運転制御装置.
4. In a parallel converter system in which outputs of a plurality of AC output converters are connected to a common busbar and are operated in parallel while sharing a load current, each of the converters has an instantaneous value of its output voltage. An instantaneous voltage control type converter for controlling
For each of the converters, a simulated converter for parallel operation control driven by the same control signal as the drive control signal of the converter is provided, and its output is separated from the load to simulate bus for parallel operation control. Is connected in parallel to the first bus, the signal flowing through the simulated bus is detected, the output of the instantaneous voltage control circuit is changed by this detection signal, and the detection signal is mainly caused by the phase difference between the converters. Component and a second component mainly caused by the voltage difference between the converters, and by changing the output voltage phase and average value of the converters by this detection signal A parallel operation control device for an AC output converter, characterized in that the output voltage of the converter is controlled so that the cross current of the flowing current is suppressed.
【請求項5】 1台または複数台の交流出力変換器の出
力と別の電源系統とを共通の母線に接続し,負荷電流を
分担しつつ並列運転する並列変換器システムにおいて,
上記各々の変換器は,その出力電圧の瞬時値を制御する
瞬時電圧制御形変換器とし,上記各々の変換器の出力と
上記電源系統とを上記負荷とは分離された並列運転制御
用の模擬母線に並列接続し,上記模擬母線に流れる信号
を検出して,この検出信号により,上記変換器および電
源系統相互間に流れる電流の横流分が抑制されるように
上記変換器の出力電圧を制御することを特徴とする交流
出力変換器の並列運転制御装置.
5. A parallel converter system in which the output of one or a plurality of AC output converters and a separate power supply system are connected to a common bus bar, and which operates in parallel while sharing a load current,
Each of the converters is an instantaneous voltage control type converter that controls the instantaneous value of its output voltage, and the output of each converter and the power supply system are simulated for parallel operation control separated from the load. Connected in parallel to the busbar, detect the signal flowing in the simulated busbar, and control the output voltage of the converter by the detection signal so that the crossflow of the current flowing between the converter and the power supply system is suppressed. A parallel operation control device for an AC output converter, characterized in that
【請求項6】 1台または複数台の交流出力変換器の出
力と別の電源系統とを共通の母線に接続し,負荷電流を
分担しつつ並列運転する並列変換器システムにおいて,
上記各々の変換器は,その出力電圧の瞬時値を制御する
瞬時電圧制御形変換器とし,上記各々の変換器の出力と
上記電源系統とを上記負荷とは分離された並列運転制御
用の模擬母線に並列接続し,上記模擬母線に流れる信号
を検出して,この検出信号により上記瞬時電圧制御回路
の出力を変化させるとともに,上記検出信号を主として
上記変換器および電源系統の相互間の位相差に起因する
第1の成分と主として上記変換器および電源系統の相互
間の電圧差に起因する第2の成分ととして検出して,こ
の検出信号により上記変換器の出力電圧位相と平均値と
を変化させることにより,上記変換器および電源系統相
互間に流れる電流の横流分が抑制されるように上記変換
器の出力電圧を制御することを特徴とする交流出力変換
器の並列運転制御装置.
6. A parallel converter system in which the output of one or a plurality of AC output converters and another power supply system are connected to a common bus line and which operates in parallel while sharing a load current,
Each of the converters is an instantaneous voltage control type converter that controls the instantaneous value of its output voltage, and the output of each converter and the power supply system are simulated for parallel operation control separated from the load. It is connected in parallel to the bus bar, the signal flowing in the simulated bus bar is detected, the output of the instantaneous voltage control circuit is changed by this detection signal, and the detection signal is mainly used as a phase difference between the converter and the power supply system. Is detected as the first component and the second component mainly due to the voltage difference between the converter and the power supply system, and the detection signal determines the output voltage phase and average value of the converter. A parallel operation control of an AC output converter, characterized in that the output voltage of the converter is controlled so that the cross current of the current flowing between the converter and the power supply system is suppressed by changing the output voltage. Location.
【請求項7】 1台または複数台の交流出力変換器の出
力と別の電源系統とを共通の母線に接続し,負荷電流を
分担しつつ並列運転する並列変換器システムにおいて,
上記各々の変換器は,その出力電圧の瞬時値を制御する
瞬時電圧制御形変換器とし,上記各変換器毎に当該変換
器の駆動制御信号と同一の制御信号で駆動される並列運
転制御用の模擬変換器を設けてその出力と上記電源系統
とを上記負荷とは分離された並列運転制御用の模擬母線
に並列接続し,上記模擬母線に流れる信号を検出して,
この検出信号により,上記変換器および電源系統相互間
に流れる電流の横流分が抑制されるように上記変換器の
出力電圧を制御することを特徴とする交流出力変換器の
並列運転制御装置.
7. A parallel converter system in which the output of one or a plurality of AC output converters and another power supply system are connected to a common bus line and which operates in parallel while sharing a load current,
Each of the above converters is an instantaneous voltage control type converter that controls the instantaneous value of its output voltage, and for parallel operation control driven by the same control signal as the drive control signal of the converter for each converter. Is provided, and the output and the power supply system are connected in parallel to a simulated bus bar for parallel operation control separated from the load, and a signal flowing through the simulated bus bar is detected,
A parallel operation control device for an AC output converter, characterized in that the output voltage of the converter is controlled so that the cross current of the current flowing between the converter and the power supply system is suppressed by the detection signal.
【請求項8】 1台または複数台の交流出力変換器の出
力と別の電源系統とを共通の母線に接続し,負荷電流を
分担しつつ並列運転する並列変換器システムにおいて,
上記各々の変換器は,その出力電圧の瞬時値を制御する
瞬時電圧制御形変換器とし,上記各変換器毎に当該変換
器の駆動制御信号と同一の制御信号で駆動される並列運
転制御用の模擬変換器を設けてその出力と上記電源系統
とを上記負荷とは分離された並列運転制御用の模擬母線
に並列接続し,上記模擬母線に流れる信号を検出して,
この検出信号により上記瞬時電圧制御回路の出力を変化
させるとともに,上記検出信号を主として上記変換器お
よび電源系統の相互間の位相差に起因する第1の成分と
主として上記変換器および電源系統の相互間の電圧差に
起因する第2の成分ととして検出して,この検出信号に
より上記変換器の出力電圧位相と平均値とを変化させる
ことにより,上記変換器および電源系統相互間に流れる
電流の横流分が抑制されるように上記変換器の出力電圧
を制御することを特徴とする交流出力変換器の並列運転
制御装置.
8. A parallel converter system in which the output of one or a plurality of AC output converters and another power supply system are connected to a common bus bar, and which operates in parallel while sharing a load current,
Each of the above converters is an instantaneous voltage control type converter that controls the instantaneous value of its output voltage, and for parallel operation control driven by the same control signal as the drive control signal of the converter for each converter. Is provided, and the output and the power supply system are connected in parallel to a simulated bus bar for parallel operation control separated from the load, and a signal flowing through the simulated bus bar is detected,
The output of the instantaneous voltage control circuit is changed by the detection signal, and the detection signal is used as a first component mainly due to the phase difference between the converter and the power supply system and mainly between the converter and the power supply system. Is detected as the second component resulting from the voltage difference between the two, and the output voltage phase of the converter and the average value are changed by this detection signal to detect the current flowing between the converter and the power supply system. A parallel operation control device for an AC output converter, characterized in that the output voltage of the converter is controlled so that a cross current is suppressed.
【請求項9】 瞬時電圧制御回路は,変換器の出力電流
の瞬時値を制御する電流マイナーループを持つことを特
徴とする請求項1ないし8のいずれかに記載の交流出力
変換器の並列運転制御装置.
9. The parallel operation of the AC output converters according to claim 1, wherein the instantaneous voltage control circuit has a current minor loop for controlling the instantaneous value of the output current of the converter. Control device.
【請求項10】 電流マイナーループの指令として,分
担すべき負荷電流値を与えたことを特徴とする請求項9
記載の交流出力変換器の並列運転制御装置.
10. The load current value to be shared is given as a command of the current minor loop.
Parallel operation control device for the described AC output converter.
JP4050466A 1992-03-09 1992-03-09 Parallel operation control device for AC output converter Expired - Lifetime JP2730383B2 (en)

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Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
JP4050466A JP2730383B2 (en) 1992-03-09 1992-03-09 Parallel operation control device for AC output converter

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JPH05260665A true JPH05260665A (en) 1993-10-08
JP2730383B2 JP2730383B2 (en) 1998-03-25

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010288437A (en) * 2009-05-13 2010-12-24 Meidensha Corp Control method for power converting device, uninterruptible power supply device, and parallel instantaneous-voltage-drop compensation device
CN109830985A (en) * 2019-03-25 2019-05-31 阳光电源股份有限公司 A kind of multi-machine parallel connection system and its electric network impedance detection method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61254026A (en) * 1985-04-30 1986-11-11 三菱電機株式会社 Parallel operation control system of ac output converter
JPS62268323A (en) * 1986-05-15 1987-11-20 三菱電機株式会社 Parallel driving controller of ac output converter
JPH01303060A (en) * 1988-05-30 1989-12-06 Mitsubishi Electric Corp Parallel operation equipment for ac output converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61254026A (en) * 1985-04-30 1986-11-11 三菱電機株式会社 Parallel operation control system of ac output converter
JPS62268323A (en) * 1986-05-15 1987-11-20 三菱電機株式会社 Parallel driving controller of ac output converter
JPH01303060A (en) * 1988-05-30 1989-12-06 Mitsubishi Electric Corp Parallel operation equipment for ac output converter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010288437A (en) * 2009-05-13 2010-12-24 Meidensha Corp Control method for power converting device, uninterruptible power supply device, and parallel instantaneous-voltage-drop compensation device
CN109830985A (en) * 2019-03-25 2019-05-31 阳光电源股份有限公司 A kind of multi-machine parallel connection system and its electric network impedance detection method

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