JP6818836B1 - Power converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To effectively suppress common mode noise in a power conversion device having an isolation transformer without increasing the size or cost of the primary side circuit, the secondary side circuit and the noise filter of the isolation transformer. A switching circuit 104 is connected to a primary terminal of an isolation transformer 105, a rectifying circuit 110 is connected to a secondary terminal, and first and second terminals are connected between the primary terminal of the isolation transformer 105 and the ground. The capacities 106 and 107 are individually connected, and the third and fourth capacities 108 and 109 are individually connected between the secondary terminal of the isolation transformer 105 and the ground, and the first and third capacities 106 are individually connected. The charge / discharge currents flowing in the second and fourth capacitances 107 and 109 are out of phase with the charge / discharge currents flowing in 108. [Selection diagram] Fig. 1

Description

The present application relates to a power converter.

In a power converter in which a switching circuit is provided on the primary side of an isolated transformer and a rectifier circuit is provided on the secondary side, switching control is performed at a high-frequency switching frequency, which is generally 20 kHz or higher. Since high switching noise is generated due to the on-operation or off-operation of switching elements such as Insulated Gate Bipolar Rectifier) or MOSFET (Metal-Oxide-Semiconductor Field-Effective Rectifier), it is a noise source of other electronic devices. There is a risk of causing adverse effects such as malfunction or malfunction.

In fact, with regard to such noise, it is necessary to have a certain degree of consistency with the standards of each country, so the international standard IEC (International Electrotechnical Commission) is the EMC (Electromagnetic Compatibility) standard for electronic devices or automobile devices in each field. Has been established and issued. In order to suppress such switching noise, it is generally conceivable to provide noise suppression components, but it is inevitable that the cost will increase and the size of the device will increase.

Therefore, in the prior art, by providing a capacitance between a plurality of nodes whose potentials with respect to the ground fluctuate complementarily due to switching of the switching element and the ground, the electric charge discharged by one of the capacitances is provided. A method has been proposed in which the other capacitance is charged and a current flows from one to the other through the ground to effectively reduce the common mode current leaking to the outside (see, for example, Patent Document 1 below). ).

Japanese Patent No. 6316484

As described above, in the prior art, in order to suppress the common mode current, a capacitance is provided between a plurality of nodes in which the potential with respect to the ground fluctuates complementarily and the ground, and the value is adjusted. .. In particular, in Patent Document 1 described above, a capacitance is formed by using a terminal on the cooling surface of a switching element and a rectifying element and a heat radiating plate having the same potential as the ground as a pair of electrodes, and for example, an element having a large cooling area is used. And adjust the capacity.

On the other hand, a power conversion device provided with an isolation transformer generally has a switching circuit on the primary side of the transformer and a rectifier circuit on the secondary side. Therefore, the number of elements connected to the primary side and the secondary side of the transformer is large. On the other hand, since the space for installing such an element is limited, when adjusting the capacitance on each of the primary side and the secondary side, if an element having a cooling surface having a large cooling area is used, the primary side and the secondary side are used. There is a problem that each circuit on the next side becomes large, and as a result, it cannot be miniaturized as a device.

The present application discloses a technique for solving the above-mentioned problems, and an object of the present application is to provide a power conversion device capable of effectively suppressing a common mode current without increasing the size of the device. And.

The power conversion device disclosed in the present application includes an isolation transformer, a switching circuit is connected to the primary side terminal of the isolation transformer, and a rectifier circuit is connected to the secondary side terminal, and among the two primary side terminals of the isolation transformer. , The first capacitance is connected between one primary terminal and ground, and the second capacitance is connected between the other primary terminal and ground, and the two secondary terminals of the isolation transformer. A third capacitance is connected between one of the secondary terminals and the ground, and a fourth capacitance is connected between the other secondary terminal and the ground. The feature is that the second charge / discharge current flowing through the second capacity and the second charge / discharge current flowing through the fourth capacity are in opposite phase with respect to the first charge / discharge current flowing through the third capacity.

According to the power conversion device disclosed in the present application, a capacitance is provided between each terminal on the primary side and the secondary side of the isolation transformer and the ground, and the charge / discharge current flows through each capacitance on the primary side and the secondary side. By adjusting the total of, the common mode current leaking to the outside can be reduced. As a result, it is not necessary to adjust the capacitance individually on each of the primary side and the secondary side, so that the circuits on the primary side and the secondary side do not become large, and countermeasure parts such as providing a common mode choke are provided. Can be reduced. As a result, the entire device can be miniaturized and the cost can be reduced.

It is a circuit diagram which shows the whole structure of the power conversion apparatus according to Embodiment 1 of this application. It is a timing chart which shows the outline of the transition of the potential of each node by the switching of each switching element which constitutes the power conversion apparatus by Embodiment 1 of this application. It is a figure which shows the component arrangement of the element by Embodiment 1 of this application. It is sectional drawing which follows the AA line of FIG.

Embodiment 1.
FIG. 1 is a circuit diagram showing the overall configuration of the power conversion device according to the first embodiment of the present application.

As shown in FIG. 1, the power conversion device according to the first embodiment of the present application is composed of elements between the DC power supply 101 and the load 114. The DC power supply 101 is connected to the input capacitor 103 via a LISN (Line Impedance Stabilizing Network) 102 defined in CISPR (Commitment International Special des Perturbations Radio electronics) or the like. The primary side of the isolation transformer 105 is connected to the subsequent stage of the input capacitor 103 via a single-phase inverter 104 as a switching circuit. In this case, the single-phase inverter 104 has a full bridge configuration of four switching elements 104a to 104d, and converts the DC voltage Vdc of the DC power supply 101 and the input capacitor 103 into an AC voltage.

A rectifier circuit 110 in which four rectifier elements (diodes in this case) 110a to 110d are fully bridged is connected to the secondary side of the isolation transformer 105. Smoothing reactors 111a and 111b having the same inductance value are individually connected to the pair of lines on the output side of the rectifier circuit 110, and an output capacitor 112 is connected in parallel to each line, and LISN113. The load 114 is connected via.

Each of the switching elements 104a to 104d constituting the single-phase inverter 104 is composed of, for example, a MOSFET (Metal-Oxide-Semiconductor Field-Effective Transistor). Each of the switching elements 104a to 104d is a self-extinguishing semiconductor switching element such as an IGBT (Insulated Gate Bipolar Transistor) in which diodes are connected in antiparallel, and a wide band such as SiC (Silicon Carbide) or GaN (Gallium Nitride). It is possible to apply gap semiconductors.

Further, each of the rectifying elements 110a to 110d constituting the rectifying circuit 110 is a diode here, but is not limited to this, and a switching element such as an IGBT or MOSFET or a wide band gap semiconductor such as SiC or GaN may be used. It may be configured by using. When switching elements (including wide bandgap semiconductors) are used as the rectifying elements 110a to 110d in this way, the conduction loss can be reduced and the efficiency can be increased.

In the first embodiment, the case where the MOSFET is used as the switching elements 104a to 104d and the diodes 110a to 110d are used as the rectifying element will be described.

Further, as a feature of the first embodiment, in order to effectively suppress the common mode current, a connection connecting the connection points of the pair of upper and lower switching elements 104a and 104b with each other and one primary terminal of the isolation transformer 105. A first capacitance 106 is connected between the line 121 and the ground, and a connection line connecting the connection points of the pair of upper and lower switching elements 104c and 104d with each other and the other primary terminal of the isolation transformer 105. A second capacity 107 is connected between 122 and the ground.

Further, a third capacitance 108 is connected between the connection line 131 connecting the connection points of the pair of upper and lower diodes 110a and 110b and one secondary terminal of the isolation transformer 105 and the ground, and the upper and lower diodes 110a and 110b are connected to each other. A fourth capacitance 109 is connected between the connection line 132 connecting the connection points of the pair of other diodes 110c and 110d with each other and the other secondary terminal of the isolation transformer 105, and the ground.

Next, the operation of the power conversion device in the configuration of the first embodiment, particularly the ability to effectively suppress the common mode current, will be described with reference to FIGS. 1 to 3.

A DC power supply by a hard switching method in which a pair of diagonally arranged switching elements 104a and 104d and switching elements 104b and 104c are alternately turned on and off among the four switching elements 104a to 104d constituting the single-phase inverter 104. The DC power input from 101 to the LISN 102 and the input capacitor 103 is converted into high-frequency AC power. In response to this, a voltage is generated between the terminals on the secondary side of the isolation transformer 105, so that the diodes 110a to 110d constituting the rectifier circuit 110 rectify the voltage.

In this case, when a voltage is generated on the secondary side of the isolation transformer 105, energy is stored in the respective reactors 111a and 111b, and in other periods, it is stored by the counter electromotive force generated in the respective reactors 111a and 111b. The energy is transferred to the load 114. At that time, the output current can be controlled by controlling the on / off pulse width of each of the switching elements 104a to 104d constituting the single-phase inverter 104.

Next, using the timing chart shown in FIG. 2, when the voltage of the DC power supply 101 is Vdc, the primary winding number of the isolation transformer is N1, the secondary winding number is N2, and the winding number ratio is N = N2 / N1. The transition of the potential of each node with the switching of the switching elements 104a to 104d will be described.

Here, FIG. 2A shows the transition of switching of the switching elements 104a and 104d. FIG. 2B shows the transition of switching of the switching elements 104b and 104c. FIG. 2C shows the transition of the voltages V104a and V104d across the switching elements 104a and 104d. FIG. 2D shows the transition of the voltages V104b and V104c across the switching elements 104b and 104c. FIG. 2 (e) shows the transition of the voltage Vtr1 across the primary side of the isolation transformer 105, and FIG. 2 (f) shows the transition of the voltage Vtr2 across the secondary side of the isolation transformer 105. FIG. 2 (g) shows the potential of the connection line 121 connecting the connection points of the pair of switching elements 104a and 104b with reference to the ground and one of the primary terminals of the isolation transformer 105 (potentials at both ends of the first capacitance 106). ) The transition of Vao1 is shown. FIG. 2H shows the potential of the connection line 122 connecting the connection points of the pair of switching elements 104c and 104d with respect to the ground and the other primary terminal of the isolation transformer 105 (potentials at both ends of the second capacitance 107). ) The transition of Vbo1 is shown. FIG. 2 (i) shows the potential of the connection line 131 connecting the connection points of the pair of diodes 110a and 110b with respect to the ground and one secondary terminal of the isolation transformer 105 (potentials at both ends of the third capacitance 108). ) The transition of Vao2 is shown. Further, FIG. 2J shows the potential of the connection line 132 connecting the connection points of the pair of diodes 110c and 110d with respect to the ground and the other secondary terminal of the isolation transformer 105 (both ends of the fourth capacitance 109). (Potential) Vbo2 transition is shown.
In FIG. 2, for the sake of simplification, the influence of the forward voltage of the diode is not considered.

As shown in FIGS. 2 (g) and 2 (h), the potentials Vao1 at both ends of the first capacitance 106 connected to the primary side of the isolation transformer 105 and the potentials Vbo1 at both ends of the second capacitance 107 are , Changes complementary to each other with respect to the ground.

In this way, both potentials Vao1 and potential Vbo1 change complementarily by the hard switching method, in which the pair of switching elements 104a and 104a diagonally arranged among the switching elements 104a to 104d constituting the full bridge and This effect cannot be obtained when the 104d and the switching elements 104b and 104c are switched in synchronization with each other, and when a pair of diagonally arranged elements are switched asynchronously.

Further, as shown in FIGS. 2 (i) and 2 (j), the potentials Vao2 at both ends of the third capacitance 108 connected to the secondary side of the isolation transformer 105 and the potentials at both ends of the fourth capacitance 109 Similarly, Vbo2 changes complementarily to each other with reference to the ground.

In this way, both potentials Vao2 and potential Vbo2 change complementarily when the reactors 111a and 111b having the same inductance value are individually arranged in a pair of lines so that the impedance is balanced. If the reactor is arranged on only one side, the impedance becomes unbalanced and this effect cannot be obtained.

In order to make the inductance values of the respective reactors 111a and 111b for smoothing the same, it can be realized by selecting parts having the same specifications such as the same number of turns and the same winding material. Further, it can be realized by sharing both cores for forming the respective reactors 111a and 111b and winding them symmetrically around the same core. By sharing the core, magnetic fluxes generated in the reactors 111a and 111b are added to each other from the coil winding direction, and the total inductance value can be increased, so that the entire reactor can be miniaturized.

Now, the common mode current due to the potential fluctuation of the first capacity 106 is Icom 106, the common mode current due to the potential fluctuation of the second capacity 107 is Icom 107, and the common mode current due to the potential fluctuation of the third capacity 108 is Icom 108, the fourth. The common mode current due to the potential fluctuation of the capacity 109 is Icom109 (see FIG. 1 for the direction of the current), the value of the first capacity 106 is C106, the value of the second capacity 107 is C107, and the third capacity. The value of 108 is defined as C108, and the value of the fourth capacity 109 is defined as C109.

Here, if the value C106 of the first capacity 106 and the value C107 of the second capacity 107 are set to the same value, the potentials Vao1 and the potentials Vbo1 at both ends of them are leveled with each other with reference to the ground as described above. Since the changes are complementary in the inverted state, a current flows from one of the first and second capacitances 106 and 107 to the other via the ground, and thus the common mode current flowing to the outside is reduced. be able to.

That is, for example, when the pair of switching elements 104a and 104d are turned from off to on (transition time is dt) as shown in FIG. 2A, the first capacitance 106 is shown in FIG. 2G. The potentials Vao1 at both ends fluctuate by Vdc / 2, and as shown in FIG. 2H, the potentials Vbo1 at both ends of the second capacitance 107 fluctuate by −Vdc / 2. Therefore, the common mode current (= Icom106 + Icom107) flowing to the outside due to the potential fluctuation of the first capacitance 106 and the second capacitance 107 becomes the following equation (1).

In the above equation (1), if the value C106 of the first capacity 106 and the value C107 of the second capacity 107 are set to the same value, that is, C106 = C107, the common mode currents Icom106 and Icom107 cancel each other out. Since the current flows from one of the first and second capacitances 106 and 107 to the other through the ground, the common mode current does not flow to the outside.

Similarly, if the value C108 of the third capacity 108 and the value C109 of the fourth capacity 109 are set to the same value, the potentials Vao2 and the potentials Vbo2 at both ends of them are leveled with respect to the ground as described above. Since the changes are complementary in the inverted state, a current flows from one of the third and fourth capacitances 108 and 109 to the other via the ground, and therefore the common mode current flowing to the outside is reduced. Can be done.

That is, if the value C108 of the third capacity 108 and the value C109 of the fourth capacity 109 are set to the same value, that is, C108 = C109, the common mode currents Icom108 and Icom109 cancel each other out, and the third and fourth capacities Since the current flows from one of the capacitances 108 and 109 to the other through the ground, the common mode current does not flow to the outside.

On the other hand, as shown in FIGS. 2 (g) to 2 (j), the potentials Vbo1 of the second capacity 107 and the fourth capacity 109 are relative to the potentials Vao1 and Vao2 of the first capacity 106 and the third capacity 108. , Vbo2 fluctuates in opposite phase. That is, for example, when the pair of switching elements 104a and 104d are turned from off to on (transition time is dt) as shown in FIG. 2A, the first capacitance 106 is shown in FIG. 2G. The potentials Vao1 at both ends fluctuate by Vdc / 2, and as shown in FIG. 2 (i), the potentials Vao2 at both ends of the third capacitance 108 fluctuate by N · Vdc / 2, whereas in FIG. 2 (h). As shown, the potential Vbo1 at both ends of the second capacity 107 fluctuates by −Vdc / 2, and as shown in FIG. 2 (j), the potential Vbo1 at both ends of the fourth capacity 109 fluctuates by −N · Vdc / 2. ..

Therefore, the total common mode current (= Icom106 + Icom107 + Icom108 + Icom109) flowing to the outside due to the potential fluctuation of the first to fourth capacitances 106 to 109 on the primary side and the secondary side of the isolation transformer 105 becomes the following equation (2). ..

In the equation (2), in order to set the total common mode current (= Icom106 + Icom107 + Icom108 + Icom109) flowing to the outside to "0", the first to fourth capacitances 106 to 109 are as shown in the following equation (3). Each value C106 to C109 may be set.

The value C106 of any of the first to fourth capacities of the first to fourth capacities 106 to 109 on the primary side and the secondary side of the isolation transformer 105 so that the relationship of the equation (3) is established. By adjusting ~ C109, the total common mode current (= Icom106 + Icom107 + Icom108 + Icom109) can be suppressed.

In this way, even if the arrangement space of one of the circuits on the primary side and the secondary side of the isolation transformer 105 is small and the capacitance adjustment is difficult, the capacitance can be adjusted on the other side, so that the size of the device can be increased. It is possible to suppress the common mode current.

In the above, the case where the respective values C106 to C109 of the first to fourth capacities 106 to 109 satisfy the condition of the equation (3) has been described, but the respective values C106 of the first and third capacities 106 and 108 have been described. , C108 may be set so that the values C107 and C109 of the second and fourth capacitances 107 and 109 satisfy the condition of the following equation (4).

The values C107 and C109 of the second and fourth capacities 107 and 109 are set with respect to the respective values C106 and C108 of the first and third capacities 106 and 108 so as to satisfy the condition of the equation (4). By regulating, the common mode current flowing to the outside can be reduced as compared with the case where those values C107 and C109 are not regulated at all.

The reason is as follows.
For example, as shown in FIG. 2A, when the pair of switching elements 104a and 104d are turned from off to on (transition time is dt), as shown in FIG. 2G, the first capacitance 106 The potentials Vao1 at both ends fluctuate by Vdc / 2, and as shown in FIG. 2 (i), the potentials Vao2 at both ends of the third capacitance 108 fluctuate by N · Vdc / 2. At this time, the common mode current Icom106 + Icom108 that flows to the outside due to the potential fluctuation of the first and third capacitances 106 and 108 is given by the following equation (5).

Here, when the values C107 and C109 of the second and fourth capacitances 107 and 109 are not regulated at all, considering the case where both sides of the above equation (4) have equal signs, the current flows to the outside. The absolute value of the total common mode current (= | Icom106 + Icom107 + Icom108 + Icom109 |) is given by the following equation (6).

That is, when both sides of the equation (4) have equal signs, the value of the equation (6) is the same as the value of the equation (5), and the values C107 of the second and fourth capacitances 107 and 109, respectively. A common mode current equivalent to that when C109 is not regulated flows to the outside, and the common mode current increases.

On the other hand, if the values C107 and C109 of the second and fourth capacities 107 and 109 are set so as to satisfy the condition of the equation (4), the values C107 and C109 of the second and fourth capacities 107 and 109 are set respectively. Compared with the case where the values C107 and C109 are not regulated at all, the common mode current flowing to the outside can be reduced.

For the same reason as above, the values C106 and C108 of the first and third capacities 106 and 108 are set to the following (7) with respect to the values C107 and C109 of the second and fourth capacities 107 and 109, respectively. ) By setting so as to satisfy the condition of the equation, the common mode current flowing to the outside is reduced as compared with the case where the values C106 and C108 of the first and third capacitances 106 and 108 are not regulated at all. be able to.

FIG. 3 shows an example of a method of adjusting the respective values C106 to C109 of the first to fourth capacitances 106 to 109 so as to satisfy the above-mentioned equations (3), (4), or (7). This will be described with reference to FIG.

3A and 3D are surface mount type switching elements 104a to 104d constituting the single-phase inverter 104, and are a plan view showing a mounting example of D2PAK or D3PAK which is generally used. FIG. It is sectional drawing along the-A line.

The switching elements 104a to 104d constituting the single-phase inverter 104 are surface-mounted on the metal substrate 203, and are cooled via a housing (heat dissipation plate) 204 having the same potential as the ground. The metal substrate 203 in this case is configured by arranging the insulating layer 203a on the metal base material 203b mounted on the housing (heat dissipation plate) 204.

The pair of switching elements 104a and 104b are wired according to the circuit pattern 201 and are connected to one primary terminal of the isolation transformer 105 in FIG. Further, the pair of switching elements 104c and 104d are wired by the circuit pattern 202 and connected to the other primary terminal of the isolation transformer 105 in FIG.
In FIG. 3, other circuit patterns such as the drain of the switching elements 104a and 104c and the source of the switching elements 104b and 104d are not used in the description and are omitted.

The first capacity 106 is formed as a capacity in which the circuit pattern 201 and the housing (heat dissipation plate) 204 are paired electrodes, and the second capacity 107 is a capacity in which the circuit pattern 202 and the housing (heat dissipation plate) 204 are paired electrodes. It is formed as a capacity.

Here, as an example, focusing on the first capacitance 106, assuming that the dielectric constant of the vacuum is ε0, the relative permittivity of the insulating layer 203a is εr, the thickness of the insulating layer 203a is d, and the area of the circuit pattern 201 is S. , The value C106 of the first capacitance 106 is given by the following equation (8).

Then, the value C106 of the first capacitance 106 can be adjusted by adjusting the area of the circuit pattern 201 as in the equation (8). The values C107 to C109 of the other second to fourth capacitances 107 to 109 can be adjusted in the same manner. That is, if the first to fourth capacitances 106 to 109 are formed by forming the circuit pattern and the housing (heat dissipation plate) 204 as a pair of electrodes, the capacitance values C106 to C109 are the areas of the circuit pattern with a margin of arrangement space. Since the above can be adjusted, it is easy to realize the relationship between the equations (3), (4) and (7).

In the above, it is assumed that the circuit pattern is formed on the metal substrate 203, but other substrates such as a glass epoxy substrate may be used. Further, here, a case where the first to fourth capacitors 106 to 109 are formed as a pair of electrodes of the circuit pattern formed on the metal substrate 203 and the housing (heat dissipation plate) 204 has been described as an example, but the laminated type It may be formed of a ceramic capacitor or the like.

Further, in the first embodiment, the switching elements 104a to 104d are described as MOSFETs and the rectifying elements are described as diodes 110a to 110d. However, high frequency drive is possible, the switching speed (dv / dt, di / dt) is high, and the loss is lost. It may be configured by using a wide bandgap semiconductor such as SiC or GaN that can reduce the size. When the switching speed (dv / dt) is high, the amount of charge / discharge current flowing through the first to fourth capacitances 106 to 109 also increases. That is, if the present application is configured by using a wide-gap semiconductor, it is possible to suppress the charge / discharge current of a capacity that can be a common mode current, and it is possible to further reduce the size and increase the efficiency of the power conversion device.

Although exemplary embodiments are described in the present application, the various features, embodiments, and functions described in the embodiments are not limited to the application of a particular embodiment, either alone or. It can be applied to embodiments in various combinations.
Therefore, innumerable variations not illustrated are envisioned within the scope of the techniques disclosed in the present application. For example, it is assumed that at least one component is modified, added or omitted.

101 DC power supply, 104 single-phase inverter (switching circuit),
104a switching element, 104b switching element,
104c switching element, 104d switching element,
105 Isolation transformer (turn ratio N), 106 1st capacity, 107 2nd capacity,
108 3rd capacitance, 109 4th capacitance, 110 rectifier circuit, 110a diode, 110b diode, 110c diode, 110d diode,
111a reactor, 111b reactor, 114 load.

Claims (9)

An isolation transformer is provided, and a switching circuit is connected to the primary terminal of the isolation transformer, and a rectifier circuit is connected to the secondary terminal.
Of the two primary pole terminals of the isolation transformer, the first capacitance is connected between one primary terminal and the ground, and the second capacitance is connected between the other primary terminal and the ground. Of the two secondary terminals of the isolation transformer, the third capacitance is between one secondary terminal and the ground, and the fourth capacitance is between the other secondary terminal and the ground. Connected and
Power in which the second charge / discharge current flowing in the second capacity and the second charge / discharge current flowing in the fourth capacity are in opposite phase with respect to the first charge / discharge current flowing in the first capacity and the third capacity. Conversion device. The ratio of the number of turns on the secondary side to the number of turns on the primary side of the isolation transformer is N, the value of the first capacitance is C1 [F], the value of the second capacitance is C2 [F], and the third When the value of the capacity of is C3 [F] and the value of the fourth capacity is C4 [F],
C1 + N × C3 <2 × (C2 + N × C4) and C2 + N × C4 <2 × (C1 + N × C3)
The power conversion device according to claim 1, wherein C1, C2, C3, and C4 are set so as to satisfy the relationship of any one of them. The power conversion device according to claim 1 or 2, wherein the switching circuit has four switching elements connected in a full bridge type. The power conversion device according to claim 3, wherein the switching circuit switches by a hard switching method in which a pair of diagonally arranged switching elements are alternately turned on and off. The power conversion device according to any one of claims 1 to 4, wherein the rectifier circuit has four rectifying elements connected in a full bridge type. The power conversion device according to any one of claims 1 to 5, wherein a reactor is individually provided on each pair of lines connected to the output of the rectifier circuit. The power conversion device according to claim 6, wherein the pair of the reactors are coupled reactors that share a core with each other. The switching circuit and the elements constituting the rectifier circuit are surface-mounted, and the circuit board on which the circuit pattern is printed and the housing having the same potential as the ground on which the circuit board is mounted are provided. The power according to any one of claims 1 to 7, wherein each of the first to fourth capacitances is formed by a capacitance having the circuit pattern of the circuit board and the housing as a pair of electrodes. Conversion device. The power conversion device according to any one of claims 1 to 8, wherein each switching element constituting the switching circuit is composed of a wide bandgap semiconductor.

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