JP2018182880A - Power conversion device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technology capable of effectively suppressing common mode noise in a power conversion device comprising a pair of high frequency switching elements and a pair of low frequency switching elements.SOLUTION: A power conversion device disclosed in the specification comprises: a pair of high frequency switching elements connected in series between a DC positive line and DC negative line, the pair of high frequency switching elements operating at a high frequency; and a pair of low frequency switching elements connected in series between the DC positive line and DC negative line, the pair of low frequency switching elements operating at a high frequency. In the power conversion device, electrostatic capacitance formed between the ground and a connection point between the pair of low frequency switching elements is large as compared with the sum of electrostatic capacitance formed between the ground and the DC positive line and electrostatic capacitance formed between the ground and the DC negative line.SELECTED DRAWING: Figure 9

Description

  A power converter is disclosed herein.

  Patent Document 1 discloses a power conversion device including a pair of switching elements connected in series between a DC positive electrode line and a DC negative electrode line and performing switching operation. In this power conversion device, the capacitance formed between the DC positive electrode line and the earth and the capacitance formed between the DC negative electrode line and the earth are adjusted to approximately the same size, and DC Compared to the sum of the capacitance formed between the positive electrode wire and the ground and the capacitance formed between the DC negative electrode wire and the ground, the connection between the pair of switching elements and the ground is formed By reducing the capacitance, the common mode noise resulting from the switching operation of the pair of switching elements is suppressed.

JP, 2015-106601, A

  A pair of high frequency switching elements connected in series between a DC positive electrode line and a DC negative electrode line, such as a totem pole type bridgeless power factor correction (PFC) converter circuit, performing switching operation at high frequency, and a DC positive electrode line And a DC negative electrode line in series, and a power conversion device is developed which includes a pair of low frequency switching elements which perform switching operation at low frequency. In such a power converter, each of the pair of high frequency switching elements and the pair of low frequency switching elements serves as an excitation source of common mode noise. When the technology of Patent Document 1 is applied to such a power conversion device, common mode noise caused by a pair of high frequency switching elements can be suppressed, but common mode noise caused by a pair of low frequency switching elements is This is not the case because the noise generation mechanism is different.

  The present specification provides a technique for solving the above-mentioned problems. The present specification provides a technology capable of effectively suppressing common mode noise in a power conversion device including a pair of high frequency switching elements and a pair of low frequency switching elements.

  The power conversion device disclosed in the present specification is connected in series between the DC positive electrode line and the DC negative electrode line, and a pair of high frequency switching elements that perform switching operation at high frequency, and between the DC positive electrode line and the DC negative electrode line. A pair of low frequency switching elements connected in series and switching at a low frequency are provided. In the power converter, compared with the sum of the capacitance formed between the DC positive electrode line and the ground and the capacitance formed between the DC negative electrode line and the ground, The capacitance formed between the connection point and the ground is large.

  According to the above power converter, it is possible to reduce the common mode current and the resonance point peak frequency due to the switching operation of the low frequency switching element, and to suppress the common mode noise. Compared with the sum of the capacitance formed between the DC positive wire and the ground and the capacitance formed between the DC negative wire and the ground, the connection point between the pair of low frequency switching elements and the ground The principle of the suppression of common mode noise by increasing the capacitance formed between will be described in detail in connection with FIGS.

  In the above power converter, the static capacitance formed between the connection point of the pair of low frequency switching elements and the ground is smaller than the capacitance formed between the connection point of the pair of high frequency switching elements and the ground. The capacitance may be large.

  According to the above power converter, harmonic components of common mode noise resulting from the switching operation of the high frequency switching element can be reduced. Compared to the capacitance formed between the connection point of the pair of high frequency switching elements and the ground, the capacitance formed between the connection point of the pair of low frequency switching elements and the ground is larger The principle of common mode noise suppression will be described in detail in connection with FIGS.

  The above power converter may further include a first bus bar wire connected to a connection point of the pair of low frequency switching elements, and a second bus bar wire connected to the ground. The first bus bar wire and the second bus bar wire The bus bar wires may be arranged at least partially close to each other in a substantially parallel manner.

  In the above configuration, a relatively large electrostatic capacitance is formed between the first bus bar wiring and the second bus bar wiring, so the electrostatic capacitance formed between the connection point of the pair of low frequency switching elements and the ground Capacity can be increased. According to the above configuration, common mode noise can be effectively suppressed by a simple configuration.

  In the power conversion device described above, the high-dielectric material is filled between the first bus bar wire and the second bus bar wire at the portion where the first bus bar wire and the second bus bar wire are arranged in substantially parallel proximity. It is also good.

  In the above configuration, a larger capacitance can be formed between the first bus bar interconnection and the second bus bar interconnection. According to the above configuration, common mode noise can be more effectively suppressed by a simple configuration.

  The above power converter may further include a capacitor connected between the connection point of the pair of low frequency switching elements and the ground.

  In the above configuration, the addition of the capacitor can increase the capacitance formed between the connection point of the pair of low frequency switching elements and the ground. According to the above configuration, common mode noise can be more effectively suppressed by a simple configuration.

  The above power converter may further include a resistor connected between the connection point of the pair of low frequency switching elements and the ground, and the capacitor and the resistor may be connected in series .

  According to the above configuration, by adding the resistor, suppressing the resonance point peak level of the common mode noise caused by the switching operation of the low frequency switching element and the common mode noise caused by the switching operation of the high frequency switching element Can. According to the above configuration, common mode noise can be more effectively suppressed by a simple configuration.

It is a figure which shows the circuit structure of the power converter device 2 of an Example. It is a perspective view which shows typically the external appearance of the power converter device 2 of an Example. It is sectional drawing which looked at the power converter device 2 of the Example by the III-III cross section of FIG. It is sectional drawing which looked at the power converter device 2 of the Example by the IV-IV cross section of FIG. It is sectional drawing which looked at the power converter device 2 of the Example by the VV cross section of FIG. 3, FIG. It is a figure which shows the common mode equivalent circuit of the power converter device 2 of an Example. It is a diagram showing an equivalent circuit of the common mode current I _PWM by the high frequency voltage source 118 of the power conversion apparatus 2 of the embodiment. It is a figure which shows the equivalent circuit about the common mode current _IRECT by the low frequency voltage source 120 of the power converter device 2 of an Example. It is a graph explaining a mode that common mode noise is suppressed by the power converter device 2 of an Example. It is sectional drawing corresponding to FIG. 4 of power converter device 2 'of a modification.

(Example)
FIG. 1 shows a circuit configuration of a power conversion device 2 according to an embodiment of the present invention. The power conversion device 2 of the present embodiment is used to convert AC power supplied from the AC power supply 4 of the commercial system into DC power and supply the DC power to the load 6.

  AC power is supplied from AC power supply 4 via AC power line 8. The AC power line 8 includes an AC positive electrode line 8 a and an AC negative electrode line 8 b. In the following description, in the AC power line 8, the AC power supply 4 side serving as the input is referred to as the upstream side, and the load 6 side serving as the output is referred to as the downstream side.

  The AC power line 8 is provided with a Line Impedance Stabilization Network (LISN) 10. The LISN 10 includes a coil 12 incorporated in the alternating current positive electrode wire 8a, a coil 14 incorporated in the alternating current negative electrode wire 8b, and a capacitor 18 connected in series between the coil 12 downstream of the coil 12 of the alternating current positive electrode wire 8a and the ground 16. And a resistor 20, and a capacitor 22 and a resistor 24 connected in series between the side of the AC negative electrode 8b downstream of the coil 14 and the ground 16. An EMI (Electro-Magnetic Interference) receiver 26 is connected to the LISN 10. The EMI receiver 26 is connected to the connection point of the capacitor 18 and the resistor 20 and to the connection point of the capacitor 22 and the resistor 24.

  A noise filter 28 is provided downstream of the LISN 10 of the AC power line 8. The noise filter 28 includes a first transformer 30. The first transformer 30 includes a primary coil 30a and a secondary coil 30b wound around a single core. The primary side coil 30a is wound in the opposite direction to the secondary side coil 30b, and a voltage having a phase opposite to that of the voltage applied to the primary side coil 30a is applied to the secondary side coil 30b. The primary side coil 30a is incorporated in the alternating current positive electrode wire 8a, and the secondary side coil 30b is incorporated in the alternating current negative electrode wire 8b.

  The noise filter 28 further includes a second transformer 32. The second transformer 32 is provided downstream of the first transformer 30 of the AC power line 8. The second transformer 32 includes a primary coil 32a and a secondary coil 32b wound around a single core. The primary coil 32a is wound in the opposite direction to the secondary coil 32b, and a voltage having a phase opposite to that of the voltage applied to the primary coil 32a is applied to the secondary coil 32b. The primary side coil 32a is incorporated in the alternating current positive electrode wire 8a, and the secondary side coil 32b is incorporated in the alternating current negative electrode wire 8b.

  The noise filter 28 further includes a first capacitor 34, a second capacitor 36, a third capacitor 38 and a fourth capacitor 40. The first capacitor 34 is a connection point between the primary coil 30a of the first transformer 30 and the primary coil 32a of the second transformer 32 of the AC positive electrode line 8a, and the secondary coil 30b of the first transformer 30 of the AC negative electrode 8b. And the connection point of the secondary coil 32 b of the second transformer 32. The second capacitor 36 is connected between the ground 16 and a connection point of the primary coil 30 a of the first transformer 30 and the primary coil 32 a of the second transformer 32 of the AC positive electrode line 8 a. The third capacitor 38 is connected between the connection point of the secondary coil 30 b of the first transformer 30 and the secondary coil 32 b of the second transformer 32 of the AC negative electrode wire 8 b and the ground 16. The fourth capacitor 40 is connected between the downstream side of the primary coil 32a of the second transformer 32 of the AC positive electrode line 8a and the downstream side of the secondary coil 32b of the second transformer 32 of the AC negative electrode line 8b. .

  A boost coil 42 is provided downstream of the noise filter 28 of the AC power line 8. The booster coil 42 is incorporated in the AC positive electrode line 8 a.

  A power converter 2 is provided downstream of the boost coil 42 of the AC power line 8. The load 6 is connected to the downstream side of the power conversion device 2 via the DC power line 44. The DC power line 44 includes a DC positive line 44a and a DC negative line 44b. A smoothing capacitor 46 is connected between the DC positive electrode line 44a and the DC negative electrode line 44b.

  The power conversion device 2 is provided with an alternating current positive electrode terminal 48, an alternating current negative electrode terminal 50, a direct current positive electrode terminal 52, a direct current negative electrode terminal 54, and a ground electrode terminal 55. The alternating current positive electrode terminal 48 is connected to the alternating current positive electrode line 8 a. The alternating current negative electrode terminal 50 is connected to the alternating current negative electrode line 8b. The direct current positive electrode terminal 52 is connected to the direct current positive electrode line 44a. The direct current negative electrode terminal 54 is connected to the direct current negative electrode line 44 b. The ground electrode terminal 55 is connected to the ground 16.

  The power converter 2 includes a first switching element 56, a second switching element 58, a third switching element 60, a fourth switching element 62, and a heat sink 64.

  The first switching element 56 and the second switching element 58 are connected in series between the DC positive electrode terminal 52 and the DC negative electrode terminal 54. The connection point of the first switching element 56 and the second switching element 58 is connected to the AC positive electrode terminal 48. The first switching element 56 and the second switching element 58 perform switching operation at a frequency higher than that of the AC power supply 4, for example 150 kHz. The first switching element 56 and the second switching element 58 can be referred to as a high frequency switching element. The first switching element 56 and the second switching element 58 are, for example, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors).

  The third switching element 60 and the fourth switching element 62 are connected in series between the direct current positive electrode terminal 52 and the direct current negative electrode terminal 54. The connection point of the third switching element 60 and the fourth switching element 62 is connected to the alternating current negative electrode terminal 50. The third switching element 60 and the fourth switching element 62 perform switching operation at the same frequency as that of the AC power supply 4, for example, at 50 Hz. The third switching element 60 and the fourth switching element 62 can be referred to as low frequency switching elements. The third switching element 60 and the fourth switching element 62 are, for example, diodes.

  The power conversion device 2 performs AC / DC conversion using the first switching element 56 and the second switching element 58 which are high frequency switching elements, and the third switching element 60 and the fourth switching element 62 which are low frequency switching elements. Do. The power converter 2 can be referred to as a totem pole bridgeless PFC converter circuit.

  The heat sink 64 dissipates the heat generated by the first switching element 56, the second switching element 58, the third switching element 60 and the fourth switching element 62 to the outside of the power conversion device 2. The heat sink 64 is connected to the ground electrode terminal 55. Accordingly, the heat sink 64 is maintained at the same potential as the ground 16.

  2 to 5 schematically show the physical configuration of the power conversion device 2. As shown in FIG. 2, the alternating current positive electrode terminal 48, the alternating current negative electrode terminal 50, the direct current positive electrode terminal 52, the direct current negative electrode terminal 54, and the ground electrode terminal 55 are disposed on the top surface of the power converter 2. 2-5, the direction from the DC negative electrode terminal 54 toward the DC positive electrode terminal 52 along the upper surface of the power converter 2 is referred to as the Y direction, and the Y direction along the upper surface of the power converter 2 The direction orthogonal to is referred to as the X direction, and the direction orthogonal to the Y direction and the X direction is referred to as the Z direction.

  As shown in FIGS. 3 and 4, the heat sink 64 is disposed on the lower surface of the power converter 2. On the top surface of the heat sink 64, a ceramic layer 66 which is an insulating layer is laminated. On top of the ceramic layer 66, metal layers 68, 70, 72, 74, which are conductor layers, are stacked. As shown in FIG. 3, the first switching element 56 is mounted on the top surface of the metal layer 68. The second switching element 58 is mounted on the top surface of the metal layer 70. The first switching element 56 and the second switching element 58 are arranged side by side in the Y direction. As shown in FIG. 4, the third switching element 60 is mounted on the top surface of the metal layer 72. The fourth switching element 62 is mounted on the top surface of the metal layer 74. The third switching element 60 and the fourth switching element 62 are arranged side by side in the Y direction. As shown in FIG. 5, the first switching element 56 and the third switching element 60 are arranged side by side in the X direction. The second switching element 58 and the fourth switching element 62 are arranged side by side in the X direction.

  As shown in FIGS. 3 and 4, resin layers 76 and 78 that are insulating layers are stacked on the top surface of the heat sink 64. The upper surfaces of the resin layers 76 and 78 are higher than the ceramic layer 66, the metal layers 68, 70, 72, 74, the first switching element 56, the second switching element 58, the third switching element 60, and the fourth switching element 62. (Ie, at a position away from the heat sink 64). On the upper surface of the resin layer 76, a metal layer 80 which is a conductor layer is laminated. On the upper surface of the resin layer 78, a metal layer 82 which is a conductor layer is laminated. As shown in FIG. 5, the metal layer 80 and the metal layer 82 are disposed so as to sandwich the first switching element 56, the second switching element 58, the third switching element 60 and the fourth switching element 62 from both sides in the Y direction. It is done.

  As shown in FIG. 3, the DC positive electrode terminal 52 and the metal layer 80 are connected by a bus bar wiring 84. The metal layer 80 and the metal layer 68 are connected by a wire 86. The first switching element 56 and the metal layer 70 are connected by a wire 88. The second switching element 58 and the metal layer 82 are connected by a wire 90. The metal layer 82 and the DC negative electrode terminal 54 are connected by a bus bar wire 92. Thus, the first switching element 56 and the second switching element 58 are connected in series between the direct current positive electrode terminal 52 and the direct current negative electrode terminal 54.

  As shown in FIG. 4, the metal layer 80 and the metal layer 72 are connected by a wire 94. The third switching element 60 and the metal layer 74 are connected by a wire 96. The fourth switching element 62 and the metal layer 82 are connected by a wire 98. Thus, the third switching element 60 and the fourth switching element 62 are connected in series between the direct current positive electrode terminal 52 and the direct current negative electrode terminal 54.

  As shown in FIG. 3, the AC positive electrode terminal 48 and the metal layer 70 are connected by a bus bar wire 100. Thus, the AC positive electrode terminal 48 is connected to the connection point of the first switching element 56 and the second switching element 58.

  As shown in FIG. 4, the AC negative electrode terminal 50 and the metal layer 74 are connected by a bus bar wiring 102. Thus, the AC negative electrode terminal 50 is connected to the connection point of the third switching element 60 and the fourth switching element 62. Further, the ground electrode terminal 55 and the heat sink 64 are connected by the bus bar wiring 104. The heat sink 64 is thereby maintained at the same potential as the ground 16.

  As shown in FIGS. 3 and 4, on the top surface of the heat sink 64, a resin 106, which is a high dielectric material, is potted. By the resin 106, ceramic layer 66, metal layers 68, 70, 72, 74, first switching element 56, second switching element 58, third switching element 60, fourth switching element 62, resin layers 76, 78, metal layer 80, 82, bus bar wiring 84, 92, 100, 102, 104, and wires 86, 88, 90, 94, 96, 98 are sealed. As shown in FIG. 2, the AC positive electrode terminal 48, the AC negative electrode terminal 50, the DC positive electrode terminal 52, the DC negative electrode terminal 54, and the ground electrode terminal 55 are disposed on the top surface of the resin 106.

FIG. 6 shows an equivalent circuit of the common mode for the power system of FIG. The resistor 110 corresponds to an equivalent circuit of the LISN 10. The inductance 112, the capacitance 114 and the inductance 116 correspond to an equivalent circuit of the noise filter 28. The inductance 117 corresponds to an equivalent circuit of the boosting coil 42. The high frequency voltage source 118 corresponds to a high frequency PWM switching voltage by the first switching element 56 and the second switching element 58 of the power conversion device 2. Hereinafter, the excitation voltage of the high frequency voltage source 118 is also referred to as _VPWM . The low frequency voltage source 120 corresponds to a low frequency rectangular switching voltage by the third switching element 60 and the fourth switching element 62 of the power conversion device 2. Hereinafter, the excitation voltage of the low frequency voltage source 120 is also referred to as _VRECT .

Further, as shown in FIG. 1, the capacitance 122 shown in FIG. 6 corresponds to a stray capacitance between the connection point of the first switching element 56 and the second switching element 58 and the heat sink 64 (that is, the ground 16). ing. The capacitance 124 shown in FIG. 6 corresponds to the stray capacitance between the connection point of the third switching element 60 and the fourth switching element 62 and the heat sink 64 (ie, the ground 16), as shown in FIG. . The capacitance 126 shown in FIG. 6 is, as shown in FIG. 1, a stray capacitance 126a between the DC positive terminal 52 and the heat sink 64 (ie, the ground 16), and between the DC negative terminal 54 and the heat sink 64 (ie the ground 16). Corresponds to the stray capacitance 126b of the Hereinafter, the capacitance value of the capacitance 122 is also referred to as C _P1, the electrostatic capacitance value of the capacitance 124 is also referred to as C _P2, the capacitance value of the capacitance 126 also referred to as C _PN.

In the equivalent circuit of FIG. 6, the current flowing through the resistor 110 by the excitation voltage V _PWM of the high frequency voltage source 118 and the excitation voltage V _RECT of the low frequency voltage source 120 corresponds to the common mode current I _CM . By reducing the current I _CM , common mode noise can be suppressed.

FIG. 7 is an equivalent circuit specialized from the equivalent circuit of FIG. 6 to the behavior of the common mode current I _PWM which flows through the resistor 110 by the excitation voltage V _PWM of the high frequency voltage source 118 based on the Thevenin's theorem. In the circuit of FIG. 7, the equivalent inductance 128 and the equivalent capacitance 130 correspond to the inductances 116 and 117 and the capacitances 122, 124 and 126 of FIG. Further, in the circuit of FIG. 7, the equivalent voltage source 132 corresponds to the high frequency voltage source 118 of FIG. Here, assuming that the excitation voltage of the equivalent voltage source 132 is V ′ _PWM , the relationship of V ′ _PWM = V _PWM × C _P1 / (C _P1 + C _P2 + C _PN ) holds. In the equivalent circuit of FIG. 7, the current I _PWM flowing through the resistor 110 changes in accordance with the excitation voltage V ′ _PWM of the equivalent voltage source 132.

FIG. 8 is an equivalent circuit specialized from the equivalent circuit of FIG. 6 to the behavior of the common mode current I _RECT flowing through the resistor 110 by the excitation voltage V _RECT of the low frequency voltage source 120 based on the Thevenin's theorem. In the circuit of FIG. 8, the equivalent inductance 134 and the equivalent capacitance 136 correspond to the inductances 116 and 117 and the capacitances 122, 124 and 126 of FIG. Further, in the circuit of FIG. 8, the equivalent voltage source 138 corresponds to the low frequency voltage source 120 of FIG. At this time, _assuming that the excitation voltage of the equivalent voltage source 138 is V ′ _RECT , the relationship of V ′ _RECT = V _RECT × (C _P1 + C _PN ) / (C _P1 + C _P2 + C _PN ) holds. In the circuit of FIG. 8, the current I _RECT flowing through the resistor 110 changes in accordance with the excitation voltage V ′ _RECT of the equivalent voltage source 138.

In the equivalent circuit of FIG. 6, the current I _CM flowing through the resistor 110 is the sum of the current I _PWM flowing through the resistor 110 in the equivalent circuit of FIG. 7 and the current I _RECT flowing through the resistor 110 in the equivalent circuit of FIG. As apparent from the above, the current I _PWM flowing through the resistor 110 in the equivalent circuit of FIG. 7 and the current I _RECT flowing through the resistor 110 in the equivalent circuit of FIG. 8 both have the capacitance 124 of the equivalent circuit of FIG. It decreases by increasing the capacitance value C _P2 of Therefore, the common mode current I _CM flowing through the resistor 110 can be reduced by increasing the capacitance 124 of the equivalent circuit shown in FIG. In particular, common through the electrostatic capacitance value C _P2 of the capacitance 124, and the capacitance value C _P1 of the capacitance 122 is made larger than the capacitance value C _PN of the capacitance 126, the resistor 110 The mode current I _CM can be significantly reduced.

Figure 9 shows the magnitude of the capacitance value C _P2 of the capacitance 124, the relationship between the common mode noise level. Dark noise level shown outlined by solid lines in FIG. 9, the capacitance value C _P2 of the capacitance 124, and the capacitance value C _P1 of the capacitance 122, capacitance of the capacitance 126 shows a common mode noise level in the case of greater than the value C _PN, pale noise levels indicated the outline by a broken line in FIG. 9, the capacitance value C _P2 of the capacitance 124, the capacitance 122 and the capacitance value C _P1, shows a common mode noise level in the case where the capacitance value C _PN approximately the same capacitance 126. Further, in FIG. 9, the noise component N1 which smoothly changes with respect to the frequency is a noise component caused by the excitation voltage V _RECT of the low frequency voltage source 120 (that is, the switching of the third switching element 60 and the fourth switching element 62). operation represents the noise component) due to the noise component N2 of steeply changes with respect to the frequency, the noise component caused by the excitation voltage V _PWM RF voltage source 118 (i.e., the first switching element 56 and the second The noise component caused by the switching operation of the switching element 58 is shown. As shown in FIG. 9, the capacitance value C _P2 of the capacitance 124 to be larger than the capacitance value C _PN of the capacitance 126, noise due to the excitation voltage V _RECT low frequency voltage source 120 It is possible to reduce components (that is, noise components resulting from the switching operation of the third switching element 60 and the fourth switching element 62) and to lower the resonance point peak frequency. Further, as shown in FIG. 9, the capacitance value C _P2 of the capacitance 124 is made larger than the capacitance value C _P1 of the capacitance 122, due to the excitation voltage V _PWM RF voltage source 118 Noise components (that is, noise components resulting from the switching operation of the first switching element 56 and the second switching element 58 and corresponding to harmonic components of common mode noise).

As shown in FIG. 4, in the power conversion device 2 of the present embodiment, the bus bar wiring 102 and the bus bar wiring 104 have portions disposed close to each other in substantially parallel. At this point, a large electrostatic capacitance is formed between the bus bar wiring 102 and the bus bar wiring 104, so the connection point between the third switching element 60 and the fourth switching element 62 shown in FIG. ) Can be increased. Thus, the capacitance value C _P2 of the capacitance 124 in the equivalent circuit of FIG. 6, and the capacitance value C _P1 of the capacitance 122, be greater than the capacitance value C _PN of the capacitance 126 Can. The common mode current I _CM flowing through the resistor 110 can be significantly reduced.

Further, in the power conversion device 2 of the present embodiment, the resin 106, which is a high dielectric material, is disposed between the bus bar wire 102 and the bus bar wire 104 at a location where the bus bar wire 102 and the bus bar wire 104 are arranged close in parallel. Is filled. As a result, the electrostatic capacitance between the bus bar wiring 102 and the bus bar wiring 104 can be further increased, and the heat sink 64 (i.e., the ground 16) is formed at the connection point between the third switching element 60 and the fourth switching element 62 shown in FIG. ) Can be made larger. Thus, the capacitance value C _P2 of the capacitance 124 in the equivalent circuit of FIG. 6, and the capacitance value C _P1 of the capacitance 122, and further larger than the capacitance value C _PN of the capacitance 126 The common mode current I _CM flowing through the resistor 110 can be further reduced.

By the configuration other than the above, the capacitance 124 in the equivalent circuit of FIG. 6, that is, the connection point between the third switching element 60 and the fourth switching element 62 shown in FIG. The capacitance 124 may be increased. For example, a capacitor 140 may be added between the alternating current negative electrode terminal 50 and the ground electrode terminal 55 as in the power conversion device 2 ′ shown in FIG. In the power conversion device 2 ′ of FIG. 10, the bus bar wire 102 ′ and the bus bar wire 104 ′ do not have portions disposed in parallel and in close proximity to each other, but the third switching element 60 shown in FIG. The capacitance 124 between the connection point of the third switching element 62 and the heat sink 64 (ie, the ground 16) can be increased. In the configuration shown in FIG. 10, capacitor 140 may be disposed outside power conversion device 2 ′, or is disposed inside power conversion device 2 ′ (ie, sealed by resin 106). It may be With such a configuration, the capacitance value C _P2 of the capacitance 124 in the equivalent circuit of FIG. 6, and the capacitance value C _P1 of the capacitance 122, the electrostatic capacitance value of the capacitance 126 It can be larger than C _PN . The common mode current I _CM flowing through the resistor 110 can be significantly reduced.

In the case of the configuration shown in FIG. 10, a resistor 142 may be further added in series to the capacitor 140. The resistor 142 may be disposed outside the power conversion device 2 ′ or may be disposed inside the power conversion device 2 ′ (ie, sealed by the resin 106). With such a configuration, the common mode current I _PWM flowing through the resistor 110 by the excitation voltage V _PWM of the high frequency voltage source 118 shown in FIG. 7 and the excitation voltage V _RECT of the low frequency voltage source 120 shown in FIG. For each of the common mode currents _IRECT flowing through 110, it is possible to suppress the resonance point peak level. Thus, the common mode current I _CM flowing through the resistor 110 in the equivalent circuit of FIG. 6 can be significantly reduced.

  In each of the above embodiments, the power conversion device 2 includes, in addition to the first switching element 56 and the second switching element 58, another pair of series connected between the DC positive terminal 52 and the DC negative terminal 54. A high frequency switching element may be provided. In this case, noise can be reduced due to the odd-order switching frequency at the same time as the power conversion device 2 is increased in output power by using the power conversion device 2 as the interleaving method.

As mentioned above, although the specific example of this invention was described in detail, these are only an illustration and do not limit a claim. The art set forth in the claims includes various variations and modifications of the specific examples illustrated above.
The technical elements described in the present specification or the drawings exhibit technical usefulness singly or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the techniques exemplified in the present specification or the drawings can simultaneously achieve a plurality of purposes, and achieving one of the purposes itself has technical utility.

2: power converter; 2 ': power converter; 4: AC power supply; 6: load: 8: AC power line; 8a: AC positive electrode line; 8b: AC negative electrode line; 12: coil; 14: coil; 18: capacitor; 20: resistor; 22: capacitor; 24: resistor; 26: EMI receiver; 28: noise filter; 30: first transformer; 30a: primary coil; 30b: secondary coil; Second transformer: 32a: primary coil; 32b: secondary coil; 34: first capacitor; 36: second capacitor; 38: third capacitor; 40: fourth capacitor; 42: boost coil; 44: DC power line 44a: DC positive wire; 44b: DC negative wire; 46: smoothing capacitor; 48: Flow positive electrode terminal; 50: AC negative electrode terminal; 52: DC positive electrode terminal; 54: DC negative electrode terminal; 55: earth electrode terminal; 56: first switching element; 58: second switching element; 60: third switching element; 64: heat sink; 66: ceramic layer; 68: metal layer; 70: metal layer; 72: metal layer; 74: metal layer; 76: resin layer; 78: resin layer; 80: metal layer; 82: Metal layer; 84: Busbar wiring; 86: Wire; 88: Wire; 90: Wire; 92: Busbar wiring; 94: Wire; 96: Wire; 98: Wire; 100: Busbar wiring; 102: Busbar wiring; ': Bus bar wiring; 104: bus bar wiring; 104': bus bar wiring; 10: resistance; 112: inductance; 114: capacitance; 116: inductance; 117: inductance; 118: high frequency voltage source; 120: low frequency voltage source; 122: capacitance; 124: capacitance; 126: static Capacitance: 126a: stray capacitance; 126b: stray capacitance; 128: equivalent inductance; 130: equivalent capacitance; 132: equivalent voltage source; 134: equivalent inductance; 136: equivalent capacitance; 138: equivalent voltage source; : Capacitor; 142: resistor

Claims (6)

A pair of high frequency switching elements connected in series between the DC positive electrode line and the DC negative electrode line, and performing switching operation at high frequency;
A power conversion device comprising a pair of low frequency switching elements connected in series between a direct current positive electrode line and a direct current negative electrode line and performing switching operation at low frequency,
Compared with the sum of the capacitance formed between the DC positive wire and the ground and the capacitance formed between the DC negative wire and the ground, the connection point between the pair of low frequency switching elements and the ground A power converter that has a large capacitance formed between.   The capacitance formed between the connection point of the pair of low frequency switching devices and the ground is larger than the capacitance formed between the connection point of the pair of high frequency switching devices and the ground. Power converter of 1. A first bus bar wiring connected to a connection point of the pair of low frequency switching elements;
It also has a second busbar line connected to ground,
The power conversion device according to claim 1, wherein the first bus bar wiring and the second bus bar wiring are disposed at least partially in close proximity in substantially parallel.   The power conversion according to claim 3, wherein a high dielectric material is filled between the first bus bar wiring and the second bus bar wiring at a location where the first bus bar wiring and the second bus bar wiring are arranged substantially in parallel and close to each other. apparatus.   The power converter according to any one of claims 1 to 4, further comprising a capacitor connected between a connection point of the pair of low frequency switching elements and the ground. It further comprises a resistor connected between the connection point of the pair of low frequency switching elements and the ground,
The power converter according to claim 5, wherein the capacitor and the resistor are connected in series.