JP4844264B2 - Power conversion system - Google Patents

Description

  The present invention relates to a power conversion system configured by connecting a plurality of power converters in parallel.

Normally, the maximum voltage that can be output by the power converter depends on the DC voltage, so if the output voltage command is higher than the maximum voltage that can be output by the power converter, the output voltage waveform corresponding to the command value cannot be obtained, and power conversion The output voltage waveform of the device does not become a sine wave, waveform distortion occurs, and unnecessary components such as harmonic currents are output.
FIG. 5 is a simplified description of the inverter and control circuit shown in the prior art. In the figure, reference numeral 1 denotes a DC power supply circuit, which includes, for example, an AC input power supply and a three-phase rectifying / smoothing circuit. Reference numeral 2 denotes a three-phase inverter circuit connected to the DC output terminals 1a and 1b of the DC voltage circuit 1, and is composed of, for example, a semiconductor switch such as an insulated gate bipolar transistor (IGBT) and a free wheel diode. 3 is a load of the three-phase inverter circuit 2.
4 is a DC voltage detector that detects a DC voltage value of the DC power supply circuit 1, 5 is a current command device that generates a current command to flow to the load 3, and 6 is a frequency that generates a frequency command for the output voltage of the three-phase inverter circuit 2. Commander 7 is an output voltage command value calculator for generating output voltage command 7a based on DC voltage detection value 4a, current command value 5a, and frequency command value 6a, and 8 is an output voltage command 7a for output voltage command value calculator 7. Is a PWM pulse generation circuit that generates a gate pulse command that is PWM-modulated to be supplied to the three-phase inverter circuit 2.
FIG. 6 is a detailed view of the output voltage command value calculator 7 shown in the prior art. The output voltage command computing unit 7 is connected to the current command unit 5, the output frequency command unit 6, and the DC voltage detector 4 of the inverter. Based on these signals, the output voltage command 7a is computed, and the PWM pulse generation circuit 8 is calculated. A maximum voltage calculation means 72 for calculating the maximum voltage Vm that can be output from the inverter from the DC voltage detection value 4a, and a correction current calculation means 73 for calculating a correction current value from the maximum voltage Vm and the load impedance characteristic value. , A selection means 71 for selecting the smaller one of the correction current value and the current command value 5a, a first multiplier 74, a second multiplier 75, and a conversion coefficient generation means 76.
When the DC voltage decreases and the corrected current value determined from the maximum voltage Vm, load impedance, and output frequency is lower than the current command value, the corrected current value is selected as the current command value, and the output voltage command is output by the power converter. The output voltage waveform corresponding to the command value is obtained without being higher than the maximum possible voltage.

JP-A-11-206185 (FIGS. 1 and 3)

  Since the conventional technology is configured as described above, when two or more power converters are connected in parallel, there is a problem in that if the output voltage changes individually, a cross current flows between the power converters. there were.

  The present invention has been made to solve the above-described problems. In a power conversion system in which two or more power converters are connected in parallel, an approximation with less waveform distortion even when the DC voltage drops. An object is to obtain a power converter capable of outputting a sine wave.

  In the power conversion system according to the present invention, at least two power converters having means for controlling the output voltage based on the output voltage command are connected in parallel. The DC voltage detecting means for detecting, the comparing means for detecting that the DC voltage value is lower than the set voltage, and the DC voltage of one of the power converters connected in parallel is lower than the set voltage. Output voltage reduction command means for detecting this and giving an output voltage reduction amount to each power converter.

  According to the present invention, even when two or more power converters are connected in parallel, the output voltage commands of the power converters connected in parallel can be reduced simultaneously according to the DC voltage drop signal. Cross current does not occur between devices, and waveform distortion of the output voltage can be suppressed.

Embodiment 1 FIG.
A first embodiment of the present invention will be described below with reference to FIGS. In FIG. 1, the same reference numerals are used for the same parts as in the prior art.
Reference numeral 100 denotes a power converter. The power conversion apparatus 100 includes a DC power supply circuit 1 that supplies DC power, a three-phase inverter circuit 2 that is connected to DC terminals 1a and 1b of the DC power supply circuit 1 and converts DC power to AC power, and a DC power supply circuit 1 DC voltage detector 4 for detecting the direct current voltage value, comparator 11 for detecting that the direct current voltage value is equal to or lower than the set voltage, and output frequency command for generating the output voltage frequency command 6a1 for the three-phase inverter circuit 2 6, voltage controller 10 that calculates the output voltage command value 10 a 1 from the deviation between the output voltage command value 14 a 1 and the feedback value of the output voltage value, a PWM pulse generation circuit 8 that generates a gate pulse command for the three-phase inverter circuit 2, and addition The device 14 is configured. Reference numeral 200 denotes another power conversion device including the same elements as the power conversion device 100. Outputs of the power conversion devices 100 and 200 are connected to the load 3 via inductances 91 and 92.
Reference numeral 12 denotes an OR circuit that detects that one of the DC voltages of the power conversion device 100 and the power conversion device 200 is equal to or lower than a set value, and reference numeral 13 denotes an output voltage reduction command signal 13a1 according to the detection signal 12a of the OR circuit 12. This is an output voltage reduction command circuit that outputs 13a2.

Next, the operation will be described with reference to FIG.
For example, when the DC voltage detection signal 4a1 of the power conversion device 100 falls below a set detection level, the comparator 11 detects a DC voltage drop and outputs a DC voltage drop signal 11a1. The OR circuit 12 detects that the DC voltage of one of the power conversion circuits 100 and 200 connected in parallel has become equal to or lower than a set value, and outputs a detection signal 12a. The output voltage reduction command circuit 13 sends output voltage reduction command signals 13a1 and 13a2 for reducing a deviation α between the maximum voltage value that can be output at the set DC voltage detection level and the output voltage command VL * to the power conversion circuits 100 and 200. Output. In power converters 100 and 200, output voltage command VL * and output voltage reduction command signals 13a1 and 13a2 are added by adder 14, and output voltage command value 14a1 is output to voltage controller 10.

  In the first embodiment, since the above configuration is adopted, even when two or more power converters are connected in parallel, the output voltage commands of the power converters connected in parallel are simultaneously transmitted according to the DC voltage drop signal. Therefore, cross current does not occur between the power converters, and waveform distortion of the output voltage can be suppressed.

Embodiment 2. FIG.
The second embodiment of the present invention will be described below with reference to FIGS. In FIG. 3, the same reference numerals are used for the same parts as in the prior art.
Although 100 and 200 are power converters, the difference from the first embodiment is that the comparator 11 is omitted. Reference numeral 15 denotes a minimum value detection circuit for detecting the minimum value of the DC voltage detection signals 4a1 and 4a2 output from the power converters 100 and 200. Reference numeral 16 denotes an output voltage reduction command according to the output signal 15a of the minimum value detection circuit 15. This is an output voltage reduction command circuit for calculating signals 16a1 and 16a2.

Next, the operation will be described with reference to FIG.
For example, when the DC voltage detection signal 4a1 of the power conversion device 100 is smaller than the DC voltage detection signal 4a2 of the power conversion device 200, the output signal 15a of the minimum value detection circuit 15 outputs the same value as the DC voltage detection signal 4a1. Based on the DC voltage minimum value signal 15a, the output voltage reduction command circuit 16 sends output voltage reduction command signals 16a and 16b to the power conversion circuits 100 and 200 for reducing the deviation β between the maximum output voltage and the output voltage command VL *. Output. In power converters 100 and 200, output voltage command VL * and output voltage reduction command signals 16a1 and 16a2 are added by adder 14, and output voltage command value 14a1 is output to voltage controller 10.

  Since the second embodiment has the above-described configuration, even when two or more power converters are connected in parallel, the output voltage command of the power converters connected in parallel is linearly set according to the DC voltage drop signal. Therefore, the sudden change of the output voltage can be reduced, the cross current is not generated between the power converters, and the waveform distortion of the output voltage can be suppressed.

1 is a system configuration diagram illustrating a power conversion system according to Embodiment 1 of the present invention. It is explanatory drawing which shows operation | movement of the power conversion system in Embodiment 1 of this invention. It is a system block diagram which shows the power conversion system in Embodiment 2 of this invention. It is explanatory drawing which shows operation | movement of the power conversion system in Embodiment 1 of this invention. It is a system block diagram which shows the conventional power converter device. It is detail drawing which shows the output voltage command value calculator of the conventional power converter device.

Explanation of symbols

1: DC power supply circuit 2: three-phase inverter circuit 3: load 4: DC voltage detector 5: current command device 6: output frequency command device 7: output voltage command value calculator 71: selection means 72: maximum voltage calculation means 73 : Correction current calculation means 74: multiplier 75: multiplier 76: conversion coefficient generation means 8: PWM pulse generation circuit 91: inductance 92: inductance 10: voltage controller 11: comparator 12: OR circuit 13: output voltage reduction command Circuit 14: Adder 15: Minimum value detection circuit
16: Output voltage reduction command circuit

Claims (2)

  In a power conversion system configured by connecting in parallel at least two power converters having a means for controlling an output voltage based on an output voltage command, a DC voltage detecting means for detecting a DC voltage of each of the power converters A detecting means for detecting that the DC voltage value is lower than a set voltage, and detecting that a DC voltage of any of the power converters connected in parallel is lower than a set voltage. An output voltage reduction command means for giving an output voltage reduction amount to each of the power converters.   In a power conversion system configured by connecting in parallel at least two power converters having a means for controlling an output voltage based on an output voltage command, a DC voltage detecting means for detecting a DC voltage of each of the power converters , Minimum value detecting means for detecting a minimum value of the DC voltage value of each of the power converters connected in parallel, and an output for giving an output voltage reduction amount to each of the power converters according to the minimum value of the DC voltage value A power conversion system comprising a voltage reduction command means.

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