JP3409039B2 - Control device for power converter - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control device for a power conversion device such as a chopper or an inverter whose output voltage is controlled by pulse width modulation control (PWM control).

[0002]

2. Description of the Related Art FIG. 15 is a block diagram showing a PWM inverter as a conventional power conversion device disclosed in, for example, Japanese Patent Publication No. 3-79959. In FIG. 15, 51 is an output side of a three-phase AC power supply 59. Is a power converter such as a PWM inverter which converts the direct current from the rectifier circuit 51 into an alternating current and supplies the alternating current electric motor 57 as a load. For example, a self-extinguishing type such as a transistor or a GTO thyristor. It is configured using a switching element.

Reference numeral 61 is an adder for adding the output of the carrier control circuit 53 and the output of the carrier center frequency setting circuit 60, 54 is a carrier signal generation circuit connected to the output side of the adder 61, and 55 is a carrier signal generation. The output of the circuit 54 and the output of the output voltage pattern generation circuit 56 are compared and P
A comparator 58 which outputs a WM signal, and 58 is a gate circuit which amplifies the PWM signal and supplies it to the PWM inverter 52.

Next, the operation will be described. The rectification bridge 51 converts alternating current from the three-phase alternating current power supply 59 into direct current and supplies the direct current to the power conversion device 52. The carrier control circuit 53 outputs a pattern signal such as a sine wave or a triangular wave that periodically changes the frequency of the carrier signal, and the carrier center frequency setting circuit 60 outputs a constant signal (DC signal) for setting the center frequency of the carrier signal. ) Is output. Subsequently, the pattern signal and the center frequency setting signal are added by the adder 61 and input to the carrier signal generation circuit 54 as a carrier frequency command signal.

The carrier signal generating circuit 54 generates a carrier signal whose frequency is proportional to the amplitude of the carrier frequency command signal. Then, the comparator 55 compares the amplitude of the carrier signal with the amplitude of the control signal output from the output voltage pattern generation circuit 56, and outputs the comparison result as the PWM signal having the pulse width determined by the pulse width modulation control. Output to the gate circuit 58. Next, the gate circuit 58
Controls the power converter 52 by amplifying the PWM signal.

By the above PWM control operation, the power conversion device 52 outputs an AC voltage proportional to the output signal of the output voltage pattern generation circuit 56 and drives the AC motor 57. Here, the carrier control circuit 53 temporally changes the frequency of the carrier signal output from the carrier signal generation circuit 54. Therefore, the frequency of the harmonic component included in the output voltage of the PWM inverter 52 changes with time, and the harmonic of the same frequency is not continuously applied to the AC motor 57. As a result, the AC motor 57
The magnetic sound generated by is distributed in frequency distribution by changing the carrier frequency, that is, the frequency of the PWM signal with time. Therefore, the peak level of the magnetic sound is reduced and the magnetic sound can be reduced.

[0007]

Since the conventional power converter is constructed as described above, if the carrier frequency is changed significantly in order to increase the effect of reducing the magnetic noise, the carrier frequency will be changed to this carrier frequency. The switching loss of the switching element which comprises a power converter increases proportionally. Therefore, there is a problem of heat generation due to switching loss in a region where the carrier frequency is high.

At present, a microcomputer is often used for performing PWM control, but in this case, PWM control is usually performed in synchronization with the carrier frequency. When the carrier frequency is changed with time, the carrier period, that is, the calculation period of the PWM control becomes short in a region where the carrier frequency becomes high, so that the calculation time becomes short.

On the other hand, in the region where the carrier frequency is low, the problem of the calculation time does not occur, but the calculation cycle of the PWM control becomes long, so that the update cycle of the voltage command becomes long. As a result, there has been a problem that the ripple of the primary current supplied to the AC motor increases, which in turn causes an increase in torque ripple and harmonic loss of the AC motor.

The present invention has been made to solve the above-mentioned conventional problems, and is suitable for hardware control, and is a control device for a power conversion device capable of reducing magnetic noise caused by harmonic components. The purpose is to provide.

It is another object of the present invention to provide a control device for a power conversion device, which is suitable for software control and can reduce magnetic noise as in the above-mentioned invention.

Another object of the present invention is to provide a control device for a power conversion device, which is suitable for software control of a three-phase inverter and can reduce magnetic noise like the above-mentioned inventions.

It is another object of the present invention to provide a control device for a power conversion device which can reduce magnetic noise more efficiently than the above-mentioned inventions.

[0014]

A control device for a power converter according to the present invention includes a voltage command signal generating means for outputting a voltage command signal, a carrier signal generating means for outputting a carrier signal, and the voltage command signal. The average value of the output voltage in one cycle of the carrier signal of the switching element for inputting the carrier signal and obtaining the output voltage, and the average value of the on-time of the carrier voltage in the one cycle of the carrier signal match the voltage command signal. And an on-time signal generating means for generating a signal proportional to the on-time, and a timing at which either one of the on-timing and off-timing of the switching element is temporally changed for each plurality of cycles of the carrier signal. Timing signal generating means for generating a signal, and the switch according to the on-time signal and the timing signal It is obtained by including a switching signal generating means for outputting a switching signal for driving the grayed element.

A control device for a power converter according to the present invention comprises voltage command signal generating means for outputting a voltage command signal,
A carrier signal generating means for outputting a carrier signal and the voltage command signal are input, first and second control signals whose amplitude difference is proportional to the voltage command signal are calculated, and the first and second control signals are calculated. Control signal calculating means for temporally changing the amplitude of the carrier signal for every plurality of cycles of the carrier signal without changing the amplitude difference, and the amplitude of the carrier signal and the first control. A switching element that obtains the output voltage in accordance with a difference between a pulse signal obtained from the proportionality of the amplitude of the signal and a pulse signal obtained from the comparison of the amplitude of the carrier signal and the amplitude of the second control signal. And a switching signal generating means for outputting a switching signal.

A control device for a power converter according to the present invention comprises carrier signal generating means for outputting a carrier signal,
For each region formed by connecting three adjacent vertices of the voltage vector determined corresponding to the state of the switching element of each phase, the two zero voltage vectors forming one vertex of the region and the remaining vertices are Voltage vector selection means for preselecting two voltage vectors to be formed and predetermining the order of outputting these voltage vectors within one cycle of the carrier signal, and storing the voltage vectors and the output order thereof, and a voltage command A voltage command signal generating means for outputting a signal in the form of a vector, a region judging means for inputting the voltage command signal and judging a region where the voltage command signal is located for each cycle of the carrier signal, and an output voltage of the inverter. Is determined by the area determination means so that the average value of the carrier signal in one cycle matches the voltage command signal. Operating time determining means for determining the distribution of the operating time of the sum of the two zero voltage vectors selected in the region and the operating time of the other two voltage vectors within one cycle of the carrier signal, and the two zero voltage Operating time changing means for temporally changing the distribution of the operating time of the vector for each plurality of cycles of the carrier signal, and a switching signal for outputting a switching signal for driving the switching element of each phase from the operating time of each voltage vector And a generating means.

A control device for a power converter according to the present invention comprises carrier signal generating means for outputting a carrier signal of a variable frequency whose frequency changes with time.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1. Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of the invention of claim 1. In FIG.
Is a step-down chopper circuit. In this step-down chopper circuit 1, a switching element 3 such as a transistor and a reactor 5 are connected in series between one terminal 8 of the output terminals 7 and 8 and one terminal 9 of the input terminals 9 and 10, and the output terminal 7 is connected. ，
The capacitor 6 is connected between 8 and the switching element 3
And a reactor 5 are connected to a cathode of a diode 4 and an anode of the diode is connected to an input terminal 10. A DC power supply 2 is connected between the input terminals 9 and 10 and the output terminals 7 and 8 are connected. A load such as a motor (not shown) is connected between them. Therefore, when the switching element 3 is turned on and off, the output voltage is supplied to the load.

Reference numeral 11 is a switching signal generating means connected to the switching element 3 and is composed of, for example, a delay circuit. 12 and 13 are switching signal generating means 11
Is a comparator and timing signal generating means, and 14 is a voltage command signal generating means connected to the comparator 12, and has, for example, a ROM 14a storing a V / F pattern, and corresponds to a speed command signal F given from the outside. The voltage command signal V ^* is output. Reference numeral 15 is a carrier signal generating means connected to the comparator 12 and the timing signal generating means 13, and has, for example, a crystal oscillator 15a and a counter 15b for counting the output signal of the crystal oscillator, and the output signal of the counter 15b is directly clocked. And the carrier signal a through the digital / analog (D / A) converter 15c.

The timing signal generating means 13 inputs a clock synchronized with the trailing edge of a carrier signal (sawtooth wave) and counts the number of clocks.
6 and the count number thereof as addresses, the ROM 17 which outputs the timing signal t for changing the on-timing of the switching element 3 within the carrier cycle T by the delay time Td as a pattern signal such as a sine wave, a triangular wave or a random wave. It is configured.

Next, the operation of the first embodiment will be described.
It DC power source 2 inputs DC voltage to step-down chopper circuit 1
Applied between terminals 9 and 10. Carrier signal generating means 1
5 is a carrier signal a (sawtooth wave) of carrier period T
A clock signal synchronized with the falling edge of the carrier signal is output.
Force The voltage command signal generating means 14 outputs the voltage command signal V ^*
Is output.

The comparator 12 corresponds to the on-time signal generating means, and receives the carrier signal a (sawtooth wave) of the carrier period T from the carrier signal generating means 15 and the voltage command signal V ^* from the voltage command signal generating means 14. As shown in FIG. 2, the amplitudes of the two signals are compared, and when the voltage command signal V ^* is larger than the carrier signal a, a high level signal is output. Output to the generating means 11. The on-time signal O is the switching element 3 that constitutes the step-down chopper circuit 1.
A signal proportional to the on time T _on in the carrier period T.

The switching signal generating means 11 receives the on-time signal O and the timing signal t output from the timing signal generating means 13, and the on-time signal O is delayed by the delay time Td by the timing signal t as shown in FIG. The switching signal s for driving the switching element 3 is generated and sent to the switching element 3 without delaying the pulse width determined by the pulse width modulation control. As a result, between the output terminals 7 and 8 of the step-down chopper circuit 1, V _out = T _on / T × V _in (= V ^* ) as an average value for one period T of the carrier signal a. An output voltage that matches the voltage command signal V ^* of (1) is obtained.

Here, since the switching signal generating means 11 temporally changes the on-timing of the on-time signal O output from the comparator 12 by the timing signal t from the timing signal generating means 13, the step-down chopper circuit 1
The harmonic component contained in the output voltage of the above changes temporally even if the carrier frequency is constant, and the harmonics of the same frequency do not continue.

Embodiment 2. FIG. 4 is a diagram showing an embodiment of the invention of claim 2, and the first embodiment shown in FIG.
The same parts as those in FIG.
In FIG. 4, the switching signal generating means 11 comprises an exclusive OR means 21 connected to the switching element 3 and comparators 19 and 20 connected to the exclusive OR means 21. Reference numeral 18 is a microcomputer connected to the comparators 19 and 20 as a control signal calculating means,
A voltage command signal generating means 14 and a carrier signal generating means 15 are connected to the microcomputer 18, and the carrier signal generating means 15 is also connected to comparators 19 and 20.

The voltage command signal generating means 14 is a ROM 14a storing a V / F pattern and an A / D converter 1 for converting an analog signal from the ROM into a digital signal.
4b and. Further, the carrier signal generating means 15 has a crystal oscillator 15a and a counter 15b for counting the output signal of the crystal oscillator, and outputs the output signal of the counter 15b directly as the carrier signal a and the clock signal.

Next, the operation of the second embodiment will be described. In FIG. 4, the DC power supply 2 applies a DC voltage between the input terminals 9 and 10 of the step-down chopper circuit 1. The voltage command generating means 14 outputs a voltage command signal V ^* . The carrier signal generating means 15 outputs a carrier signal a (sawtooth wave) having a carrier period T and a clock signal synchronized with the trailing edge of the carrier signal.

FIG. 5 is a flow chart showing the flow of processing to be performed inside the microcomputer 18. The flow chart shown in FIG. 5 is operated in synchronization with the clock signal output from the carrier signal generating means 15. A control signal required for pulse width modulation control is output.

First, in step ST5-1, the input voltage signal V _in of the step-down chopper circuit 1 and the voltage command signal V ^* are A /
It is taken in through a D converter (not shown). Continuing,
In step ST5-2, the on-time T _on and the off-time T _off of the switching element 3 when the carrier period is T based on the voltage command signal V ^* and the input voltage signal V _in are (2).
Calculate by formula. T _on = V _in / V ^* T _off = T−T _on ... (2)

Next, in step ST5-3, the carrier signal is received.
Carrier signal a output from the signal generation means 15 (saw
Clock signal synchronized with the falling edge of
To do. Then, in step ST5-4, the clock signal
A table prepared in advance using the count number as an address
The coefficient b corresponding to the timing signal is read from the module. This
When, the coefficient b stored in the table is sine wave, triangle
It is a pattern signal such as wave or random. Step
In ST5-5, the on time T_onAnd off time T _offAnd
And the coefficient b, the first and second control are performed as shown in equation (3).
The signals S1 and S2 are calculated. The control signals S1 and S2
Is the voltage value corresponding to time (the slope of the sawtooth wave is a proportional constant
It is).       S1 = b × T_off       S2 = S1 + T_on                    ・ ・ ・ ・ ・ ・ (3)

However, the coefficient b in the above equation is limited to (0≤b≤1) so that the amplitudes of the first and second control signals do not exceed the amplitude of the carrier signal. In step ST5-6, the first and second control signals S
1 and S2 are output from the microcomputer 18 to the switching signal generating means 11.

Next, the operation of the switching signal generating means 11 will be described with reference to FIG. First, the first and second control signals S1 and S2 and the carrier signal a are input to the switching signal generating means 11, and the comparator 19,
At 20, the amplitudes of the first and second control signals S1 and S2 and the carrier signal a are compared, and when the control signal is larger than the carrier signal, the High level is set, and when it is smaller, the Low level is set.
The binary signals P1 and P2 of the level are output, and the binary signal P
The exclusive OR of the P1 and P2 is taken by the exclusive OR means 21, and the switching signal Psw for driving the switching element 3 is created and sent to the switching element 3. As a result, between the output terminals 7 and 8 of the step-down chopper circuit 1 as an average value for one period T of the carrier signal a,
From the equation (1), an output voltage that matches the voltage command signal V ^* can be obtained.

Since the switching signal generating means 11 temporally changes the on-timing of the switching element 3 by temporally changing the value of the coefficient b, the harmonics contained in the output voltage of the step-down chopper circuit 1 are changed. The component changes with time even if the carrier frequency is constant, and harmonics of the same frequency do not continue.

Embodiment 3. FIG. 7 is a diagram showing an embodiment of the invention of claim 3, and in FIG. 7, 46 is a three-phase inverter circuit, and this inverter circuit 46 has a capacitor 23 between a positive electrode and a negative electrode of a DC power supply 22. And a pair of switching elements 24 connected in series.
25, 27, 28, 30, 31 are connected in parallel with the capacitor 23, and each pair of switching elements 24, 2
The connection points of 5, 27, 28, 30 and 31 are output terminals 26,
29 and 32.

33 is the switching element 24, 25,
A switching signal generating means connected to 27, 28, 30 and 31 is used as a switching signal generating means and a polarity reversal output section Pu for reversing the polarity and outputting the direct output sections Pu, Pv, Pw for directly outputting the phase inputs Pu, Pv, Pw. This is a configuration having ', Pv', and Pw '.

34 to 36 are switching signal generating means 3
3, exclusive OR means for supplying phase inputs Pu, Pv, Pw to 3, 3/38, 39/40, 41/42 are comparators connected to exclusive OR means 34, 35, 36, and 43 is a comparison Microcomputer connected to the devices 37 to 42, 44
Is a voltage command signal generating means connected to the microcomputer 43, and has an A / D converter 44a for converting the speed command signal F given from the outside into a digital signal, and the speed command signal F having a frequency proportional to its amplitude. A V / F converter 44b for converting to a pulse train, a ROM 44c storing a V / F pattern for outputting a modulation factor k corresponding to the signal from the A / D converter 44a, and the V
And a counter 44d that counts the output of the / F converter 44b and outputs the phase Q.

Reference numeral 45 denotes carrier signal generating means connected to the comparators 37 to 42 and the microcomputer 43. The carrier signal generating means 45 is a crystal oscillator 45a.
And a counter 45b for counting the output signal of the crystal oscillator. The output signal of the counter 45b is directly output as the carrier signal a and the clock signal.

Before explaining the operation of the third embodiment,
First, the voltage vector that can be output from the inverter circuit 46 will be described. As shown in FIG. 7, in the inverter circuit 46, the voltages Vu, Vv, and Vw of the respective phases (U, V, and W) output from the output terminals 26, 29, and 32 have two values of positive and 0, respectively. 8 (= 2)
A voltage vector of × 2 × 2) can be output. Here, for example, a voltage vector at which Vu = E, Vv = 0, and Vw = 0 is expressed as (100). From the above, FIG. 8 is obtained when the voltage vector that can be output by the inverter circuit 46 is illustrated. In FIG. 8, each vertex of the regular hexagon is a voltage vector (001) to (101) that can be output. Here, since the line voltage of the two vectors (000) and (111) is zero, it is called a zero voltage vector.

Next, pulse width modulation by the spatial voltage vector will be described. First, as shown in FIG. 9, the voltage command vector v ^* is converted into two voltage vectors V4 [= (10
0)] and V6 [= (110)] and two zero voltage vectors {V0 [= (100)] and V7 [= (11
1)]} inside an equilateral triangle with its vertices as described below, these two voltage vectors and 2
The output voltage is controlled by selecting one zero voltage vector.

First, the voltage command vector v ^* has an amplitude of k.
Assuming that it rotates clockwise at a frequency of ω, output is performed using the length of the arc locus drawn by the tip of the voltage command vector v ^* in a certain predetermined period T and the above two voltage vectors and two zero voltage vectors. Since the length of the trajectory drawn by the generated combined vector becomes equal, the equation (4) is obtained. 1 / √3 · t4 + 1 / √3 · e (jπ / 3) · t6 = k · e (jθ) · T (4) However, in the equation θ = ωt (4), t4 and t6 are The duration of the voltage vectors V4 and V6, respectively. Further, for convenience, in FIG. 9, the length from the origin to V4 (or V6) is set to 1 / √3.

Next, these two voltage vectors V4 and V
Since the sum of the durations of the six and two zero voltage vectors V0 and V7 is equal to the predetermined period T, the equation (5) is obtained. t4 + t6 + t0 + t7 = T (5)

In the equation (5), t0 and t7 are the durations of the zero voltage vectors (V0 and V7).
From equations (4) and (5), the duration of these two voltage vectors V4 and V6 and the two zero voltage vectors V0 and V7 is calculated to obtain equation (6). t4 = T · k · sin (π / 3−θ) t6 = T · k · sin θ t0 + t7 = T {1-k · sin (π / 3 + θ)} (6)

Here, the phase θ of the voltage command vector v ^*
The pulse width modulation method in the case where is in the range of 0 to π / 3 has been described. However, if the two voltage vectors selected are changed each time the phase θ changes by π / 3, the phase θ becomes π /.
The same control can be performed even in the range of 3 to 2π. By the above method, it is possible to obtain a three-phase AC output voltage whose pulse width is modulated according to the voltage command vector. here,
It is obvious that the amplitude and frequency of the output voltage can be controlled according to the amplitude k and the frequency ω of the voltage command vector v ^* , respectively.

Next, the selection order of the two voltage vectors and the two zero voltage vectors will be described with reference to FIG. First, two voltage vectors and two zero voltage vectors are selected along the arrows shown in FIG. For example, the phase θ of the voltage command vector v ^* is 0 to π /
In the range of 3, V0 → V4 during the predetermined period T.
Two voltage vectors (V4 and V6) and two zero voltage vectors (V0
And V7).

When the phase θ of the voltage command vector v ^* increases and shifts to the range of π / 3 to 2π / 3, the predetermined period T
During this period, two voltage vectors (V2 and V6) and two zero voltage vectors (V0 and V7) are selected in the order of V0 → V2 → V6 → V7 → V6 → V2 → V0. When two voltage vectors and two zero voltage vectors are selected in such a selection order, the phase θ of the voltage command vector v ^* is π.
Even if it changes at / 3 as a boundary, only the voltage vectors V4 and V2 are exchanged, and the remaining voltage vector and the two zero voltage vectors do not change. Moreover, as can be seen from FIG. 10, the duration of the voltage vectors V4 and V2 is almost zero in the vicinity of the phase θ = π / 3 of the voltage command vector v ^* .

Next, the operation of the third embodiment will be described with reference to FIG. The voltage command signal generating means 44 outputs the voltage command signal V ^* in the form of a vector of the modulation factor k and the phase θ. FIG. 11 is a flow chart showing the flow of processing performed inside the microcomputer 43. The calculation of the flow chart shown in FIG. 11 is performed in synchronization with the clock signal output from the carrier signal generating means 45, and pulse width modulation is performed. A control signal necessary for control is output.

First, in step ST11-1, the microcomputer 43 inputs the voltage command vector of the modulation factor k and the phase θ from the voltage command signal generating means 44, and inputs the clock from the carrier signal generating means 45. Subsequently, in step ST11-2, the voltage command vector v ^*
Is divided by 60 degrees, and the quotient is used to determine in which π / 3 section the output voltage command vector v ^* exists. If the quotient is a section signal, the section signal takes six values (for example, values from 0 to 5) according to the phase θ, and corresponds to sections (a) to (f) in FIG. 10, respectively.

Next, in step ST11-3, 2
Equation (7) is calculated as the duration of one voltage vector and two zero voltage vectors. The phase used at this time is
It is reset each time the section signal changes, so 0-π /
Takes the value of 3. ta = T {1-k · sin (π / 3 + θ)} tb = T · k · sin (π / 3−θ) tc = T · k · sin θ (7)

Next, in step ST11-4, a clock signal having a frequency double that synchronized with the trailing edge of the carrier signal output from the carrier signal generating means 45 is counted. In step ST11-5, the coefficient b is read from a table prepared in advance using the count number of the clock signal as an address. At this time, the coefficient b stored in the table is a sine wave, a triangular wave, a random value, or the like.

Next, in step ST11-6, U,
Control signals Sa and Sa ', Sb and Sb', S of V and W phases
Sections (a) to (c) of FIG.
It is created in accordance with the calculation order of the control signals shown in FIG. 12 according to (f). And the last step ST11-7
Outputs 6 control signals.

Further, FIG. 13 shows the case where the coefficient b = 0.5, and as shown in FIG.
The six control signals Sa, Sa ′, Sb output from
And Sb ', Sc and Sc', and the carrier signal 2a of the period 2T output from the carrier signal generating means 45 are compared by the comparators 37 to 42, and when the control signal is larger than the carrier signal, the high level is set. , When it is small, Lo
w level binary signals Pa and Pa ', Pb and Pb', Pc
And Pc 'are output.

Further, the binary signals Pa, Pa ', Pb
And Pb ', and Pc and Pc' are obtained by exclusive OR means 34 to 36 to obtain binary signals Pu, Pv and Pw of U, V and W phases, respectively, and switching signal generating means 33.
Output to.

Here, as can be seen from FIG.
The selection order and duration of the voltage vector to be selected are determined by the two binary signals Pu, Pv, Pw. In other words, the level of the binary signal changes once from 0 to 1 during a predetermined period T corresponding to a half cycle of the carrier signal 2a, so that each time one of these signals changes,
The selected voltage vector is changed. The duration of the selected voltage vector is the time from when one of the two adjacent binary signals changes from 0 to 1 until the other signal changes from 0 to 1.

Conventionally, the coefficient b is fixed at 0.5, but in the third embodiment, the coefficient b is changed with time. Then, as can be seen from the timing diagram of the phase voltage and the line voltage shown in FIG. 14, when the coefficient b is changed,
Three binary signals Pu, Pv, Pw (corresponding to phase voltage)
Although the on-time of 1 changes, the on-time of the difference between the two binary signals (corresponding to the line voltage) does not change and its position changes.

Next, the above three binary signals Pu, Pv, P
When w is input to the switching signal generating means 33, the switching signal generating means 33 drives the inverter circuit 46.
Inside switching elements 24, 25, 27, 28, 30,
31 is an on / off signal Pu / Pu ', Pv / Pv', P
w · Pw ′ is output. Here, since it is clear which switching element is turned on / off according to the voltage vector, the switching signal generating means 33 can be easily configured by using a logic circuit. Therefore, the detailed circuit configuration and operation of the switching signal generating means 33 will be omitted.

Next, the switching elements 24, 25, 27, 28, 30, 31 are switched in response to these on / off signals, and the three-phase pulse-width modulated in accordance with the voltage command vector v ^* . AC voltage output terminals 26, 2
It is output from 9,32.

Fourth Embodiment In each of the above embodiments, the frequency of the carrier signal is not changed, but a variable frequency carrier signal whose frequency changes with time is used within a range where problems such as heat generation and calculation time do not occur. As a result, it is possible to more effectively reduce the generation of magnetic noise.

Further, in each of the above-described embodiments, either the on timing or the off timing of the switching element during one cycle of the carrier signal is temporally changed. However, the on / off timing of the switching element is changed. Does not change, a delay circuit, for example, is provided in the system that supplies the output of the switching element to the load, and the delay time of this delay circuit is changed to
Even if the power supply timing to the load is changed between cycles, the same effect as in the above-described respective embodiments can be obtained.

[0059]

As described above, according to the present invention, a signal proportional to the on-time within the period of the carrier signal of the switching element and either the on-timing or the off-timing of the switching element are used as the carrier. The switching signal generating means outputs the switching signal for driving the switching element in accordance with the timing signal which is temporally changed for every plural cycles of the signal, so that it is suitable for hardware control and is caused by the harmonic component. There is an effect that it is possible to easily realize the reduction of the generation of the magnetic sound.

According to the present invention, the magnitude relation between the amplitudes of the carrier signal and the first and second control signals that have been temporally changed for each plurality of cycles of the carrier signal within a range that does not exceed the amplitude of the carrier signal. According to the above, since the switching signal is output from the switching signal generating means, it is suitable for software control, and it is possible to reduce the generation of the magnetic sound due to the harmonic component.

According to the present invention, the switching signal generating means outputs the switching signal for driving the switching element of each phase from the operating time of each voltage vector, so that it is suitable for the software control of the three-phase inverter. The effect of reducing the generation of magnetic sound due to harmonic components is obtained.

According to the present invention, since the variable frequency carrier signal whose frequency changes with time is used, the generation timing of the output voltage during one cycle of the carrier signal is changed with time. Therefore, there is an effect such that the generation of the magnetic sound due to the harmonic component can be more effectively reduced.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing a control device of a power conversion device according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram showing operation waveforms of the comparator in the first embodiment of the present invention.

FIG. 3 is an explanatory diagram showing operation waveforms of the switching signal generating means according to the first embodiment of the present invention.

FIG. 4 is a configuration diagram showing a control device of a power conversion device according to a second embodiment of the present invention.

FIG. 5 is a flowchart showing the arithmetic processing contents of the microcomputer in the second embodiment of the present invention.

FIG. 6 is an explanatory diagram showing operation waveforms of the switching signal generating means according to the second embodiment of the present invention.

FIG. 7 is a configuration diagram showing a control device of a power conversion device according to a third embodiment of the present invention.

FIG. 8 is an explanatory diagram of voltage vectors that can be output by the inverter according to the third embodiment of the present invention.

FIG. 9 is an explanatory diagram of pulse width modulation using a spatial voltage vector according to the third embodiment of the present invention.

FIG. 10 is an explanatory diagram of a voltage vector selection order according to the third embodiment of the present invention.

FIG. 11 is a flowchart showing the contents of arithmetic processing of the microcomputer in the third embodiment of the present invention.

FIG. 12 is a diagram for explaining a calculation order of control signals in the third embodiment of the present invention.

FIG. 13 is an explanatory diagram showing a method of creating a signal to be input to the switching signal generation circuit according to the third embodiment of the present invention.

FIG. 14 is an explanatory diagram showing a switching signal when the on timing of the on signal is changed in the third embodiment of the present invention.

FIG. 15 is a configuration diagram showing a control device of a conventional power conversion device.

[Explanation of symbols]

3 switching elements, 11 switching signal generating means, 12 comparators (on-time signal generating means), 13 timing signal generating means, 14 voltage command signal generating means,
15 carrier signal generating means, 18 microcomputer (control signal calculating means), 33 switching signal generating means, 43 microcomputer (voltage vector selecting means, area determining means, operating time determining means, operating time changing means), 44 voltage command signal Generating means, 45 Carrier signal generating means, 46 Inverter circuit.

─────────────────────────────────────────────────── --- Continuation of the front page (56) References JP-A-4-121065 (JP, A) JP-A-4-46568 (JP, A) JP-A-3-218265 (JP, A) JP-A-3- 60376 (JP, A) JP-A-5-292754 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H02M 3/155 H02M 7/48

Claims (4)

(57) [Claims] 1. A power converter that controls an output voltage by pulse width modulation control, wherein a voltage command signal generating means for outputting a voltage command signal, a carrier signal generating means for outputting a carrier signal, the voltage command signal and the A carrier signal is input to the switching element for obtaining the output voltage, and an average value of the output voltage in one cycle of the carrier signal and an average value of the output voltage in the one cycle of the carrier signal match the voltage command signal. And a timing signal for temporally changing one of the on-timing and the off-timing of the switching element for each plurality of periods of the carrier signal, the on-time signal generating means generating a signal proportional to the on-time. And a timing signal generating means for generating the ON-time signal and the timing signal according to the timing signal. A control device for a power conversion device, comprising: a switching signal generating means for outputting a switching signal for driving an switching element. 2. A power converter for controlling an output voltage by pulse width modulation control, wherein a voltage command signal generating means for outputting a voltage command signal, a carrier signal generating means for outputting a carrier signal, and the voltage command signal are inputted. Then, the first and second control signals whose amplitude difference is proportional to the voltage command signal are calculated, and the amplitudes of the first and second control signals exceed the amplitude of the carrier signal without changing the amplitude difference. A control signal calculating means for temporally changing the carrier signal every plural cycles in a non-existence range, a pulse signal obtained from the proportionality of the amplitude of the carrier signal and the amplitude of the first control signal, and the amplitude of the carrier signal And a switch that outputs a switching signal that drives a switching element that obtains the output voltage in accordance with the difference between the pulse signal obtained by comparing the amplitudes of the And a switching signal generating means. 3. A first and a second switching element are connected in series between a positive electrode and a negative electrode of a DC power source, and
In a power conversion device provided with three phases of inverters having an output terminal of the inverter at a connection point of the first and second switching elements, a carrier signal generating means for outputting a carrier signal and a state of the switching element of each phase are set. For each region formed by connecting three adjacent vertices of a correspondingly determined voltage vector, two zero voltage vectors forming one vertex of the region and two voltage vectors forming each of the remaining vertices are set. A voltage vector selecting means for preselecting and predetermining the order of outputting these voltage vectors within one cycle of the carrier signal, and storing the voltage vectors and the output order thereof, and outputting the voltage command signal in the form of a vector The voltage command signal generating means and the voltage command signal are input, and the voltage command signal is input at every cycle of the carrier signal. A region determining means for determining the area that,
The two selected in the region determined by the region determination means so that the average value of the output voltage of the inverter during one cycle of the carrier signal matches the voltage command signal.
An operating time determining means for determining an operating time of the sum of one zero voltage vector and an operating time of the other two voltage vectors in one cycle of the carrier signal; and an operating time allocation of the two zero voltage vectors. An operating time changing means for temporally changing the carrier signal in each of a plurality of cycles, and a switching signal generating means for outputting a switching signal for driving the switching element of each phase from the operating time of each voltage vector are provided. A control device for a power converter. 4. The power conversion according to claim 1, further comprising carrier signal generation means for outputting a carrier signal having a variable frequency whose frequency changes with time. Control device of the device.