JP2019180190A - Snubber circuit and power conversion system - Google Patents

Abstract

To suppress degradation in efficiency while reducing the number of components.SOLUTION: A snubber circuit 2 is a snubber circuit for inverter circuit 1, having arms Q1, Q3 of a high side and arms Q2, Q4 of a low side. The snubber circuit 2 includes a first clamp circuit 21, a second clamp circuit 22 and a regeneration circuit 23. The first clamp circuit 21 clamps end-to-end voltages of the arms Q1, Q3 of the high side. The second clamp circuit 22 clamps end-to-end voltages of the arms Q2, Q4 of the low side. The regeneration circuit 23 regenerates electrical energy, which at least either one of the first clamp circuit 21 and the second clamp circuit 22 absorbs from the inverter circuit 1, into the inverter circuit 1.SELECTED DRAWING: Figure 1

Description

  The present disclosure relates generally to a snubber circuit and a power conversion system, and more particularly to a snubber circuit and a power conversion system for suppressing a surge voltage generated in an inverter circuit.

  Conventionally, a power converter provided with a snubber circuit is known (see, for example, Patent Document 1). In the power converter described in Patent Document 1, a commercial three-phase input is converted into direct current by a converter, and the direct current is smoothed by a capacitor and supplied to an inverter. In the inverter, a plurality of arms each composed of a plurality of power devices and a plurality of flywheel diodes connected in antiparallel to the plurality of power devices are bridge-connected. A snubber circuit formed of a snubber diode, a snubber capacitor, and a snubber resistor is connected in parallel to each of the plurality of power devices.

JP-A-2005-73445

  In the power conversion device (power conversion system) described in Patent Document 1, a snubber circuit is required for each power device, and there is a problem that the number of parts increases. Moreover, in the power converter device of patent document 1, the surge energy which generate | occur | produces with a power device is consumed by resistance, and there existed a problem that efficiency fell.

  An object of the present disclosure is to provide a snubber circuit and a power conversion system that can suppress a decrease in efficiency while reducing the number of components.

  The snubber circuit which concerns on 1 aspect of this indication is a snubber circuit for inverter circuits which has a high side arm and a low side arm. The high side arm is electrically connected between an output terminal and a high potential side input terminal. The low side arm is electrically connected between the output terminal and a low potential side input terminal. The snubber circuit includes a first clamp circuit, a second clamp circuit, and one regenerative circuit. The first clamp circuit clamps the voltage across the high-side arm. The second clamp circuit clamps a voltage across the low side arm. The regenerative circuit is electrically connected to both the first clamp circuit and the second clamp circuit. The regenerative circuit performs a regenerative operation for causing the inverter circuit to regenerate electrical energy absorbed from the inverter circuit by at least one of the first clamp circuit and the second clamp circuit.

  The power conversion system which concerns on 1 aspect of this indication is provided with the above-mentioned snubber circuit and the said inverter circuit.

  According to the present disclosure, there is an effect that reduction in efficiency can be suppressed while reducing the number of parts.

FIG. 1 is a circuit diagram of a snubber circuit and a power conversion system according to an embodiment of the present disclosure. FIG. 2A is an explanatory diagram for explaining the operation when the switching element is on in the snubber circuit. FIG. 2B is an explanatory diagram for explaining the operation when the switching element is off in the snubber circuit of the above. FIG. 3 is a timing chart for explaining the operation of the snubber circuit. FIG. 4A is a circuit diagram of a snubber circuit and a power conversion system according to Modification 1 of the embodiment of the present disclosure. FIG. 4B is a circuit diagram of a snubber circuit and a power conversion system according to Modification 2 of the embodiment of the present disclosure.

(1) Overview First, an overview of a snubber circuit and a power conversion system according to the present embodiment will be described with reference to FIG.

  The power conversion system 10 includes a main circuit including an inverter circuit 1, a transformer 3 and a rectifier circuit 4, and a snubber circuit 2. The main circuit is a power conversion circuit that performs power conversion. The snubber circuit 2 is a protection circuit for suppressing a surge voltage generated in the main circuit. When power is converted in the main circuit, a surge voltage may be generated due to the operation of the inverter circuit 1. The power conversion system 10 according to the present embodiment can suppress such a surge voltage by the snubber circuit 2.

  As an example, the power conversion system 10 is used for power conversion between a storage battery 7 and a DC load 8 as illustrated in FIG. 1. In the example of FIG. 1, the power conversion system 10 includes a pair of input external terminals T11, T12 to which the storage battery 7 is electrically connected, and a pair of output external terminals T21, to which the DC load 8 is electrically connected. T22. The power conversion system 10 converts DC power input from the storage battery 7 into AC power, further converts AC power into DC power, and supplies it to the DC load 8. That is, the power conversion system 10 according to the present embodiment is configured to perform power conversion in a single direction. In the present embodiment, as an example, a case where such a power conversion system 10 is introduced into a non-residential facility such as an office building, a hospital, a commercial facility, or a school will be described.

(2) Details Next, details of the snubber circuit and the power conversion system according to the present embodiment will be described with reference to FIG.

  The power conversion system 10 includes a pair of input external terminals T11 and T12, a pair of output external terminals T21 and T22, an inverter circuit 1, a snubber circuit 2, a transformer 3, a rectifier circuit 4, and a first control. A circuit 5 and a second control circuit 6 are provided.

(2.1) Terminal In the example of FIG. 1, the storage battery 7 is electrically connected between the pair of input external terminals T11 and T12 so that the input external terminal T11 is on the high potential (positive electrode) side. Yes. A DC load 8 is electrically connected between the pair of output external terminals T21 and T22. However, the “terminal” here may not be a component for connecting an electric wire or the like, and may be, for example, a lead of an electronic component, a part of a conductor included in a circuit board, or the like. The same applies to input terminals P11 and P12 and output terminals P21 and P22 described below.

  A capacitor C11 is electrically connected between the pair of input external terminals T11 and T12. In other words, the capacitor C11 is electrically connected in parallel between the pair of input external terminals T11 and T12.

(2.2) Inverter circuit As shown in FIG. 1, the inverter circuit 1 includes first to fourth switching elements Q1 to Q4. The inverter circuit 1 constitutes an insulated DC / AC inverter that performs conversion from a DC voltage to an AC voltage between the capacitor C11 and the transformer 3. In the present embodiment, as an example, each of the first to fourth switching elements Q1 to Q4 is a depletion type n-channel MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor).

  The first to fourth switching elements Q1 to Q4 are connected by a full bridge. The first switching element Q1 is electrically connected in series with the second switching element Q2 between both ends of the capacitor C11. The third switching element Q3 is electrically connected in series with the fourth switching element Q4 between both ends of the capacitor C11. In other words, a series circuit of the first switching element Q1 and the second switching element Q2 and a series circuit of the third switching element Q3 and the fourth switching element Q4 are electrically connected in parallel between both ends of the capacitor C11. Has been. Specifically, the drain of the first switching element Q1 and the drain of the third switching element Q3 are both electrically connected to the input terminal P11 on the high potential side. The source of the second switching element Q2 and the source of the fourth switching element Q4 are both electrically connected to the input terminal P12 on the low potential side.

  In the present embodiment, the first leg 11 is constituted by the first switching element Q1 and the second switching element Q2, and the second leg 12 is constituted by the third switching element Q3 and the fourth switching element Q4. In the present embodiment, the first switching element Q1 and the third switching element Q3 are high-side arms, and the second switching element Q2 and the fourth switching element Q4 are low-side arms.

  As shown in FIG. 1, the high-side arm is electrically connected between the output terminals P21 and P22 and the high-potential side input terminal P11. The low-side arm is electrically connected between the output terminals P21 and P22 and the low-potential side input terminal P12. The output terminal P21 is an electrical connection point between the source of the first switching element Q1 and the drain of the second switching element Q2. The output terminal P22 is an electrical connection point between the source of the third switching element Q3 and the drain of the fourth switching element Q4. The high potential side input terminal P11 is an electrical connection point between the input external terminal T11 and the capacitor C11, and the low potential side input terminal P12 is an electrical connection point between the input external terminal T12 and the capacitor C11. is there.

(2.3) Transformer The transformer 3 is a high-frequency insulating transformer having a primary winding 31 and a secondary winding 32 that are magnetically coupled to each other. The primary winding 31 is electrically connected between the output terminals P21 and P22. The secondary winding 32 is electrically connected to the rectifier circuit 4. The middle point of the secondary winding 32 is electrically connected to the output external terminal T22. In the present embodiment, as an example, the turns ratio of the primary winding 31 and the secondary winding 32 is 1: 1.

(2.4) Rectifier circuit The rectifier circuit 4 includes first to fourth diodes D41 to D44. The anodes of the first diode D41 and the second diode D42 are electrically connected to the first end of the secondary winding 32 of the transformer 3. The anodes of the third diode D43 and the fourth diode D44 are electrically connected to the second end of the secondary winding 32. The cathodes of the first to fourth diodes D41 to D44 are electrically connected to each other, and are electrically connected to the output external terminal T21 via the inductor L1. The rectifier circuit 4 converts (rectifies) the AC power from the inverter circuit 1 received via the transformer 3 into DC power, and supplies this DC power to the DC load 7.

(2.5) Control Circuit The first control circuit 5 outputs control signals S1 to S4 for controlling the first to fourth switching elements Q1 to Q4 of the inverter circuit 1. The control signals S1 to S4 are applied to the gates of the first to fourth switching elements Q1 to Q4 directly or via a drive circuit, and the first to fourth switching elements Q1 to Q4 are individually turned on / off. To do. The first control circuit 5 controls the first to fourth switching elements Q1 to Q4 by a PWM (Pulse Width Modulation) method capable of adjusting the duty ratio.

  The second control circuit 6 outputs a control signal S5 for controlling a switching element Q11 of the regenerative circuit 23 described later. The control signal S5 is applied to the gate of the switching element Q11 directly or via a drive circuit, and individually turns on / off the switching element Q11. The second control circuit 6 controls the switching element Q11 by, for example, the PWM method.

  The first control circuit 5 and the second control circuit 6 are configured by, for example, a microcomputer having a processor and a memory, a field-programmable gate array (FPGA), or an application specific integrated circuit (ASIC).

  The drive frequency of the first to fourth switching elements Q1 to Q4 is, for example, 20 kHz. The driving frequency of the switching element Q11 is, for example, 40 kHz to 100 kHz. That is, the drive frequency of the switching element Q11 only needs to be twice or more the drive frequency of the first to fourth switching elements Q1 to Q4, and the inverter circuit 1 and the regeneration circuit 23 may be synchronized or synchronized. It does not have to be.

(2.6) Snubber Circuit The snubber circuit 2 is a protection circuit for suppressing a surge voltage generated between both ends of the first to fourth switching elements Q1 to Q4 when the inverter circuit 1 operates. As shown in FIG. 1, the snubber circuit 2 includes a first clamp circuit 21, a second clamp circuit 22, and one regenerative circuit 23. The first clamp circuit 21 corresponds to the high-side arm of the inverter circuit 1 and clamps the voltage across the high-side arm. The second clamp circuit 22 corresponds to the low-side arm and clamps the voltage across the low-side arm. The regenerative circuit 23 is electrically connected to both the first clamp circuit 21 and the second clamp circuit 22. The regenerative circuit 23 performs a regenerative operation in which the electric energy absorbed from the inverter circuit 1 by at least one of the first clamp circuit 21 and the second clamp circuit 22 is regenerated to the inverter circuit 1.

  The first clamp circuit 21 is a circuit for charging (accumulating) electric energy in a high-side capacitor C1 described later when the magnitude of the voltage across the high-side arm is lower than the first clamp value. For example, when the voltage V1 across the first switching element Q1 (see FIG. 2A) is lower than the first clamp value Vc1 (see FIG. 2A), the first clamp circuit 21 charges the high-side capacitor C1 with electrical energy. . Thus, the first clamp circuit 21 clamps the voltage V1 across the first switching element Q1 to the first clamp value Vc1. That is, when the voltage V1 across the first switching element Q1 is lower than the first clamp value Vc1, the first clamp circuit 21 charges the high-side capacitor C1 with electrical energy that is lower than the first clamp value Vc1. . As a result, the lower limit value of the voltage V1 across the first switching element Q1 is clamped to the first clamp value Vc1.

  The first clamp circuit 21 includes a high-side capacitor C1 (hereinafter also referred to as “capacitor C1”) and two diodes D1 and D2. The first end of the capacitor C1 is electrically connected to the anodes of the diodes D1 and D2, and the second end of the capacitor C1 is electrically connected to the drains of the first and third switching elements Q1 and Q3. The cathode of the diode D1 is electrically connected to the connection point of the first switching element Q1 and the second switching element Q2. The cathode of the diode D2 is electrically connected to the connection point of the third switching element Q3 and the fourth switching element Q4. These diodes D1 and D2 form a high-side charging path A1 (see FIG. 2A) for charging the capacitor C1 with electric energy. That is, the first clamp circuit 21 includes a high-side capacitor C1 and a high-side charging path A1 that charges the high-side capacitor C1 with the electric energy of the inverter circuit 1.

  The second clamp circuit 22 is a circuit for charging (accumulating) electric energy in a low-side capacitor C2 described later when the magnitude of the voltage across the low-side arm exceeds the second clamp value. For example, when the voltage V2 across the second switching element Q2 (see FIG. 2A) exceeds the second clamp value Vc2 (see FIG. 2A), the second clamp circuit 22 charges the low-side capacitor C2 with electric energy. Thereby, the second clamp circuit 22 clamps the voltage V2 across the second switching element Q2 to the second clamp value Vc2. That is, when the voltage V2 across the second switching element Q2 exceeds the second clamp value Vc2, the second clamp circuit 22 charges the low-side capacitor C2 with electrical energy that exceeds the second clamp value Vc2. As a result, the upper limit value of the voltage V2 across the second switching element Q2 is clamped to the second clamp value Vc2.

  The second clamp circuit 22 includes a low-side capacitor C2 (hereinafter also referred to as “capacitor C2”) and two diodes D3 and D4. The first end of the capacitor C2 is electrically connected to the cathodes of the diodes D3 and D4, and the second end of the capacitor C2 is electrically connected to the sources of the second and fourth switching elements Q2 and Q4. The anode of the diode D3 is electrically connected to the connection point of the first switching element Q1 and the second switching element Q2. The anode of the diode D4 is electrically connected to the connection point of the third switching element Q3 and the fourth switching element Q4. These diodes D3 and D4 form a low-side charging path A2 (see FIG. 2A) for charging the capacitor C2 with electric energy. In other words, the second clamp circuit 22 includes a low-side capacitor C2 and a low-side charging path A2 that charges the low-side capacitor C2 with the electric energy of the inverter circuit 1.

  The regenerative circuit 23 is, for example, a flyback type insulation type DC / DC converter. Regenerative circuit 23 includes a switching element Q11, a diode D5, and a transformer 6. The transformer 6 has a primary winding 61 and a secondary winding 62 that are magnetically coupled to each other. The source of the switching element Q11 is electrically connected to the first end of the capacitor C1, and the drain of the switching element Q11 is electrically connected to the first end of the primary winding 61 of the transformer 6. The second end of the primary winding 61 is electrically connected to the first end of the capacitor C2. The first end of the secondary winding 62 is electrically connected to the anode of the diode D5, and the cathode of the diode D5 is electrically connected to the first end of the capacitor C11 (high-potential side input terminal P11). Electrically connected to the end). The second end of the secondary winding 62 is electrically connected to the second end of the capacitor C11 (an end portion electrically connected to the low potential side input terminal P12).

  Here, it is assumed that the on-duty of the switching element Q11 is D, the input voltage is Vin, the surge voltage generated in the first switching element Q1 is Vs1, and the surge voltage generated in the second switching element Q2 is Vs2. Further, it is assumed that the number of turns of the primary winding 61 of the transformer 6 is N1, and the number of turns of the secondary winding 62 is N2. In this case, equation (1) holds.

  From the equation (1), the on-duty of the switching element Q11 is obtained as in the equation (2).

  From formula (2), when the first clamp value Vc1 (= Vs1) and the second clamp value Vc2 (= Vs2) are reduced, the on-duty D of the switching element Q11 may be increased. Further, when increasing the first clamp value Vc1 and the second clamp value Vc2, the on-duty D may be decreased.

(3) Operation (3.1) Operation of Inverter Circuit First, the operation of the inverter circuit 1 will be described. Here, it is assumed that the voltage between the pair of input external terminals T11 and T12 is “+ E”.

  The first control circuit 5 includes the first to fourth switching elements Q1 such that the combination of the first and fourth switching elements Q1 and Q4 and the combination of the second and third switching elements Q2 and Q3 are alternately turned on. Controls ~ Q4. In the present embodiment, as described above, the driving frequency at which the first to fourth switching elements Q1 to Q4 are turned on / off is 20 kHz. Here, the duty ratio of the first and fourth switching elements Q1, Q4 (or the second and third switching elements Q2, Q3) is 50%. Thus, when the first and fourth switching elements Q1 and Q4 are on, the magnitude of the voltage across the primary winding 31 of the transformer 3 becomes “−E”. When the second and third switching elements Q2 and Q3 are on, the voltage across the primary winding 31 of the transformer 3 is “+ E”. Therefore, the magnitude of the voltage across the secondary winding 32 alternates between “+ E” and “−E”.

  When the voltage across the secondary winding 32 is “+ E”, the voltage is rectified from an AC voltage to a DC voltage by the first and second diodes D41 and D5 of the rectifier circuit 4. When the voltage across the secondary winding 32 is “−E”, the voltage is rectified from an AC voltage to a DC voltage by the third and fourth diodes D43 and D44 of the rectifier circuit 4.

  By repeating the operation as described above, the inverter circuit 1 converts the DC power from the storage battery 7 into AC power, and further converts it into DC power by the rectifier circuit 4 so that a pair of output external terminals T21, T22. To the DC load 8.

  By the way, with such operation of the inverter circuit 1, a negative (minus) surge voltage Vs1 (see FIG. 3) is generated between both ends of the first and third switching elements Q1, Q3 which are high-side arms. Sometimes. Further, with the operation of the inverter circuit 1, a positive surge voltage Vs2 (see FIG. 3) may be generated between both ends of the second and fourth switching elements Q2 and Q4 that are low-side arms.

(3.2) Operation of Snubber Circuit Next, the operation of the snubber circuit 2 will be described with reference to FIG. 2A, FIG. 2B, and FIG. Hereinafter, a case where the high-side arm is the first switching element Q1 and the low-side arm is the second switching element Q2 will be exemplified. Since the third switching element Q3 is the same as the first switching element Q1, and the fourth switching element Q4 is the same as the second switching element Q2, description thereof is omitted here.

  In FIG. 3, “V1” is a voltage across the first switching element Q1, and “Ic1” is a clamp current flowing through the diode D1. In FIG. 3, “V2” is a voltage across the second switching element Q2, and “Ic2” is a clamp current flowing through the diode D2. Further, in FIG. 3, “V3” is a voltage across the primary winding 61 of the transformer 6, and “I3” is a discharge current flowing through the primary winding 61. In FIG. 3, “I4” is a regenerative current flowing through the secondary winding 62, and “S1” is a gate signal of the switching element Q11. Further, the horizontal axis in FIG. 3 is a time axis.

  When a negative surge voltage Vs1 is generated in the first switching element Q1 at the first time, the clamp current Ic1 flows through the capacitor C1, the diode D1, the parasitic diode of the first switching element Q1, and the high-side charging path A1 of the capacitor C1. . In this case, the first clamp circuit 21 clamps the voltage V1 across the first switching element Q1 to the first clamp value Vc1 (= Vs1). Thereby, electric energy (charge) is charged (accumulated) in the capacitor C1. As the electrical energy stored in the capacitor C1 increases, the potential at the first point P1 (see FIG. 2A), which is a connection point between the capacitor C1 and the diodes D1 and D2, decreases.

  When a positive surge voltage Vs2 is generated in the second switching element Q2 at the second time, a clamp current Ic2 flows through the low-side charging path A2 of the capacitor C2, the parasitic diode of the second switching element Q2, the diode D3, and the capacitor C2. In this case, the second clamp circuit 22 clamps the voltage V2 across the second switching element Q2 to the second clamp value Vc2 (= Vs2). As a result, electric energy (charge) is charged (accumulated) in the low-side capacitor C2. As the electrical energy stored in the low-side capacitor C2 increases, the potential at the second point P2 (see FIG. 2A), which is a connection point between the low-side capacitor C2 and the diodes D3 and D4, increases.

  In the first period T1 when the switching element Q11 is turned on, the potential of the second point P2 is higher than the potential of the input terminal P11 on the high potential side, and the potential of the first point P1 is the potential of the input terminal P12 on the low potential side. The case where it becomes lower than is assumed. In this case, the discharge current I3 flows from the second clamp circuit 22 to the first clamp circuit 21 due to the potential difference between the first point P1 and the second point P2. The discharge current I3 flows until the switching element Q11 is turned off, and at this time, electric energy is accumulated in the primary winding 61 of the transformer 6. In the present embodiment, the primary winding 61 stores the electrical energy of the first clamp circuit 21 (strictly, the capacitor C1) and the electrical energy of the second clamp circuit 22 (strictly, the capacitor C2). As a result, the voltage across the capacitors C1 and C2, that is, the first clamp value Vc1 and the second clamp value Vc2 are held constant.

  In the second period T2 in which the switching element Q11 is turned off, since the switching element Q11 is off, the discharge current I3 becomes zero. At this time, the regenerative current I4 flows through the secondary winding 62 by the electric energy accumulated in the primary winding 61. The regenerative current I4 is regenerated to the capacitor C11 via the diode D5. In other words, in the regenerative operation, the regenerative circuit 23 is connected between the high potential side input terminal P11 and the low potential side input terminal P12 with respect to the electrical energy absorbed by the first clamp circuit 21 and the second clamp circuit 22 from the inverter circuit 1. The capacitor C11 (electric storage device) that is electrically connected to the capacitor is regenerated.

  As described above, the snubber circuit 2 according to the present embodiment has a discharge mode in which the electric energy of the capacitors C1 and C2 is discharged. In this discharge mode, the first discharge period in which the electric energy of the first clamp circuit 21 is discharged coincides with the second discharge period in which the electric energy of the second clamp circuit 22 is discharged. The regenerative circuit 23 performs the regenerative operation in this discharge mode.

(4) Modifications The above-described embodiment is merely one of various embodiments of the present disclosure. The above-described embodiment can be variously changed according to the design or the like as long as the object of the present disclosure can be achieved. Hereinafter, modifications of the above-described embodiment will be listed. The modifications described below can be applied in appropriate combinations.

  The execution subject of the power conversion system 10 in the present disclosure includes a computer system. The computer system has a processor and memory as hardware. When the processor executes the program recorded in the memory of the computer system, the function as the execution subject of the power conversion system 10 according to the present disclosure is realized. The program may be recorded in advance in the memory of the computer system, but may be provided through a telecommunication line. The program may be provided by being recorded on a non-transitory recording medium such as a memory card, an optical disk, or a hard disk drive that can be read by a computer system. A processor of a computer system includes one or more electronic circuits including a semiconductor integrated circuit (IC) or a large scale integrated circuit (LSI). The plurality of electronic circuits may be integrated on one chip, or may be distributed on the plurality of chips. The plurality of chips may be integrated into one device, or may be distributed and provided in a plurality of devices.

  The functions of the first control circuit 5 and the second control circuit 6 of the power conversion system 10 may be provided in one device or may be provided in a distributed manner in a plurality of devices. Furthermore, at least some of the functions of the first control circuit 5 and the second control circuit 6 may be realized by, for example, cloud (cloud computing).

(4.1) Modification 1
In the above-described embodiment, the full-bridge type inverter circuit 1 is illustrated, but as shown in FIG. 4A, a half-bridge type inverter circuit 1A may be used. Hereinafter, a power conversion system 10A according to Modification 1 will be described with reference to FIG. 4A.

  A power conversion system 10A according to Modification 1 includes an inverter circuit 1A, a snubber circuit 2A, a transformer 3 (see FIG. 1), a rectifier circuit 4 (see FIG. 1), and a first control circuit 5 (see FIG. 1). And a second control circuit 6 (see FIG. 1). The transformer 3, the rectifier circuit 4, the first control circuit 5, and the second control circuit 6 are the same as the transformer 3, the rectifier circuit 4, the first control circuit 5, and the second control circuit 6 according to the above-described embodiment. There is no detailed description here.

  Here, the inverter circuit 1A is a half-bridge type inverter circuit. Inverter circuit 1A includes first and second switching elements Q1, Q2 and two capacitors C3, C4. Each of the first and second switching elements Q1, Q2 is a depletion type n-channel MOSFET, as in the above-described embodiment.

  The first switching element Q1 is electrically connected in series with the second switching element Q2 between both ends of the capacitor C11. The first and second switching elements Q1 and Q2 constitute the first leg 11. The capacitor C3 is electrically connected in series with the capacitor C4 between both ends of the capacitor C11. Capacitors C3 and C4 constitute a series circuit 13. That is, the first leg 11 and the series circuit 13 are electrically connected in parallel between both ends of the capacitor C11.

  The snubber circuit 2A includes a first clamp circuit 21A, a second clamp circuit 22A, and a regenerative circuit 23. The first clamp circuit 21A includes a capacitor C1 and one diode D1. The second clamp circuit 22A includes a capacitor C2 and one diode D3. Regenerative circuit 23 includes a switching element Q11, a diode D5, and a transformer 6.

  In the first clamp circuit 21A, the connection relationship between the capacitor C1 and the diode D1 is the same as the connection relationship between the capacitor C1 and the diode D1 according to the above-described embodiment, and the description thereof is omitted here. In the second clamp circuit 22A, the connection relationship between the capacitor C2 and the diode D3 is the same as the connection relationship between the capacitor C2 and the diode D3 according to the above-described embodiment, and the description thereof is omitted here.

  The operations of the inverter circuit 1A and the snubber circuit 2A are the same as the operations of the inverter circuit 1 and the snubber circuit 2 according to the above-described embodiment, and the description thereof is omitted here.

  According to this configuration, the surge voltage (Vs1, Vs2) generated between both ends of the first switching element Q1 and the second switching element Q2 can be suppressed by the snubber circuit 2A. In addition, according to this configuration, the electric energy accumulated in the capacitors C1 and C2 can be regenerated in the inverter circuit 1A by the regenerative circuit 23, thereby suppressing a decrease in efficiency.

(4.2) Modification 2
In the above-described embodiment, the inverter circuit 1 having a single-phase output is illustrated, but an inverter circuit 1B having a three-phase output may be used as shown in FIG. 4B. Hereinafter, a power conversion system 10B according to Modification 2 will be described with reference to FIG. 4B.

  A power conversion system 10B according to Modification 2 includes an inverter circuit 1B, a snubber circuit 2B, a transformer 3 (see FIG. 1), a rectifier circuit 4 (see FIG. 1), and a first control circuit 5 (see FIG. 1). And a second control circuit 6 (see FIG. 1). The transformer 3, the rectifier circuit 4, the first control circuit 5, and the second control circuit 6 are the same as the transformer 3, the rectifier circuit 4, the first control circuit 5, and the second control circuit 6 according to the above-described embodiment. There is no detailed description here.

  Inverter circuit 1B includes first to sixth switching elements Q1 to Q6. Each of the first to sixth switching elements Q1 to Q6 is a depletion type n-channel MOSFET as in the above-described embodiment.

  The first switching element Q1 is electrically connected in series with the second switching element Q2 between both ends of the capacitor C11. The first switching element Q1 and the second switching element Q2 constitute the first leg 11. The third switching element Q3 is electrically connected in series with the fourth switching element Q4 between both ends of the capacitor C11. The third switching element Q3 and the fourth switching element Q4 constitute the second leg 12. The fifth switching element Q5 is electrically connected in series with the sixth switching element Q6 between both ends of the capacitor C11. The fifth switching element Q5 and the sixth switching element Q6 constitute the third leg 14. That is, between the both ends of the capacitor C11, the first leg 11, the second leg 12, and the third leg 14 are electrically connected in parallel.

  The snubber circuit 2B includes a first clamp circuit 21B, a second clamp circuit 22B, and a regenerative circuit 23. The regenerative circuit 23 is the same as the regenerative circuit 23 according to the above-described embodiment, and detailed description thereof is omitted here.

  The first clamp circuit 21B includes a capacitor C1 and three diodes D1, D2, D5. The first end of the capacitor C1 is electrically connected to the anodes of the diodes D1, D2, and D5, and the second end of the capacitor C1 is electrically connected to the drains of the first, third, and fifth switching elements Q1, Q3, and Q5. Connected. The cathode of the diode D1 is electrically connected to the connection point of the first switching element Q1 and the second switching element Q2. The cathode of the diode D2 is electrically connected to the connection point of the third switching element Q3 and the fourth switching element Q4. The cathode of the diode D5 is electrically connected to the connection point of the fifth switching element Q5 and the sixth switching element Q6.

  The second clamp circuit 22B includes a capacitor C2 and three diodes D3, D4, and D6. The first end of the capacitor C2 is electrically connected to the cathodes of the diodes D3, D4, and D6, and the second end of the capacitor C2 is electrically connected to the sources of the second, fourth, and sixth switching elements Q2, Q4, and Q6. Connected. The anode of the diode D3 is electrically connected to the connection point of the first switching element Q1 and the second switching element Q2. The anode of the diode D4 is electrically connected to the connection point of the third switching element Q3 and the fourth switching element Q4. The anode of the diode D6 is electrically connected to the connection point of the fifth switching element Q5 and the sixth switching element Q6.

  The operations of the inverter circuit 1B and the snubber circuit 2B are the same as the operations of the inverter circuit 1 and the snubber circuit 2 according to the above-described embodiment, and the description thereof is omitted here.

  According to this configuration, the surge voltage generated between both ends of the first to sixth switching elements Q1 to Q6 can be suppressed by the snubber circuit 2B. Further, according to this configuration, the electric energy accumulated in the capacitors C1 and C2 can be regenerated in the inverter circuit 1 by the regenerative circuit 23, thereby suppressing the decrease in efficiency. Furthermore, according to this configuration, only one snubber circuit 2B needs to be provided for six arms, and the number of parts can be reduced as compared with the case where a snubber circuit is provided for each arm.

(4.3) Other Modifications Other modifications of the above-described embodiment are listed below.

  In the above-described embodiment, the case where the snubber circuit 2 is applied to the power conversion system 10 that performs power conversion in one direction from the storage battery 7 to the DC load 8 is illustrated, but the power conversion system that performs power conversion bidirectionally. Alternatively, the snubber circuit 2 may be applied.

  In the above-described embodiment, the case where the regeneration circuit 23 is a flyback type insulation type DC / DC converter including the transformer 6 is exemplified. However, the regeneration circuit 23 regenerates electric energy of at least one of the capacitors C1 and C2. Other configurations may be used as long as they are possible.

  In the above-described embodiment, the case where the snubber circuit 2 regenerates the electric energy of the second clamp circuit 22 has been illustrated. As long as it is configured to regenerate.

  In the above-described embodiment, the snubber circuit 2 is configured such that the first discharge period for discharging the electric energy of the first clamp circuit 21 and the second discharge period for discharging the electric energy of the second clamp circuit 22 coincide. ing. On the other hand, the snubber circuit 2 may be configured such that the first discharge period and the second discharge period overlap at least partially.

  In the above-described embodiment, the case where the power storage device is the capacitor (capacitor) C11 is illustrated, but the power storage device is not limited to the capacitor C11. The power storage device may be, for example, a secondary battery such as a lithium ion battery or a lead storage battery, or an electric double-layer capacitor (EPDC).

  The operation mode of the inverter circuit 1 may be a continuous mode, a discontinuous mode, or a critical mode.

(Summary)
As described above, the snubber circuit (2) according to the first aspect is a snubber for the inverter circuit (1) having the high side arms (Q1, Q3) and the low side arms (Q2, Q4). Circuit. The high side arms (Q1, Q3) are electrically connected between the output terminals (P21, P22) and the high potential side input terminal (P11). The low-side arms (Q2, Q4) are electrically connected between the output terminals (P21, P22) and the low-potential side input terminal (P11). The snubber circuit (2) includes a first clamp circuit (21), a second clamp circuit (22), and one regenerative circuit (23). The first clamp circuit (21) clamps the voltage across the high-side arms (Q1, Q3). The second clamp circuit (22) clamps the voltage across the low side arms (Q2, Q4). The regenerative circuit (23) is electrically connected to both the first clamp circuit (21) and the second clamp circuit (22). The regenerative circuit (23) performs a regenerative operation for causing the inverter circuit (1) to regenerate electrical energy absorbed from the inverter circuit (1) by at least one of the first clamp circuit (21) and the second clamp circuit (22).

  According to this aspect, the surge voltage (Vs1, Vs2) generated in the inverter circuit (1) can be suppressed while reducing the number of parts compared to the case where a snubber circuit is provided for each arm. Moreover, according to this aspect, since the electric energy absorbed from the inverter circuit (1) is regenerated in the inverter circuit (1), it is possible to suppress a decrease in efficiency.

  In the snubber circuit (2) according to the second aspect, in the first aspect, the regenerative circuit (23) has a discharge mode. In this discharge mode, the first discharge period in which the electric energy of the first clamp circuit (21) is discharged and the second discharge period in which the electric energy of the second clamp circuit (22) is discharged overlap at least partially. The regeneration circuit (23) performs the regeneration operation in the discharge mode.

  According to this aspect, the discharge period can be shortened compared to the case where the first discharge period and the second discharge period do not overlap.

  In the snubber circuit (2) according to the third aspect, in the first or second aspect, the regenerative circuit (23) transfers the electric energy of the second clamp circuit (22) to the inverter circuit (1) in the regenerative operation. Regenerate.

  According to this aspect, it is possible to suppress a decrease in efficiency by the electric energy of the second clamp circuit (22).

  In the snubber circuit (2) according to the fourth aspect, in any one of the first to third aspects, the regenerative circuit (23) converts the electric energy of the first clamp circuit (21) into the inverter circuit ( Regenerate to 1).

  According to this aspect, the reduction in efficiency can be suppressed by the electric energy of the first clamp circuit (21).

  In the snubber circuit (2) according to the fifth aspect, in any one of the first to fourth aspects, the first clamp circuit (21) includes a high-side capacitor (C1) and a high-side charging path (A1). And including. The high side charging path (A1) is a path for charging the electric energy of the inverter circuit (1) to the high side capacitor (C1).

  According to this aspect, the both-ends voltage (V1) of the high-side arms (Q1, Q3) can be clamped to the clamp value (Vc1).

  In the snubber circuit (2) according to the sixth aspect, in any one of the first to fifth aspects, the second clamp circuit (22) includes a low-side capacitor (C2), a low-side charging path (A2), including. The low side charging path (A2) is a path for charging the electric energy of the inverter circuit (1) to the low side capacitor (C2).

  According to this aspect, the both-ends voltage (V2) of the low-side arms (Q2, Q4) can be clamped to the clamp value (Vc2).

  In the snubber circuit (2) according to the seventh aspect, in any one of the first to sixth aspects, the regenerative circuit (23) includes the switching element (Q11), the diode (D5), and the primary winding (61). And a transformer (6) having a secondary winding (62). The switching element (Q11) and the primary winding (61) constitute a series circuit. The first end on the switching element (Q11) side in the series circuit is electrically connected to the first clamp circuit (21), and the second end on the primary winding (61) side in the series circuit is the second clamp circuit ( 22). The secondary winding (62) is connected between both ends of an electric storage device (for example, capacitor C11) electrically connected between the high potential side input terminal (P11) and the low potential side input terminal (P12). Are electrically connected via a diode (D5).

  According to this aspect, it is possible to suppress the surge voltage (Vs1, Vs2) generated in the inverter circuit (1) while suppressing a decrease in efficiency.

  In the snubber circuit (2) according to the eighth aspect, in any one of the first to seventh aspects, the regenerative circuit (23) includes the first clamp circuit (21) and the second clamp circuit (22) in the regenerative operation. The electrical energy absorbed by at least one of the inverter circuit (1) is regenerated in the electric storage device (for example, the capacitor 11). The power storage device is electrically connected between the high potential side input terminal (P11) and the low potential side input terminal (P12).

  According to this aspect, it is possible to suppress the surge voltage (Vs1, Vs2) generated in the inverter circuit (1) while suppressing a decrease in efficiency.

  A power conversion system (10) according to a ninth aspect includes the snubber circuit (2) according to any one of the first to eighth aspects, and an inverter circuit (1).

  According to this aspect, it is possible to suppress the surge voltage generated in the inverter circuit (1) while reducing the number of parts compared to the case where a snubber circuit is provided for each arm. Moreover, according to this aspect, since the electric energy absorbed from the inverter circuit (1) is regenerated in the inverter circuit (1), it is possible to suppress a decrease in efficiency.

  About the structure concerning the 2nd-8th aspect, it is not an essential structure of a snubber circuit (2), and can be abbreviate | omitted suitably.

1, 1A, 1B Inverter circuit Q1 First switching element (high side arm)
Q2 Second switching element (low side arm)
Q3 3rd switching element (high side arm)
Q4 4th switching element (low-side arm)
2, 2A, 2B Snubber circuits 21, 21A, 21B First clamp circuit A1 High side charging path C1 High side capacitors 22, 22A, 22B Second clamp circuit A2 Low side charging path C2 Low side capacitor 23 Regeneration circuit C11 Capacitor (Electric storage device)
D5 Diode Q11 Switching element 6 Transformer 61 Primary winding 62 Secondary winding 10, 10A, 10B Power conversion system P11 High potential side input terminal P12 Low potential side input terminals P21, P22 Output terminal

Claims (9)

A high-side arm electrically connected between the output terminal and the high-potential side input terminal, and a low-side arm electrically connected between the output terminal and the low-potential side input terminal A snubber circuit for an inverter circuit having
A first clamp circuit for clamping a voltage across the high-side arm;
A second clamp circuit for clamping a voltage across the low-side arm;
A regenerative circuit electrically connected to both the first clamp circuit and the second clamp circuit,
The regenerative circuit performs a regenerative operation for causing the inverter circuit to regenerate electrical energy absorbed from the inverter circuit by at least one of the first clamp circuit and the second clamp circuit.
Snubber circuit. The regenerative circuit is
A discharge mode in which a first discharge period for discharging electric energy of the first clamp circuit and a second discharge period for discharging electric energy of the second clamp circuit overlap at least partially;
Performing the regenerative operation in the discharge mode;
The snubber circuit according to claim 1. The regenerative circuit causes the inverter circuit to regenerate electric energy of the second clamp circuit in the regenerative operation.
The snubber circuit according to claim 1 or 2. The regeneration circuit causes the inverter circuit to regenerate electric energy of the first clamp circuit in the regeneration operation.
The snubber circuit of any one of Claims 1-3. The first clamp circuit includes:
A high side capacitor,
A high-side charging path for charging the high-side capacitor with electric energy of the inverter circuit,
The snubber circuit of any one of Claims 1-4. The second clamp circuit includes:
A low side capacitor,
Including a low-side charging path for charging the low-side capacitor with electrical energy of the inverter circuit,
The snubber circuit of any one of Claims 1-5. The regenerative circuit is
A switching element;
A diode,
A transformer having a primary winding and a secondary winding,
The switching element and the primary winding constitute a series circuit,
A first end on the switching element side in the series circuit is electrically connected to the first clamp circuit, and a second end on the primary winding side in the series circuit is electrically connected to the second clamp circuit. And
The secondary winding is electrically connected via the diode between both ends of an electricity storage device that is electrically connected between the input terminal on the high potential side and the input terminal on the low potential side. ing,
The snubber circuit of any one of Claims 1-6. In the regenerative operation, the regenerative circuit absorbs electric energy absorbed by the at least one of the first clamp circuit and the second clamp circuit from the inverter circuit, and the high potential side input terminal and the low potential side input terminal. Regenerate to an electricity storage device that is electrically connected between,
The snubber circuit of any one of Claims 1-7. The snubber circuit according to any one of claims 1 to 8,
The inverter circuit,
Power conversion system.

Images