CN105406747B - A kind of level inner tubes of NPC tri- are lossless to press clamp circuit - Google Patents
A kind of level inner tubes of NPC tri- are lossless to press clamp circuit Download PDFInfo
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- CN105406747B CN105406747B CN201510985364.4A CN201510985364A CN105406747B CN 105406747 B CN105406747 B CN 105406747B CN 201510985364 A CN201510985364 A CN 201510985364A CN 105406747 B CN105406747 B CN 105406747B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0038—Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control
Abstract
Clamp circuit is pressed the invention discloses a kind of level inner tubes of NPC tri- are lossless, power frequency upper half circuit and power frequency lower half circuit including being made up of symmetrical configuration IGBT, diode, electric capacity and resistance, IGBT includes the first IGBT, the 2nd IGBT, the 3rd IGBT and the 4th IGBT, wherein, first IGBT and the 2nd IGBT are in power frequency upper half circuit, 3rd IGBT and the 4th IGBT is in power frequency lower half circuit, and the first IGBT and the 4th IGBT are connected to bus；When the 2nd IGBT is turned on, when the first IGBT is in moment opening state, the 3rd IGBT shut-offs, the 3rd IGBT and the 4th IGBT bear whole busbar voltage Vin；When the 2nd IGBT conductings, when the first IGBT is off state, there are a diode and an IGBT to turn on to form zero level in power frequency upper half circuit or/and power frequency lower half circuit.The present invention can two inner tubes of dynamic clamp, make its be no more than busbar voltage half+10%, reach it is lossless suppression inner tube shut-off due to voltage spikes purpose.
Description
Technical field
The invention belongs to power electronics tri-level inversion clamper protection technique field, especially designs a kind of inner tube of three level two
Clamp circuit.
Background technology
Existing NPC tri-level circuits only have two outer tubes Q1, Q4 to do clamper protection, and it is compared using inner and outer pipes parameter
Two outer tubes are first turned off first bearing more back-pressures in the case of consistent, and are turned off after two inner tubes, and inner tube is held than outer tube naturally
By smaller voltage stress so being protected without clamper, but in actual motion the parameter of inner and outer pipes it is total it is variant, especially as
The operation of equipment, the aging of device, this species diversity can be increasing, so that the inner tube for not doing clamper protection goes out when off
Now abnormal due to voltage spikes, this due to voltage spikes turned off reaches the breakdown voltage of IGBT pipes when serious, causes IGBT to puncture, from
And burn whole IGBT module.
The content of the invention
In view of the above-mentioned problems in the prior art, it is a primary object of the present invention to provide in a kind of level of NPC tri-
Manage it is lossless press clamp circuit, solve the defects of NPC tri-level circuits inner tube is protected without clamper, increase the reliability of product.
When NPC tri-level circuit inner and outer pipes parameters have larger difference, two inner tubes of dynamic clamp, make it no more than the one of busbar voltage
+ the 10% of half, reach the purpose of lossless suppression inner tube shut-off due to voltage spikes.
The technical solution adopted by the present invention is as follows：
A kind of level inner tubes of NPC tri- are lossless to press clamp circuit, including forms knot by IGBT, diode, electric capacity and resistance
The symmetrical power frequency upper half circuit of structure and power frequency lower half circuit, IGBT include the first IGBT, the 2nd IGBT, the 3rd IGBT and the
Four IGBT, wherein, the first IGBT and the 2nd IGBT are in power frequency upper half circuit, and the 3rd IGBT and the 4th IGBT are under power frequency
Half cycle circuit, the first IGBT and the 4th IGBT are connected to bus；In power frequency upper half circuit and power frequency lower half circuit also
" inner tube shut-off peak voltage absorbing circuit ", " the lossless feedback loop of energy " and " initial precharge including sharing two electric capacity
Circuit "；Inner tube turns off diode seven D7, electric capacity three C3 and power frequency lower half of the peak voltage absorbing circuit by power frequency upper half circuit
The C4 of electric capacity four and the D9 of diode nine of all circuits are in series；The D8 of diode eight, the C3 of electric capacity three, the C4 of electric capacity four and diode ten
The lossless feedback loop of D10 energy in series；The R1 of resistance one, the C3 of electric capacity three, the C4 of electric capacity four and the R2 of resistance two are in series initial
Pre-charge circuit；When the 2nd IGBT turn on, when the first IGBT be in moment opening state, the 3rd IGBT shut-off, the 3rd IGBT with
4th IGBT bears whole busbar voltage Vin；When the 2nd IGBT conductings, when the first IGBT is off state, power frequency upper half
There are a diode and an IGBT to turn on to form zero level in circuit or/and power frequency lower half circuit.
Further, power frequency upper half circuit specifically includes the C1 of electric capacity one for being connected to bus input one, bus input
End one is also associated with the first IGBT, the D1 of diode one, the D8 of diode eight and the R1 of resistance one, specifically, the first IGBT is collected by it
Electrode C is connected with bus input one, and the D1 of diode one and the D8 of diode eight are connected by its negative pole with bus input one；
The C1 of electric capacity one other end is also connected with the D5 of diode five and the D7 of diode seven in turn, specifically, the D5 of diode five and diode
Seven D7 are in the same direction, and the D5 of diode five is connected by its positive pole with the C1 of electric capacity one other end；First IGBT emitter E and two poles
The D1 of pipe one positive pole is all connected between the D5 of diode five and the D7 of diode seven, forms the first IGBT, the D1 of diode one, diode
Five D5 and the D7 of diode seven common port A1, the D8 of diode eight positive pole and the R1 of resistance one other end are all connected to diode seven
D7 negative pole, form the D7 of diode seven, the D8 of diode eight and the R1 of resistance one common port B1；Common port A1 is also associated with diode
Two D2 and the 2nd IGBT, specifically, the 2nd IGBT is connected by its colelctor electrode C with the first IGBT emitter E, the D2 of diode two
Common port A1 is connected to by its negative pole；Common port B1 is also associated with the C3 of electric capacity three, the C3 of electric capacity three other end and the 2nd IGBT
Emitter E and the D2 of diode two positive pole be connected together, form the 2nd IGBT, the D2 of diode two and the C3 of electric capacity three common port
P1；
Power frequency lower half circuit specifically includes the C2 of electric capacity two for being connected to bus input two, and the C2 of electric capacity two and electric capacity one
C1 connections, it is ZERO ends between the C1 of electric capacity one and the C2 of electric capacity two；Bus input two is also associated with the 4th IGBT, diode four
D4, the D10 of diode ten and the R2 of resistance two, specifically, the 4th IGBT is connected by its emitter E with bus input two, two poles
The D4 of pipe four and the D10 of diode ten are connected by its positive pole with bus input two；The C2 of the electric capacity two and C1 of electric capacity one common port
Also it is connected with the D6 of diode six and the D9 of diode nine in turn, specifically, the D6 of diode six and the D9 of diode nine are in the same direction, and diode
Six D6 are connected between the C2 of electric capacity two and the C1 of electric capacity one by its negative pole；4th IGBT colelctor electrode C's and the D4 of diode four is negative
Pole is all connected between the D6 of diode six and the D9 of diode nine, forms the 4th IGBT, the D4 of diode four, the D6 of diode six and two poles
The D9 of pipe nine common port A2, the D10 of diode ten negative pole and the R2 of resistance two other end are all connected to the D9 of diode nine positive pole,
Form the D9 of diode nine, the D10 of diode ten and the R2 of resistance two common port B2；Common port A2 is also associated with the D3 of diode three and
Three IGBT, specifically, the 3rd IGBT is connected by its emitter E with the 4th IGBT colelctor electrode C, the D3 of diode three by it just
Pole is connected to common port A2；Common port B2 is also associated with the C4 of electric capacity four, the C4 of electric capacity four other end and the 3rd IGBT colelctor electrode C
It is connected together with the D3 of diode three negative pole, forms the 3rd IGBT, the D3 of diode three and the C4 of electric capacity four common port P2；Common port
P1 and common port P2 is connected together to form output end (OUTX).
In summary, compared with prior art, the beneficial effects of the invention are as follows：
The present invention use symmetrical power frequency upper half circuit and power frequency lower half circuit, and power frequency upper half circuit and power frequency
Lower half circuit only by IGBT, diode, electric capacity and resistance form above-mentioned inner tube turn off peak voltage absorbing circuit, energy without
Feedback loop and initial pre-charge circuit are damaged, the problem of inner tube clamper of tri- level bridge arms of NPC two is pressed can be efficiently solved, carried
The reliability of high NPC tri-level circuits application.When NPC tri-level circuit inner and outer pipes parameters have larger difference, dynamic clamp two
Inner tube, make it no more than+the 10% of the half of busbar voltage, reach the purpose of lossless suppression inner tube shut-off due to voltage spikes.
Brief description of the drawings
Examples of the present invention will be described by way of reference to the accompanying drawings, wherein：
Fig. 1 is the schematic diagram of the present invention；
Fig. 2 is the inner tube clamper principle of absorption figure of the present invention；
Fig. 3 is the lossless feedback schematic diagram of Absorption Capacitance of the present invention.
Embodiment
All features disclosed in this specification, or disclosed all methods or during the step of, except mutually exclusive
Feature and/or step beyond, can combine in any way.
As shown in Figure 1：A kind of level inner tubes of NPC tri- of the present invention are lossless to press clamp circuit, in the present embodiment, including even
Bus high level end BUS+ (the bus input one) C1 of electric capacity one is connected to, bus high level end BUS+ is also associated with the first IGBT
(Q1), the D1 of diode one, the D8 of diode eight and the R1 of resistance one, specifically, the first IGBT (Q1) is high by its colelctor electrode C and bus
Level terminal BUS+ is connected, and the D1 of diode one and the D8 of diode eight are connected by its negative pole with bus high level end BUS+；Electric capacity
One C1 low level end is also connected with the D5 of diode five and the D7 of diode seven in turn, specifically, the D5 of diode five and diode seven
D7 is in the same direction, and the D5 of diode five is connected by its positive pole with the C1 of electric capacity one low level end；First IGBT (Q1) emitter E and
The D1 of diode one positive pole is all connected between the D5 of diode five and the D7 of diode seven (form the first IGBT, the D1 of diode one, two
The D5 of pole pipe five and the D7 of diode seven common port A1), the D8 of diode eight positive pole and the R1 of resistance one low level end are all connected to
The D7 of diode seven negative pole (the common port B1 for forming the D7 of diode seven, the D8 of diode eight and the R1 of resistance one)；
First IGBT (Q1) emitter E (i.e. common port A1) is also associated with the D2 of diode two and another identical second
IGBT (Q2), specifically, the 2nd IGBT (Q2) is connected by its colelctor electrode C with the first IGBT (Q1) emitter E, diode two
D2 is connected to common port A1 by its negative pole；Common port B1 is also associated with the C3 of electric capacity three, the C3 of electric capacity three low level end and second
IGBT (Q2) emitter E and the D2 of diode two positive pole, which are connected together, (forms the 2nd IGBT, the D2 of diode two and the C3 of electric capacity three
Common port P1)；
Foregoing circuit forms the power frequency upper half circuit of the present invention, present invention additionally comprises a power frequency lower half circuit, and
The structure of power frequency lower half circuit and upper half circuit symmetrical.
As shown in Figure 1：The circuit structure of power frequency lower half circuit is as described below：Including being connected to bus low level end BUS-
The C2 of electric capacity two of (bus input two), the C2 of electric capacity two high level end are connected to the C1 of electric capacity one low level end, the C1 of electric capacity one
It is ZERO ends between the C2 of electric capacity two；Bus high level end BUS- is also associated with the 4th IGBT (Q4), the D4 of diode four, diode
The ten D10 and R2 of resistance two, specifically, the 4th IGBT (Q4) is connected by its emitter E with bus high level end BUS-, diode
The four D4 and D10 of diode ten are connected by its positive pole with bus high level end BUS-；The C2 of electric capacity two high level end is also successively
The D6 of diode six and the D9 of diode nine are connected with, specifically, the D6 of diode six and the D9 of diode nine are in the same direction, and the D6 of diode six leads to
The high level end that its negative pole is crossed with the C2 of electric capacity two is connected；4th IGBT (Q4) colelctor electrode C and the D4 of diode four negative pole connect
It is connected between the D6 of diode six and the D9 of diode nine and (forms the 4th IGBT, the D4 of diode four, the D6 of diode six and the D9 of diode nine
Common port A2), the D10 of diode ten negative pole and the R2 of resistance two high level end are all connected to the D9 of diode nine positive pole (shape
Into the D9 of diode nine, the D10 of diode ten and the R2 of resistance two common port B2)；
4th IGBT (Q4) colelctor electrode (i.e. common port A2) is also associated with the D3 of diode three and another identical the 3rd
IGBT (Q3), specifically, the 3rd IGBT (Q3) is connected by its emitter E with the 4th IGBT (Q4) colelctor electrode C, diode three
D3 is connected to common port A2 by its positive pole；Common port B2 is also associated with the C4 of electric capacity four, the C4 of electric capacity four high level end and the 3rd
IGBT (Q3) colelctor electrode C and the D3 of diode three negative pole, which are connected together, (forms the 3rd IGBT, the D3 of diode three and the C4 of electric capacity four
Common port P2)；Common port P1 and common port P2 is connected together to form output end (OUTX).The respective grid of Q1, Q2, Q3 and Q4
The circuit that G is connected is driving circuits, and (for prior art, as well known to those skilled in the art) is omitted.
Referring to the dotted line frame of accompanying drawing 1 below, dotted line frame includes three parts, and Part I is that inner tube shut-off peak voltage is inhaled
Receive circuit, inner tube shut-off peak voltage absorbing circuit include the D7 of diode seven, the D9 of diode nine and Absorption Capacitance (C3 of electric capacity three,
The C4 of electric capacity four)；Part II is the lossless feedback loop of energy, and the lossless feedback loop of energy includes the D8 of diode eight, diode ten
D10 and Absorption Capacitance (C3 of electric capacity three, the C4 of electric capacity four)；Part III is initial pre-charge circuit, and initial pre-charge circuit includes
Charging resistor (R1 of resistance one, the R2 of resistance two) and Absorption Capacitance (C3 of electric capacity three, the C4 of electric capacity four).
1~3 pair of general principle of the invention makees a brief description below in conjunction with the accompanying drawings.
The structure and upper half of power frequency lower half circuit are symmetrical, to electric capacity three when the R1 of resistance one, the R2 of resistance two are used to start
C3, the C4 of electric capacity four are pre-charged, and the C3 of electric capacity three, the C4 of electric capacity four is reached Vin/2 voltages before inversion work.The R1 of resistance one, resistance
Two R2 values are larger, and power consumption is smaller during work.For the value of the elements such as the R1 of resistance one, the R2 of resistance two, those skilled in the art
Know how to choose suitable value, be not especially limited herein.
Refer to accompanying drawing 2, in foregoing description, inner tube shut-off peak voltage absorbing circuit can regard power frequency upper half electricity as
The D7 of diode seven, the C3 of electric capacity three on road and the C4 of electric capacity four and the D9 of diode nine of power frequency lower half circuit are in series；Similarly, two
The D8 of pole pipe eight, the C3 of electric capacity three, the C4 of electric capacity four and the lossless feedback loop of the D10 of diode ten energy in series；The R1 of resistance one, electricity
Hold three C3, the C4 of electric capacity four and the R2 of resistance two initial pre-charge circuits in series.It is constantly in power frequency upper half circuit Q2, when
For Q1 in when opening moment, whole busbar voltage Vin are born in Q3 shut-offs, Q3, Q4, if Q3, Q4 all dynamic distributed parameters
Unanimously, Q3, Q4 are by respectively busbar voltage, but if Q3, Q4 dynamic distributed parameter are inconsistent, Q3, Q4 will be caused equal
Denominator line voltage, particularly when the opening speed of Q1 connects up distributed inductance LF2, (wiring distributed inductance is divided into wiring point
Cloth inductance LF1 and wiring distributed inductance LF2, specifically, wiring distributed inductance LF1 is in the C1 of electric capacity one in power frequency upper half circuit
Between the D5 of diode five, wiring distributed inductance LF2 is in power frequency lower half circuit between the C2 of electric capacity two and the D6 of diode six)
When can not ignore, higher peak voltage can be produced at Q3 both ends.After circuit using the present invention, electric current is from the C4 of electric capacity four, two
The D9 of pole pipe nine, the circulation of the D6 loops of diode six, excess energy are stored into the C4 of electric capacity four, so as to successfully inhibit Q3 both ends
Shut-off spike.
Accompanying drawing 3 is referred to, after Q1 is turned off, Q2 is still turned on, diode five of the load current from power frequency upper half circuit
The Q3 of D5, Q2 and/or power frequency lower half circuit, the D6 of pole pipe six are flowed out, and diode five D5, Q2 conducting and/or Q3, the D6 of pole pipe six are led
It is logical, form zero level (i.e. OUTX current potential and the current potential approximately equal at ZERO ends), the unnecessary electric energy that the C4 of electric capacity four is stored just from
The D10 of diode ten, Q2, the D5 of diode five, the C2 loops of electric capacity two, feed back in the C2 of bus capacitor two, the C4 of electric capacity four voltage quilt
Clamper is to Vin/2.
Therefore, circuit disclosed by the invention can efficiently solve the problem of inner tube clamper of tri- level bridge arms of NPC two is pressed,
Improve the reliability of NPC tri-level circuits application.And method and apparatus disclosed by the invention have been applied in it is newly-designed
Apply, work well in APF100 harmonic compensation equipment.
Description of the invention and application are illustrative, are not wishing to limit the scope of the invention in above-described embodiment.
The deformation and change of embodiments disclosed herein are possible, the embodiment for those skilled in the art
Replacement and equivalent various parts be known.It should be appreciated by the person skilled in the art that the essence of the present invention is not being departed from
In the case of god or substantive characteristics, the present invention can otherwise, structure, arrangement, ratio, and with other elements, material
Realized with part.
Claims (2)
1. a kind of level inner tubes of NPC tri- are lossless to press clamp circuit, it is characterised in that including by IGBT, diode, electric capacity and electricity
Resistance forms the power frequency upper half circuit and power frequency lower half circuit of symmetrical configuration, and IGBT includes the first IGBT, the 2nd IGBT, the 3rd
IGBT and the 4th IGBT, wherein, the first IGBT and the 2nd IGBT are in power frequency upper half circuit, at the 3rd IGBT and the 4th IGBT
In power frequency lower half circuit, the first IGBT and the 4th IGBT are connected to bus；Power frequency upper half circuit and power frequency lower half
Also include sharing " the inner tube shut-off peak voltage absorbing circuit ", " the lossless feedback loop of energy " and " first of two electric capacity in circuit
Beginning pre-charge circuit "；Inner tube turn off peak voltage absorbing circuit by power frequency upper half circuit the D7 of diode seven, the C3 of electric capacity three with
The C4 of electric capacity four and the D9 of diode nine of power frequency lower half circuit are in series；The D8 of diode eight, the C3 of electric capacity three, the C4 of electric capacity four and two
The lossless feedback loop of the D10 of pole pipe ten energy in series；The R1 of resistance one, the C3 of electric capacity three, the C4 of electric capacity four and the R2 of resistance two series connection structures
Into initial pre-charge circuit；
When the 2nd IGBT is turned on, when the first IGBT is in moment opening state, the 3rd IGBT is turned off, the 3rd IGBT and the 4th IGBT
Bear whole busbar voltage Vin；When the 2nd IGBT turn on, when the first IGBT is off state, power frequency upper half circuit or/and
There are a diode and an IGBT to turn on to form zero level in power frequency lower half circuit.
2. a kind of level inner tubes of NPC tri- are lossless as claimed in claim 1 presses clamp circuit, it is characterised in that power frequency upper half
All circuits specifically include the C1 of electric capacity one for being connected to bus input one, and bus input one is also associated with the first IGBT, two poles
The D1 of pipe one, the D8 of diode eight and the R1 of resistance one, specifically, the first IGBT is connected by its colelctor electrode C with bus input one, two
The D1 of pole pipe one and the D8 of diode eight are connected by its negative pole with bus input one；The C1 of electric capacity one other end is also sequentially connected
There are the D5 of diode five and the D7 of diode seven, specifically, the D5 of diode five and the D7 of diode seven are in the same direction, and the D5 of diode five passes through it
Positive pole is connected with the C1 of electric capacity one other end；First IGBT emitter E and the D1 of diode one positive pole are all connected to diode
Between five D5 and the D7 of diode seven, the first IGBT, the D1 of diode one, the D5 of diode five and the D7 of diode seven common port are formed
A1, the D8 of diode eight positive pole and the R1 of resistance one other end are all connected to the D7 of diode seven negative pole, formed the D7 of diode seven,
The D8 of diode eight and the R1 of resistance one common port B1；Common port A1 is also associated with the D2 of diode two and the 2nd IGBT, specifically, the
Two IGBT are connected by its colelctor electrode C with the first IGBT emitter E, and the D2 of diode two is connected to common port by its negative pole
A1；Common port B1 is also associated with the C3 of electric capacity three, the C3 of electric capacity three other end and the 2nd IGBT emitter E and the D2's of diode two
Positive pole is connected together, and forms the 2nd IGBT, the D2 of diode two and the C3 of electric capacity three common port P1；
Power frequency lower half circuit specifically includes the C2 of electric capacity two for being connected to bus input two, and the C2 of the electric capacity two and C1 of electric capacity one connects
Connect, be ZERO ends between the C1 of electric capacity one and the C2 of electric capacity two；Bus input two is also associated with the 4th IGBT, the D4 of diode four, two
The D10 of the pole pipe ten and R2 of resistance two, specifically, the 4th IGBT is connected by its emitter E with bus input two, the D4 of diode four
It is connected with the D10 of diode ten by its positive pole with bus input two；The C2 of the electric capacity two and C1 of electric capacity one common port is also successively
The D6 of diode six and the D9 of diode nine are connected with, specifically, the D6 of diode six and the D9 of diode nine are in the same direction, and the D6 of diode six leads to
Its negative pole is crossed to be connected between the C2 of electric capacity two and the C1 of electric capacity one；4th IGBT colelctor electrode C and the D4 of diode four negative pole connect
It is connected between the D6 of diode six and the D9 of diode nine, forms the 4th IGBT, the D4 of diode four, the D6 of diode six and the D9 of diode nine
Common port A2, the D10 of diode ten negative pole and the R2 of resistance two other end are all connected to the D9 of diode nine positive pole, form two
The D9 of pole pipe nine, the D10 of diode ten and the R2 of resistance two common port B2；Common port A2 is also associated with the D3 of diode three and the 3rd
IGBT, specifically, the 3rd IGBT is connected by its emitter E with the 4th IGBT colelctor electrode C, the D3 of diode three passes through its positive pole
It is connected to common port A2；Common port B2 be also associated with the C4 of electric capacity four, the C4 of electric capacity four other end and the 3rd IGBT colelctor electrode C and
The D3 of diode three negative pole is connected together, and forms the 3rd IGBT, the D3 of diode three and the C4 of electric capacity four common port P2；Common port P1
It is connected together to form output end with common port P2.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510985364.4A CN105406747B (en) | 2015-12-25 | 2015-12-25 | A kind of level inner tubes of NPC tri- are lossless to press clamp circuit |
| PCT/CN2016/077792 WO2017107332A1 (en) | 2015-12-25 | 2016-03-30 | Npc three-level inner tube lossless voltage-sharing clamp circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510985364.4A CN105406747B (en) | 2015-12-25 | 2015-12-25 | A kind of level inner tubes of NPC tri- are lossless to press clamp circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105406747A CN105406747A (en) | 2016-03-16 |
| CN105406747B true CN105406747B (en) | 2018-03-20 |
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| CN201510985364.4A Active CN105406747B (en) | 2015-12-25 | 2015-12-25 | A kind of level inner tubes of NPC tri- are lossless to press clamp circuit |
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| CN (1) | CN105406747B (en) |
| WO (1) | WO2017107332A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105406747B (en) * | 2015-12-25 | 2018-03-20 | 成都麦隆电气有限公司 | A kind of level inner tubes of NPC tri- are lossless to press clamp circuit |
| CN107947612A (en) * | 2017-12-25 | 2018-04-20 | 成都麦隆电气有限公司 | A kind of lossless soft breaking circuit of tri- level of NPC |
| CN109167526B (en) * | 2018-08-24 | 2021-01-19 | 成都麦隆电气有限公司 | NPC three-level circuit |
| CN109120142A (en) * | 2018-11-05 | 2019-01-01 | 宁波市北仑临宇电子科技有限公司 | The lossless synchronous absorbing circuit of peak voltage, boosting and step-down switching power supply circuit |
| CN109889028B (en) * | 2019-03-29 | 2020-11-10 | 阳光电源股份有限公司 | Absorption capacitor pre-charging circuit and peak voltage absorption circuit |
| CN110649831B (en) | 2019-05-10 | 2021-04-13 | 阳光电源股份有限公司 | Shutdown wave-sealing control method of multi-level inverter circuit and application device thereof |
| CN110474550B (en) * | 2019-08-21 | 2020-11-10 | 阳光电源股份有限公司 | Flying capacitor type NPC three-level topology |
| CN113395003B (en) * | 2021-03-24 | 2022-04-26 | 中国人民解放军海军工程大学 | Multi-level active neutral point clamped inverter series IGBT voltage-sharing circuit |
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| US8908405B2 (en) * | 2011-06-15 | 2014-12-09 | Liebert Corporation | Snubber circuit and inverter with the same |
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| JP3665934B2 (en) * | 2001-08-03 | 2005-06-29 | 株式会社日立製作所 | 3-level inverter device |
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| CN105024532A (en) * | 2014-04-16 | 2015-11-04 | 艾默生网络能源有限公司 | Single-phase three-level inverter and three-phase three-level inverter |
| CN105406747B (en) * | 2015-12-25 | 2018-03-20 | 成都麦隆电气有限公司 | A kind of level inner tubes of NPC tri- are lossless to press clamp circuit |
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2015
- 2015-12-25 CN CN201510985364.4A patent/CN105406747B/en active Active
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2016
- 2016-03-30 WO PCT/CN2016/077792 patent/WO2017107332A1/en active Application Filing
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| JPH07312872A (en) * | 1994-05-17 | 1995-11-28 | Fuji Electric Co Ltd | Power converting apparatus and control method therefor |
| US5982646A (en) * | 1998-06-30 | 1999-11-09 | General Electric Company | Voltage clamp snubbers for three level converter |
| CN1201471C (en) * | 1999-06-28 | 2005-05-11 | 东芝株式会社 | NPC inverter control system |
| CN102386754A (en) * | 2010-09-28 | 2012-03-21 | 深圳市英威腾电源有限公司 | Current limiting protection method of diode clamping type multi-electrical level convertor and realization circuit thereof |
| US8908405B2 (en) * | 2011-06-15 | 2014-12-09 | Liebert Corporation | Snubber circuit and inverter with the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105406747A (en) | 2016-03-16 |
| WO2017107332A1 (en) | 2017-06-29 |
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