Embodiment
Fig. 1 shows the exemplary inverter circuit 100 of the solar inverter that can put into practice each embodiment of the present invention.Inverter circuit 100 comprises electric bridge inverter 102, tank circuits (resonant tank circuit) 104, transformer 106, bridge rectifier 108, launches device (unfolder device) 110, controller 112 and DC/DC resonance converter 114.Inverter circuit 100 disposes input dc voltage V
DcInput dc voltage V
DcCan produce from each provenance, said each provenance is such as but not limited to solar panels, one or more solar-energy photo-voltaic cell, fuel cell, battery, ultracapacitor and other DC power supplys.According to the embodiment of the invention, input voltage may also be referred to as first dc voltage.DC/DC resonance converter 114 can be called resonance converter/resonant circuit hereinafter.
Electric bridge inverter 102 is formed by one or more mains switch S1, S2, S3 and S4 (being referred to as switch, i.e. S1-S4).Mains switch S1-S4 can be full controllable semiconductor switch, for example, and mos field effect transistor (MOSFET).According to one embodiment of the invention, can select semiconductor switch, with compare with legacy system have less impedance and with less gate electric charge (gate charge), be used for efficient better.In addition, can selective resonance circuit inductance device L
sHave the utmost point low-loss or the high Q factor.Each mains switch S1-S4 comprises one or more inverse parallel diode D1, D2, D3 and D4 (being referred to as diode D1-D4) respectively.Inverse parallel diode D1-D1 is illustrated in the parasitic antenna that comprises in the mains switch S1-S4.
As shown in Figure 1, tank circuits 104 is by inductor L
s, capacitor C
sWith capacitor C
pForm.Inductor L
sWith capacitor C
sBe connected in series, and with capacitor C
pBe connected in parallel.According to another embodiment of the present invention, inductor L
sCan with capacitor C
sBe connected in series, and this configuration to be known as be the series resonance structure.According to another embodiment of the present invention, inductor L
sCan with capacitor C
pBe connected in series capacitor C
pBe connected in series with transformer, and this combination can also with capacitor C
sBe connected in series.As shown in Figure 1.According to another embodiment of the present invention, inductor L
sCan with capacitor C
sWith inductor L
p(not shown in figure 1) is connected in series.This combination can also be connected in the primary coil two ends (LLC resonance) of transformer in parallel.
Each embodiment according to the present invention, this paper have described the various designs of the assembly of tank circuits 104.In one embodiment, air core and gapped FERRITE CORE can be used to design resonant inductor L
sWith inductor L
pIn another embodiment, the torus shape conventional iron ferrite core that is distributed with the space can be used to design resonant inductor L
sWith inductor L
pHere, the space that distributes equably makes significantly to reduce core loss.In a further embodiment, can use the combination of one or more potteries or film capacitor to come design capacitance device C
sAnd C
pIn an embodiment more of the present invention, can use the combination of polypropylene film capacitor to come design capacitance device C
pAnd C
sSuch capacitor has low-down loss, and on temperature and voltage range, demonstrates stable capacitance.
Although use L
sC
sC
pPassive component forms the tank circuits 104 in the inverter circuit 100; But under the prerequisite that deviates from the scope of the invention never in any form; It is obvious that to those skilled in the art, and tank circuits 104 can also use other possible passive component set (for example, LLC) to form.
Shown in figure, transformer 106 is connected to tank circuits 104 through its primary coil, and according to the switch of electric bridge inverter 102 electric power is sent to load.The secondary coil of transformer is connected to the diode D5-D8 (as shown in Figure 1) of bridge rectifier 108.According to embodiments of the invention, transformer 106 can be a centre-tapped transformer.
Transformer 106 can have the half the turn ratio that equates that outputs to minimum DC input voltage with maximum AC.According to embodiments of the invention, transformer 106 can have with maximum AC beam voltage to two times of turn ratios that equate of minimum DC input voltage.The turn ratio of transformer 106 can change according to the structure of inverter circuit as shown in Figure 1 100.
As shown in Figure 1, bridge rectifier 108 is formed by diode D5, D6, D7 and D8 (being referred to as diode, i.e. D5-D8).Launch device 110 by showing that one or more switches (being referred to as switch, i.e. D5-D8) of making S5, S6, S7 and S8 form.
According to embodiments of the invention, according to transformer device structure, bridge rectifier 108 can be formed by two diodes or four diodes.According to embodiments of the invention, launch device 110 and can use two MOSFET or four MOSFET to form.
According to embodiments of the invention, electric bridge inverter 104, tank circuits 104, transformer 106 and bridge rectifier 108 form DC/DC resonance converter 114 together.DC/DC resonance converter 114 is with the first dc voltage (V
Dc) convert an AC voltage to, also convert an AC voltage amplification to have sine-shaped second dc voltage then through rectification.Sinusoidal dc voltage through rectification also is known as the pulsation dc voltage.In addition, Fig. 1 shows the capacitor C of the output that is connected to bridge rectifier 108.The function of capacitor is a filtering switching frequency harmonic wave from second dc voltage.Voltage with capacitor C two ends is directed to expansion device 110 then, and sine-shaped second dc voltage that expansion device 110 will have through rectification converts the 2nd AC voltage that is synchronized to, to the AC grid sources input to be provided.Therefore significantly, operate expansion device 110 through switch under output AC line voltage frequency.It will be apparent to one skilled in the art that any suitable gate-controlled switch can be used for the dc voltage waveform through rectification of alternation on the half period is deployed into the AC source.For example, switch S 5-S8 can be MOSFET, bipolar junction transistor (BJT) etc.
According to embodiments of the invention, solar inverter can be according to one or more predetermined connection mode operations.Predetermined connection mode can be but be not limited to stand-alone mode and electrical network connection mode.When solar inverter is constrained on electrical network connection mode following time, the AC voltage on the sensing AC electrical network, and from the alternation zero crossing of sensing AC voltage, draw gate-control signal.When solar inverter is operated according to stand-alone mode, that the reference current waveshape that the phase-locked loop (PPL) shown in switch S 5-S8 and Fig. 2 is produced is synchronous.
In addition, the controller 112 of Fig. 1 produces a plurality of drive signals, a plurality of drive signals is advanced one one offer DC/DC resonance converter 114.The output of DC/DC resonance converter 114 changes along with the change of the switching frequency of drive signal, and changes through under light-load conditions or low output voltage, changing pulsewidth.The detailed operation of controller 112 is described below in conjunction with Fig. 2.
According to the embodiment of the invention, aforesaid inverter circuit 100 can be the part of solar inverter.In solar inverter, input is connected to dc voltage source (V
Dc).According to another embodiment of the present invention, solar inverter can independently use, with the V from the dc voltage source
DcProduce AC output.According to another embodiment of the present invention, a plurality of solar inverters can be connected in parallel with each other, and the output of each solar inverter can be provided to the electricity supply of load (for example, building/family).
During operation, the electric bridge inverter 102 of DC/DC resonance converter 114 is operated according to one or more predetermined switch patterns.One or more predetermined switch patterns can include but not limited to: full electric bridge pattern, half-bridge pattern, PWM mode, pulse-skip pattern and AC line voltage distribution pulse-skip pattern.DC/DC resonance converter 114 can be known as resonance converter simply.Be based on output place that launches device 110 and produce gain required during the sinusoidal envelope of rectification, resonance converter can be operated according to the predetermined switch pattern.When importing the output voltage high (having relatively high expectations from the gain that outputs to input voltage) that dc voltage is low and requirement produces, transducer is operated according to full electric bridge pattern so.In same circuit, require owing to can be used for the high voltage input of solar panels and need change when gain than low output voltage (gaining) from the low-voltage that outputs to input, transducer is operated according to the half-bridge pattern so.Between the peak period of sinusoidal wave (sinusoidal envelope), resonance converter is operated according to full electric bridge pattern.To drop on the device peak value half the when following when gain, the shutoff of one of mains switch of electric bridge inverter 102.For example, if S4 connects and S3 turn-offs, then resonance converter/circuit is operated according to the half-bridge pattern.
In addition, controller 112 is through producing the gain that the variable power switch frequency is come control inverter circuit 110, and the variable power switch frequency switches to resonance converter according at least a pattern operation in the above switching mode.In each above-mentioned switching mode, there are four kinds of constructions of switch of electric bridge inverter 102, describe these four kinds of constructions of switch in detail in conjunction with the circuit of Fig. 5 a, 6a and the sequential chart of Fig. 5 b and 6b.
According to embodiments of the invention, method of the present invention can realize being used for but be not limited to little inverter and serial type inverter (string inverter).Little inverter comprises inverter of each solar panels, and the serial type inverter comprises an inverter that is used for a plurality of solar panels.
Aforesaid the present invention helps to use the load resonant transducer in the solar inverter with control technology, and this control technology provides the load and the input voltage of wide region.Control technology of the present invention provides accurate voltage control under the load variations of wide region.In addition, realize high efficiency manipulation through ZVT or " soft switch " technology to solar inverter.During using the circuit operation of zero voltage switching technology, energized switch S 1-S4 is to provide in the transformer electric current of the energy path of flowing through.Through using the inverse parallel diode D1-D4 of suitable switching frequency and mains switch S1-S4, before these switch connections, on mains switch, keep no-voltage.The working load resonant circuit helps the DC/DC resonance converter of solar inverter more than the resonance frequency of LC accumulator, to operate.In resonant operation, the increase of switching frequency causes the reduction of transformer voltage.The improvement technology that is provided for solar inverter has that the switch littler than legacy system damages and than the assembly of employed lesser number in the legacy system.
For those of ordinary skills, be to be understood that and use resonance converter to be not limited only to solar inverter.Many other possibility systems that can have the resonance converter that uses and control.
Fig. 2 shows the block diagram according to one or more modules of the controller 112 of the resonant circuit 114 of the embodiment of the invention.As stated, inverter circuit 100 comprises DC/DC resonance converter 114, launches device 110 and controller 112.In order to describe in further detail, controller 112 comprises MPPT maximum power point tracking (MPPT) computing module 202, phase-locked loop (PLL) line frequency rectifier 204, current regulator 206, modulator 208, the first gate driver 210, zero crossing detector 212 and the second gate driver 214.
Controller 112 provides control to inverter circuit 100, and the adjusting of driving DC/DC resonance converter 114 according to the operation of predetermined switch pattern is provided, as stated.Control operation launches the electric current I of output place of device 110 through sensing
SensAnd begin.To current regulator 206 said electric current I is provided
Sens, current regulator 206 is with current sensor I
SensWith reference current I
SetCompare.Calculate reference current I through MPPT computing module 202
SetAmplitude/value.MPPT computing module 202 calculates from the input voltage and the electric current of dc voltage source (for example, solar panels) and this input voltage and electric current is locked onto its maximum power point (or value).In addition, produce reference current I from PLL line frequency rectifier 204
SetWaveform.In addition, PLL line frequency rectifier 204 receives the input signal from the AC line voltage distribution from the AC electrical network.The phase place of the AC line voltage distribution of PLL line frequency rectifier 204 locking supplies, and the waveform of generation reference signal.To multiply each other by amplitude and the waveform that MPPT computing module 202 and PLL line frequency rectifier 204 are produced through multiplier (as shown in Figure 2) respectively, produce reference current I
SetIt is obvious that to those skilled in the art reference current is the flow through expectation electric current of load.
Can also be with reference current I
SetWith current sensor I
SensBe applied to current regulator 206, current regulator 206 is with current sensor I
SensWith reference current I
SetCompare, provide through regulating electric current in output place.Subsequently, to modulator 208 output that produces from current regulator 206 is provided.Modulator 208 produces the output signal that comprises duty ratio 1 signal, duty ratio 2 signals, frequency signal and pulse-skip signal.According to embodiments of the invention, duty ratio 1 signal is the duty ratio of first switch leads (leg) that comprises the switch source of S1 and S2.Duty ratio 2 signals are the duty ratios of second switch lead-in wire that comprise the switch source of S3 and S4.In addition, frequency signal is represented the switching frequency of input bridge, and the pulse-skip signal is used under extremely low power output, producing pulse-skip.The combination of predetermined switch pattern can be used to operate resonance converter 114, thereby produces output expeditiously.The output of modulator 208 is offered the first gate driver 210, and the first gate driver, 210 control switch S1-S4 are according to one or more switch mode operation as stated.The scheduled operation switching mode of resonance converter is described in addition, in more detail.
Fig. 3 shows according to the modulator output that changes with respect to control variables under the normal load condition of the embodiment of the invention and changes.Fig. 3 shows duty ratio 1 signal, duty ratio 2 signals and frequency signal.Draw said signal according to full electric bridge pattern, half-bridge pattern and PWM mode to control variables.Control variables can be at least one in electric current and the voltage.
Fig. 4 shows another variation of exporting with respect to the modulator of control variables according under the low loading condition of the embodiment of the invention.Fig. 4 shows pulse-skip signal, duty ratio 1 signal, duty ratio 2 signals and frequency signal.Draw these signals according to full electric bridge pattern, half-bridge pattern, PWM mode, pulse-skip pattern and AC line voltage distribution pulse-skip pattern to control variables.
According to each embodiment of the present invention, defined the predetermined switch pattern of resonance converter 100 here.In full electric bridge pattern, each among the switch S 1-S4 is exercisable, and to top switch (for example, S1) with bottom switch (for example, S4) duty ratio of realization near 50%.In Fig. 5 a and Fig. 5 b, illustrated according to the operation of full electric bridge pattern and the gate sequence of switch.
In the half-bridge pattern, switch S 2 keeps turn-offing, and switch S 3 maintenance connections, makes electric bridge inverter 102 and half-bridge transducer operate similarly.The duty ratio that realizes to the operation of S1 and S4 according to this pattern is near 50%.Operation and switch gate sequence according to the half-bridge pattern have been shown in Fig. 6 a and Fig. 6 b.
In AC line voltage distribution pulse-skip pattern, resonance converter turn-offs in some line voltage cycles fully.This has increased underloaded efficient.
Fig. 5 a shows the circuit diagram according to the high gain operation of the inverter circuit of the embodiment of the invention.Typically, high gain operation comprises four console switch structures of inverter circuit (that is 502,504,506 and 508 (being referred to as 502-508)).
When according to 502 operations of first construction of switch, mains switch S1 and S4 connect.Therefore, flow through mains switch S1, inductor L of electric current
s, capacitor C
s, mains switch S4, and be back to power supply.According to 504 operating periods of second switch structure, all mains switch S1-S4 turn-off at electric bridge inverter 102, and electric current flow through diode D2 and D3 unfetteredly.During according to the 3rd construction of switch 506, mains switch S2 and S3 connect, and electric current flow through mains switch S3, capacitor C
s, inductor L
sWith mains switch S2.Because the voltage at mains switch S2 and S3 two ends is because the conduction of current (according to the operation of second switch structure 504) of flow through diode D2 and D3 is zero, so mains switch S2 and S3 have zero connection loss in the moment according to the connection of the 3rd construction of switch.
At last, in the operating period according to first construction of switch 508, all four mains switch S1-S4 turn-off, and electric current flow through diode D4, inductor L
sWith diode D1.The operation that it will be apparent to one skilled in the art that electric bridge inverter 102 is disposed among the 502-508 like said continuation, so that high-gain output to be provided in each switch periods according to four switches.In addition, the voltage at mains switch S1 and S4 two ends is at each switch periods time alternation.For example, after operation is accomplished more than four switches dispose among the 502-508, during next switch periods, the voltage vanishing at mains switch S1 and S4 two ends.
Fig. 5 b representes to show the sequential chart according to the various signals of the inverter circuit of the embodiment of the invention.Said sequential chart comprises the expression of first signal 510, secondary signal 512 and the 3rd signal 514.
The gate voltage at each mains switch S1 and S4 two ends is referred to as V
G1-V
G4First signal 510 shows inverter circuit 100 according to operating period (mains switch S1 and S4 connect) the mains switch S1 of first construction of switch 502 and the gate voltage V at S4 two ends therebetween
G1And V
G4Similarly, secondary signal 512 shows at inverter circuit 100 according to operating period (therebetween, mains switch S2 and S3 connect) the difference mains switch S2 of the 3rd construction of switch 506 and the gate voltage V at S3 two ends
G2And V
G3The 3rd signal 514 shows current waveform I
I, and expression offers the voltage V of the primary coil of transformer 106
ABStream of pulses.Voltage V
ABBe poor between the voltage of voltage and secondary signal 512 of first signal 510.In addition, current waveform I
IBe four AC waveforms that console switch structure 502-508 produces accordingly with inverter circuit 100.Current waveform I
IIt is the time time-dependent current at transformer 106 two ends.
Potential pulse stream and current waveform I shown in the 3rd signal 514
IBe based on four console switch structure 502-508.For example, during first construction of switch 502, when voltage switch S1 and S4 conducting, the voltage at transformer 106 two ends rises to V
pThe electric current at mains switch two ends rises in positive period and flows.In addition, during the 3rd construction of switch 506, when mains switch S2 and S3 conducting, voltage and current alternation on phase place at transformer 106 two ends; But has same magnitude.When circuit during according to second switch structure 504 and the operation of the 4th construction of switch 508, parasite current flow through respectively inverse parallel diode D2-D3 and D1-D4.Therefore, connecting (during first construction of switch 502 and the 3rd construction of switch 506) constantly, mains switch has zero and connects loss.
Fig. 6 a shows the circuit diagram of the low gain operation of inverter.Typically, the low gain operation comprises four console switch structures of inverter circuit (that is, 602,604,606 and 608) (being referred to as 602-608).
According to 602 operating periods of first construction of switch, mains switch S1 and S4 connect.Therefore, flow through mains switch S1, inductor L of electric current
s, capacitor C
s, mains switch S4, and be back to power supply.In addition, according to 604 operating periods of second switch structure, mains switch S1, S2 and S3 turn-off at electric bridge inverter 102, and mains switch S4 keeps connecting.Electric current flow through diode D2, inductor L unfetteredly
s, capacitor C
sWith mains switch S4.During according to the 3rd construction of switch 606, mains switch S2 and S4 connect, and mains switch S1 and S3 turn-off.Electric current flow through mains switch S2, S4, capacitor C
sWith inductor L
sBecause the voltage at mains switch S2 two ends is owing to the conduction of the electric current of the diode D2 that flows through is zero, therefore according to the operating period of second switch structure 604, mains switch S2 has zero in the operating period according to construction of switch 608 constantly in connection and connects loss.
At last, according to the operating period of the 4th construction of switch 608, mains switch S1, S2 and S3 turn-off, and mains switch S4 keeps connecting.Electric current flow through mains switch S4 and diode D1.The operation that it is obvious to the skilled person that electric bridge inverter 102 is according to four construction of switch 602-608 such as said continuation, so that low gain output to be provided in each switch periods.In addition, the voltage at mains switch S1 two ends is at each switch periods time alternation.For example, after the operation, during next switch periods, voltage is in mains switch S1 two ends vanishing more than accomplishing according to four construction of switch 602-608.
Fig. 6 b shows the sequential chart according to each signal of the inverter circuit of the embodiment of the invention.Said sequential chart comprises the expression of first signal 610, secondary signal 620 and the 3rd signal 614.
The gate voltage at each mains switch S1, S2, S3 and S4 two ends is called V respectively
G1, V
G2, V
G3And V
G4First signal 610 shows the gate voltage V of the inverter circuit of solar inverter 100 according to first construction of switch 602 operating periods (mains switch S1 and S4 connect) mains switch S1 two ends therebetween
G1Similarly, secondary signal 612 shows at the gate voltage V of inverter circuit 100 according to the 3rd construction of switch 606 operating periods (therebetween, mains switch S2 and S4 connect) mains switch S2 two ends
G2The 3rd signal 614 shows current waveform I
I, and expression offers the voltage V of the primary coil of transformer 106
ABStream of pulses.Voltage V
ABBe poor between the voltage of voltage and secondary signal 612 of first signal 610.In addition, current waveform I
IBe four AC waveforms that console switch structure 602-608 produces accordingly with inverter circuit 100.Current waveform I
IIt is the time time-dependent current at transformer 106 two ends.
Potential pulse stream and current waveform I shown in the 3rd signal 614
IBe based on four console switch structure 602-608.For example, during first construction of switch 602, when mains switch S1 and S4 conducting, the voltage at transformer 106 two ends rises to V
pThe electric current at mains switch two ends rises in positive period and flows.During the 3rd construction of switch 606, when mains switch S2 and S4 conducting, voltage and current alternation on phase place at transformer 106 two ends; But has same magnitude.In addition, when circuit during according to second switch structure 604 and the operation of the 4th construction of switch 608, parasite current flow through respectively inverse parallel secondary D2 and D1.Therefore, connecting (during first construction of switch 602 and the 3rd construction of switch 606) constantly, mains switch has zero and connects loss.
Fig. 7 a shows the sequential chart of operating according to PWM mode according to the resonance converter of the embodiment of the invention.Said sequential chart is depicted as expression first signal 702, secondary signal 704, the 3rd signal 706 and the 4th signal 708.
The gate voltage at each mains switch S1, S2, S3 and S4 two ends be called with Fig. 7 a in signal 702,704,706 and 708 corresponding V
G1, V
G2, V
G3And V
G4
Fig. 7 b is the sequential chart of operating according to pulse-skip pattern and half-bridge pattern according to the resonance converter of the embodiment of the invention.Sequential chart shows first signal 710, secondary signal 712, the 3rd signal 714, the 4th signal 716 and pulse-skip signal 718.
The gate voltage at each mains switch S1, S2, S3 and S4 two ends be called with Fig. 7 b in signal 710,712,714 and 716 corresponding V
G1, V
G2, V
G3And V
G4In addition, in the half-bridge pattern, apply pulse-skip signal 718.
Fig. 7 c is the sequential chart of operating according to AC potential pulse dancing mode and full electric bridge pattern according to the resonance converter of the embodiment of the invention.Sequential chart shows first signal 720, secondary signal 722 and pulse-skip signal 724.
The gate voltage at each mains switch S1-S4 two ends be known as with Fig. 7 b in signal 710,712,714 and 716 corresponding V
G1, V
G2, V
G3And V
G4In addition, apply pulse jump signal 718 in the half-bridge pattern.
Fig. 7 c is the sequential chart of doing in AC potential pulse dancing mode and full electric bridge mode according to the resonance converter of the embodiment of the invention.Sequential chart shows first signal 720, secondary signal 722 and pulse-skip signal 724.
The gate voltage at each mains switch S1-S4 two ends is referred to as V
G1-V
G4And it is corresponding with signal 720.In addition, the gate voltage at each mains switch S2-S3 two ends is referred to as V
G2-V
G3And it is corresponding with signal 722.Shown in Fig. 7 a, said circuit is operated according to PWM mode.The pulsewidth of gate-control signal changes in response to control variables.Reduced-current output if desired, then said circuit is operated according to the half-bridge pattern.Said gate be frequency controlled and/or pulsewidth controlled.
According to the embodiment of the invention, when requiring under the utmost point low-power function circuit, said circuit is operated according to the pulse-skip pattern.When the pulse-skip signal was high, bridge switches S1, S2, S3 and S4 continued their normal running, and for example, switch is according to half-bridge pattern or full electric bridge pattern operation.When the pulse-skip signal was low, switch S 1, S2, S3 and S4 turn-offed so.This economizes on electricity according to the low-power output mode.In addition, contrast signal 720 and 722 applies pulse-skip signal 724 according to full electric bridge pattern.
Fig. 8 shows the flow chart of method that is used for controlling the resonance converter that solar inverter uses according to the embodiment of the invention.Resonance converter can comprise the combination of one or more inductors, one or more capacitor and inductor and capacitor.
At first, at 802 places, based on power supply and the current value and the solar inverter output generation reference current of direct current (DC) voltage source.The flow valuve of said benchmark electricity is corresponding with maximum power point.Maximum power point is that the dc voltage source operates in to guarantee from the value of dc voltage source Maximum Power Output.In addition, produce the waveform of reference current through PLL line frequency rectifier 204.PLL line frequency rectifier 204 and AC synchronized.Then, at 804 places, reference current is compared with current sensor.After carrying out relatively, at 806 places, modulator 208 produces the operation of drive signal with the control resonance converter.Through resonance converter is switched to the operation that another predetermined switch pattern (half-bridge switches pattern) is controlled resonance converter from a predetermined switch pattern (for example, full bridge switches pattern).In addition, the control resonance converter is to produce an AC voltage.Said method comprises through the predetermined switch pattern that changes resonance converter controls the voltage from the dc voltage source.In addition, this method comprises the zero crossing of confirming solar inverter output.
Fig. 9 shows the flow chart that produces electric power according to the controlled resonant circuit of the use of the embodiment of the invention.
At first, at 902 places, the dc voltage source V of Fig. 1
DcProduce first dc voltage.After this,, produce an AC voltage according to first dc voltage at 904 places.Use controlled resonance converter to produce an AC voltage.As stated, resonance converter is operated according to the predetermined switch pattern.Then, at 906 places, an AC voltage is amplified, wherein an AC voltage is amplified by transformer 106.After amplifying, at 908 places, an AC voltage transitions of amplifying is become the dc voltage through rectification, conversion is carried out by bridge rectifier 108.Dc voltage through rectification is sinusoidal wave through the DC of rectification.At last, at step 910 place,, will convert the 2nd AC voltage that will be supplied to main electrical network to through the dc voltage of rectification through launching dc voltage through rectification.This can carry out through launching device 110.This method comprises the gate-control signal that produces to the expansion device 110 of solar inverter.In addition, launch device at least one operation according to electrical network connection mode and stand-alone mode.
Launch device 110 according to the operation of electrical network connection mode, to confirm the gate-control signal at alternation zero crossing place.Alternatively, launch device 110, electric current will be launched and reference current is synchronous according to the stand-alone mode operation.
The invention described above has various advantages.Particularly, the present invention provides a kind of improvement topological structure that is used for controlling the solar inverter resonance converter.Said improved topological structure helps high efficiency and reliability, has reduced cost and has needed a spot of assembly.Because said topological structure needs a spot of assembly, so solar inverter consumes less space.The present invention also concentrates on and only uses a switching stage, and this helps farthest to reduce switch or frequency loss.In addition, said topological structure concentrates on and on the operating condition of wide region, controls resonance converter efficiently.
As according to the invention, the method and system that is used to control resonance converter or its any assembly can be realized with the form of embedded controller.Other equipment or apparatus arrangement that the typical case of embedded controller comprises all-purpose computer, programmable microprocessor, microcontroller, peripheral integrated circuit component, ASIC (special circuit), PLC (programmable logic controller (PLC)) and can realize constituting the step of the inventive method.
Embedded controller execution store instruction (or program command) set in one or more memory elements is imported data to handle.These memory elements can also keep data or other information as required, and can be employed in the information source that occurs in the handling machine or the form of physical memory element.Instruction set can comprise each order of indication handling machine execution particular task (for example constituting the step of the inventive method).Instruction set can adopt the form of software or firmware program.In addition, software or firmware can adopt a large amount of separation program, have form than the part of the program module of large program or program module.
Although explained and described each embodiment of the present invention, be clear that to the invention is not restricted to these embodiment.Under the prerequisite that does not deviate from spirit and scope of the invention, various modifications, change, variation, replacement and equivalent are conspicuous to those skilled in the art.