WO2003094333A1

WO2003094333A1 - Switching type power converter circuit and method for use therein

Info

Publication number: WO2003094333A1
Application number: PCT/US2003/013540
Authority: WO
Inventors: Gabriel Scarlatescu
Original assignee: Oltronics, Inc.
Priority date: 2002-05-02
Filing date: 2003-05-01
Publication date: 2003-11-13
Also published as: AU2003234316A1; EP1525654A1

Abstract

A switching type power converter circuit includes a step-down converter circuit, a DC/AC converter circuit coupled to the step-down converter circuit, and a rectifier circuit coupled to the DC/AC converter circuit. In one embodiment, the DC/AC converter operates with near 50% duty cycle and with substantially zero-voltage, substantially minimum current switching in a resonant mode. An auxiliary step down converter may be added. An AC/DC converter front end with a full-wave bridge, a RF filter, and a power factor correction circuit may also be added.

Description

SWITCHING TYPE POWER CONVERTER CIRCUIT AND METHOD FOR

USE THEREIN

Field Of The Invention The present invention relates to electromc power conversion circuits, and more specifically, to switching type power converter circuits.

Background Of The Invention

Many systems employ power converter circuits. These circuits receive electrical power in one form and convert it to another form, for example, to a form that is usable by electrical equipment employed within the particular system.

One type of power converter circuit is referred to as a switching type power converter circuit or simply a switching power supply. Switching type power converter circuits make use of switches, as well as capacitors, inductors and/or transformers, in order to convert the electrical power from one form to another. These switches have an on state and an off state. The on state is sometimes referred to as the closed state or the conducting state. The off state is sometimes referred to as the open state or the non-conducting state. As with many power converter circuits, a switching type power converter circuit is often expected to operate with a particular level of efficiency and to provide a particular level of regulation over line and load changes.

The efficiency of a switching type converter circuit depends in part on the amount of power that is dissipated across the switches. The power loss across the switches is equal to the product of the voltage across the switch and the current through the switch. In this regard, the losses during the transitions from the on state to the off state, and vice versa, are often the main design concern. (When the switch is in the on state, the voltage across the switch is ideally zero. When the switch is in the off state, the current through the switch is zero.) Losses can occur during the transition from the on state to the off state, and vice versa, if there is a non-zero voltage across the switch and non-zero current through the switch. Such losses are proportional to the product of the power lost per transition and the switching frequency. Therefore, to reduce the losses across a switch, a zero-current condition is desired while the switch transitions from the on state to the off state, and a zero-voltage condition is desired while the switch transitions from the off state to the on state. Several techniques have been introduced, which accomplish zero-voltage switching inherently at constant switching frequency. One of these techniques requires a full-bridge switching arrangement with four primary switches in which the regulation is accomplished by phase shift modulation. This technique has several drawbacks including the limited availability of phase-modulated integrated control circuits and the large number of parts, which include four primary switches, at least two secondary switches and at least two large magnetic circuit elements. The technique suffers from an inability to accomplish zero-voltage switching at light loads without additional circuit elements and additional complexity. Another circuit to address this purpose is based on the single-ended forward converter that accomplishes zero-voltage switching by addition of an extra primary side switch and capacitor. Disadvantages of this converter include additional voltage stress on the primary switching elements required to reset the transformer core. The parts required are two large magnetic circuit elements, the transformer and the filter inductor, two primary switches, a large primary capacitor, and two secondary switching elements. There is one example of prior art that accomplishes a zero-voltage switching converter which has a single magnetic circuit element, accomplishing both magnetic energy storage and isolation. This converter relies on high AC magnetizing fields in order to accomplish zero-voltage switching, requiring that the magnetizing field and the magnetizing current change sign during each cycle. However, the increased losses impose a limit on the level of power density and efficiency that can be obtained with this approach.

Notwithstanding the performance level of current switching type power converter circuits, further improvements are sought.

Summary Of The Invention

According to one aspect of the present invention, a power converter apparatus is provided. The power converter apparatus comprises a step-down converter circuit of switching type having an input port to couple to a supply voltage and having an output port to provide an output voltage at a magnitude that is lower than a magnitude of the supply voltage, and having a control circuit to receive a feedback signal and regulate the magnitude of the output voltage in response thereto; a DC/ AC converter circuit of switching type having a primary side and a secondary side, the primary side having an input port coupled to the output port of the step-down converter circuit, the secondary side having an output port to provide an AC output voltage; a rectifier circuit having an input port and an output port, the input port being coupled to the secondary side of the DC/ AC converter circuit, the output port supplying a DC voltage; and a feedback circuit to generate the feedback signal in response to the output port of the rectifier circuit.

According to another aspect of the present invention, a power converter apparatus is provided. The power converter apparatus comprises step down converter means for receiving a supply voltage and generating an output voltage at a magnitude that is lower than a magnitude of the supply voltage, the step down converter means including means for regulating the output voltage in response to a feedback signal; a DC/AC converter circuit of switching type having a primary side and a secondary side, the primary side having an input port coupled to the output port of the step-down converter circuit, the secondary side having an output port to provide an AC output voltage; a rectifier circuit having an input port and an output port, the input port being coupled to the secondary side of the DC/ AC converter circuit, the output port supplying a DC voltage; and a feedback circuit to generate the feedback signal in response to the output port of the rectifier circuit. According to another aspect of the present invention, a power converter apparatus is provided. The power converter apparatus comprises a step down converter means for receiving a supply voltage and generating an output voltage at a magnitude that is lower than a magnitude of the supply voltage, the step down converter means including means for regulating the output voltage in response to a feedback signal; a DC/AC converter means for receiving the output voltage of the step down converter means and providing an AC output voltage; a rectifier means for coupling to the secondary side of the DC/AC converter means and supplying a DC voltage; and a feedback means for receiving the DC output voltage of the rectifier means and generating the feedback signal supplied to the step down converter means.

According to another aspect of the present invention, a method for a power converter is provided. The method comprises: receiving a supply voltage and generating a first output voltage having a magnitude that is lower than a magnitude of the supply voltage, where the act of generating comprises regulating the first output voltage in response to a feedback signal; generating an AC voltage from the first output voltage; rectifying the AC voltage to provide a DC voltage; and generating the feedback signal in response to the DC voltage.

Notwithstanding the potential advantages of one or more embodiments of one or more aspects of the present invention, it should be understood that there is no requirement that any embodiment of any aspect of the present invention address the shortcomings of the prior art.

This invention and/or embodiments thereof will be more fully appreciated and understood from the accompanying detailed description in conjunction with the accompanying drawings.

Brief Description Of The Drawings

FIG. 1 is a block diagram of an AC/DC power supply that incorporates a DC/DC power converter according to one embodiment of the present invention;

FIG. 2 is a diagram of one embodiment of the AC/DC and PFC stages of the AC/DC power converter circuit of FIG. 1 ;

FIG. 3 is a schematic diagram of one embodiment of the step-down converter circuit and the DC/ AC circuit of the DC/DC power converter circuit of FIG. 1;

FIG. 4 is a schematic diagram of one embodiment of the third stage of the DC/DC power converter circuit of FIG. 1; FIG. 5 shows a representation of an equivalent circuit (from an AC viewpoint) for the step-down converter circuit and the DC/ AC converter circuit of FIG. 3;

FIG. 6 shows signal timing waveforms for one embodiment of the DC/DC power converter circuit of FIG. 1 ;

FIG. 7 is a schematic diagram of another embodiment of the first and second stages of the DC/DC power converter circuit of FIG. 1 ; and

FIG. 8 is a schematic diagram of another embodiment of the third stage of the DC/DC power converter circuit of FIG. 1.

Detailed Description FIG. 1 shows an AC/DC power supply 100 that incorporates a DC/DC power converter circuit in accordance with one embodiment of the present invention. The DC/DC power converter circuit of the present invention may be used by itself, as a DC/DC power supply, or may be combined with one or more other circuits in forming other types of power supply circuits, for example as shown in FIG. 1 to provide an AC/DC power supply.

The AC/DC power supply 100 has three stages: an AC/DC converter stage 101, a power factor control (PFC) stage 102, and a DC/DC converter stage 103. The DC/DC converter stage 103 includes a step-down converter circuit 110, a DC/ AC converter circuit 111, a rectifier circuit 112 and a feedback circuit 113. The step down converter circuit 110 and the DC/AC converter circuit 111 are each switching-type power converter circuits. In operation, AC power, provided from an AC supply (e.g., AC supply mains, not shown), is supplied via signal line(s) (represented by a signal line 120) to the AC/DC converter stage 101. The AC/DC converter stage 101 outputs a rectified voltage, which is supplied through signal line(s) (represented by a signal line 121) to the PFC stage 102. The PFC stage 102 applies power factor correction to raise the power factor of the AC/DC power supply circuit 100. If the power factor coiTection is ideal, then the power factor will reach unity and the AC/DC power supply will appear purely resistive to the AC supply mains. However ideal power factor correction may not be needed or obtained in all applications. The output of the PFC stage 102 is a regulated DC voltage, which is supplied through signal line(s) (represented by a signal line 122) to the step-down converter circuit 110 of the DC/DC converter stage 103. The step-down converter circuit 110 outputs a regulated DC voltage, the magnitude of which is lower than the magnitude of the voltage into the step-down converter circuit. The regulated DC voltage from the step-down converter circuit 110 is supplied through signal line(s) (represented by a signal line 123) to the DC/ AC converter circuit 111. The DC/AC converter circuit 111 converts the regulated DC voltage to an AC voltage, which is supplied through signal lines 124 to the rectifier circuit 112. The rectifier circuit 112 generates a DC voltage, V_outi, which is the output voltage of the AC/DC power supply 100. The feedback circuit 113 receives the output voltage (through signal line(s) represented by a signal line 125) and supplies a feedback signal (through signal line(s) represented by a signal line 126) to the step-down converter circuit 110. The feedback signal is preferably an isolated feedback signal, although this is not a requirement. The step-down converter circuit 110 regulates its own output voltage such that the output voltage V_outι has the desired magnitude. As shown in FIG. 1, the output of the DC/DC power converter circuit 103 also may be supplied to another step-down converter circuit 130 to generate one or more auxiliary outputs, such as, for example, V_outιsι, although this is not required. Auxiliary outputs may also be provided by supplying the output of the DC/ AC converter 111 to an additional rectifier circuit 135 that feeds a step-down converter circuit 136.

The AC/DC power supply may be provided with one or more additional DC/DC power converter circuits, for example as indicated at 132, to generate additional DC output voltages, such as, for example, V_out2. These additional DC/DC power converter circuits may be similar to the DC/DC power converter circuit 103 described above. FIG. 2 shows a further detail of one possible embodiment of the AC/DC and PFC stages 101, 102. The input to the AC/DC stage 101 is a voltage, V_ac, which is supplied through signal lines 120A, 120B. The output of the AC/DC stage 101 is a voltage Vj_n, which is supplied through signal lines 121 A, 12 IB to the input port of the PFC stage 102. The output of the PFC stage 102 is an output voltage V_PfC, which is supplied through signal lines 122 A, 122B.

In this embodiment, the AC/DC stage 101 includes an optional filter circuit 201 and a rectifier circuit 202. The optional filter circuit 201 comprises a conventional RF filter circuit. The rectifier circuit 202 preferably has a bridge topology (not shown) to convert a sinusoidal signal to a full-wave rectified signal, V;_n. The PFC stage 102 includes an inductor 203 (of inductance Lpfc), a diode 204, a capacitor 205, a switch 206, a sense resistor 207 and a PFC control circuit 208. The capacitor 205 is connected across the output of the PFC stage 102, which supplies a current, Iι_oa , to a load; in some embodiments Ij_oad is constant, but it need not be. The inductor 203 and the diode 204 are connected in series with the capacitor 205. The switch 206 and a sense resistor 207, of value R_sense₅ are connected in series between a node 209 and the signal line 122B.

The duty cycle of the switch 206 is controlled by the control circuit 208. In the on state, the switch 206 provides a shunt path (through the sense resistor 207) that causes an increase in the current in the inductor 203. In the off state, the current in the inductor relaxes (decreases). The control circuit 208 varies the duty cycle of the switch 206 based on the input voltage Y-_m and average output current (which is determined indirectly based on variations in the output voltage V_pfC) to obtain a DC level at the output voltage V_PfC. If the load is constant, then the average current through the inductor 203 is equal to the load current Iι_oad- As stated above, if the power factor correction is ideal, then the power factor will reach unity and the AC/DC power supply will appear purely resistive to the AC supply mains. FIG. 3 shows a schematic diagram of one embodiment of the step-down converter circuit 110 and the DC/AC converter circuit 111 of the DC/DC power converter circuit 103 (FIG. 1). In this embodiment, the step down converter circuit 110 includes an inductor 311 , a diode 312, a switch 313, a control circuit 315 and a capacitor C_pp. The switch may, for example, comprise a transistor (e.g., an n-channel MOSFET) and an integral diode, represented by a diode 314. The input to the step-down converter circuit 110 is V_pfc (i.e., the output of the PFC stage 102 (FIGS. 1, 2)). The output of the step- down converter circuit 110 is Vhb, which in this embodiment, appears across a capacitor

Cpp.

A first terminal of the inductor 311 is coupled to a first terminal of the capacitor C_pp at node or line 123B, a second terminal of which is coupled to the signal line 122A. The second terminal of the inductor 311 is coupled to a first terminal of the switch 313, a second terminal of which is coupled to the signal line 122B. The diode 312 couples the second terminal of the inductor to the signal line 122 A. The control circuit 315 receives a feedback signal from the feedback circuit 113 (FIG. 1) and supplies a signal to control the state of the switch 313. The control circuit 315 may, for example, comprise an MC33364 integrated circuit manufactured by Motorola.

As used herein, the term "coupled to" includes connected directly to and connected indirectly to (i.e., through one or more elements).

In operation, the control circuit 315 varies the on/off frequency of the switch 313 based on the feedback signal, to thereby vary the voltage across the capacitor C_pp so as to obtain the desired output voltage, V_outi₅ at the output of the DC/DC power converter circuit 103.

As stated previously, losses in a switch can be reduced by establishing a zero- voltage condition across a switch while the switch transitions from the off state to the on state. Consequently, some embodiments may include features to establish a zero (or near zero) voltage condition across the switch 313 at turn on of the switch. The phrase "turn on of the switch" refers to the instant at which the switch starts to transition from the off state to the on state. For example, in this embodiment, the step-down converter circuit 110 operates in a discontinuous mode in which the magnetic flux through the inductor 311 is periodically reset to 0. This is referred to as critical conduction mode. More particularly, the current through the inductor 311 rises while the switch 313 is in the on state, and resets to zero while the switch is in the off state. In addition, the voltage across capacitor C_pp , i.e., V_hb, is chosen to be at least Vz of V_Pf_C. For example, in this embodiment, Vhb is chosen to be equal to about ³λ of V_PfC. The use of critical mode conduction in combination with the use of Vhb greater than or equal to about 1/2 of V_Pf_C, results in a zero-voltage condition across the switch 313 at turn on of the switch 313. This helps minimize the losses in the switch 313.

Some embodiments may not provide zero-voltage switching but may nonetheless provide substantially zero-volts switching. Substantially zero-volts means that the voltage across the switch is less than or equal to 10% of the maximum voltage observed across the switch while the switch is in the off state. Note that if the integral diode across the switch is forward biased, then the voltage across the switch will be clamped and will be substantially zero volts.

It should be understood that other embodiments need not use critical conduction mode. The step-down converter can work with fixed frequency or variable frequency. If the fixed frequency mode is chosen, then a frequency equal to the DC/ AC converter or a multiple of this frequency is a good choice, in order to have less interference and audible noise between these two stages. The disadvantage of a fixed frequency mode is that it cannot achieve zero voltage across the switch without special techniques.

The variable frequency mode, which is also called the critical conduction mode, is relatively straightforward to implement and may have a higher efficiency than the fixed frequency mode. One disadvantage however, is that the variable frequency mode may result in a large frequency variation (e.g., 200kHz-700kHz) as the load changes from maximum to minimum. A large frequency variation can make it more difficult to compensate the loop to achieve stability across all line and load conditions.

The voltage V_c (across lines 122B, 123B),which is a fraction of V_PfC, establishes the amount of energy available to supply to the load in the event that the AC power to the AC/DC power supply 100 is removed. Thus, in some embodiments, V_c, is selected so as to be able to provide a "hold-up time" that is long enough for the system to perform any required maintenance prior to powering down.

The DC/ AC converter circuit 111 includes a bridge circuit 300, a transformer 318, and a capacitor assembly that includes capacitors C_psι, C_ps . The bridge circuit 300 includes a pair of switches S_pl, S_p2. Each of the switches may, for example, comprise a transistor (e.g., an n-channel MOSFET). In this embodiment, switch S_pl has an integral diode, indicated at D_pl, and a parasitic capacitance, represented at C_spl. Similarly, switch S_p2 has an integral diode, indicated at D_p , and a parasitic capacitance, represented at C_sp2. The bridge circuit 300 is coupled across the output of the step-down converter stage, which provides a voltage Vhb- More particularly, a first terminal of the bridge circuit 300 is coupled to the first terminal of the capacitor C_pp. A second terminal of the bridge circuit 300 is coupled to the second terminal of the capacitor C_pp.

The capacitors C_psl, C_ps2 are connected in series with one another, the series combination being connected in parallel with the capacitor C_pp. The transformer 318 includes a primary side winding, indicated at L_p, and two secondary side windings, indicated at L_S1A and L_S2A. A leakage inductance Li and a resistance R_sf_s are also shown.

A first terminal of the primary side winding of the transformer 318 is coupled to an output of the bridge circuit 300 at node 322. A second terminal of the primary side winding is coupled to node "b" between the capacitors C_psl and C_ps . The secondary windings provide the AC output voltage from the DC/AC converter circuit 111.

The DC/AC converter circuit further includes a control circuit 321 which supplies a respective control signal to each of the switches S_pι, S_p . In this embodiment, the control signals each have a fixed frequency and a near 50% duty cycle. The term "duty cycle" refers to the "on" time (i.e., the amount of time that a switch is commanded to the on state) divided by the period of a switching cycle, i.e., T_On/(T_0n+ of_f)- The phrase "near 50%" means greater than or equal to about 40%. Note that the switches S _l, S_p usually exhibit some amount of turn-off delay; therefore, it may be desirable to keep the duty cycle less than or equal to 48%, so as to reduce the possibility of cross conduction (where switches Spi, S_p2 are both on at the same time). The control circuit may be implemented in any manner; some embodiments may use an MC34067 integrated circuit manufactured by Motorola, although this is not required for the present invention. The duty cycle may be fixed, although this is not required. However, operating the DC/AC converter circuit at a fixed frequency and a fixed, near 50% duty cycle ratio, helps reduce output ripple across the capacitor C_out- This, in turn, helps reduce the size of the smoothing filter, discussed below, and thereby helps improve efficiency and loop stability. For purpose of an operational state analysis, it is assumed that the filter capacitor

309 is sufficiently large so that the voltage developed across the capacitor is approximately constant over the switching interval. The transformer 318 windings may have a coupling coefficient close to unity. The resulting leakage inductance is called Li. The internal resistance of the primary winding (R_Sf_S) is usually close to zero so it will be ignored. Furthermore it will be recognized that, while only a single-output version is considered in this analysis, multiple output voltages may be obtained through the addition of windings, switches, synchronous rectifier gate drives, rectifier diodes and capacitors operated as herein to be described.

FIG. 4 shows one example of an embodiment of the rectifier circuit 112 of the DC/DC power converter circuit 103 (FIG. 1). The rectifier circuit 112 includes a bridge circuit 600 and a capacitor C_out- The bridge circuit 600 includes two synchronous rectifier switching gate drive devices S_sl, S_s . A first terminal of the switch S_sι is coupled to a first terminal of the secondary winding L_SIA, a second terminal of which is coupled to a first terminal of the secondary winding L_S2A- A first terminal of the switch S_s is coupled to a second terminal of the secondary winding L_S2A- A first terminal of the capacitor C_out is coupled to the common node (center tap) of the secondaries L_S1 , L^A- A second terminal of the switch S_sl is coupled to a second terminal of the capacitor C_out and to the second terminal of the switch S_s .

In operation, the near 50% duty cycle ratio synchronuos gate drive circuit 321, operates the devices from the secondary side (S_sι, S_s2) substantially simultaneously with the devices on the primary side (S_sl, S_s2).

If synchronous gate drive switches are used in the rectifier's place within the third stage, a bidirectional power flow from primary side to secondary side and vice-versa is obtained due to the synchronization of the switching pairs (S_pι, S_sl) and (S_p2s S_s2). In this respect, if V_Pfc is zero and an external voltage is applied to the output (V_out), a proportional voltage (V_hb) will be found in the primary side. FIG. 4 also shows the secondary windings L_S1A, L_S2A from the DC/AC converter circuit 111 (FIG. 3), a feedback circuit 608, and an optional smoothing circuit 610. The feedback circuit 608 receives the output and supplies a feedback signal to the step-down converter stage 110 (FIG. 3). The optional smoothing circuit 610 includes a choke (inductor) 606 and a capacitor 607 that are connected in series between the center tap of the secondaries L_SIA, L_S2A and the output of the bridge circuit 600. The capacitor 607 is coupled across the output nodes, where the voltage V_out appears.

It has been determined that the inductance of the output filter choke 606 may be relatively small compared to that regularly used in power supply output stages. This is in part due to the near 50% duty cycle ratio employed in this embodiment of the DC/ AC converter circuit. A small output filter choke has two potential advantages. First, it helps minimize the current path for high current outputs, thereby enhancing the overall efficiency. Second, it implies a small phase shift for the output filter, and therefore control loop stability and response are greatly enhanced. In this embodiment, the impedance of the capacitor 607 (Zc)is relatively small compared to the impedance of the output filter choke 606 (ZL). For example, Zc may be less than or equal to Zι/20 at a frequency equal to twice the operating frequency of the DC/ AC converter circuit. The output filter operates at twice the frequency of the DC/ AC converter circuit because, for each switching cycle of the DC/AC converter circuit, there are two switching cycles in the rectifier circuit (one cycle for each of S_sι and S_s2).

FIG. 5 shows a representation of an equivalent circuit (from a dynamic or AC viewpoint) for the step-down converter circuit 110 and the DC/AC converter circuit 111 shown in FIG. 3. The equivalent circuit can be analyzed from this dynamic, or AC, point of view, in terms of two states. In a first state, one of the switches S_pl, S_p2 is in the on state. As to the primary side, there is a series circuit formed by Li (the equivalent leakage inductance of the transformer 318), L_p (the primary winding of the transformer 318) and an equivalent capacitor C_ps having a value equal to the sum of C_psl and C_ps2. In this embodiment, the value of C_pp is considerably larger than the value of C_ps and the variation of the voltage across C_out (at nominal current of the output) (Fig. 4) is relatively small compared to the output voltage, during an interval of time equal to the sum of T_on and T_0ff (see FIG. 6). In addition, it has been assumed that the magnitude of the ripple voltage at node 402 is small enough, compared to the magnitude of V_hb, to be ignored in this analysis, although the present invention is not limited to such.

As to the secondary side of the transformer 318, one of the rectifying switches S_sl or S_s2 is also closed (see FIG. 4). As stated above, if the capacitance of capacitor C_out is large enough at the working frequency (of the DC/AC converter circuit), then one of the secondary windings L_S1A or L_S2A will be essentially short-circuited by the low AC impedance of capacitor C_out. Consequently, the primary winding L_p will present an impedance that is almost zero. A series circuit is thus formed by the leakage inductance Li and capacitance C_ps (i.e., the parallel combination of C_psl and C_ps2). As stated previously, losses in a switch can be reduced by establishing a zero- current condition while the switch transitions from the on state to the off state. As such, some embodiments may include features to establish a zero-current condition at turn-off times of the switch. The phrase "turn-off times of the switch" refers to the instant at which the switch starts to transition from the on state to the off state. Some embodiments may not provide zero current switching but may nonetheless provide substantially minimum current switching. "Substantially minimum current" means that the current through the switch, at the instant that the switch is turned on, is less than or equal to about 20% of the maximum current observed through the switch under nominal output power conditions. In order to achieve a substantially minimum current turn off for the switches, the relationship between the working frequency (F) of the DC/ AC converter circuit and the value of the two mentioned components should be:

F = l/(2*π *jLl *Cps) The resulting timing for the current waveform in the primary winding of transformer 318 is shown in FIG. 6.

With the component values selected as described above, the frequency of the drive circuit 321 may be set equal to or approximately equal to the resonant frequency.

Thereafter, in the operation of the circuit, the drive circuit 321 turns the switches off and on at the resonant frequency and the desired resonant behavior is automatically provided by the circuit. As a result, at the moment that a switch on the primary side is turned off, the current through that particular switch is at its minimum value. Note that in this embodiment, this current is not equal to zero. Because the current on the secondary side is related to the current on the primary side, the current on the secondary side is also at its minimum.

In a second state, both switches S_pl and S_p2 are open. In order to reduce losses when one of the above switches is going to be turned on, a zero-voltage condition on that switch is desired at the turn-on time. This condition can be fulfilled if:

(1) There is enough magnetizing energy stored in the primary transformer winding L_p during a conduction period of time (marked as Ton in FIG. 6) in order to modify the potential V₄₀₁of node 401 from the potential V₄₀₃ at node 403 to the potential V₄₀₄ at node 404 or vice- versa, and

(2) There is enough dead time (marked as Toff in FIG. 6) between the moment when one of the switches S_pl or S_p2 goes off and the other one goes on, to get a zero-voltage condition at the turn-on time.

These two conditions can be reformulated in the following way:

T = 2* (Ton + Toff)

Csp = Cspl + Csp2

Cps = Cpsl + Cps2

The magnetizing value of the current through L_p at the end of the conduction period (Ton) is:

Ipmag = Vhb /Lp * Ton During T_0ff, a resonant circuit is formed by L_p and the parasitic capacitors connected to node 401, referred to as C_sp. The magnetizing energy of L_p is transferred to C_sp and from the equivalence of the energies we have the following formula:

Lp* Ipmag²12 ≥ Csp*Vhb²12

Lp ≤ Ton² 1 Csp

Toff ≥ l/2 *2 *π * jLp*Csp

Lp ≤ Toff² l(π² *Csp)

Based on the above relations, we can estimate the values for L_p, Li, T_on and T₀ff. Zero voltage switching is achieved as a result of transferring the magnetic energy to the parasitic capacitance at node 401 as follows. First, due to the symmetrical switching waveform, it can be assumed that the DC voltage across C_psι and C_ps2 are equal to another.

Thus, the potential of node 402 is approximately Vi of V_hb (as measured against node 404).

Furthermore, assuming that S_p2 is on, the voltage on node 401 is zero relative to node 404.

The current in S_p ramps up and the magnetic energy in the core increases accordingly. If S_p is turned off, then the magnetizing energy stored in the primary of the transformer is delivered to node 401 until the potential of node 403 is reached. With the potential at node 401 equal to the potential of node 403, the voltage across S_pl is zero.

To get the desired amount of energy delivered to node 401, the value of the inductance is chosen in relation to the total equivalent capacitance at node 401 measured against node 404. In practice, the value of the inductance is typically chosen to be no greater than the critical value so as to make sure that the potential of node 401 moves fully from the potential at node 404 to the potential at node 403, or vice versa. If the energy is at the critical value then the integral diodes will not be forward biased. If the energy is greater than the critical value, then the integral diodes will become forward biased and clamp the voltage. The off time (dead time) should be larger than the amount of time needed to transfer the magnetizing energy from the transformer into the parasitic capacitors connected to node 401 (for example the parasitic capacitors of the switches). However, the greater the energy, the less time is needed to move the potential at node 401 from the potential at node 404 to the potential of node 403 or vice versa. Thus, the off time may be reduced.

In order to improve manufacturability, it may be desirable to add additional capacitance to node 401 so that any variations in the capacitance of the parasitic capacitors will be small compared to the overall value of capacitance connected to node 401. Note that another practical issue with respect to parasitic capacitors of the switches (especially MOSFET devices) is that they are often dependent on the applied voltage. Adding additional capacitance to node 401 allows accurate control of the voltage change observed on node 401. The above analysis has deliberately ignored the energy that is stored in the leakage inductance. This energy is proportional to the power transferred through the transformer 318 and is relevant for the analysis of the second state (i.e., where both S_pι and S_p2 are open), where this energy is to be added to the magnetizing energy of the transformer. If the resonance condition of the series circuit mentioned above is fulfilled, then this energy is small compared to the chosen magnetizing energy, at the end of a conduction cycle (i.e., the current I_p is almost zero). If the circuit is out of resonance, then this additional energy will speed up the transitions of node 401, between the potentials of nodes 404 and 403. In this case, a circuit that will dynamically modify the T_0ff ime accordingly to the load can be used to enhance the overall timing and, finally, the efficiency. Another possible approach is to remove the capacitor C_pp and synchronize the near

50% duty cycle drive circuit that is working at frequency F with the step-down converter circuit that can work at the frequency F or multiples of F in order to get a noiseless conversion. This approach may improve the overall response of the feedback loop, although operating the step-down converter at a fixed frequency may make it more difficult to achieve a zero-voltage condition across the switching element 313.

Some embodiments may employ a single equivalent capacitor in place of the capacitors C_psι, C_ps2. The single equivalent capacitor may be connected between the primary of the transformer and either of signal lines 123 A, 123B (FIG. 3). However, the use of both of the capacitors C_psι, C_ps2 helps optimize the response of the loop with respect to large transitions in the load current.

FIG. 6 shows signal timing waveforms for one embodiment operating with a near 50% duty cycle ratio and in a substantially minimum current (note that "zero-current" may be ideal but may not achieved in this particular embodiment) resonant mode. The waveforms include waveforms for lp (representing the current through the primary without the magnetizing component), V₄₀₁ (the voltage at node 401 measured with respect to the signal line 122B), V_ssι and V_ss2 (the voltage across the switches in the rectifier circuit), V_gate spi, Ssi (the control signal applied to the switches S_pl and S_p2) and Vg_ate sp_{2, Ss2} (the control signal applied to the switches S_sι, S_s ).

Some embodiments may provide soft starting, under/over-voltage protection and/or current limiting. Such features can be provided in any of various ways. For example, for soft starting, the duty cycle for the switch 313 may be limited to a low value at power up and then allowed to increase to its steady state value. Alternatively, if the feedback circuit 608 uses an internal reference, that reference may be limited to a low value at power up and then allowed to increase to its steady state value. Over-voltage may be handled as follows. If an over- voltage condition is detected, the control circuit 315 may cease to turn off the switch 313. This causes the output voltage to decrease to 0. In some embodiments, the output voltage remains at 0 until the unit is cut off from the AC mains and then reconnected. As to current limiting, if the feedback circuit 608 detects that the current through the load has reach its maximum allowable value, the feedback signal to the control circuit 315 may be modified as appropriate, in order to limit the average current through the inductor L_fS to a value that corresponds to a maximum load current desired in the secondary side. The output voltage decreases accordingly.

FIGS. 7-8 show alternative embodiments for the step-down converter circuit, the DC/ AC converter circuit, and the rectifier circuit. In these embodiments, the DC/AC converter circuit and the rectifier circuit each employ a full-wave bridge configuration. Note that the DC/ AC converter circuit and the rectifier circuit shown in FIGS. 3, 6 employ half-wave configurations. A full-wave configuration may provide advantages when operating at higher output powers, where there are smaller currents (I_p/2) through switches and the primary transformer's winding, although the full- wave configuration may require a higher number of components and a more complicated control drive circuit, as compared to the half-wave configuration.

Some embodiments of one or more aspects of the present invention may operate in a frequency range between 10kHz and 1MHz. Although disclosed above with respect to an embodiment that incorporates various features that alone or in combination with one other may help reduce cost and improve efficiency and/or reliability, it should be understood that the present invention is not limited to such. For example, there is no requirement to employ power factor correction or zero-voltage and zero-current switching. In addition, there is no requirement to operate the DC/ AC converter circuit and the rectifier circuit at a fixed frequency and fixed duty cycle near 50%. Neither is there any requirement to use a small output filter choke. Furthermore, while the embodiments disclosed above do not employ snubber circuits, there is no prohibition against such circuits. Moreover, although some features and techniques are described as optional, this is not meant to imply that all other features and techniques are required, i.e., not optional.

Note that, except where otherwise stated, terms such as, for example, "comprises", "has", "includes" and all forms thereof, are considered open-ended so as not to precluded additional elements and/or features.

Also note, except where otherwise stated, phrase such as, for example, "in response to", "based on" and "in accordance with" mean "in response at least to", "based at least on" and "in accordance with at least", respectively, so as, for example, not to preclude being responsive to, based on, or in accordance with more than one thing.

As used herein, the term "terminal" includes leads and/or nodes.

As used herein, a "port" has one or more leads or nodes, but is not otherwise limited to any particular structure.

When signals are said to be supplied through signal lines, this expression should be understood to indicate that any form of electrical interconnection is acceptable, not just wires or metal traces.

While there have been shown and described various embodiments, it will be understood by those skilled in the art that the present invention is not limited to such embodiments, which have been presented by way of example only, and that various changes and modifications may be made without departing from the spirit and scope of the invention. Accordingly, the invention is limited only by the appended claims and equivalents thereto.

What is claimed is:

Claims

1. Power converter apparatus comprising: a step-down converter circuit of switching type having an input port to couple to a supply voltage and having an output port to provide an output voltage at a magnitude that is lower than a magnitude of the supply voltage, and having a control circuit to receive a feedback signal and regulate the magnitude of the output voltage in response thereto; a DC/ AC converter circuit of switching type having a primary side and a secondary side, the primary side having an input port coupled to the output port of the step-down converter circuit, the secondary side having an output port to provide an AC output voltage; a rectifier circuit having an input port and an output port, the input port being coupled to the secondary side of the DC/ AC converter circuit, the output port supplying a DC voltage; and a feedback circuit to generate the feedback signal in response to the output port of the rectifier circuit.

2. The power converter apparatus of claim 1 wherein the DC/ AC converter circuit operates at a fixed frequency.

3. The power converter apparatus of claim 2 wherein the DC/ AC converter circuit operates at a duty cycle that is near 50%.

4. The power converter apparatus of claim 2 wherein the DC/ AC converter circuit operates in a resonant mode.

5. The power converter apparatus of claim 2 wherein the duty cycle of the DC/ AC converter circuit is fixed.

6. The power converter apparatus of claim 1, further comprising a drive circuit that supplies first control signals to the DC/ AC circuit and supplies second control signals to the rectifier circuit, said first control signals being synchronous with said second control signals.

7. The power converter apparatus of claim 1 wherein the DC/ AC converter circuit has a bridge circuit and a transformer, the bridge circuit having an input port and an output port, the input port of the bridge circuit being coupled to the input port of the DC/ AC converter circuit, the output port of the bridge circuit being coupled to a primary side winding of the transformer, the transformer further having a secondary side winding coupled to the output port of the DC/ AC converter circuit.

8. The power converter apparatus of claim 7 wherein the bridge circuit has a switch connected between the input port of the bridge circuit and the output port of the bridge circuit, the switch having an on state and an off state.

9. The power converter apparatus of claim 8 further comprising a drive circuit that supplies a control signal to turn the switch of the DC/ AC converter circuit on and off, and means for establishing substantially zero volts across the switch at turn on times of the switch.

10. The power converter apparatus of claim 9 wherein the input port of the DC/ AC converter has a first node and a second node and the means for establishing substantially zero volts across the switch at turn on times of the switch comprises a first capacitance and a second capacitance connected in series between the first node and the second node of the input port to the DC/ AC converter.

11. The power converter apparatus of claim 9 wherein the means for establishing substantially zero volts across the switch at turn on times of the switch comprises a capacitance that is coupled to a lead of the primary side winding of the transformer.

12. The power converter apparatus of claim 8 further comprising a drive circuit that supplies a first control signal to turn the switch of the DC/AC converter circuit on and off, and supplies a second control signal to turn the switch of the rectifier circuit on and off, and means for establishing substantially minimum current through the switch at turn-off times of the switch.

13. The power converter apparatus of claim 8 wherein the rectifier circuit has a bridge circuit and a filter, the bridge circuit of the rectifier circuit having (i) an input port coupled to the output port of the DC/ AC converter circuit and (ii) an output port coupled to an input port of the filter, the bridge circuit further having a switch that is connected between the input port of the bridge circuit and the output port of the bridge circuit, the power converter apparatus further comprising a drive circuit that supplies a first control signal to turn the switch of the DC/ AC converter circuit on and off, and supplies a second control signal to turn the switch of the rectifier circuit on and off synchronously with turn on and turn off of the switch of the DC/ AC converter circuit.

14. The power converter apparatus of claim 1 wherein the rectifier circuit has a bridge circuit and a filter, the bridge circuit of the rectifier circuit having (i) an input port coupled to the output port of the rectifier circuit and (ii) an output port coupled to an input port of the filter, the bridge circuit further having a switch connected between the input port of the bridge circuit and the output port of the bridge circuit.

15. The power converter apparatus of claim 14 further comprising a drive circuit that supplies a control signal to the switch of the rectifier circuit and means for establishing substantially zero volts across the switch at turn-on times of the switch.

16. The power converter apparatus of claim 15 wherein the means for establishing substantially zero volts across the switch at turn-on times of the switch comprises a capacitance.

17. The power converter apparatus of claim 16 wherein the capacitance has a first terminal coupled to the input port to the filter and has a second terminal coupled to the output port of the bridge circuit.

18. The power converter apparatus of claim 14 further comprising means for establishing substantially minimum current through the switch at turn-off times of the switch.

19. The power converter apparatus of claim 14 wherein the filter comprises an inductor and a capacitor each having an impedance, wherein the rectifier circuit has a switching frequency and wherein the impedance of the capacitor at the switching frequency is small relative to the impedance of the inductor at twice the switching frequency of the DC/AC converter circuit.

20. The power converter apparatus of claim 1 wherein the control circuit of the step down converter circuit is coupled to a switch that is coupled to an inductor, the control circuit having an output port to supply a control signal to control the duty cycle of the switch to regulate the magnitude of the output voltage of the step down converter circuit.

21. The power converter apparatus of claim 20 wherein said inductor is coupled between the switch and the output port of the step down converter circuit, and wherein the current in said inductor increases while the switch is in an on state and decreases while the switch is in an off state.

22. The power converter apparatus of claim 21 wherein the current in said inductor decreases to zero while the switch is in an off state.

23. The power converter apparatus of claim 7 wherein the bridge circuit is a full wave bridge.

24. The power converter apparatus of claim 7 wherein the bridge circuit is a half wave bridge.

25. The power converter apparatus of claim 13 wherein the bridge circuit is a full wave bridge.

26. The power converter apparatus of claim 13 wherein the bridge circuit is a half wave bridge.

27. The power converter apparatus of claim 1 further comprising: a second rectifier circuit having an input port to couple to an AC supply voltage and having an output port to provide a rectified voltage, the output port of the second rectifier circuit being coupled to the input port of the step-down converter circuit.

28. The power converter apparatus of claim 27 further comprising: a power factor correction circuit having an input port coupled to the output port of the second rectifier circuit and having an output port coupled to the input port of the step- down converter circuit.

29. Power converter apparatus comprising: step-down converter means for receiving a supply voltage and generating an output voltage at a magnitude that is lower than a magnitude of the supply voltage, the step down converter means including means for regulating the output voltage in response to a feedback signal; a DC/ AC converter circuit of switching type having a primary side and a secondary side, the primary side having an input port coupled to the output port of the step-down converter circuit, the secondary side having an output port to provide an AC output voltage; a rectifier circuit having an input port and an output port, the input port being coupled to the secondary side of the DC/AC converter circuit, the output port supplying a DC voltage; and a feedback circuit to generate the feedback signal in response to a signal provided at the output port of the rectifier circuit.

30. Power converter apparatus comprising: step-down converter means for receiving a supply voltage and generating an output voltage at a magnitude that is lower than a magnitude of the supply voltage, the step down converter means including means for regulating the output voltage in response to a feedback signal;

DC/AC converter means for receiving the output voltage of the step down converter means and providing an AC output voltage; rectifier means for coupling to a secondary side of the DC/AC converter means and supplying a DC output voltage; and feedback means for receiving the DC output voltage of the rectifier means and generating the feedback signal supplied to the step down converter means.

31. A method comprising: receiving a supply voltage and generating a first output voltage having a magnitude that is lower than a magnitude of the supply voltage, where the act of generating comprises regulating the first output voltage in response to a feedback signal; generating an AC voltage from the first output voltage; rectifying the AC voltage to provide a DC voltage; and generating the feedback signal in response to the DC voltage.

32. The method of claim 31 wherein generating the AC voltage comprises driving switches in a bridge circuit to an on state and to an off state at a fixed frequency.

33. The method of claim 32 wherein generating the AC voltage comprises driving switches in a bridge circuit to an on state and to an off state at a duty cycle near 50%.

34. The method of claim 32 wherein generating the AC voltage comprises driving switches in a bridge circuit to an on state and to an off state at a fixed duty cycle.

35. The method of claim 31 , wherein generating the AC voltage comprises driving switches in a first bridge circuit to an on state and to an off state and wherein rectifying the AC voltage comprises driving switches in a second bridge circuit to an on state and to an off state synchronous with the driving of the switches in the first bridge circuit.

36. The method of claim 31 wherein generating the AC voltage comprises driving a switch on and off and establishing substantially zero volts across the switch at turn on times of the switch.

37. The method of claim 31 wherein rectifying the AC voltage comprises driving a switch on and off and establishing substantially minimum current through the switch at turn off times of the switch.

38. The method of claim 31 wherein rectifying the AC voltage comprises driving a switch on and off and establisliing substantially zero volts across the switch at turn on times of the switch.

39. The method of claim 31 wherein generating the AC voltage comprises driving a switch on and off and establishing substantially zero volts across the switch at turn on times of the switch.