TWI630784B - Neutral-point-clamped converter - Google Patents

Abstract

The neutral point clamp converter includes a plurality of transistor strings, a first capacitor, a second capacitor, and a neutral point clamp controller. The transistor strings each have a plurality of outputs that receive a plurality of control signals. The neutral point clamp controller generates a control signal. Wherein, in a plurality of first time periods, each transistor string performs a zero voltage sequence injection operation according to each control signal. Further, in a plurality of second time periods, each transistor string performs a bipolar switching operation in accordance with each control signal.

Description

Neutral point clamp converter

The present invention relates to a neutral point clamp converter, and more particularly to a neutral point clamp converter incorporating a zero voltage sequence injection and a bipolar switching mechanism.

In the prior art, an electric motor (or generator) can provide a three-phase voltage to drive a load. When the three-phase load is unbalanced, the phase currents of the respective phases are not equal, and the neutral point voltage may be shifted.

In the prior art, the space vector modulation is commonly used, and a specific space vector is selected to control the transistor string in the inverter through the pulse width modulation to achieve the purpose of neutral voltage clamping. This kind of practice requires setting a corresponding lookup table (LUT) for the controller to find a specific space vector in the corresponding state to perform the neutral point voltage clamping action, which has certain limitations in performance. .

The invention provides a neutral point clamp converter, which effectively performs the clamping action of the neutral point potential.

The neutral point clamp converter of the present invention includes a plurality of transistor strings, a first capacitor, a second capacitor, and a neutral point clamp controller. The transistor strings each have a plurality of outputs that receive a plurality of control signals. Each transistor string causes the corresponding output terminals to be pulled high, pulled low or floated according to corresponding control signals. The first capacitor is coupled between the power supply voltage and the neutral point. The second capacitor is coupled between the ground voltage and the neutral point. The neutral point clamp controller is coupled to the transistor string, the first capacitor and the second capacitor, and generates a control signal according to the neutral point voltage on the neutral point. Wherein, in a plurality of first time periods, each of the transistor strings causes the respective output terminals to be pulled high or low in at least a first sub-time interval according to the respective control signals, and is caused in at least a second sub-time interval. The corresponding outputs are floated. In a plurality of second time periods, each transistor string causes respective output terminals to be pulled high in at least one third sub-time interval according to each control signal, and corresponding output terminals are enabled in at least one fourth sub-time interval. Floating, and causing the corresponding outputs to be pulled low for at least a fifth sub-time interval.

In an embodiment of the invention, the neutral point clamp controller provides a first triangular carrier and a second triangular carrier in a first time period, and provides a reference voltage and a first triangular carrier and a second triangular carrier. The comparison is performed to generate respective control signals to determine the length of time corresponding to the first sub-period interval and the second sub-period interval of each of the transistor strings.

In an embodiment of the invention, the neutral point clamp controller adjusts the reference voltage according to the adjustment value, and adjusts the length of time of the first sub-time interval of each transistor string, that is, the second time period.

In an embodiment of the invention, the neutral point clamp controller provides a plurality of bipolar reference voltage pairs in a second time period, and each bipolar reference voltage pair is respectively associated with the first triangular carrier and The two triangular carriers are compared to generate respective control signals to determine the lengths of the third sub-period, the fourth time interval, and the fifth time interval of each of the transistor strings, respectively.

In an embodiment of the invention, the neutral point clamp controller adjusts the bipolar reference voltage pair according to the plurality of phase adjustment values in the second time period, and adjusts the third sub-parameter of each transistor string. The length of time in the time interval, the fourth time interval, and the fifth time interval.

Based on the above, the present invention performs a neutral point potential adjustment mechanism by integrating two mechanisms of zero-sequence voltage injection and bipolar switching, wherein the length of the first and second sub-time intervals is controlled, and the third and fourth levels of each transistor string are controlled. The length of the five sub-time intervals can be separated and carried out independently, greatly increasing the degree of freedom of the neutral point potential adjustment mechanism and improving the working efficiency of the neutral point clamp converter.

The above described features and advantages of the invention will be apparent from the following description.

Please refer to FIG. 1. FIG. 1 is a schematic diagram of a neutral point clamp converter according to an embodiment of the invention. In this embodiment, the neutral point clamp converter 100 is a three-phase neutral point clamp converter, and includes a plurality of transistor strings 110-130, a neutral point clamp controller 140, a capacitor C1, and C2 and diodes D1 and D2. Taking the transistor string 110 as an example, the transistor string 110 includes transistors T1 to T4, and the transistors T1 to T4 are sequentially connected in series between the power supply voltage VDC and the ground voltage VSS. The first end of the transistor T1 receives the power supply voltage VDC, the second end of the transistor T1 is coupled to the neutral point NP through the diode D1, and the control end receives the control signal CS1. The first end of the transistor T2 is coupled to the first end of the transistor T1, and is coupled to the neutral point NP through the diode D1, and the second end serves as an output end of the transistor string 110, and the control end receives Control signal CS2. The first end of the transistor T3 is coupled to the second end of the transistor T2, the second end of the transistor T3 is coupled to the neutral point NP through the diode D2, and the control terminal receives the control signal CS3. The first end of the transistor T4 is coupled to the second end of the transistor T3, and is coupled to the neutral point NP through the diode D2. The second end receives the ground voltage VSS, and the control terminal receives the control signal CS4. In addition, the transistor string 110 is coupled to the diodes D1 and D2, wherein the anode of the diode D1 and the cathode of the diode D2 are commonly coupled to the neutral point NP, and the cathode of the diode D1 and the second The anode of the pole body D2 is coupled to the second end of the transistor T1 and the first end of the transistor T4, respectively.

In the present embodiment, the power supply voltage VDC is a direct current power supply provided by the direct current power source DC1. Capacitors C1 and C2 are connected in series between the positive and negative ends of DC power supply DC1. The capacitor C1 is coupled between the power supply voltage VDC and the neutral point NP, and the capacitor C2 is coupled between the ground voltage VSS and the neutral point NP. When the voltage at the neutral point NP is balanced, the voltage across the voltage V1 across the capacitor C1 and the voltage across the capacitor V2 are substantially the same.

The output terminals of the transistor strings 110-130 provide phase voltages Va, Vb, and Vc, respectively, and provide phase currents Ia, Ib, and Ic, respectively.

In another aspect, the neutral point clamp controller 140 is coupled to the transistor strings 110-130 and the capacitors C1, C2. The neutral point clamp controller 140 can receive the voltage balance states across the voltages V1 and V2 and by subtracting the voltages V1 and V2 to know the neutral power NP. The neutral point clamp controller 140 receives phase voltages Vx (i.e., phase voltages Va, Vb, and Vc) and phase currents Ix (i.e., Ia, Ib, and Ic) through the output terminals of the transistor strings 110-130. In this way, the neutral point clamp controller 140 can generate the control signal CSx according to the voltage balance states of the phase voltages Va, Vb, Vc, the phase currents Ia, Ib, Ic and the neutral power NP (ie, the control signals CS1~CS4) ), and according to the voltage clamp action of the neutral point NP.

Incidentally, the neutral point clamp converter 100 can be a three-phase three-wire or three-phase four-wire converter.

2A to 2C, FIG. 2A to FIG. 2C are respectively schematic diagrams showing different operational states of the transistor string according to the embodiment of the present invention. In FIG. 2A, taking the transistor string 110 as an example, the transistors T1 and T2 are turned on according to the control signals CS1 and CS2, respectively, and the transistors T3 and T4 are turned off according to the control signals CS3 and CS4, respectively. At this time, the output end of the transistor string 110 is pulled up according to the turned-on transistors T1 and T2, and the voltage of the neutral point NP can also be pulled high.

In FIG. 2B, transistors T2 and T3 are turned on in accordance with control signals CS2 and CS3, respectively, and transistors T1 and T4 are turned off in accordance with control signals CS1 and CS4, respectively. At this time, the diodes D1, D2 and the transistors T2, T3 form a loop, the output of the transistor string 110 is floated, and the voltage of the neutral point NP is substantially not changed.

In FIG. 2C, transistors T3 and T4 are turned on in accordance with control signals CS3 and CS4, respectively, and transistors T1 and T2 are turned off in accordance with control signals CS1 and CS2, respectively. The output of the transistor string 110 is pulled low according to the turned-on transistors T3 and T4, and the voltage at the neutral point NP can also be pulled low.

According to the above description, it can be seen that by operating the transistor strings 110 to 130 in the state of FIG. 2A or FIG. 2C (non-zero sequence voltage), the voltage of the neutral point NP can be adjusted, in contrast, when the transistor is When the strings 110 to 130 operate under the state of FIG. 2B (zero sequence voltage), the voltage of the neutral point NP is not adjusted.

Referring to FIG. 1 again, it should be noted that the neutral point clamp controller 140 of the embodiment of the present invention can perform different mechanisms such as zero sequence voltage injection and bipolar switching in different time intervals of the transistor strings 110-130. Perform a neutral point NP voltage adjustment mechanism. In the time interval of bipolar switching, the neutral point clamp controller 140 may cause each of the transistor strings 110-130 to pull the corresponding output terminals in the first sub-time interval of one or more Low, and the corresponding outputs are floated in one or more of the second sub-time intervals. In addition, in the time interval of bipolar switching, the neutral point clamp controller 140 may cause each of the transistor strings 110-130 to pull the corresponding output terminals in one or more of the third sub-time intervals. The respective outputs are floated in one or more of the fourth sub-time intervals, and the respective outputs are pulled low in one or more of the fifth sub-time intervals.

For details of the operation of the zero-sequence voltage injection, please refer to FIG. 1 , FIG. 3A and FIG. 3B , and FIG. 3A and FIG. 3B respectively show the action waveforms of the zero-sequence voltage injection according to the embodiment of the present invention. In FIG. 3A, the neutral point clamp controller 140 provides triangular carriers CT1 and CT2. The voltage value of the triangular carrier CT1 is greater than the reference value (for example, the zero voltage level), and the voltage value of the triangular carrier CT2 is smaller than the reference value, and the voltage difference between the triangular carriers CT1 and CT2 is constant. In simple terms, the triangular carriers CT1 and CT2 have the same waveform but have DC components of different voltage values. In addition, the neutral point clamp controller 140 provides a reference voltage Vm ^* for comparison with the triangular carriers CT1 and CT2 and produces a comparison result. Wherein, in FIG. 3A, the voltage value of the reference voltage Vm ^* is in the distribution range of the triangular carrier CT1, and the time interval in which the reference voltage Vm ^{* is} larger than the triangular carrier CT1 can be set as the first sub-period ST11, and the reference voltage Vm ^* The time interval smaller than the triangular carrier CT1 may be set as the second sub-time interval. Wherein, in the case of the transistor string 110, in the first sub-time interval ST11, the neutral point clamp controller 140 can operate the transistor string 110 in the state as shown in FIG. 2A, and in the first sub-time interval ST11. Outside the second time period, the neutral point clamp controller 140 can operate the transistor string 110 in the state of FIG. 2B.

It should be noted that the time length of the first sub-time interval ST11 is not fixed, and the neutral point clamp controller 140 can adjust the reference voltage Vm ^* according to the adjustment value Vo, thereby adjusting the first sub-time interval ST1 and the first The length of time for two time periods. In FIG. 3A, the neutral point clamp controller 140 adjusts the reference voltage Vm ^* according to the adjustment value Vo, and obtains the adjusted reference voltage Vm ^* 1. Correspondingly, the first sub-time interval ST11 is increased by the time dT1, and the adjusted first sub-time interval AST11 is obtained. As a result, the time during which the transistor string 110 operates in the non-zero sequence voltage state is increased, and the adjustment capability of the neutral point NP voltage is improved.

In FIG. 3B, the voltage value of the reference voltage Vm ^* provided by the neutral point clamp controller 140 is in the distribution range of the triangular carrier CT2, and the time interval in which the reference voltage Vm ^{* is} smaller than the triangular carrier CT2 can be set as the first sub-time. The interval ST12, and the time interval in which the reference voltage Vm ^{* is} larger than the triangular carrier CT2, may be set as the second sub-period. Wherein, in the case of the transistor string 110, in the first sub-time interval ST12, the neutral point clamp controller 140 can operate the transistor string 110 in the state as shown in FIG. 2C, and in the first sub-time interval ST12. Outside the second time period, the neutral point clamp controller 140 can operate the transistor string 110 in the state of FIG. 2B.

Similarly, in the embodiment of FIG. 3B, the length of time of the first sub-time interval ST12 is not fixed, and the neutral point clamp controller 140 can adjust the reference voltage Vm ^* according to the adjustment value Vo, and thereby adjust the The time length of one sub-period ST12 and the second time period. In FIG. 3B, the neutral point clamp controller 140 lowers the reference voltage Vm ^* according to the adjustment value Vo, and obtains the adjusted reference voltage Vm ^* 2. Correspondingly, the first sub-period ST12 is increased by twice the time dT2, and the adjusted first sub-period AST12 is obtained. As a result, the time during which the transistor string 110 operates in the non-zero sequence voltage state is increased, and the adjustment capability of the neutral point NP voltage is improved.

Referring to FIG. 4A and FIG. 4B, FIG. 4A and FIG. 4B respectively show operation waveform diagrams of bipolar switching according to an embodiment of the present invention. In the time interval different from FIG. 3A and FIG. 3B, the neutral point clamp controller 140 provides different bipolar reference voltage pairs for the transistor strings 110-130 to compare with the triangular carriers CT1 and CT2, respectively. Taking the single-phase transistor string 110 as an example, the neutral point clamp controller 140 compares the bipolar reference voltage Vmu and the bipolar reference voltage Vmd with the triangular carriers CT1 and CT2, respectively. Wherein, in FIG. 4A, the portion of the bipolar reference voltage Vmu greater than the triangular carrier CT1 corresponds to the third sub-period ST31. The portion of the bipolar reference voltage Vmd that is smaller than the triangular carrier CT1 corresponds to the fifth sub-time interval. Further, the bipolar reference voltage Vmu is smaller than the triangular carrier CT1 and the portion of the bipolar reference voltage Vmd larger than the triangular carrier CT1 corresponds to the fourth sub-portion. Time interval. Note here that since in FIG. 4A, the bipolar reference voltage Vmd is substantially equal to the maximum value of the triangular carrier CT2, in this case, the time length of the fifth sub-time interval is substantially equal to zero.

Incidentally, in the third sub-time interval ST31 described above, the transistor string 110 is set to the state of FIG. 2A, and in the fifth sub-time interval described above, the transistor string 110 is set as shown in FIG. 2C. The state, while in the fourth sub-time interval, the transistor string 110 is set to the state of FIG. 2B. Moreover, when the length of time of the fifth sub-time interval is substantially equal to 0, the transistor string 110 at this time can be equivalent to performing a unipolar switching operation.

Here, the neutral point clamp controller 140 can adjust for the length of time of the third, fourth, and fifth sub-time intervals. The neutral point clamp controller 140 can separately adjust the voltage value of the bipolar reference voltage pair according to the plurality of phase adjustment values g _m . In FIG. 4A, the controller 140 so that the neutral point clamped bipolar reference voltage Vmu increase a phase adjustment value g _m, so that the length of time the third sub-time period ST31 may increase the time dT31, and after the first adjustment is obtained Three sub-time interval AST31. Further, by lowering the bipolar reference voltage Vmd by one phase adjustment value g _m , the adjusted fifth sub-period AST 51 can be obtained, and the transistor string 110 can perform the bipolar switching operation.

On the other hand, in the embodiment of FIG. 4B, the voltage value of the bipolar reference voltage Vmd is equal to the minimum voltage value of the triangular carrier CT1. Therefore, the length of time in the third sub-period at this time is substantially equal to 0, and the transistor string 110 can be unipolarly switched. Further, by increasing the phase adjustment value g _{m of the} bipolar reference voltage Vmd, a non-zero adjusted third sub-period AST32 can be obtained, and the transistor string 110 can be bipolar switched.

By comparing the triangular carrier CT2 and the other bipolar reference voltage Vmu, the fifth time interval ST52 can be obtained to set the state of the transistor string 110 as shown in FIG. 2C. By lowering the phase adjustment value g _{m of the} bipolar reference voltage Vmu, the fifth sub-time interval ST52 can be increased by twice the time dT52 to obtain the adjusted fifth sub-time interval AST52, and the transistor string 110 is set as shown in the figure. The time of the state of 2C increases.

It is worth mentioning that the above-mentioned phase adjustment values g _m corresponding to the respective transistor strings can be set to different values, and are not fixed to be the same. Taking the three-phase inverter as an example, the phase adjustment value g _m can be set to three identical or different values, and there is no fixed relationship between the three phase adjustment values g _m , which can be independently set.

It can be seen from the above descriptions of FIG. 3A, FIG. 3B, FIG. 4A and FIG. 4B that the neutral point clamp controller 140 of the embodiment of the present invention can perform different operations of the clamp device 100 at different neutral points. During the cycle, the transistor strings 110-130 are set to perform operations in accordance with FIGS. 3A, 3B, 4A, and 4B, and achieve the purpose of neutral NP electrical balance. The important point is that zero voltage sequence injection and bipolar switching mechanisms can be applied sequentially between multiple consecutive or discontinuous duty cycles.

In some embodiments of the present invention, the zero voltage sequence injection mechanism can be applied to a space vector pulse width modulation mechanism or a sine wave pulse width modulation mechanism, and the bipolar switching mechanism can be used to eliminate the neutral point NP voltage connection. Wave phenomenon. Wherein, in the above embodiment, in one switching cycle, the electric quantity Q of the neutral point NP can be as shown in the mathematical formula (1): - (1)

Where g _a , g _b , g _c are the phase adjustment values of the corresponding three-phase transistor strings 110-130, sgn(x) is an operator, indicating that the sign of x is taken out, and T _SW is a switching cycle. length of time.

The electric quantity Q of the neutral point NP in the mathematical formula (1) can be divided into the electric quantity of the alternating component and the electric quantity of the direct current component. The AC component charge will cause a voltage wave at the neutral point NP, and the DC component charge will cause a voltage change at the neutral point NP. Therefore, the neutral point clamp controller 140 of the embodiment of the present invention can reduce the neutral component NP by adjusting the phase adjustment values g _a , g _b , g _c such that the AC component charge in the power quantity Q is substantially equal to zero. The voltage is connected to the wave phenomenon.

It should be noted that the phase adjustment values g _a , g _b , g _c and the adjustment value Vo in the embodiments of the present invention can be independently adjusted without fixed constraints and restrictions, and have relatively high degrees of freedom.

Please refer to FIG. 5, which is a schematic diagram of a portion of the circuit of the neutral point clamp controller according to the embodiment of the present invention. The neutral point clamp controller 500 includes a comparison circuit constructed by a plurality of comparators CMP1 to CMP2. For example, by performing the switching operation of FIG. 4A and FIG. 4B, the comparator CMP1 receives the triangular carrier CT1 and the bipolar reference voltage Vmu for comparison, and generates control signals CS1 and CS3 according to the comparison result. The comparison result output by the comparator CMP1 can be used as the control signal CS1, and the control signal CS3 is obtained by inverting the control signal CS1 through the inverter INV1. The comparator CMP2 receives the triangular carrier CT2 and the bipolar reference voltage Vmd for comparison, and generates control signals CS2 and CS4 according to the comparison result. The comparison result output by the comparator CMP2 can be used as the control signal CS2, and the control signal CS4 is obtained by inverting the control signal CS2 through the inverter INV2.

When performing the comparison mechanism of FIGS. 3A and 3B, one or more comparators can also be used. By performing a logic operation on the comparison result of the comparator, control signals CS1 to CS4 can be generated to control the on and off operations of the plurality of transistors in the transistor strings 110-130.

Please refer to FIG. 6 , and please refer to FIG. 1 at the same time. FIG. 6 is a schematic diagram of another part of the circuit of the neutral point clamp controller according to the embodiment of the present invention. The neutral point clamp controller 600 includes an arithmetic unit OP1, an OP2, a filter 610, and a processor 620. The operator OP1 receives the voltage across the voltage V1 on the capacitor C1 and the voltage across the capacitor V2. The operator OP1 may be a subtractor and subtract the voltage across the voltage V1 from the voltage across the voltage V2 to generate a balanced voltage. When the balance voltage is substantially equal to 0, it means that the electrical property of the neutral point NP is balanced. In contrast, when the balance voltage is not equal to 0, it indicates that the voltage on the neutral point NP is unbalanced and needs to be adjusted.

Filter 610 receives the balanced voltage for filtering, and filter 610 may be a low pass filter that produces a filtered result that may be DC power Q1 at neutral point NP. The operator OP2 subtracts the DC power Q1 from a target power QT to generate an error value EV, which is transmitted to the processor 620. The processor 620 receives the error value EV and adjusts the calculation mechanism according to the bipolarity to generate phase adjustment values g _a , g _b , g _c .

The processor 620 generates phase adjustment values g _a , g _b , g _c according to the bipolar adjustment calculation mechanism, and can be used to make the AC power at the neutral point NP equal to zero. The bipolar adjustment algorithm can be designed by the designer based on actual needs. For example, the bipolar adjustment calculation mechanism can determine the length of time of each sub-time interval in which the bipolar switching operation is performed by the magnitudes of the phase currents Ia, Ib, and Ic. For example, when the phase current Ia is greater than the phase currents Ib, Ic, the transistor string 110 corresponding to the phase current Ia can be first subjected to the bipolar switching operation to quickly perform the voltage adjustment operation of the neutral point NP.

In summary, the present invention enables the neutral point clamp converter to integrate the zero sequence voltage injection and the bipolar switching mode to perform the neutral point voltage adjustment mechanism. Through the adjustment method of the present invention, the neutral point voltage adjustment operation can be performed through a plurality of adjustment values, and the adjustment mechanism can be further optimized to improve the overall work performance.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

100: Neutral point clamp converter 110~130: transistor string C1, C2: capacitor D1, D2: diode T1~T4: transistor VDC: power supply voltage VSS: ground voltage NP: neutral point CS1~ CS4: Control signal DC1: DC power supply V1, V2: Trans-voltage Va, Vb, Vc, Vx: Phase voltage Ia, Ib, Ic, Ix: Phase current CT1, CT2: Triangular carrier Vm ^* : Reference voltage ST11, ST12, ST31 , ST32, ST52: sub-time interval dT1, dT52: time Vm ^* 1, Vm ^* 2: adjusted reference voltage Vo: adjustment value AST12: first sub-time interval after adjustment AST31: third sub-time interval after adjustment AST51, AST52 : The fifth sub-time interval after adjustment Vmu, Vmd: bipolar reference voltage g _m , g _a , g _b , g _c : phase adjustment value 140, 500, 600: neutral point clamp controller CMP1~CMP2: comparator INV1, INV2: inverter OP1, OP2: operator 610: filter 620: processor Q1: DC power QT: target power EV error value

FIG. 1 is a schematic diagram of a neutral point clamp converter according to an embodiment of the invention. 2A-2C are schematic views respectively showing different operational states of a transistor string according to an embodiment of the present invention. FIG. 3A and FIG. 3B respectively illustrate operational waveforms of zero sequence voltage injection according to an embodiment of the present invention. 4A and 4B are respectively diagrams showing the action waveforms of the bipolar switching according to the embodiment of the present invention. FIG. 5 is a schematic diagram of a portion of a circuit of a neutral point clamp controller according to an embodiment of the present invention. 6 is a schematic diagram of another part of the circuit of the neutral point clamp controller according to the embodiment of the present invention.

Claims (10)

A neutral point clamp converter includes: a plurality of transistor strings each having a plurality of output terminals respectively receiving a plurality of control signals, each of the transistor strings corresponding to each of the output signals according to the corresponding control signals Being pulled high, pulled low or floating; a first capacitor coupled between a supply voltage and a neutral point; a second capacitor coupled between a ground voltage and the neutral point; and a neutral a point clamp controller, coupled to the transistor strings, the first capacitor and the second capacitor, generating the control signals according to a neutral point voltage at the neutral point, wherein, in a majority of the first time During the period, each of the transistor strings causes the corresponding output terminals to be pulled high or low in at least one first sub-time interval according to each of the control signals, and corresponding outputs are outputted in at least one second sub-time interval. The terminal is floated, wherein the neutral point clamp controller provides a first triangular carrier and a second triangular carrier during the first time period, and provides a reference voltage and the first triangular carrier and the first Two triangular carriers are compared for production Each of the control signals determines a length of time corresponding to the first sub-time interval and the second sub-time interval of each of the transistor strings, and in the plurality of second time periods, each of the transistor strings is in accordance with each of the control signals. The at least one third sub-time interval causes the corresponding each output end to be pulled high, and the corresponding each output end is floated in at least a fourth sub-time interval, and corresponding ones are made in at least a fifth sub-time interval The output terminal is pulled low, wherein the neutral point clamp controller adjusts the reference voltage according to an adjustment value, and adjusts the first of each of the transistor strings The sub-time interval is the length of time of the second time period. The neutral point clamp converter according to claim 1, wherein the neutral point clamp controller provides a plurality of bipolar reference voltage pairs during the second time period, and each of the Comparing the bipolar reference voltage pair with the first triangular carrier and the second triangular carrier, respectively, to generate each of the control signals to determine the third sub-time interval, the fourth time interval, and the The length of time in the fifth time interval. The neutral point clamp converter according to claim 2, wherein the neutral point clamp controller adjusts the bipolar reference voltages according to a plurality of phase adjustment values in the second time period. And adjusting the length of time of the third sub-time interval, the fourth time interval, and the fifth time interval of each of the transistor strings. The neutral point clamp converter of claim 3, wherein the neutral point clamp controller comprises: a comparison circuit, wherein the reference voltage is made during the first time period Comparing the first triangular carrier and the second triangular carrier to generate each of the control signals to determine a length of time of the first sub-time interval and the second sub-time interval corresponding to each of the transistor strings, Comparing each of the bipolar reference voltage pairs with the first triangular carrier and the second triangular carrier in a second time period to generate each of the control signals to determine the third sub-time interval of each of the transistor strings, The fourth time interval and the length of time of the fifth time interval. The neutral point clamp converter according to claim 4, wherein the neutral point clamp controller further comprises: a first operator, the cross voltage on the first capacitor and the second The voltage across the capacitor is subtracted and generates a balanced voltage; a filter is used to filter the balanced voltage to generate a constant current; and a second operator is used to subtract the DC power from a target amount to generate an error And a processor that receives the error value and adjusts the calculation mechanism according to a bipolar to generate the phase adjustment values. The neutral point clamp converter according to claim 5, wherein the processor generates the phase adjustment values according to the bipolar adjustment calculation mechanism, and makes the neutral point according to the phase adjustment value. The AC power is equal to zero. The neutral point clamp converter according to claim 1, wherein the point clamp controller further detects a plurality of phase currents at the output terminals, and adjusts the calculation mechanism according to the bipolarity and The phase currents are used to generate the phase adjustment values. The neutral point clamp converter according to claim 1, wherein the voltage value of the first triangular wave signal is greater than a reference value, and the voltage value of the second triangular wave signal is less than the reference value. The neutral point clamp converter according to claim 1, wherein each of the transistor strings comprises: a first transistor, the first end of which is coupled to the power supply voltage, the second end of the first transistor is coupled to the neutral point, and the control end of the first transistor receives a first control signal; a second transistor, the first end of which is coupled to the neutral point, the second end of the second transistor is coupled to the corresponding output end, and the control end of the second transistor receives a second control signal; a third transistor, the first end of which is coupled to the corresponding output end, the second end of the second transistor is coupled to the neutral point, and the control end of the second transistor receives a third control signal And a fourth transistor, the first end of which is coupled to the neutral point, the second end of the fourth transistor is coupled to the ground voltage, and the control end of the fourth transistor receives a fourth control signal. The neutral point clamp converter according to claim 9, wherein when the first transistor and the second transistor are turned on, and the third transistor and the fourth transistor are turned off Each of the corresponding output ends is pulled high; when the second transistor and the third transistor are turned on, and the first transistor and the fourth transistor are turned off, the corresponding output ends are floated And when the first transistor and the second transistor are turned off, and the third transistor and the fourth transistor are turned on, the corresponding output ends are pulled low.