SU1383399A1 - Device for determining average power of random signals - Google Patents

Abstract

The invention relates to specialized lysing tools of computer technology designed for the instrumental determination of the characteristics of random processes, and can be used to determine the average power of random electric signals. The purpose of the invention is to improve accuracy. The device contains a current source, a digital-to-analog converter, a counter, a frequency divider and a decoder, an analog-to-digital converter (ADC), an averaging unit, a quad, a clock pulse generator, a trigger, a recording unit and allows you to improve the accuracy of the device by performing over time a full cycle of measuring the linear displacement of a family of reference levels of quantization of an ADC by an amount equal to the quantum of this ADC, and forming estimates of the square of the instantaneous value of the input signal. 1 il. | & (L

Description

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The invention relates to specialized computer aids intended for instrumental determination of the characteristics of random processes, and can be used to determine the average power of random electrical signals.

The purpose of the invention is to improve the accuracy of the device.

The drawing shows a block diagram of the device.

The device contains a shaper 1, an analog-to-digital converter (ADC) 2, a current source 3, a quadrant 4, averaging unit 5, a recording unit 6, a decoder 7, a trigger 6, a frequency divider 9, a counter 10, digital-threshold Converter (DAC) II, generator 12 clock pulses.

The output of the imaging unit 1 is connected to the information input of the A / D converter 2. The current source 3 is connected to the second input of the reference voltage of the ADC 2, the output of which is connected to the input of the higher bits of the quadrant 4. The output of the latter is connected to the information input of the averaging unit 5 , the output connected to the information input of the registration unit 6, the output of which includes the output of the device. The recording clock of the recording unit 6 of the registration is connected to the output of the decoder 7 and the trigger reset input 8. The trigger setup input 8 is connected to the start signal input, and the output is connected to the reset inputs of the averaging unit 5, frequency divider 9 and counter 1.0. The output of the counter 10 is connected to the input of the lower bits of the quad 4, to the input of the decoder 7 and the DAC 11, the output of which is connected to the second input of the reference voltage of the ADC 2. The output of the generator 12 clock pulses connected to the clock inputs of the ADC 2, the averaging unit .5 and the divider 9 frequency, the output of which is connected to the clock input of the counter 10.

The device works as follows.

Prior to the start of the operating cycle, trigger 8 is in the zero state, which supports in the state of logical O counter 10, frequency divider 9 and averaging block 5. At the command of an external pulse, the Start trigger 8 translates into a single state, which

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removes a reset signal from counter 10, trigger 8 and block 5,

Under the influence of the rising edge of the clock pulse of the generator 12 clock pulses, the ADC 2 converts the instantaneous value x of the input signal x (t) from the output of the driver 1 to the corresponding code p. Denote by a binary digit corresponding to the code state of the counter 10, and o analogue equivalent. In this case, the D / A converter 11 is adjusted so that the code state c 0 ... 0 corresponds to the voltage i / j, O B, and the state / c

 1 ... 1 corresponds to the voltage (Uts

 (2 -1) 1

- t-p- q B, where r is the number of binary

counter bits 10; q is the quantum of the ADC 2, Century

The result of quantization of a p. And binary digit fl / ft is received, respectively, at the inputs of large and small bits of quadrant 4 as a sum (p. Moreover, there is no need for an explicit summation operation, since the bits of the operands n and o / c do not overlap. At the output of the quadrant 4, a digital value is obtained (p + o c), which is fed to the information one, the input of the averaging unit 5.

Under the influence of a falling front

t.v. impulse block 5 averaging

fixes the sum of L (n, + q;). i 1

The process is almost repeated until the appearance of a pulse at the output of the frequency divider 9. This pulse translates counter 10 into the next code state (OO ... OI), which converts DAC 1.1 into a voltage of (1/2) q V. This voltage, due to the presence of current source 1, shifts the entire family of quantized reference levels :; ADC 2 by the value of (l / 2) q B.

At the same time, the family of the reference levels of quantization is set by a 1m resistive voltage divider.

The process of gating the ADC 2, the formation of the square of the sum (n j + (/ c) in quad 4 and its accumulation in averaging block 5 occurs in the same way as in the previous code state of the counter 10.

When all the code conditions of the counter 10 are searched, it goes to the initial zero state, which is

changes the state of the decoder 7, Under the influence of the front from the decrypt decipherN

.to 7 accumulated amount C (p. +

i i

+ c (c;), where n is the number of quantization intervals of the A / D converter 2, is rewritten into block 6 of registration, and the trigger 8 is transferred to the zero state. A reset bank, coming from the output of the trigger 8, converts the averaging block 5, the frequency divider 9 and the counter 10 to the zero state.

At the output of the recording unit 6, there is an estimate of the average power of the random signal x (t) and the device is prepared for the next work cycle.

The cycle duration is defined by design features and is equal to

T N-dt, where N 2;

At is the period of the pulses of the clock sequence of the generator 12 clock pulses; k.- number of binary bits delig

tel 9 frequency.

The signal at the output of the DAC, 11 is a linearly increasing voltage that can be approximated by

x (t) ---- t.

(Prove jiTO

(t) c /

P

 X (t) c / t

xCTn + «i} l. x (T „) p

A

A t J T.n

t; 2: 1o

 iTni + lLl

(TJ

-. i, - .. a

 A

Thus, by estimating the square of an arbitrary instantaneous value of xCl. + ff), the normalized kA j is the quantity (q +,). In from

In the known device, the instantaneous value quantization error, ceteris paribus, is tq / n, the error

square of instantaneous value (x ±

1 iq / 2) X t qx + ° 7-, which can be taken equal to ± qx.

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In the proposed device, the systematic error of conversion

reduced to the value of - -, -. Should

However, consider that the ADC 2 has finite accuracy, which limits the apparent possibility of an infinite increase in accuracy, for example, by 2 times.

Claims (1)

Invention Formula A device for determining the average power of random signals, containing an analog-to-digital converter, an averaging unit whose output is connected to the information input of a recording unit, a quad, a clock generator, the output of which is connected to the synchronization input of the analog-to-digital converter, a trigger that in order to improve accuracy, a current source, a digital-analog converter, a counter, a frequency divider and a decoder are entered into it, while the output of the digital-analog converter is connected The input of the current source is connected to the input of the second reference voltage of the analog-digital converter, the output of which is connected to the input of the higher-order bits of the quadrator, and the input of the discrete discharge voltage is connected to the input of the first reference voltage of the analog-digital converter whose information input is the information input of the device. Dov which is combined with the inputs of the decoder and digital-analog converter and connected to the output of the counter, the clock input of which is connected to the output of the frequency divider, the information input of which is one with the clock input of the averaging unit and connected to the output of the clock pulse generator, the output of the quad is connected to the information input of the averaging unit, the installation input of Oh which is combined with the installation inputs of About the counter and frequency divider and connected to the output of the trigger with the recording input of the recording unit and connected to the output of the decoder, the installation input into 1 trigger is the starting input of the device. 0 W 12 t T