KR20210054181A - Improvement of Switching Loss in DC-DC Quadratic Boost Converter - Google Patents

Abstract

The present invention relates to a DC-DC converter with a relieved switching power loss, and a control method thereof. The DC-DC converter with a relieved switching power loss comprises: a quadratic boost converter (100); a charge pump circuit (200); and a third inductor (L3). According to the present invention, voltage stress of a quadratic boost converter can be relieved.

Description

DC-DC converter with improved switching power loss and its control method {Improvement of Switching Loss in DC-DC Quadratic Boost Converter}

The present invention relates to a DC-DC converter with improved switching loss of a quadratic boost converter and a control method thereof.

로 나타낼 수 있다. 따라서 승압형 컨버터의 D가 커질수록 높은 입-출력 변환비를 갖게 된다. 하지만 승압형 컨버터를 구성하는 소자의 저항 성분을 고려한 실제 승압형 컨버터에서는 D > 0.6이 되는 구간부터 입-출력 변환비와 회로의 전력변환 효율이 이상적인 승압형 컨버터(ideal boost converter)에 비해 상당량 감소하게 되는 문제점이 있다.In the field of power conversion such as renewable energy, LED lighting, and electric vehicles, which has recently attracted attention, research on a converter having a higher input-output conversion ratio than the conventional step-up converter is being conducted as a high input-output conversion ratio is required. . The input-output conversion ratio of an ideal boost converter that does not take into account parasitics is that the output voltage is V _O , the input voltage is V _IN , the duty ratio of the switch is D, and it operates in CCM (Continuous Conduction Mode). when doing

It can be expressed as Therefore, the larger the D of the step-up converter, the higher the input-output conversion ratio. However, in the actual step-up converter considering the resistance component of the elements constituting the step-up converter, the input-output conversion ratio and the power conversion efficiency of the circuit are significantly reduced compared to the ideal boost converter from the section where D> 0.6. There is a problem to be done.

의 입-출력 변환비를 갖게 되어 기존 승압형 컨버터 대비 낮은 D에서도 높은 출력 전압을 얻을 수 있는 장점이 있다. 하지만 2차 승압형 컨버터는 switch가 off 될 경우 출력 전압이 스위치에 인가되어 스위치의 전압 스트레스가 높아져 스위치에서 발생하는 스위칭 손실이 증가하는 문제점이 발생한다.To solve this problem, a quadratic boost converter capable of obtaining a high output voltage under the same D condition has been proposed. As shown in FIG. 1, the secondary boosting converter adds 2 diodes, 1 inductor, and 1 capacitor to the existing boost converter.

As it has an input-output conversion ratio of, it has the advantage of obtaining a high output voltage even at a low D compared to the conventional step-up converter. However, in the case of the secondary boosting type converter, when the switch is turned off, the output voltage is applied to the switch, thereby increasing the voltage stress of the switch, resulting in an increase in switching loss occurring in the switch.

KR 10-0207020 B1 KR 10-2018-0065271 A KR 20-2009-0004002 U KR 20-1997-0056221 U

[1] Doo-Yong Jung, Jun-Koo Kim, Dong-gyun Ryu, In-Bum Song, Yong-chae Jeong, and Choong-Yeon Won, “Zero-voltage-zero-current transition boost converter with auxiliary resonant circuit” 3, pp. 298-305, 2012 [2] Ned Mohan, Tore M. Undeland, William P. Robbins, “Electronics: converters, applications and design” JOHN WILEY & SONS, INC., 3rd edition, 2002

Accordingly, the present invention is to solve the above-described problem, and to provide a converter structure for improving voltage stress of a quadratic boost converter and a method for improving switching loss of a DC-DC converter accordingly.

In the converter performing a switching operation for generating and outputting the first DC power supplied from the outside according to the present invention for achieving the above object to the second DC power, the MOSFET (SW), the output terminal capacitor (C _O ), 1 capacitor (C ₁ ), output terminal resistance (R _O ), output diode (D _O ), first diode (D ₁ ), second diode (D ₂ ), first inductor (L ₁ ) and second inductor (L ₂ ) a secondary boosting type converter 100 consisting of; Charge pump circuit 200 composed of a second capacitor (C ₂ ), a third capacitor (C ₃ ), a third diode (D ₃ ), and a fourth diode (D ₄ ), and the charge pumping of the charge pump circuit 200 It characterized in that it comprises _{a third inductor (L 3} ) connected in series to the path.

In addition, the control method of the DC-DC converter with improved switching power loss includes a second capacitor (C ₂ ), a third capacitor (C ₃ ), a third diode (D ₃ ), and a fourth diode. As a method of improving the switching loss of a converter configured to include an additional _{(D 4 ), the MOSFET (SW) and the fourth diode (D 4} ) are turned on, the first diode (D ₁ ), and the third diode (D ₃ ) Mode 1 step (S100) in which the charge pump is in progress by turning off the output diode (D _{O ) and the MOSFET (SW), the second diode (D 2} ), and the fourth diode (D ₄ ) are turned off. When the first diode (D ₁ ) and the third diode (D ₃ ) are turned on, the voltage applied to the first capacitor (C _{1 ) (V C1} ) and the voltage applied to the output terminal resistance (R _O ) (V _O ) It characterized in that it comprises a Mode 2 step (S200) of delivering energy.

The present invention has the effect of reducing the switch loss by improving the voltage stress of the secondary boosting type converter and improving the power conversion efficiency of the circuit.

1 is a circuit diagram for explaining the structure of a conventional secondary step-up converter.
2 is a circuit diagram of a DC-DC converter with improved switching power loss according to the present invention.
3 is a circuit diagram illustrating an operation mode of a DC-DC converter with improved switching power loss according to the present invention and a control method thereof.
4 is a waveform of a switch voltage and a current according to an embodiment using a PSIM of a DC-DC converter with improved switching power loss according to the present invention and a conventional secondary step-up converter.
5 is an exemplary switch voltage and current waveform using PSIM according to the presence or absence of _{the third inductor L 3} in the DC-DC converter with improved switching power loss according to the present invention.
6 is a block diagram of a DC-DC converter with improved switching power loss according to the present invention.

Hereinafter, it will be described with reference to the drawings according to an embodiment of the present invention, but this is for an easier understanding of the present invention, and the scope of the present invention is not limited thereto.

When a part of the specification is said to "include" a certain component, it means that other components may be further included rather than excluding other components unless specifically stated to the contrary. In addition, terms such as "... unit" and "module" described in the specification mean a unit that processes at least one function or operation, which may be implemented as hardware or software, or as a combination of hardware and software. .

Throughout the specification, when a part is said to be "connected" with another part, this includes not only "directly connected" but also "electrically connected" with another element interposed therebetween. .

Prior to the description, a number of aspects and embodiments are described herein, and these are merely illustrative and not limiting.

After reading this specification, those skilled in the art will understand that other aspects and embodiments are possible without departing from the scope of the invention.

1 is a circuit diagram for explaining the structure of a conventional secondary step-up converter, FIG. 2 is a circuit diagram of a DC-DC converter with improved switching power loss according to the present invention, and FIG. 3 is a circuit diagram showing the switching power loss according to the present invention. A circuit diagram for explaining the operation mode of the improved DC-DC converter and its control method, and FIG. 4 is an implementation using a DC-DC converter with improved switching power loss according to the present invention and PSIM of a conventional secondary step-up converter Switch voltage and current waveforms according to the example, Figure 5 is an embodiment switch voltage and current waveforms using PSIM according to the presence or absence of _{the third inductor (L 3} ) in the DC-DC converter with improved switching power loss according to the present invention. 6 is a block diagram of a DC-DC converter with improved switching power loss according to the present invention.

A DC-DC converter with improved switching power loss according to the present invention and a control method thereof will be described in detail with reference to FIGS. 1 to 6.

In the converter performing a switching operation for generating and outputting a first DC power supplied from an external source according to the present invention as a second DC power, a MOSFET (SW), an output terminal capacitor (C _O ), and a first capacitor (C ₁ ) , Output resistance (R _O ), output diode (D _O ), a first diode (D ₁ ), a second diode (D ₂ ), a first inductor (L ₁ ), and a second inductor (L ₂ ). Step-up converter 100; Charge pump circuit 200 composed of a second capacitor (C ₂ ), a third capacitor (C ₃ ), a third diode (D ₃ ), and a fourth diode (D ₄ ), and the charge pumping of the charge pump circuit 200 It characterized in that it comprises _{a third inductor (L 3} ) connected in series to the path.

In addition, the control method of the DC-DC converter with improved switching power loss includes a second capacitor (C ₂ ), a third capacitor (C ₃ ), a third diode (D ₃ ), and a fourth diode. As a method of improving the switching loss of a converter configured to include an additional _{(D 4 ), the MOSFET (SW) and the fourth diode (D 4} ) are turned on, the first diode (D ₁ ), and the third diode (D ₃ ) Mode 1 step (S100) in which the charge pump is in progress by turning off the output diode (D _{O ) and the MOSFET (SW), the second diode (D 2} ), and the fourth diode (D ₄ ) are turned off. When the first diode (D ₁ ) and the third diode (D ₃ ) are turned on, the voltage applied to the first capacitor (C _{1 ) (V C1} ) and the voltage applied to the output terminal resistance (R _O ) (V _O ) It characterized in that it comprises a Mode 2 step (S200) of delivering energy.

In addition, the third inductor L ₃ is characterized in that it functions to limit a peak of a charge pumping current introduced at the moment the MOSFET SW is turned on.

의 입-출력 변환비를 갖게 되어 기존 승압형 컨버터 대비 낮은 D에서도 높은 출력 전압을 얻을 수 있는 장점이 있다.Conventionally, a quadratic boost converter capable of obtaining a high output voltage has been proposed. As shown in FIG. 1, the secondary boosting converter adds 2 diodes, 1 inductor, and 1 capacitor to the existing boosting converter.

As it has an input-output conversion ratio of, it has the advantage of obtaining a high output voltage even at a low D compared to the conventional step-up converter.

However, in the case of the secondary boosting type converter, when the switch (MOSFET) is turned off, the output voltage is applied to the switch, thereby increasing the voltage stress of the switch, resulting in an increase in switching loss occurring in the switch.

Accordingly, in the present invention, as shown in FIG. 2, a converter structure for improving the voltage stress of the secondary step-up converter is proposed.

The circuit proposed in the present invention is applied to a switch by combining a charge pump structure composed of _two capacitors (C 2, C ₃ ) and two diodes (D ₃ , D _{4) to a secondary boosting type converter.} Reduce the voltage stress to half of the output voltage. In addition, one inductor (L ₃ ) is added to the charge pumping path to limit the peak of the charge pumping current flowing into the switch at the moment the switch is turned on.

The operation mode of the proposed circuit is divided into two operations based on one cycle in which the switch is turned on and off as shown in FIG. 3. For simple analysis, the proposed circuit operates in a steady state CCM, and all elements constituting the circuit are assumed to be ideal elements without parasitics, and an equivalent circuit is constructed and each operation mode is explained.

의 값을 갖는다. 이때 L₃의 값이 충분히 작다면

이 된다.First, to explain in detail about Mode 1 (S100), Mode 1 is the MOSFET (SW), the fourth diode (D ₄ ) is turned on, the first diode (D ₁ ), the third diode (D ₃ ), the output terminal The diode (D _O ) is turned off to accumulate energy in the first inductor (L ₁ ) and the second inductor (L ₂ ), and at the same time, through the charge pumping path of _{C 3} -L ₃ -D ₄ -C _{2 -SW.} This is the section where the charge pump is in progress. Accordingly, the current for accumulating energy in the first inductor L ₁ and the second inductor L ₂ and the current for charge pumping both flow through the MOSFET SW. At this time, the slope of the peak component of the charge pumping current _{is determined according to the value of L 3} , so that the peak component of the charge pumping current can be limited at the moment SW is ON. V _C2 is determined by charge pumping.

Has the value of At this time, if the value of _{L 3 is sufficiently small}

Becomes.

의 값을 갖는다. V_C3의 전압은 V_C1-L₂-D₃-V₃로 연결되는 boost path를 따라

의 전압을 갖게 되며 이를 V_IN으로 표시하면

이 된다. L₃의 값이 충분히 작다면 출력 전압은 V_C2 + V_C3가 되어 제안된 컨버터의 입-출력 전압은

의 관계를 갖는다. 따라서 제안된 boost converter는 동일한 duty ratio 조건에서 charge pumping에 의해 quadratic boost converter보다 2배 높은 출력 전압을 얻을 수 있고, 스위치에 걸리는 전압은 출력 전압의 절반이 된다.In the following, mode 2 (S200) will be described in detail. In mode 2, the MOSFET (SW), the second diode (D ₂ ), and the fourth diode (D ₄ ) are turned off, and the first diode (D ₁ ), The third diode (D ₃ ) and the output diode (D _O ) are turned on to transfer energy to _{V C1} and V _O. Voltage V _C1 is along a path that is connected to boost V _IN -L ₁ -D ₁ -V _C1 mouth of a conventional boost converter - the same as the output ratio

Has the value of The voltage of V _C3 is along the boost path connected to _{V C1} -L ₂ -D ₃ -V ₃

It has a voltage of, and if you mark _{it as V IN,}

Becomes. If _{the value of L 3} is small enough, the output voltage becomes V _C2 + V _C3 , so the input-output voltage of the proposed converter is

Have a relationship. Therefore, the proposed boost converter can obtain an output voltage twice as high as that of a quadratic boost converter by charge pumping under the same duty ratio condition, and the voltage applied to the switch becomes half of the output voltage.

Next, the operation of the conventional secondary boosting type converter and the converter proposed in the present invention will be compared through an embodiment of the PSIM simulator. The device values used in each example are shown in Table 1 below.

<Table 1. Comparison of element values of the conventional 2nd step-up converter and the proposed converter>

In order to verify the operation of the proposed circuit, a PSIM simulator is used to compare the switch voltage and current waveforms of the conventional secondary step-up converter and the proposed circuit. Simulation is V _IN = 10 V, V _O = 50 V, R _O = 50 Ω, output power P _O = 50 W, switching frequency f _sw = 350 kHz, inductor L ₁ , L ₂ is 10 μH, L ₃ is 1 µH, capacitors C ₁ , C ₂ , C ₃ , and C _O use 10 μF to proceed.

FIG. 4 shows the result of simulation of the switch voltage and current (FIG. 4, a) and the switch (MOSFET, SW) voltage and current (FIG. 4, b) of the proposed converter of the secondary boosting type converter. As can be seen in Table 2 below, in the case of a conventional quadratic boost converter, _{the on-duty ratio D of the switch is 0.56 under the conditions V IN} = 10 V and V _O = 50 V, the maximum value of the switch current is 8 A, and the maximum value of the switch voltage. Represents 50 V, which is the same as the output voltage. In the case of the converter proposed in the present invention, the switch-on duty ratio D is 0.39, the maximum value of the switch current is 12 A, and the maximum value of the switch voltage is 25 V, which is half of the output voltage under the same input-output conditions as the conventional secondary step-up converter. I got it. When comparing the switch current and voltage waveforms of the conventional secondary boosting type converter and the proposed converter, the D of the proposed converter under the same input-output voltage condition is 2 due to the charge pump (200) structure added to the proposed converter. It can be seen that it is lower than that of the secondary step-up converter. That is, it can be seen that the input-output conversion ratio of the converter according to the present invention is higher than that of the conventional secondary step-up converter. In addition, it can be seen that the voltage applied to both ends of the switch of the proposed converter in the switch off period is reduced by half compared to the switch voltage of the conventional secondary boosting type converter.

<Table 2. Comparison of PSIM simulation at input voltage of 10 V, output voltage of 50 V, and output power of 50 W>

5 is a simulation result for comparing the role of _{the third inductor (L 3} ) in the structure of the proposed boost converter. When the third inductor (L ₃ ) is not present (Fig. 5, a), the moment the switch is turned on _{, the charge pumping current transferred from the third capacitor (C 3} ) to the second capacitor (C ₂ ) flows through the switch as it is and switches. It can be seen that the turn-on loss occurs significantly. In the proposed structure in which a third inductor (L ₃ ) is added to the charge pumping path, the charge pumping current at the moment the switch is turned on is It can be seen that the switching turn-on loss can be reduced by being limited by the third inductor L _3.

Accordingly, in the present invention, a DC-DC converter that improves the switching loss of a conventional secondary step-up converter and a charge pump structure that reduces the voltage across the switch to half of the output voltage when the switch is in the off state by the control method thereof. A structure capable of limiting the peak of charge pumping current flowing into the switch turn-on momentary switch is proposed. The proposed structure was verified with the PSIM simulator. It is expected that the proposed structure can reduce the switch loss of the conventional secondary step-up converter and improve the power conversion efficiency of the circuit.

Although the above description has been made with reference to the drawings according to an embodiment of the present invention, a person of ordinary skill in the field to which the present invention belongs will be able to perform various applications and modifications within the scope of the present invention based on the above contents.

100: 2nd step-up converter
SW: MOSFET
R _O : Output terminal resistance
C _O : Output terminal capacitor C ₁ : First capacitor
D _O : Output diode D ₁ : First diode
D ₂ : 2nd diode
L ₁ : 1st inductor L ₂ : 2nd inductor
200: charge pump circuit
C ₂ : 2nd capacitor C ₃ : 3rd capacitor
D ₃ : 3rd diode D ₄ : 4th diode
L ₃ : 3rd inductor

Claims (3)

In the converter performing a switching operation for generating and outputting the first DC power supplied from the outside to the second DC power,
MOSFET (SW), output capacitor (C _O ), first capacitor (C ₁ ), output resistance (R _O ), output diode (D _O ), first diode (D ₁ ), second diode (D ₂ ), A second boosting type converter 100 composed of a first inductor (L ₁ ) and a second inductor (L _{2 );}
A charge pump circuit 200 composed of a second capacitor (C ₂ ), a third capacitor (C ₃ ), a third diode (D ₃ ), and a fourth diode (D _{4 ), and}
DC-DC converter with improved switching power loss, comprising a _{third inductor (L 3} ) connected in series to the charge pumping path of the charge pump circuit (200).
The method according to claim 1,
The third inductor (L ₃ ) is a DC-DC converter with improved switching power loss, characterized in that it serves to limit a peak of a charge pumping current introduced at the moment the MOSFET (SW) is turned on.
MOSFET (SW), output capacitor (C _O ), first capacitor (C ₁ ), output resistance (R _O ), output diode (D _O ), first diode (D ₁ ), second diode (D ₂ ), _{A second capacitor (C 2} ), a third capacitor (C ₃ ) and a third diode (D ₃ ), and a fourth capacitor are used in the second step-up converter including the first inductance (L ₁ ) and the second inductance (L _{2 ).} In the method for improving the switching loss of a converter configured to further include a diode (D _{4 ),}
The MOSFET (SW), the fourth diode (D ₄ ) are turned on, the first diode (D ₁ ), the third diode (D ₃ ), and the output diode (D _O ) are turned off, and the charge pump is operated. Mode 1 step (S100) and
The MOSFET (SW), the second diode (D ₂ ), and the fourth diode (D ₄ ) are turned off, and the first diode (D ₁ ) and the third diode (D ₃ ) are turned on, and the first capacitor ( the voltage across C ₁₎ (V _C1) and the output resistance (R _O) take voltage (V _O) which improve the switching power loss comprising the step Mode 2 (S200), which transfers energy to the DC- DC converter control method.

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