KR200216665Y1 - Switching mode power supply with high efficiency - Google Patents

Abstract

The present invention relates to a switching mode power supply, and more particularly, to a switching mode power supply capable of operating at a high switching frequency by preventing oscillation that may occur in a circuit. The switching mode power supply includes a first power source and a second power source part; A switching unit operating at a predetermined frequency according to a switching signal to chop the second power supply to a square wave of the frequency and outputting the chopped wave; An inverter unit receiving a square wave signal having a level of the second power supply and amplifying the square wave signal into a square wave signal having a level of the first power supply; And a rectifier for rectifying the rectangular wave signal output from the inverter unit and outputting the rectified rectangular wave signal to a DC power source, wherein the rectifier includes a power supply V2 supplied to a switching frequency oscillation unit (PWM control circuit) and a main power amplifier (output side of a power transformer) The power source V1 is completely disconnected and the oscillation is not generated even if the switching frequency is increased, so that high efficiency can be obtained.

Description

[0001] Switching mode power supply with high efficiency [0002]

The present invention relates to a switching mode power supply, and more particularly, to a switching mode power supply capable of operating at a high switching frequency by preventing oscillation that may occur in a circuit.

There is an attempt to reduce the energy loss due to the resistance of the coil by reducing the size of the transformer by increasing the switching frequency (fs) as much as possible in the switching mode power supply (SMPS) and reducing the number of turns of the coil. According to the configuration, oscillation occurs even when the switching frequency is 100 KHz or more, and when the load is connected to the output terminal, the output voltage drops and the power of the power supply side is not properly transmitted to the load of the output terminal .

The technical object of the present invention is to provide a power supply capable of achieving high efficiency without generating oscillation even if the switching frequency is increased by completely separating the power supplied to the switching frequency oscillator and the power supplied to the main power amplifier in the converter circuit .

1 is a block diagram showing a schematic configuration of a switching mode power supply.

Figs. 2A and 2B are circuit diagrams showing the configuration of the input rectifier 11 shown in Fig.

2C and 2D are circuit diagrams showing an example in which the input rectifier shown in FIG. 2B is configured in the form of a module.

2E is a diagram showing another configuration of the low voltage generating unit 25 shown in FIG. 2A.

3A is a circuit diagram showing a basic configuration of an inverter operating in a switching mode.

Fig. 3B is a timing chart for explaining the operation in each part of the circuit diagram of Fig. 3A.

FIG. 3C is an example of a configuration diagram of the PWM control circuit 31 shown in FIG. 3A.

Circuit M1 shown in FIG. 4A is a more detailed circuit diagram in which additional circuitry is added to transistor Q2 of the output portion shown in FIG. 3A.

The circuit M2 shown in Fig. 4B is a more detailed circuit diagram in which additional circuitry is added to the transistor Q3 of the output portion shown in Fig. 3A.

The circuit M3 shown in Fig. 4C shows a configuration in which the circuits shown in Fig. 4A are connected in parallel.

The circuit M4 shown in Fig. 4D shows a configuration in which the circuits shown in Fig. 4C are connected in parallel.

5A is a diagram showing a circuit configuration of a half bridge type SMPS.

Fig. 5B shows a specific configuration of each output module M11 constituting the output rectifying sections 57a, b.

Fig. 5C shows another configuration of the half bridge type inverter of the power supply circuit shown in Fig. 5A.

5D is a diagram showing a full bridge type inverter circuit.

FIG. 5E shows an example of an output rectifier used in connection with the bridge-type inverter shown in FIG. 5A, FIG. 5C or FIG. 5D.

FIG. 5F shows an example of an output rectifying part 57g used in connection with the bridge-type inverter part shown in FIG. 5A, 5C or 5D.

6A is a diagram showing a configuration of a push-pull type SMPS.

6B shows another configuration of the push-pull type inverter among the power supply circuits shown in FIG. 6A.

6C shows an example of an output rectifying part used in connection with the push-pull type inverter part shown in FIG. 6A or 6B.

Fig. 6D shows another circuit example of the output buffer section 67a shown in Fig. 6A.

According to an aspect of the present invention, there is provided a switching mode power supply,

A power supply output unit for outputting a first power supply and a second power supply; A switching unit operating at a predetermined frequency according to a switching signal to chop the second power supply to a square wave of the frequency and outputting the chopped wave; An inverter unit receiving a square wave signal having a level of the second power supply and amplifying the square wave signal into a square wave signal having a level of the first power supply; And an output rectifying unit for rectifying the rectangular wave signal output from the inverter unit and outputting the rectified rectangular wave signal to a DC power source.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram showing a schematic configuration of a switching mode power supply. When the AC power is input to the input rectifier 11, two DC power sources V ₁ and V ₂ are generated and output to the switching circuit 12 and the inverter 14. Here, the DC power supply V ₁ is additional circuitry in the circuit shown in the figure, is fed as a power source for a direct-current high-voltage power supply, and determines the output voltage level of the inverter 14, and the other DC power supply V ₂ is the switching circuit 12 (E. G., 12 or 15 Vdc) may be generated by further adding a DC / DC converter (e. G., The DC / DC converter shown in FIG. 2D) The output portion of the power supply includes an inverter 14, a power transformer 15, and an output rectifying portion 17.

The switching circuit 12 operates at a predetermined frequency to chop the input DC voltage V ₂ into a high frequency fine wave. The square wave signal is input to the inverter 14 via the drive transformer 13 and amplified by the high voltage power supply V ₁ and then applied to the power transformer 15 to be lowered to a predetermined value according to the coil winding ratio. The inverter 14 generates a square wave having the electric potential level of the input DC voltage V ₁ according to the frequency of the square wave generated in the switching circuit 12.

The current feedback unit 18 detects the output current of the inverter 14 and feeds it back to the switching circuit 12. The final output voltage V _out of the output rectifying section 17 is fed back to the switching circuit 12. The switching circuit 12 adjusts the level (magnitude) of the current and the voltage by adjusting the pulse phase of the switching signal by comparing these feedback signals with the reference signal (PWM control). Thereby, the voltage of the final output of the power supply is kept constant. The square wave signal of high potential output from the inverter 14 is rectified by the output rectifier 17 after the voltage is adjusted by the transformer 15 to provide a DC power source.

Figs. 2A and 2B are circuit diagrams showing the configuration of the input rectifier 11 shown in Fig. The input rectifier of FIG. 2A includes an AC input section 21, a high voltage generating section 23, and a low voltage generating section 25. The varistor Z ₁ , the capacitors C ₁₁ , C ₁₂ and C ₁₃ and the inductors L ₁ and L ₂ are connected to the AC input terminal to clamp an excessive input voltage to a safe level, It is used to cut off current and remove noise. The bridge diodes BR ₁ and BR ₂ function to convert the alternating current into direct current by determining the current flow according to the phase of the alternating current power source. The switch S1 is a selection switch according to the AC input voltage (110 V or 220 V).

Of; (TH thermistor) comprises, which maintains a constant resistance in the thermistor regardless of the amount of current filter capacitor (C _1, C ₂₎ for the high voltage generating unit 23. The element of thermistor rises, the temperature decrease in resistance It prevents the breakdown of the circuit due to instantaneous transient current. That is a current flow in the diode (BR ₁₎ set the capacitor DC voltage V on the high potential level by the charging of the (C _1, C _{2) 1} is generated in accordance with the cycle of the input AC power source. Low-voltage generating section 25 generates a direct current voltage V ₂ of the low voltage level by the action of an electric charge charged in the capacitor and a forward diode.

FIG. 2B shows an AC-to-DC rectifier having a high rated current by dividing the AC-to-DC rectifier into a plurality of rectifiers and connecting the input and output stages in parallel Multiple rectifier circuit. In the bridge diode BR ₁ of the high voltage generating unit 23 shown in FIG. 2A, if the operating current is large, a large amount of heat is generated thereby requiring a heat radiating plate and a large capacity of the capacitor, do.

As shown in the figure, the configuration of each unit module is basically the same as the configuration related to the high voltage generator shown in FIG. 2A, and the input terminals of each module and the output terminals of the respective modules are connected in parallel, For example, if you are designing a 500VA rectifier, you can use 10 modules with a rating of 50 VA in parallel. As a result, the total input current is distributed to each module, reducing the power loss consumed by each module. That is, since the loss power is proportional to the resistance and is proportional to the square of the current, the loss power Ploss when n modules having a constant resistance (R) is used is as follows.

In other words, when the total operation current is constant, the use of n modules having the resistor R can reduce the loss power by 1 / n times as compared with the case where one module having the resistor R is used. Therefore, the efficiency of the power supply can be increased.

On the other hand, the output filter 27 connected to the output terminal of each module is connected to the output of the pi (pi) filter including the capacitors CF ₁₁ to CF ₁₄ and the inductor LF ₁ ) Type low-pass filter that removes the second, third, or higher harmonic noises generated by the high-frequency switching operation. The capacitors and inductors used in this circuit have low current ratings, which results in a small capacitor size and inductor core size and low heat dissipation.

The parallel-connected rectifier shown in FIG. 2B has a structure in which a plurality of AC to DC rectifier modules having substantially the same configuration are connected in parallel to distribute input power by 1 / n for each module, This reduces the size of the electrical components used in the module, especially the capacitors and inductors, and reduces the heat generated by the bridge diodes, allowing operation without the need for a separate heat sink. Therefore, as shown in FIG. 2C, if a module is integrated in units of modules M ₁ to M _n and the modules are connected in parallel, the high-power rectifier can be realized. In terms of economics, it is much cheaper (about 30% to 50% less) to implement a number of low-power rectifiers in parallel, compared to the cost of implementing a single high-power rectifier. FIG. 2d shows another embodiment of FIG. 2c in which one or more modules are stacked vertically in consideration of a physical space, and a plurality of such overlap modules are horizontally connected to form a single rectifier Show. The parallel-connected rectifier shown in FIG. 2B can also be applied to an apparatus for converting a three-phase AC input to a DC power supply.

FIG. 2E is a circuit diagram showing a configuration of a DC / DC converter connected to the output terminal of the low voltage generating unit 25 shown in FIG. 2A to obtain a low and stable low voltage power source. The input DC power supply V _in is the output voltage V ₂ of the low voltage generator 25 in FIG. In FIGS. 3-6, there will be indicated the power applied to the switching power supply is it the output power (V _out) of the circuit shown in Figure 2e, but for convenience the drawings of the description to V ₂ in a batch of low-voltage power source .

In the embodiment shown in Figure 2e, transistor (Q ₁₎ is operated as a switching element for turning on or off in response to the switching signal outputted from the PWM control circuit 31. The transformer T ₁ has a primary winding N _p connected between the input DC power supply V _in and the switching unit so that a square wave power of a high frequency is supplied to the primary winding by turning on and off the switching unit, . The input current detection unit 33 detects the current flowing through the primary winding of the transformer T ₁ according to the ON / OFF operation of the switching element (transistor Q ₁ ) and feeds the current to the PWM control circuit 31. The PWM control circuit 31 receives the error signal obtained by comparing the output DC power (+ FB) with the reference signal and detecting the input current which varies according to the variation of the input voltage V _in through the input current detector 33 And controls the on / off duration of the switching signal SW _out in accordance with the level of the applied voltage to control the amount of current flowing in the primary winding. A rectifier 37a connected to the secondary winding of the power transformer T ₁ and converting AC power into DC power is provided to obtain one or more constant voltage outputs.

In this embodiment, the circuit for the switching operation is constituted by the PWM control circuit 31 for generating the switching signal, the transistor Q ₁ , the voltage step-down transformer T ₁ , and the current sensing transformer T ₂ . The transistor Q ₁ is turned on / off by the square wave SW _out generated from the PWM control circuit 31. When the to the primary winding when the transistor (Q ₁₎ turned on the transformer (T ₁₎ is a current one charging transistor (Q ₁₎ is off is that the charging current to the primary winding transferred to the secondary winding, the transformer ( T ₁ ), the voltage is induced across the secondary winding.

On the other hand, the source (source) terminal and the minus of the transistor (Q ₁₎ (-) is the input current detecting section 33 between the terminal connected to the transistor a signal generated according to the current time (Q ₁₎ is turned on the PWM control circuit ( 31). The input current detection unit 33 senses a change in the input side current according to the change in the potential of the input side voltage V _in or the change in the input side current due to the change in the output side load (load) and feeds it back to the PWM control circuit 31. The PWM control circuit 31 controls the switching operation according to the sensing signal in order to compensate for the phenomenon caused by the same current fluctuation.

The input current detecting unit 33 detects the change of the current Ipp in accordance with the variation of the input voltage V _in or the output voltage and converts it into a voltage signal and then feeds it back to the PWM control circuit 31 The PWM control circuit 31 adjusts the pulse period of the positive phase of the switching signal SW _out by reflecting the fluctuation of the input voltage V _in or the fluctuation of the output voltage, . If the current I _pp is increased, the current sensing voltage detected by the input current detection unit 33 and fed back to the PWM control circuit 31 is increased and the PWM control circuit 31 outputs the current I _pp) and adjusts the pulse period of the reduction switching signal (SW _out) is controlled in a direction.

When the transistor Q ₁ is turned on, current is induced in the secondary winding by the current flowing in the primary winding of the current-coupling fraser (T ₂ ). The resistor R1 converts the current induced in the fascia T ₂ into a voltage signal and determines the voltage applied to the sensing terminal SENSE by adjusting the resistance value of the variable resistor R ₂ . The capacitors C ₂ and C ₃ are for ripple and noise removal, and the diode D ₂ functions to convert and rectify the detected rectangular wave signal into a DC signal. Current-coupling Fran spokes Murray (T ₂₎ is the power source (+) according to the primary side and the secondary side separated of the transformer (T ₂₎ in sensing the variation of the current flowing through the primary winding of the transformer (T ₁₎ Polarity are separated from each other to enable a circuit configuration for switching to a high frequency.

The ratio of the primary winding to the secondary winding of the transformer (T ₂ ) is preferably about 1: 50 to 200. For example, in the case of a small power of less than 10 watts, when the continuity current (I _PDC ) of the primary coil of the main transformer T ₁ is less than 1.0 A, the primary of the transformer T ₂ is once The secondary winding is preferably 100 times. The material of the core of the transformer T ₂ is preferably the same as the core of the main transformer T ₁ .

The PWM control circuit 31 receives the feedback voltage of the output voltage + FB of the converter, receives the sensing voltage SENSE generated by the input side current, and outputs a square wave pulse for on / off operation of the switching element Q ₁ . The detailed configuration thereof is the same as that described with reference to FIG. 3C.

Self-bias circuit 35 supplies the operating power to the output of the switching signal (SW _out) in the PWM control circuit 31. The voltage induced by the auxiliary winding N _FB on the primary side of the power transformer T ₁ is applied to the Vcc terminal of the PWM control circuit 31 through the diode D 1. Here, the capacitor C ₁ is for ripple removal. The input power supply V _in supplies power to the elements in the PWM control circuit 31 other than the switching output portion.

Figure 3a is a bridge-type or push-operating in switching mode above a circuit diagram showing a basic configuration of a pull-type inverter, the classic of the high frequency receives the direct current power source (V _1, V ₂₎ of the input rectifier 11 shown in Figure 1 Wave signal having a predetermined level. And performs a function of converting a single square wave signal generated by the PWM control circuit 31 into a rectangular wave having two polarities different from each other. With this circuit configuration, a single square wave signal is converted into two square waves having a phase difference of 180 degrees, and the output signal of the drive transformer T ₁ can output a waveform having almost no dead time. Fig. 3B is a timing chart for explaining the operation in each part of the circuit diagram of Fig. 3A. The DC power sources V ₁ and V ₂ are power sources output from the input rectifier 11 shown in FIG. 1, and the DC power source V ₁ is a high-voltage DC power source for amplifying power ('high voltage power source' And the other DC power supply V ₂ is a power supply ('switching power supply') for supplying a primary side of the drive transformer T ₁ and a power supply of the PWM control circuit 31 and generating a square wave signal by a switching operation.

Transistor (Q ₁₎ is operated as a switching element for turning on or off in response to the switching signal outputted from the PWM control circuit 31. The transformer T ₁ has a primary winding N _p connected between the input DC power supply V ₂ and the transistor Q 1 and an AC power is supplied to the primary winding by turning on and off the transistor Q 1, And supplies electric power to the windings. The PWM control circuit 31 generates a switching signal SW _out by PWM-controlling the output DC power (+ FB) according to an error signal which is fed back to the reference signal. The PWM control circuit 31 senses the fluctuation of the current due to the change of the output side load (load), and the sensing signal SENSE obtained therefrom is fed back. The PWM control circuit 31, And generates a signal SW _out .

The switching element is constituted by a transistor Q _{1 and} is turned on and off according to the logic level of the switching signal SW _out of the PWM control circuit 31 so as to be supplied to the primary winding N _p of the power transformer T ₁ The current is interrupted. The current flowing in the primary winding N _p of the transformer T ₁ is induced in the secondary winding in accordance with the ON / OFF state of the switching transistor Q ₁ , and a voltage is induced across the secondary winding in accordance with the winding ratio. The square wave signal generated by the switching transistor Q ₁ is transmitted to the secondary winding side through the transformer T ₁ and is input to the gate terminals of the two field effect transistors Q 2 and Q 3. At this time, the polarity of the square wave is applied to each transistor in the opposite direction. Thus, the transistors Q2 and Q3 are alternately turned on / off. Two transistors (Q2, Q3) amplifies an input square wave signal, the contacts of the drain terminal of the transistor (Q2) the source terminal and the transistor (Q3) of the frequency and substantially the same as the input square-wave signal to the high voltage power source (V ₁ A square wave signal amplified by the level of the square wave signal is generated. On the other hand, in selecting the transistor Q ₁ , it is necessary to consider the following points. It is preferable to first set the internal resistance R _{DS (on} ) to a low value (for example, 0.3 ohm or less) so that the input gate capacitance of the transistor becomes a low value (for example, 350 pF) have.

In this circuit diagram, the primary winding of the transformer T ₁ includes a basic winding N _p and an auxiliary winding N _T. The auxiliary winding N _T stores energy while the switching transistor Q ₁ is turned off and returns the stored energy to the output side when the transistor Q ₁ is turned on so that the down portion of the square wave, And transmits the energy of the signal to the output side to raise the off signal level. Therefore, it is possible to supply sufficient gate signal for turning on the transistor (Q ₃₎ for down (down) parts of the square wave. On the other hand, turns on the primary winding (N _p) is a transistor (Q _1), this is stored by transferring energy to the output transistor (Q ₂₎ when the one-off and stores energy during the turned on transistor (Q _1).

The primary winding N _p and the auxiliary winding N _T are wound in opposite polarities and the diode D 1 uses a fast switching diode and the primary winding N _p and the secondary winding N _T Or between the auxiliary winding N _T and the negative terminal -V ₂ to determine the direction of the current while the switching transistor Q ₁ is off. The thickness of the coil used in the auxiliary winding N _T and the winding are substantially the same as those of the basic winding N _p .

Two transistors Q ₂ and Q ₃ are connected to the secondary winding of the transformer T ₁ and a positive terminal of the high voltage power source V ₁ is connected to the drain terminal of the transistor Q ₂ , Is connected to the negative terminal (-V ₁ ) of the high voltage power supply V ₁ and the source terminal of the transistor Q ₂ and the drain terminal of the transistor Q ₃ are connected in common to form an output terminal do.

Referring to FIG. 3B, there is shown an operation state and a final output (V _out ) waveform of the transistors Q ₂ and Q ₃ according to the switching signal generated by the PWM control circuit 31, Respectively. The operating state of the transistor (Q ₁₎ on /, and the power transformer in accordance with the changes to the OFF (T ₁₎ 2 primary winding (Ns1, Ns2) of, the square-wave signal with each other the phase inversion occurs, respectively, the signal of the output transistor It is respectively applied to the gate terminal of Q ₂ and Q3. At the output terminal, a rectangular wave whose frequency is equal to the frequency of the rectangular wave signal and whose voltage level is the high voltage power source V ₁ is outputted. Referring to the output signal according to the prior art, the PWM control circuit occurs in the form of a totem pole in which the two signals have a phase difference of 180 degrees, with a dead time of at least 20% between these signals . Therefore, power loss of the power supply is generated, and the efficiency can not be increased by 80% or more.

However, according to the present embodiment, the auxiliary winding N _T of the drive transformer T ₁ has the same polarity as the primary winding N _p , but has the opposite polarity. Which the transistor (Q ₁₎ is turned on when the stored energy in the coil, and it is supplied to the charging current of the gate turn-off when the input capacitance of the transistor (Q3) functions to facilitate the turn-on of the transistor (Q3). On the other hand, the charging current of the gate input capacitance of the transistor Q ₂ is performed by the energy stored in the primary coil N _p when the transistor Q ₁ is turned on. Therefore, no dead time occurs in the output signal, and high efficiency and small ripple can be realized.

Next, a method of designing the transformer T ₁ will be described in detail below. First, the output power (P _out ) of the transformer (T ₁ ) is as follows.

Here, n is the number of transistors, V _GS is the gate input voltage of each transistor, and Ig is the charge current (transistor turn-on current) of the gate-source capacitance of the transistor.

If transistors are connected in parallel on the output side of the transformer T ₁ , then the power required to operate these transistors is the output power P _out .

The peak current Ipp and the continuous current I _PDC flowing through the primary coil of the transformer T ₁ are calculated as follows.

The loss power of transistor Q ₁ is

The inductance Lp of the primary coil of the drive transformer T ₁ can be obtained as follows.

Here, V _{in (min)} is the minimum input voltage of the transistor (Q _1), D _max is the maximum amplitude (0.45) of a square wave, I _pp is the pick current flowing through the primary coil of the transformer (T _1), and fs is the switching Frequency.

The size of the core used in the transformer (T ₁ ) is determined as follows.

Where A _e is the effective area of the core (cm ² ), A _' is the winding window area (cm ² ) of the actual coil, Lp is the inductance of the primary coil, I _pp is the peak current of the primary coil, Diameter, and B _max = 1/2 x B _sat . The size of the actual core should be at least (calculated x1.5). When the volume of the core is small, the output voltage may be lowered due to the saturation of the core, or the stable operation of the converter may be damaged due to excessive current.

In order to prevent saturation of the core air gap it is assigned a transformer _{(T 1) (air gap)} l g may gesin as follows.

The primary winding (N _p ), secondary winding (N _T ) and secondary winding (N _s1 , N _s2 ) of the transformer (T ₁ ) can be obtained as follows and the feedback winding (N _FB ) It shall be the same as the passenger (N _p ).

Here, it is assumed that V _F is 6.6V.

PWM control circuit 31 receives a feedback input for output voltage (+ FB) of the converter, receives the sensed voltage (SENSE) generated by the inverter output current and a rectangular wave for the on / off operation of the switching element (Q ₁₎ Thereby generating a pulse. The detailed configuration will be described with reference to FIG.

Self-bias circuit 35 supplies the operating power to the output of the switching signal (SW _out) in the PWM control circuit 31. The voltage induced by the feedback winding N _FB of the primary side of the power transformer T ₁ is opposite to the polarity indication of the basic winding N _{p with} its polarity mark (start point mark of the winding) D1 to the Vcc terminal of the PWM control circuit 31. [ Here, the capacitor C ₁ is for ripple removal. The input power supply V _in supplies power to the elements in the PWM control circuit 31 other than the switching output portion.

FIG. 3C illustrates a current-mode control method as an example of the configuration of the PWM control circuit 31 shown in FIG. 3A. The power supply Vcc induced by the feedback winding NFB on the primary side of the power transformer T ₁ supplies power to the amplifier 45 that outputs the switching signal SW _out and supplies power to the clock generator 43, The circuit 44 such as the flop 44, the error amplifier 41 and the comparator 42 receives operating power from the input power source V ₂ applied through the regulator 47.

The error amplifier 41 compares and amplifies the output signal + FB and the reference voltage V _ref , and the error signal is input to the comparator 42. Then, the output current of the inverter is sensed and converted into a voltage, and the sensed signal SENSE is input to the comparator 42. The comparator 42 compares the detection signal SENSE according to the pick switch current with an error signal related to the output signal and inputs the result to the RS flip flop 44 (latch). The clock generator 43 generates a clock signal which is a rectangular wave signal corresponding to the switching frequency fs and the RS flip flop 44 receives the output of the comparator 42 and the clock signal to turn on / And generates a switching signal SW _out . The switching signal turns on / off a switching element (transistor) connected to the rear end in accordance with the logic level.

The main output voltage (+ FB) fed back from the final output stage is compared with the reference voltage (V _ref ) in the error amplifier 41 and the current feedback signal SENSE is compared with the reference voltage The result is input to the flip flop 44. The flip flop 44 increases or decreases the phase (or width) of the clock signal generated in the oscillator 43 according to the output signal of the comparator 42 (that is, the pulse width modulation PWM) signal to generate a switching signal SW _out to increase or decrease the current flowing through the transformer T ₁ according to the variation of the input voltage and the load, thereby maintaining the output voltage of the final output terminal constant.

A circuit (M1) illustrated in Figure 4a the output inde of the transistor more detailed circuit diagram a (Q ₂₎ of the additional circuit is added, FIG RC snubber circuit and the charge, with 3a of eopcheuk output of the basic configuration shown in Fig. 3a And a discharge unit. The circuit M1 receives the square wave signal transmitted from the primary winding side of the power transformer T ₁ and the transistor Q ₂ is turned on / off by the rectangular wave signal whose level is changed according to the winding ratio.

When the transistor Q ₂ is turned off, the charge charged in the capacitance Coss between the drain and the source (which is charged during the on period of the transistor Q ₂ ) is supplied to the capacitor Cd 2 through the diode Dd 2 Is charged. A transistor (Q ₂₎ is turned ON while passing through the resistor (Rd2) electric charge charged in the capacitor (Cd2) is emitted as heat. Thus, the transistor (Q ₂₎ is the drain and the effect of the charge of the capacitance (Coss) between the source so emitted from the resistor (Rd2) and thereby on the transistor (Q ₂₎ is minimized for a turned on, during the switching operation the transistor (Q ₂ ) Can be significantly lowered.

A tuning circuit is formed at the time of turn-off by the leakage inductance of the primary coil of the power transformer T ₁ accommodating high frequency and the capacitance C _GS between the gate and the source of the transistor Q ₂ . Transient overvoltage ringing is caused in the transient state. The ringing can have an amplitude large enough to destroy the diode or transistor during the turn-off period. The RC element constituted by the resistor R _s2 and the capacitor C _s2 is a snubber circuit which suppresses the ringing phenomenon and is connected in parallel to the secondary winding of the power transformer T ₁ .

The gate resistance R _g connected to the gate terminal of the transistor Q ₂ is set such that the rise time of the square wave transmitted from the power transformer T ₁ matches the rise time of the transistor Q ₂ . When the rising time of the input square wave is t _r and the capacitance between the drain and the source of the transistor is C _iss , the gate resistance (R _g ) is obtained as follows.

A circuit (M2) shown in Figure 4b also the transistor (Q ₃₎ of the output section shown in 3a, with additional circuitry is added than inde detailed circuit diagram, the down-side output of the basic configuration of Figure 3a RC snubber circuits, and And further includes a charge discharge portion. It is understood that the configuration of the secondary winding is substantially the same as that of the circuit M1 except that the position of the polarity mark of the secondary winding is reversed, and thus a detailed description thereof will be omitted.

The circuit M3 shown in Fig. 4C is obtained by connecting the circuit M1 shown in Fig. 4A in parallel, and allows a current flowing in one transistor of the circuit M1 to flow to a plurality of transistors, . Each transistor RC snubber circuit is connected to each of the (Q _1, Q ₂₎ and the transistor (Q _1, Q ₂₎ having a charge of the discharge parts (58, 59) respectively between the drain and source terminals. That is, a plurality of transistors Q ₁ , Q ₂ , ... are connected in parallel (the drains of the transistors are connected to the drains and the sources are connected to the sources) of the secondary winding of the secondary winding of the power transformer T ₁ , Each of the transistors is provided with a charge discharge part separately, so that heat generation in each heat dissipation resistor R _d can be reduced.

Each module consisting of a transistor and a snubber circuit (571, 572, ...), all the transistors (Q _1, Q _2, ...) is there is on or off at the same time, the transistors (Q _1, Q _2, ... The charges charged by the capacitance between the drain and the source are discharged by the charge discharging parts 58 and 59 connected to the respective transistors, respectively. When high power is required, six or more modules may be connected in parallel to minimize power loss by the transistors in the output (thereby minimizing the amount of heat generated by the transistors). In this case, it is also possible to provide one charge discharge unit for several modules. By doing so, power loss can be minimized while reducing the volume by circuit elements. Similarly, the down-side output unit 53 shown in FIG. 3A can easily implement a circuit module M4 in which a plurality of transistors are connected in parallel by applying the same concept as the circuit M3 shown in FIG. 4C, 4d. The circuit M4 is substantially the same in configuration as the circuit M3 except that the positions of the polarities of the secondary windings are reversed, so that a detailed description thereof will be omitted.

As in the present embodiment, by dividing a transistor group M3 operating as a positive pulse part of a square wave and a transistor group M4 operating as a negative pulse part of a square wave and inputting a square wave into the gate of each transistor, The current flowing through the transistor is reduced to 1 / n, and the power loss is accordingly lowered. Therefore, it is possible to operate stably without providing a separate heat sink for each transistor.

5A is a circuit diagram of a bridge type SMPS for high voltage and high power. The circuit on the primary winding side of the transformer T ₁ is substantially the same as that shown in FIG. 3A, 1, the corresponding relationship is as follows: Drive transformer 13 (T ₁ ), inverter 14 (51, 53), output transformer 15 (T ₃ ), output Rectification part (17; 57a, b) and current feedback part (18; 55).

First, the configuration of the inverter connected to the secondary winding side of the transformer T ₁ is as follows. The inverter unit includes an UP side output unit 51 and a DOWN side output unit 53. Each output unit includes a plurality of circuit modules M1 and M2. (A) terminal (that is, the drain terminal of the transistor) of each module M1 of the UP-side output unit 51 are commonly connected and connected to the high voltage power source + V ₁ , (B) terminals (i.e., source terminals of the transistors) of the inverter are connected in common to form an output terminal S of the inverter. (D) terminal (i.e., the source terminal of the transistor) of each module M2 of the DOWN side output unit 53 are connected in common to the (-) terminal (-V ₁ ) of the high voltage power source, (C) terminal (that is, the drain terminal of the transistor) of each module are connected in common and are commonly connected to the terminal (b) of each module M2 of the UP side output section 51 and connected to the output terminal S).

When the switching transistor Q ₁ connected to the PWM control circuit 31 is turned on, the transistors of the upper side output section 51 are turned on and the transistors of the down side output section 53 are turned off, ₁ ) to the intermediate tap. Next, a switching transistor (Q ₁₎ when the off eopcheuk output section 51 of the transistors are transistors of the off and the down-side output section 53 are turned on the transformer from the center tap of the high voltage power source (V ₁₎ (T3, T2 (-V ₁ ) of the high-voltage power supply V ₁ through the transistors of the down-side output unit 53 through the output terminal of the high-voltage power supply V ₁ . In this way, a square wave signal having a high voltage level is transmitted to the side of the output transformer (T3) by the on / off operation of the switching transistor (Q _1).

The inverter unit connected to the secondary winding of the drive transformer T ₁ basically has the UP side output unit 51 and the down side output unit 53 while performing the same operation as the configuration shown in FIG. Each of the UP-side output section 51 and the DOWN-side output section 53 is connected in parallel to a plurality of modules M1 and M2 shown in FIG. 4A and FIG. 4B in FIG. 4C and FIG. 4D M3 and M4, which are modules shown in FIG. 1B), and a plurality of transistors included in each output section are connected in parallel. By doing so, since the current flowing through each transistor is reduced to 1 / n (where n is the number of transistors used in each output section), the power loss due to the drain-source internal resistance R _{DS (on)} And the heat generated in each transistor is also minimized, so that it can operate stably without using a separate heat sink.

Also, as the switching frequency of the inverter increases, the power loss due to the drain-source capacitance (Coss) of each transistor (MOSFET) increases. To reduce such power loss, A snubber circuit consisting of a diode Dd, a capacitor Cd and a resistor Rd is connected between the drain and the source (see Figs. 4A, 4B, 4C and 4D). Therefore, the heat loss due to the drain-source capacitance (Coss) of the transistor can be dissipated from the resistor Rd to prevent the thermal runaway of the transistor. The heat loss due to the internal resistance R _{DS (on)} of the n transistors is calculated as follows.

Therefore, it can be seen that heat loss can be reduced to 1 / n by connecting n transistors in parallel as shown in the drawing. In terms of component cost, one high-power transistor costs more than a few low-power transistors, so the cost of implementing the circuit is also lower.

In Fig. 5A, the upstream output section 51 has a structure in which, for example, three modules M1 having the configuration shown in Fig. 4A are connected in parallel. That is, the drain terminals a of the transistors belonging to each module are commonly connected and the source terminals b of the transistors are commonly connected to each other to form a parallel structure. Likewise, the down-side output unit 53 also has a structure in which three modules M2 having the configuration shown in FIG. 4B are connected in parallel. With this parallel structure, the current flowing through each transistor becomes 1/3 of the total current when the transistor of the output section is turned on, and accordingly, the power loss due to the on-resistance (Rds) of the transistor can be reduced to 1/3. In this embodiment, the number of modules included in each output section is three. However, if the number of modules is increased, the power loss can be further reduced to improve the efficiency, but the physical volume of the power supply will be increased. If the number is reduced, the opposite will happen, so the number of modules can be increased or decreased depending on the power rating and the purpose of use.

It is preferable that the number of transistors (or the number of the modules) used for each of the output sections 51 and 53 be the same as the number of transistors included in the upside output section 51 and the downside output section 53) May be appropriately adjusted according to the output power capacity, and may be 20 to 30 or more, with the total number of transistors being an even number. Ten thousand and one is the input voltage of the high voltage power source (V ₁₎ is 240V, and when said internal resistance (RDS (on)) of 0.5 ohms in the transistor, the current (IPDC) flowing through each transistor is 0.5A, by using the transistor 30 When constructing a circuit, the maximum rated output power and efficiency of the inverter can be expressed as:

Power loss in each transistor;

Total power loss by 30 transistors;

Total current;

Maximum output;

efficiency;

The output part of the inverter according to the present embodiment can be manufactured in the form of a small-sized lightweight module having a constant rated output, and these modules can be connected in parallel to constitute a large-capacity inverter. This embodiment can be applied to a centralized ballast or a battery charger for driving an electronic ballast provided in an individual fluorescent lamp in one place, a drive device for a DC motor, and the like. Since a separate heat sink is not required for each transistor, Can be greatly improved.

The configuration of the current feedback unit 55, S1 that senses the current transmitted from the inverter unit to the transformer T3 side and feeds back the current to the PWM control circuit 51 is as follows. The current feedback unit 55 sensitively changes the current I _PDC flowing through the transistor in accordance with the variation of the input voltage and / or the output voltage. Therefore, the primary coil of the current sensing transformer T2 is connected to the output side .

The output signal SENSE of the feedback section 55 is fed back to the input terminal SENSE of the PWM control circuit 31 shown in Fig. 3A. The feedback section 55 includes a current coupling transformer T2, and the polarity of the winding is as shown in the figure. The resistors R6 and R7 convert the current induced in the secondary winding of the transformer T2 into a voltage signal. When the switching transistor Q ₁ shown in FIG. 3A is turned on, the current flows from the (+) terminal of the high voltage power supply V ₁ to the inverter output terminal through the upside output section 51 so that the forward bias is applied to the diode D 3 And the reverse bias is applied to the diode D4 to prevent conduction. The capacitor C6 is used for removing AC noise and the variable resistor VR1 is used for adjusting the potential level of the output signal SENSE and the voltage signal SENSE adjusted by the variable resistor VR1 is supplied to the PWM control circuit 31 ). On the other hand, the switching transistor (Q ₁₎ is off, the current of the high voltage power source (V _1), an intermediate high voltage power supply through a primary winding and a down-side output section (53) of the transformer (T3) in the tab terminal (V ₁₎ of the ( -) terminal (-V ₁ ), the forward bias is applied to the diode D4 to conduct and the reverse bias is applied to the diode D3.

The feedback unit 55 senses the output current to generate a sense signal SENSE for controlling the switching transistor Q _{1. The} transformer T2 electrically separates the switching circuit unit and the inverter output unit, 55 are electrically separated from the high-voltage power supply V _{1 which} is connected to the negative terminal (-V ₂ ) of the switching power supply V ₂ and regulates the output level of the inverter. Therefore, oscillation or noise appearing at the output of the inverter can be prevented by the high-frequency operation of the switching transistor Q ₁ .

Next, the output rectifying section of the switching power supply will be described. Output transformers (T3, T4) 1, the primary winding and the intermediate tap terminal of the inverter output terminal and the high voltage power source (V ₁₎ of the connection, that the secondary winding is connected to the output side of the rectifying section. The transformers T3 and T4 receive a square wave of a high voltage level output from the inverter unit and lower it to a constant voltage according to the winding ratio, and the output rectifying unit rectifies the DC voltage to provide a DC power source. 5A shows an example having a single output terminal for high power output.

First, the rectifier element and the filter capacitor are provided on the output side of the transformers T3 and T4. The transformer operates as an energy storage / transmission inductor, the transistors are rectification elements, and the capacitors are filter elements. In this embodiment, two transformers T3 and T4 are included, and output rectifying sections 57a and 57b are connected to the secondary windings of the transformers T3 and T4, respectively. It can be seen that the first output rectifier 57a includes two output modules 571 and 572 and a filter capacitor Co1 and Co2 connected across the output terminal. It can also be seen that the second output rectifier 57b includes two output modules 573 and 574 and filter capacitors Co3 and Co4 connected across the output terminal thereof and the first and second output rectifiers 57a, and b have substantially the same internal structure, and the output terminals (a) and (b) of each module are commonly connected to each other to form one output terminal V _out .

The specific configuration of each of the output modules M11 constituting the output rectifying sections 57a and 57b is shown in FIG. 5b and is composed of an upper module M11a and a lower module M11b. An upper module (M11a) and a lower module (M11b) being connected to the secondary winding of the output transformer (T3) is performed each rectifying action by the operation of the transistor (Q _11). If the switching transistor (Q ₁₎ is turned on and the transistor (Q ₁₁₎ of the upper module (M11a) is turned on, the switching transistor (Q ₁₎ is off, the transistor (Q ₁₂₎ of the lower module (M11b) on the direct-current power supply Output.

An upper module (M11a) in addition to the transistor (Q ₁₁₎ and a snubber circuit. An RC element constituted by a resistor R _s1 and a capacitor C _s1 is provided with a capacitor C _s1 for preventing overvoltage ringing phenomenon due to the leakage inductance of the primary coil of the transformer T 3 and the gate capacitance C _GS of the transistor Q ₁₁ The RC element constituted by the resistor R _d1 and the capacitor C _{d1 is} connected to the leakage inductance of the primary coil of the transformer T 3 and the capacitance C _oss between the drain and source of the transistor Q ₁₁ And a second snubber circuit for preventing the overvoltage ringing phenomenon caused by the overvoltage. A resonance circuit is formed when the leakage inductance of the primary coil of the transformer T ₃ for high frequency and the junction capacitance of the rectifying transistor is turned off. Such a resonant circuit causes transient overvoltage ringing in a transient state. The ringing can have an amplitude large enough to destroy the transistor in the turn-off period. In addition, it can cause noise generation and malfunction. The RC snubber circuit serves to suppress this ringing with a safe amplitude.

A gate resistance (R _g1) connected to the gate terminal of the transistor (Q ₁₁₎ is added in order to ensure that the rise time of the square wave rise time (rising time) and the transistor (Q ₁₁₎ of the transfer from the transformer (T3) matched .

The lower module (M11a) is equal substantially to the internal configuration of the upper module (M11a), snubber circuits and functions of the gate resistor and parameters are substantially the same, but the upper module (M11a), the gate terminal of the transistor (Q ₁₁₎ on the other hand which is connected to the winding with polarity display (dot) of the transformer (T3), the lower module (M11b) in the gate terminal of the transistor (Q ₁₂₎ connected to no polar display (dot) of the transformer (T ₃₎ winding There is a difference. Therefore, the square wave power signal transmitted from the primary winding of the transformer T ₃ can alternately conduct according to its logic level.

In Figure 5a, the output rectifying and has two transformers (T _3, T ₄₎ are connected in parallel, each transformer there is connected in parallel to the two output holding portion (57a, b). In this way, instead of concentrating the output power in one transformer, it is possible to increase efficiency by lowering the rated current of each transformer by distributing and rectifying it in two and combining it at the output terminal. In addition, the volume of the core of the transformer is reduced to about 1/4 Can be reduced. In addition, two or more rectification modules M11 may be connected to one transformer to disperse the current flowing in the transistors therein, so that heat generated in the transistors can be dispersed. Therefore, a separate heat sink no need.

As a rectifying element of the output rectification module M11, a transistor (preferably a field effect transistor (FET)) is used and is also suitable for high current applications. The snubber circuit for preventing ringing phenomenon is provided, And a stable power supply can be obtained even if a device such as the LC filter used in the output rectifier is not added in the past. Particularly, by excluding the use of the inductor element, it can contribute to downsizing and modularization of the power supply. That is, according to the circuit of this embodiment, there is little dead time between the up / down signals and the efficiency can be increased nearly 100%. However, according to the related art, about 20% of dead time occurs and it is difficult to obtain high efficiency. Also, conventionally, an LC filter with an output voltage balancing is required due to the dead time between the pulse and the pulse at the output rectification. Incidentally, the inductor for the output filter used here is configured such that its core size is almost equal to the core size of the output transformer. However, in the present embodiment, such an LC circuit is not required, and a circuit can be simply implemented.

Further, since the power supply and the power supply for driving the switching element are completely separated and supplied by the current-coupling transformer T2, the output becomes unstable due to the oscillation phenomenon that may occur in the power supply circuit And the switching frequency can be designed as high as possible (for example, 200 KHz to 2000 KHz), thereby increasing the efficiency of the power supply.

5C shows another configuration of the half bridge type inverter of the power supply circuit shown in FIG. 5A (in other words, the configuration between the transformer T ₁ and the transformer T ₃ ). As shown in FIG. 5A, In the case of using a plurality of modules M1 and M2, in sensing the current through the transformer T2 connected to the current feedback unit 55c, the up-side output unit 51c and the down-side output unit 53c (513 and 533 in the figure). By doing so, the rated current flowing through the primary coil of the transformer T2 can be lowered, thereby reducing the size of the transformer T2.

5C, the terminals (a) of the three modules 511, 512 and 513 of the upper output section 51c are connected to each other and connected to the (+) terminal (+ V ₁ ) of the high voltage power supply V ₁ , The terminals (b) of the modules 511 and 512 are connected to each other and connected to the primary winding of the transformer T3, while the terminal (b) of the module 513 is connected to the two modules 511 and 512, respectively. The terminals (d) of the three modules 531, 532 and 533 of the down-side output unit 53c are connected to each other and are connected to the (-) terminal (-V ₁ ) of the high voltage power supply V ₁ , The terminals (c) of the modules 531 and 532 are connected to each other and connected to the primary windings of the transformer T3 while the terminal (c) of the module 533 is connected to the terminals of one module 513 of the upper output portion 51c (b) terminals. 4A or the circuit M3 shown in Fig. 4C can be applied as the module of the upper output portion 51c and the module of the down side output portion 53c can be applied to the module shown in Fig. 4B The circuit M2 or the circuit M4 shown in Fig. 4D can be applied, and the overall function is as described in Fig. 5A.

5D is a diagram showing a full bridge type inverter circuit. The circuit on the primary winding side of the drive transformer T ₁ is substantially the same as the circuit shown in Fig. 5A, and therefore detailed description thereof has been omitted.

The inverter section connected to the secondary winding of the drive transformer T ₁ includes first through fourth output sections 515 516 517 and 518 and constitutes first and fourth output sections 515 and 518 Each of the modules constituting the second and third sub-output units 516 and 517 may correspond to the circuits M1 and M3 , And circuits (M2, M4) for performing the above operation. Each of the sub-output units includes two or more modules having substantially the same configuration, thereby minimizing the loss power generated at the output unit. The configuration and operation of the feedback portion 55d are substantially the same as those described in Fig. 5A.

When a square-wave signal is transmitted to the secondary winding of the drive transformer T ₁ (that is, when a square wave is applied to the gate of each transistor in the sub-output section), the first to fourth sub- 515 to 518 are controlled on / off. That is, when the transistors included in the first and fourth sub-output units 515 and 518 are simultaneously turned on, the transistors included in the second and third sub-output units 516 and 517 are simultaneously turned off, The transistors included in the second and third sub-output units 516 and 517 are turned on at the same time when the transistors included in the quadrants output units 515 and 518 are simultaneously turned off. Thereby, a square wave amplified to the level of the high voltage power supply (V ₁ ) is generated. That is, when the switching transistor Q ₁ shown in FIG. 3A is turned on, the transistors included in the first and fourth sub-outputs 515 and 518 are simultaneously turned on while the second and third sub-outputs 516 , 517 are kept in the off state so that the current path by the high voltage power supply V ₁ is divided into the first sub-output 515, the point S1, the primary winding of the current sense transformer T2, (-V ₁ ) of the high-voltage power supply V ₁ through the fourth-order output section 518 via the primary winding of the third switch T3. On the other hand, when the switching transistor Q ₁ is turned off, the transistors included in the second and third sub-outputs 516 and 517 are simultaneously turned on, while the transistors included in the first and fourth sub-outputs 515 and 518 are included And the current path by the high voltage power supply V1 is connected to the _primary output of the third sub-output 517, S2 point, the output transformer T3 and the primary winding of the current sensing transformer T2 Is connected to the (-) terminal (-V ₁ ) of the high voltage power supply V ₁ via the secondary winding output portion 516 via the secondary winding. In this manner, the inverter generates a square wave having a high potential, and the inverter output is transmitted to the output rectifier through the transformer T3. In other words, the direction of the current flowing through the primary coil of the transistor T3 flows in the opposite directions to each other in accordance with the on / off operation of each transistor, and a square wave amplified at a high voltage is obtained.

The configuration and operation of the feedback section 55d are substantially the same as those of the feedback sections 55 and S1 shown in Fig. 5A. When the first and fourth sub-output sections 515 and 518 are turned on, The current when the three-part output sections 516 and 517 are turned on is sensed and fed back to the PWM control circuit (see FIG. 3A). 5A, since the power source V ₂ and the power source V ₁ for the switching operation are separated by the current sensing transformer T 2, oscillation or noise occurs due to high frequency operation Can be prevented.

FIG. 5E shows an example of an output rectifier used in connection with the bridge-type inverter shown in FIG. 5A, FIG. 5C or FIG. 5D. The output rectifying part shown in FIG. 5E is another example of the output rectifying part shown in FIG. 5A, and includes a first rectifying part 57e and a second rectifying part 57f to provide two or more different output power sources. Each rectification part uses one transformer and each transformer uses a plurality of rectification modules (M11, see FIG. 5B) as necessary.

Four rectification modules 571, 572, 573 and 574 are connected to the output transformer T3. Coercive-specific capacitors Co1, Co2, Co3 and Co4 are connected to the output terminals of the respective modules, And the output terminals (a) and (b) of the transistors M11 and M11 are commonly connected to each other to form one output terminal V _out1 . The rectifier modules 575 and 576 are connected to the output transformer T4 and the charge capacitors Co5 and Co6 are connected to the output terminals of the modules. And (b) are connected to each other to form another output terminal V _out2 . Referring to the present embodiment, it can be seen that the number of output transformers and the number of rectifier modules connected to each transformer can be appropriately determined according to the number of outputs of the power supply device and according to the rated power.

FIG. 5F shows an example of an output rectifying part 57g used in connection with the bridge-type inverter part shown in FIG. 5A, 5C or 5D. In this example, it is shown that the size of the transformer can be miniaturized by using a plurality of output transformers to obtain one output. And, although the configurations of the rectifier modules are not the same, they can be connected in parallel with each other.

The output rectifying section shown in FIG. 5F is another example of the output rectifying section shown in FIG. 5A. The output rectifying section shown in FIG. 5F is connected to three transformers T3, T4, and T5 and each transformer to provide one high power output power source _Vout1 And rectifier modules 577, 578, 579. In order to prevent the ringing phenomenon by the leakage inductance of the primary coil of the transformer and the junction capacitor of the diode, a resistor (Rs) and a capacitor (Rs) are connected to both ends of the diode Cs) is connected to the snubber circuit.

In the case of the low current type, there is no problem even if a diode is used instead of a transistor as a rectifying device. Since a MOSFET transistor has a low internal breakdown voltage, diodes are connected in parallel It is more suitable to use as Therefore, the present embodiment is suitable for the case where a low-current, high-voltage output is required. In addition, FIG. 5F shows that a rectifier module 580 composed of an additional transformer T6 and a module M11 (see FIG. 5B) can be additionally connected in parallel with a rectification module composed of a diode.

6A is a diagram showing a configuration of a push-pull type SMPS. Since the circuit on the primary winding side of the power transformer T ₁ is substantially the same as the configuration shown in FIG. 3A, its illustration and description are omitted and the push-pull type inverter units 61a and 63a and the output rectification unit 67a Respectively. The DC power sources V ₁ and V ₂ are power sources output from the input rectifier 11 shown in FIG. 1, and the DC power source V ₁ is a high-voltage DC power source for amplifying power (high voltage power source) for determining the voltage level of the output signal And the other DC power source V ₂ is a power source (switching power source) for supplying a power source of the primary side of the power transformer T ₁ and generating a square wave signal by a switching operation.

The push-pull type inverters 61a and 63a have two forward type output units, and each forward type output unit supplies electric power to the load in half cycle units. Each module included in the upper output portion 61a may be constituted by the circuits M1 and M3 shown in FIG. 4A or 4C, and at least two or more modules are connected in parallel. Each of the modules included in the lower output unit 63a may be composed of circuits M2 and M4 corresponding to the circuits M1 and M3 and at least two modules are connected in parallel. That is, each of the output units includes two or more modules having substantially the same configuration, thereby minimizing the loss power generated at the output unit. As the number of modules increases, the power loss due to the internal resistance of the transistor decreases in proportion to the increased number.

Each module included in the upper side output portion (61a) and a lower output portion (63a) is substantially identical in internal structure and, just as the gate terminal of the transistor (Q _1, Q ₂₎ included in the upper side output portion (61a) A current is applied in the same direction as the polarity of the primary winding of the transformer T ₁ and a gate terminal of the transistors Q 3 and Q 4 included in the lower output 63a is connected to the primary winding of the transformer T ₁ , The current is applied in the direction opposite to the polarity of the polarity. Therefore, it can be seen that the transistors included in the upper output section 61a and the lower output section 63a are alternately turned on / off according to the level of the square wave transmitted through the transformer T ₁ .

(A) terminal (that is, the drain terminal of the transistor) of each of the modules 611 and 612 of the upper output section 61a are commonly connected and connected to the UP side of the primary winding of the output transistor T3 (B) terminal (i.e., the source terminal of the transistor) of each module are connected in common and connected to the (-) terminal (-V ₁ ) of the high voltage power supply V ₁ through the primary winding of the transformer T2 . The terminals (a) (that is, the drain terminals of the transistors) of the modules 631 and 632 of the lower output section 63a are commonly connected and connected to the down side of the primary winding of the output transistor T3 (B) terminal (i.e., the source terminal of the transistor) of each module are connected in common and connected to the (-) terminal (-V ₁ ) of the high voltage power supply V ₁ through the primary winding of the transformer T2 .

There is a primary winding of an output transformer (T3) is connected to output terminal of the inverter, the output terminal The common (a) terminal, a high voltage power source (V ₁₎ of each module (611, 612) on the upper side output portion (61a) (+ And a common terminal (a) of each module 631 and 632 of the lower output section 63a.

When a rectangular wave signal is transmitted to the secondary winding of the drive transformer T ₁ , the transistor included in the upper output portion 61a is turned on simultaneously or the transistor included in the lower output portion 63a is turned on simultaneously according to the logic level A square wave is generated at the output terminal. The output signal is the input of the output rectifier to be connected next. In other words, when the switching transistor Q ₁ connected to the PWM control circuit 31 shown in FIG. 3A is turned on, the transistors of the upper output portion 61a are turned on and the transistors of the lower output portion 63a are turned off, a current is caused to flow into) the terminal (-V ₁₎ direction (in V ₁₎ of the (+) high-voltage power source (V ₁₎ across the primary winding of the upper side output portion (61a) and the transformer (T2) in the terminal. Next, a switching transistor (Q ₁₎ is off when the upper side output portion (61a) transistors are off and the (+) the lower output from the terminals of the transistors of a lower output portion (63a) are turned on the high-voltage power source (V ₁₎ of a portion ( (-V ₁ ) of the high voltage power supply V ₁ through the primary windings of the transformers 63a and 63a and the transformer T2. In this way, the switching transistor is formed in the on / off operation by the amplifier, the voltage level on the primary winding of the output transformer (T3) of the rectangular wave (Q _1), the square wave is transmitted toward the secondary coil.

In addition, as the switching frequency of the inverter increases, the power loss due to the drain-source capacitance (Coss) of each MOSFET increases. To reduce this power loss, a diode Dd), a capacitor Cd and a resistor Rd is connected between the drain and the source (see Figs. 4A, 4B and 4C). However, this can be omitted if the voltage V1 applied to the transistor is low (for example, 50 V or less). Therefore, the heat loss due to the junction capacitance (Coss) between the drain and the source of the transistor can be dissipated from the resistor Rd to prevent the thermal runaway of the transistor.

The upper output portion 61a shown in Fig. 6A has a structure in which, for example, two modules having the configuration M1 shown in Fig. 4A are connected in parallel. That is, the drain terminals a of the transistors belonging to each module are commonly connected and the source terminals b of the transistors are commonly connected to each other to form a parallel structure. Likewise, the lower output section 63a also has a structure in which two modules M2 having the configuration shown in FIG. 4B are connected in parallel. When the transistor of the output section is turned on by such a parallel structure, the current flowing through each transistor becomes one-half of the total current, and accordingly the power loss due to the on-resistance (Rds) of the transistor can be reduced to 1/2. In the present embodiment, the number of modules included in each output section is two. However, if the number of modules is increased, the power loss may be lowered to improve the efficiency, but the physical volume of the power supply will be increased. If the number is reduced, the opposite will happen, so the number of modules can be increased or decreased depending on the power rating and the purpose of use.

The current feedback unit 65a senses the current flowing to the negative terminal (-V ₁ ) of the high voltage power supply V ₁ and feeds it to the PWM control circuit 31 as shown in FIG. 3A. 3A and 3B, since the power source V ₂ and the power source V ₁ for the switching operation are separated from each other by the transformer T2, oscillation or noise due to the high-frequency operation is generated .

The feedback portions 65a and S2 include a current coupling transformer T2, and the polarities of the windings are as shown in the drawing. The resistor R7 converts the current induced in the secondary winding of the transformer T2 into a voltage signal. A switching transistor (Q _1), the direction of the current regardless of the on or off state via a primary winding of the transformer (T3) from the positive terminal of the high voltage power source (V ₁₎ - into the terminal (-V ₁₎ () And the forward bias is applied to the diode D4 to conduct. The capacitor C6 is used for noise elimination and the variable resistor VR1 is used for adjusting the potential level of the output signal SENSE and the voltage signal SENSE adjusted by the variable resistor VR1 is used for the PWM control circuit 31. [ .

Feedback unit (65a) is sensed by a switching transistor for generating a sense signal (SENSE) to control the (Q _1), the transformer (T2) switching circuit and the inverter output section electrically isolated by the output current, and further feedback unit ( of 65a) (-) terminal (the switching power supply (V ₂₎ - is associated with) the terminal (-V ₂₎ is electrically isolated from transient high-voltage power source (V ₁₎ for adjusting the output level of the inverter. Therefore, oscillation or noise appearing at the output of the inverter can be prevented by the high-frequency operation of the switching transistor Q ₁ .

Next, the output rectifying section 67a of the push-pull type switching power supply will be described. The output terminal of the inverter section is connected to the primary winding of the output transformer T3, and the output rectifying section 67a is connected to the secondary winding side thereof. The output transformer T3 receives a square wave of a high potential level output from the inverter unit, lowers it to a constant voltage according to the winding ratio, and rectifies the rectified current to provide a DC power source.

At the output side of the transformer T3, there is provided a rectifying element and a filter capacitor. The transformer adjusts the output voltage according to the winding ratio. The transistors are the rectifying element and the capacitor is the filter element.

The output rectifying section 67a includes a filter capacitor Co1 connected to both ends of the output module and the output module. The specific configuration of each output module M11 constituting the output rectifying section 67a is shown in Fig. 5B and is composed of the upper modules M11a and 671 and the lower modules M11b and 672, respectively. The upper module M11a and the lower module M11b are connected to the secondary winding of the output transformer T3 to perform the rectifying operation. Ten thousand and one switching transistor (Q ₁₎ is when the turn transistor (Q ₁₁₎ of the upper module (M11a) is turned on, the transistor (Q ₁₂₎ of the switching transistor when (Q ₁₎ is off the lower module (M11b) shown in Figure 3a Lt; / RTI > The output capacitor Co1 smoothly filters the small ripple to provide a DC power output.

An upper module (M11a) in addition to the transistor (Q ₁₁₎ and a snubber circuit. Resistance (Rs1) and the RC element consisting of a capacitor (Cs1) is a first snubber circuit for preventing the over-voltage ringing caused by the gate capacitance of the transformer (T3) one primary winding leakage inductance, and a transistor (Q ₁₁₎ of the, resistor (Rd1) and capacitors, the RC element consisting of (Cd1) is for preventing an over-voltage ringing effect caused by the capacitance (Coss) between the drain and source of the output transformer (T3) 1 primary winding leakage inductance, and a transistor (Q ₁₁₎ of the And a second snubber circuit. A gate resistor (Rg1) connected between the gate terminal of the transistor (Q ₁₁₎ is added in order to ensure that the rise time of the square wave rise time (rising time) and the transistor (Q ₁₁₎ of the transfer from the transformer (T3) matched.

The gate of the lower module (M11a) is an upper module, substantially the same, and switch ever the same as FIG. Performance features and parameters of nubeo circuit and the gate resistance in the internal structure, but the upper module (M11a) of (M11a) transistor (Q ₁₁₎ while the outlet is connected to the coil with a polarity display (dot) of the transformer (T3), the lower module (M11b) in the gate terminal of the transistor (Q ₁₂₎ connected to no polar display (dot) of the transformer (T3) winding There is a difference. Therefore, the square wave power signal transmitted from the primary winding of the transformer T3 can alternately conduct according to the logic level thereof.

On the other hand, in the push-pull type SMPS circuit diagram shown in FIG. 6A, the high voltage power supply V1 and the switching circuit power supply V2 are separately supplied. The push-pull type power supply air is usually used for low power. In this case, it can be experimentally confirmed that even if two power supplies are constituted by one power supply, they operate normally. That is, one power supply may be input to the switching circuit and the power may be supplied to the inverter.

6B shows another configuration of the push-pull type inverter (that is, the configuration between the transformer T ₁ and the transformer T ₃ ) of the power supply circuit shown in FIG. 6A. As shown in FIG. 6A, In the case of using a plurality of modules M1 and M2 in sensing the current through the transformer T2 connected to the feedback section 65b, the currents flowing through the upper output section 61b and the lower output section 63b And is configured to sense the output current flowing through one module (615, 633 in the figure). By doing so, the current rating of the transformer T2 can be lowered and the size of the transformer T2 can be reduced.

6B, terminals (a) of three modules 613, 614 and 615 of the upper output section 61b are connected to each other to form one output terminal of the inverter, and terminals (b) of the two modules 613 and 614 are connected to each other is connected to the high voltage power source (V ₁₎ (-) terminal (-V _1), but the connection of the module (615) of (b) the terminal is a transformer (T2) high-voltage power supply (V ₁₎ through the primary winding of the ( -) terminal (-V ₁ ). The terminals (a) of the three modules 633, 634 and 635 of the lower output section 63b are connected to each other to form another output terminal of the inverter. The terminals (b) of the two modules 634 and 635 are connected to each other, ₁₎ of the (- connected to) the terminal (-V _1), but one (b) of the terminal module 633 is directly connected to (b) of the terminal module 615, the upper output section (61b). 4A or the circuit M3 shown in Fig. 4C can be applied as the module of the upper output portion 61b and the module of the lower output portion 63b can be applied to the circuit shown in Fig. 4B (M2) or the circuit (M4) shown in FIG. 4D can be applied, and the overall function is as described in FIG. 6A.

6C shows an example of an output rectifying part used in connection with the push-pull type inverter part shown in FIG. 6A or 6B. The output rectifying section shown in Fig. 6C is another example of the output rectifying section shown in Fig. 6A and includes a plurality of rectifying sections 67C1, 67C2, and 67C3. Each rectification part uses one transformer and each transformer uses a plurality of rectification modules (M11, see FIG. 5B) as necessary.

Two rectifier modules 671 and 672 are connected to the transformer T3 and the filter capacitors Co11 and Co12 are connected to the output terminals of the respective modules and the output terminals a and d of the rectifier module M11 are connected. (b) are commonly connected to each other to form one output voltage V _out1 . One rectifier module 673 is connected to the transformer T4 and a filter capacitor Co2 is connected to the output terminal thereof and the output terminals a and b of the rectifier module M11 are connected to the output voltage V _out2 . Referring to this embodiment, it can be seen that the number of output transformers and the number of rectifier modules connected to each transformer can be appropriately determined according to the number of output voltages of the power supply device and the amount of each output power.

On the other hand, the transformer T5 can adopt the output rectifying section 67c3 having the configuration shown in Fig. 5F for the low current / high voltage output use. In the case of the low current type, there is no problem even if a diode is used instead of a transistor as a rectifying device. Since a high voltage MOSFET transistor has a large internal resistance between a drain and a source, It is more efficient to use them in parallel. Therefore, the present embodiment is suitable for the case where a low-current, high-voltage output is required. FIG. 6D shows an example in which the diode is used.

This circuit can realize a high output (low voltage, high current) inverter by using battery voltage, and it can increase torque of motor because it can increase energy saving and switching frequency by applying DC motor drive device. Particularly, when applied to an air conditioner comb purifier motor, the power consumption of the air conditioner can be greatly reduced. The configuration of the converter as described above can be used as a drive circuit of a power conversion device requiring high power, and is particularly useful for various inverters and converter circuits used in a battery charger, a DC motor drive device, and the like. The converter according to the present invention is also suitable as a drive circuit for a low voltage / high power power supply such as a notebook computer.

As described above, according to the power supply according to the present invention, the power supply V2 supplied to the switching frequency oscillation unit (PWM control circuit) and the power supply V1 supplied to the main power amplifier (output side of the power transformer) Even if the frequency is increased, oscillation is not generated, and high efficiency can be obtained. According to the present invention, since the switching frequency can be greatly increased compared to the conventional one, the size of the transformer used in the converter can be reduced, and the number of turns of the coil can be reduced, thereby reducing energy loss due to the resistance of the coil.

In addition, in the conventional totem pole signal generation method, since the reactive power loss becomes 20% or more, the efficiency can not be made 80% or more. In contrast, in the present invention, when the current is supplied from the drive transformer to the secondary side, -) pulses are separately transmitted and amplified, the reactive power loss can be reduced to a negligible level. Conventionally, a converter having an inductor and a capacitor for compensating for reactive power should be provided at a converter output terminal. However, in the present invention, since a ripple appearing at the output side is small, only a capacitor having a low capacitance is required Which is advantageous in terms of economy and physical volume.

Claims (12)

A power supply output unit for outputting a first power supply and a second power supply; A switching unit operating at a predetermined frequency according to a switching signal to chop the second power supply to a square wave of the frequency and outputting the chopped wave; An inverter unit receiving a square wave signal having a level of the second power supply and amplifying the square wave signal into a square wave signal having a level of the first power supply; And And an output rectifier for rectifying the square wave signal output from the inverter and outputting the rectified signal to a DC power source. 2. The apparatus of claim 1, wherein the switching unit A current feedback unit for detecting and feeding back the output current of the inverter unit; An output feedback unit for feeding back the output signal of the output rectifying unit; And A switching control unit for adjusting the pulse phase of the switching signal according to an error signal obtained by comparing the feedback signal with a predetermined reference signal and a detection signal output from the current feedback unit, Further comprising: a first power supply for supplying power to the switching power supply. 2. The inverter according to claim 1, wherein the inverter unit And first and second switching elements which are alternately turned on or off by inputting a square wave signal having a level of the second power supply, wherein a first switching element is turned on in a positive phase of the input square wave signal, And a second switching element is turned on in the negative phase of the input square wave signal to output a negative level signal of the first power source to output a square wave signal having the level of the first power source And outputs the switching power supply. The power supply apparatus according to claim 1, And an input rectifier for outputting a first power source having a relatively high voltage level and a second power source having a relatively low voltage level for outputting two power sources for receiving AC power and rectifying the AC power to DC power, . The power supply apparatus according to claim 1, wherein the first power output unit, which generates the first power from the power output unit, And a rectifier for receiving the AC power and rectifying the AC power to DC power to generate a voltage of the second power source, wherein each rectifier has substantially the same internal configuration and outputs the same voltage, and the (+) and -) output terminals are commonly connected to each other. 2. The inverter according to claim 1, wherein the inverter unit A transformer receiving a square wave signal having a level of the second power source, and two transistors connected to a secondary winding of the transformer and acting as a switching element, A source terminal of the first transistor is connected to a negative terminal of the first power source, and a source terminal of the first transistor is connected to a source terminal of the second transistor, Are connected in common to form an output terminal, Wherein the first or second transistor is connected to a plurality of transistor elements in parallel so that current flows to each transistor element in a distributed manner. The method of claim 6, wherein each transistor A charge discharger for discharging the charge charged in the capacitance between the drain and the source of each transistor; And Further comprising a snubber unit for suppressing a ringing phenomenon caused by a leakage inductance of the primary coil of the transformer and a capacitance between a gate and a source of the transistor. 2. The inverter according to claim 1, wherein the inverter unit Wherein the intermediate tap terminal of the first power source forms an output terminal and includes an up output section and a down output section alternately turned on or off according to a logic level of the input square wave signal, The current path to the intermediate tap terminal of the first power source is set through the up output unit or the current path from the mid tap terminal of the first power source to the (-) terminal of the first power source through the down output unit And a square wave signal having a level of the second power source is received and amplified into a square wave signal having a level of the first power source. 2. The inverter according to claim 1, wherein the inverter unit And first to fourth output portions that are alternately turned on or off according to a logic level of the input square wave signal, wherein the first output terminal, the output terminal, and the fourth output terminal (-) terminal of the first power source through the second output unit, the output terminal, and the third output unit at the (+) terminal of the first power source, And a square wave signal having a level of the second power source is received and amplified into a square wave signal having a level of the first power source. 2. The inverter according to claim 1, wherein the inverter unit (+) Terminal of the first power source forms an output terminal and has an up output section and a down output section alternately turned on or off according to a logic level of the input square wave signal, A current path from the (+) terminal of the first power source to the (-) terminal through the up output section or a current path from the (+) terminal of the first power source to the (-) terminal through the down- And a square wave signal having a level of the second power source is received and amplified into a square wave signal having a level of the first power source. The output unit of any one of claims 8 to 10, wherein each output unit of the inverter unit includes a plurality of switching devices, and the switching devices included in each output unit are turned on or off at the same time, And a current that flows is distributed to each of the switching elements. The apparatus according to claim 1, wherein the output rectifying section And an upper module and a lower module that are alternately turned on or off according to the phase of the transmitted square wave signal, Each of the upper and lower modules A transistor having a gate terminal and a source terminal connected to both ends of a secondary winding of the transformer and an output terminal drawn out from the drain terminal; And A first snubber circuit between the gate terminal and the source terminal for preventing a ringing phenomenon due to a leakage inductance and a gate capacitance of the transformer and a second snubber circuit between the drain terminal and the source terminal by a leakage inductance of the transformer and a capacitance between a drain and a source And a snubber circuit having at least one of a second snubber circuit for preventing a ringing phenomenon.