KR100356270B1 - Centrally-controlled electronic ballast with enhanced power savings - Google Patents

Abstract

The present invention relates to a centralized electronic ballast capable of centrally controlling a plurality of discharge lamps, comprising a first power source used for amplifying at a high voltage level and a second power source used for generating a square wave signal by a switching operation A power output unit for generating two DC power sources; A switching unit operating at a predetermined frequency according to a switching signal to chop the second power supply to a square wave of the frequency and outputting the chopped wave; An inverter unit receiving a square wave signal having a level of the second power source and amplifying the square wave signal into a square wave signal having a level of the first power source to supply power to the discharge lamp; A current feedback unit for detecting an output current of the inverter unit and feeding back the detected output current to the switching unit; And a switching controller for controlling the pulse phase of the switching signal according to the sensing signal detected by the current feedback unit to control the output of the inverter unit to be maintained constant. Thus, the ballast of high efficiency can be realized.

Description

[0001] The present invention relates to a centralized electronic ballast,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic ballast of a high-pressure discharge lamp, and more particularly to a centralized electronic ballast capable of centrally controlling a plurality of discharge lamps.

Since the magnetic ballast uses a choke coil and a large capacity condenser, a lot of power loss occurs due to the heat generation of the ballast itself in addition to the power consumed by the light in the fluorescent lamp. In addition, since the commercial power supply is turned on at 60 Hz, a flicker occurs. Electronic ballasts have been developed to overcome these drawbacks. The electronic ballast uses a semiconductor device to rectify a 60-Hz commercial AC power source to DC and convert it into a high-frequency (25-50 KHz) signal from the inverter circuit to light the fluorescent lamp stably. Since the electronic ballast is turned on by the high frequency power source as compared with the magnetic ballast, the light emitting efficiency can be increased, and the loss due to the heat generation of the choke coil can be reduced.

However, when a large number of fluorescent lamps are centrally integrated and lighted, power consumption in the ballast is still high, and a separate heat sink is added to a transistor used in the inverter due to a large current.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a centralized electronic ballast capable of centrally controlling a plurality of discharge lamps.

Figure 1a is an overall block diagram of an electronic ballast in accordance with the present invention.

Fig. 1B is a diagram showing the detailed configuration of one of a plurality of fluorescent lamps included in the load section 15 shown in Fig. 1A.

1C is a diagram showing a signal waveform input to the load section 15. Fig.

2 is a detailed circuit diagram corresponding to the electronic ballast shown in the block diagram of Fig.

3 is an example of a configuration diagram of the PWM control circuit 21 shown in FIG.

The circuit M1 shown in Fig. 4A is a detailed circuit diagram of each module included in the up output section 23 shown in Fig.

The circuit M2 shown in Fig. 4B is a detailed circuit diagram of each module included in the down output section 24 shown in Fig.

5A is a circuit diagram showing the configuration of the input rectifier 11 shown in Fig. 1, Figs. 5B, 5C and 5D show another example of the high voltage generating portion 53 shown in Fig. 5A, Is a circuit diagram showing an example of a DC / DC converter connected to the output terminal of the illustrated low voltage generating part 55 to obtain a low and stable low voltage power source.

According to an aspect of the present invention, there is provided an electronic ballast comprising:

A power supply output unit for generating two direct-current power sources of a first power source used for amplifying at a high voltage level and a second power source used for generating a square wave signal by a switching operation; A switching unit operating at a predetermined frequency according to a switching signal to chop the second power supply to a square wave of the frequency and outputting the chopped wave; An inverter unit receiving a square wave signal having a level of the second power source and amplifying the square wave signal into a square wave signal having a level of the first power source to supply power to the discharge lamp; A current feedback unit for detecting an output current of the inverter unit and feeding back the detected output current to the switching unit; And a switching controller for controlling the pulse phase of the switching signal according to the detection signal detected by the current feedback unit to maintain the output of the inverter unit constant.

According to another aspect of the present invention, there is provided an electronic ballast comprising:

A power supply output unit for generating two direct-current power sources of a first power source used for amplifying at a high voltage level and a second power source used for generating a square wave signal by a switching operation; A switching unit operating at a predetermined frequency according to a switching signal to chop the second power supply to a square wave of the frequency and outputting the chopped wave; And an up output unit and a down output unit that are alternately turned on or off according to a logic level of the input square wave signal, and is connected to the intermediate tap terminal of the first power source through the up output unit from the (+ (-) terminal of the first power source through a down-output unit at an intermediate tap terminal of the first power source, and receives a square wave signal having the level of the second power source An inverter unit amplifying a square wave signal having a level of the first power source to supply power to a discharge lamp; A current feedback unit for detecting an output current supplied from the inverter unit to the discharge lamp and feeding back the detected output current to the switching unit; And a switching controller for controlling the pulse phase of the switching signal according to the sensing signal output from the current feedback unit to maintain the output of the inverter unit constant.

Figure 1a is an overall block diagram of an electronic ballast in accordance with the present invention. When AC power is input to the input rectifier 11, two DC power sources V ₁ and V ₂ are generated and output to the switching circuit 12 and the inverter 14. [ Here, the DC power supply V ₁ is additional circuitry in the circuit shown in the figure, is fed as a power source for a direct-current high-voltage power supply, and determines the output voltage level of the inverter 14, and the other DC power supply V ₂ is the switching circuit 12 (For example, DC / DC converter shown in FIG. 5E) may be further added so that a more stable and low voltage (for example, 12 or 15 Vdc) is generated. The square wave signal of the inverter 14 and the high voltage power supply V1 are input to the load unit 15 such as a fluorescent lamp. As the load section 15, a plurality of fluorescent lamps 123, ..., 15n each composed of a resonator and a lamp are shown as an example.

The switching circuit 12 operates at a predetermined frequency to chop the input DC voltage V ₂ into a high frequency fine wave. The square wave signal is input to the inverter 14 via the drive transformer 13, amplified by the high voltage power supply V ₁ , and then applied to the load unit 15. The inverter 14 generates the square wave signal RF having the electric potential level of the input DC voltage V ₁ according to the frequency of the square wave generated in the switching circuit 12.

The current feedback unit 18 detects the output current of the inverter 14 and feeds it back to the switching circuit 12. The switching circuit 12 adjusts the level (magnitude) of the current and the voltage by adjusting the pulse phase of the switching signal by comparing the feedback signal with the reference signal (PWM control). Thereby keeping the final output of the inverter 14 constant.

Fig. 1B is a diagram showing the detailed configuration of one of a plurality of fluorescent lamps included in the load section 15 shown in Fig. 1A. A capacitor (C1) and an inductor (L1) which operate as a resonator are provided in the fluorescent lamp, and a lamp (FL) which emits light by arc discharge is provided.

1C is a diagram showing a signal waveform input to the load section 15. The RF square wave amplified by the inverter 14 is applied to a fluorescent lamp resonance circuit shown in FIG. In the high-level period of the square wave, the charging current flows through the capacitances C1, C2 and C3 of the resonant circuit. When the low-level period is again reached, the current charged in these capacitances is discharged and the current flows to -V1. At this time, the current flowing through the fluorescent lamp can be turned on by the high voltage square wave operation even with a small current.

Fig. 2 is a detailed circuit diagram corresponding to the centralized electronic ballast shown in the block diagram of Fig. 1. Fig. The circuit on the left side of the diagram centering on the drive transformer T1 corresponds to the switching unit 12 in Fig. 1, the circuit on the right in the figure corresponds to the inverter 14, and the current feedback unit 25 is also shown. The DC power sources V ₁ and V ₂ are power sources output from the input rectifier 11 shown in FIG. 1, and the DC power source V ₁ is a DC power source with a high voltage, which is an amplification power source ("high voltage power source" And the other DC power source V ₂ is a power source (" switching power source ") for supplying a primary side of the drive transformer T ₁ and a PWM control circuit 21 to generate a square wave signal by switching operation.

The switching transistor Qs operates as a switching element which is turned on or off in accordance with the switching signal SWout output from the PWM control circuit 21. [ The transformer T ₁ has a primary winding N _p connected between the switching power supply V ₂ and the transistor Qs to supply AC power to the primary winding by turning on and off the transistor Qs, As shown in FIG. The PWM control circuit 21 senses the fluctuation of the current due to the change of the output side load (load) by the current feedback unit 25 and feeds back the sense signal SENSE obtained therefrom. The PWM control circuit 21 The switching signal SW _out is generated in consideration of the sensing signal.

The switching element is constituted by a transistor Q _{s and} is turned on and off according to the logic level of the switching signal SW _out of the PWM control circuit 21 so as to be supplied to the primary winding N _p of the power transformer T ₁ The current is interrupted. The current flowing in the primary winding N _p of the transformer T ₁ is induced in the secondary winding in accordance with the on / off state of the switching transistor Qs and the voltage is induced across the secondary winding in accordance with the winding ratio.

The square wave signal generated by the switching transistor Q _s is transmitted to the secondary winding side through the transformer T _{1 and is} supplied to each gate terminal of the field effect transistors included in the up output section 23 and the down output section 24, . Therefore, the transistors included in the up output section 23 and the down output section 24 are alternately turned on / off alternately to amplify the input square wave signal so that the frequency is substantially the same as the input square wave signal, A square wave signal amplified to a level of V ₁ is generated. On the other hand, in selecting the transistor Q _s , it is necessary to consider the following points. It is preferable to first set the internal resistance R _{DS (on} ) to a low value (for example, 0.3 ohm or less) so that the input gate capacitance of the transistor becomes a low value (for example, 220 pF) have.

In this circuit diagram, the primary winding of the transformer T ₁ includes a basic winding N _p and an auxiliary winding N _T. The auxiliary winding N _T stores energy while the switching transistor Q _s is off and returns the stored energy to the output side when the transistor Q _s is on, And transmits the energy of the signal to the output side to raise the off signal level. Therefore, it is possible to supply a gate signal sufficient to turn on the transistors Q _5-7 of the down output section 24 during the down portion of the square wave. On the other hand, the primary winding (N _p) is a transistor of the transistor (Q _s) of this stored energy transfer to the output side by up output section 23 when storing energy while is on and there is off the transistor (Q _s) ( Q _1-3 ) are turned on.

The primary winding N _p and the auxiliary winding N _T are wound in opposite polarities and the diode D 1 uses a fast switching diode and the primary winding N _p and the secondary winding N _T Or between the auxiliary winding N _T and the negative terminal -V ₂ to determine the direction of the current while the switching transistor Q _s is off. The thickness of the coil used in the auxiliary winding N _T and the winding are substantially the same as those of the basic winding N _p .

According to the present embodiment, the auxiliary winding N _T of the drive transformer T ₁ has the same polarity as that of the primary winding N _p , but has the opposite polarity. Which the transistor (Q _s) is stored during the turn-on energy to the coil and a supply of the charging current is turned off when the gate input capacitance of the transistors (Q _5-7) of the down output 24 of the turn on these transistors Function. On the other hand, the charging current of the gate input capacitance of the transistors Q _1-3 of the up output unit 23 is performed by the energy stored in the primary coil N _p when the transistor Q _s turns on. Therefore, no dead time occurs in the output signal, and high efficiency and small ripple can be realized.

PWM control circuit 21 receives a feedback input for output voltage (+ FB) of the converter, receives the sensed voltage (SENSE) generated by the inverter output current and a rectangular wave for the on / off operation of the switching element (Q _s) Thereby generating a pulse. The detailed configuration will be described with reference to FIG.

Self-bias circuit 22 supplies the operating power to the output of the switching signal (SW _out) in the PWM control circuit 21. The voltage induced by the feedback winding N _FB of the primary side of the power transformer T ₁ is opposite to the polarity indication of the basic winding N _{p with} its polarity mark (start point mark of the winding) D1 to the Vcc terminal of the PWM control circuit 21. [ Here, the capacitor C ₁ is for ripple removal. The power supply V _in input to the PWM control circuit 21 supplies power to the elements included in the PWM control circuit 21 other than the switching output section which is supplied with power by the self bias circuit 22.

FIG. 3 illustrates a current-mode control method as an example of the configuration of the PWM control circuit 21 shown in FIG. The power supply Vcc induced by the feedback winding NFB on the primary side of the transformer T ₁ supplies power to the output amplifier 35 that outputs the switching signal SW _out and supplies power to the clock generator 33, The circuit 34 such as the flop 34, the error amplifier 31 and the comparator 32 receives the operation power Vin from the input power source V ₂ applied through the regulator 37.

The error amplifier 31 compares and amplifies the output voltage signal + FB of the inverter and the reference voltage V _ref , and the error signal is input to the comparator 32. Then, the output current of the inverter is sensed and converted into a voltage, and the sensed signal SENSE is input to the comparator 32. The comparator 32 compares the detection signal SENSE according to the pick switch current with an error signal related to the output voltage signal and inputs the result to the RS flip flop (latch) 34. The clock generator 33 generates a clock signal corresponding to the switching frequency fs and the RS flip flop 34 receives the output of the comparator 32 and the clock signal to generate a switching signal (SW _out ). The switching signal turns on / off the switching element (transistor Qs) connected to the rear end in accordance with the logic level.

The inverter output voltage (+ FB) fed back at the final output stage is compared with the reference voltage (V _ref ) in the error amplifier 31 and the current feedback signal SENSE is compared with the reference voltage (1.2V) The result is input to the flip flop 34. The flip flop 34 increases or decreases the phase (or width) of the clock signal generated and inputted by the clock generator 33 according to the output signal of the comparator 32 (in other words, A PWM signal is generated to generate a switching signal SW _out to increase or decrease the current flowing through the transformer T ₁ according to the variation of the input voltage and the load so that the output voltage of the final output stage can be maintained constant.

2, the configuration of the inverter 14 connected to the secondary winding side of the transformer T ₁ is as follows. The inverter 14 comprises an UP output section 23 and a DOWN output section 24 and each output section includes a plurality of circuit modules M1 or M2. (A) terminal (that is, the drain terminal of the transistor) of each module M1 of the UP output unit 23 are commonly connected and connected to the high voltage power source (+ V ₁ ) (b) terminals (i.e., source terminals of the transistors) are connected in common to form an output terminal S of the inverter. (D) terminal (i.e., the source terminal of the transistor) of each module M2 of the down output section 24 are commonly connected and connected to the (-) terminal (-V ₁ ) of the high voltage power supply, The terminal (c) of the module (i.e., the drain terminal of the transistor) is connected in common and is commonly connected to the terminal (b) of each module M1 of the UP output section 23, .

When the PWM control circuit 21, a switching transistor (Qs) connected to the on-transistor of the Up output section 23 are turned on and the transistor of the down output 24 are off the high voltage power source positive terminal (+ V ₁₎ The current flows to the intermediate tap. Next, when the switching transistor Q ₁ is turned off, the transistors of the up output section 23 are turned off and the transistors of the down output section 24 are turned on to turn on the transformers T 3 and T 2 at the middle tap of the high voltage power source V ₁ . The current flows to the (-) terminal (-V ₁ ) of the high voltage power supply V ₁ through the transistors of the down output unit 24 through the resistor R ₁ . In this way, a square wave signal having a high voltage level is transmitted to the side of the output transformer (T3) by the on / off operation of the switching transistor (Q _1).

The circuit M1 shown in Fig. 4A is a detailed circuit diagram of each module included in the up output section 23 shown in Fig. 2, and further includes an RC snubber circuit and a charge discharge section around the transistor. The circuit M1 receives the square wave signal transmitted from the primary winding side of the power transformer T ₁ and the transistor Q ₂ is turned on / off by the rectangular wave signal whose level is changed according to the winding ratio.

When the transistor Q ₂ is turned off, the charge charged in the capacitance Coss between the drain and the source (which is charged during the on period of the transistor Q ₂ ) is supplied to the capacitor Cd 2 through the diode Dd 2 Is charged. A transistor (Q ₂₎ is turned ON while passing through the resistor (Rd2) electric charge charged in the capacitor (Cd2) is emitted as heat. Thus, the transistor (Q ₂₎ is the drain and the effect of the charge of the capacitance (Coss) between the source so emitted from the resistor (Rd2) and thereby on the transistor (Q ₂₎ is minimized for a turned on, during the switching operation the transistor (Q ₂ ) Can be significantly lowered.

A tuning circuit is formed at the time of turn-off by the leakage inductance of the primary coil of the power transformer T ₁ accommodating high frequency and the capacitance C _GS between the gate and the source of the transistor Q ₂ . Transient overvoltage ringing is caused in the transient state. The ringing can have an amplitude large enough to destroy the diode or transistor during the turn-off period. The RC element constituted by the resistor R _s2 and the capacitor C _s2 is a snubber circuit which suppresses the ringing phenomenon and is connected in parallel to the secondary winding of the power transformer T ₁ .

The gate resistance R _g connected to the gate terminal of the transistor Q ₂ is set such that the rise time of the square wave transmitted from the power transformer T ₁ matches the rise time of the transistor Q ₂ .

The circuit M2 shown in Fig. 4B is a detailed circuit diagram of each module included in the down output section 24 shown in Fig. 2, and further includes an RC snubber circuit and a charge discharge section around the transistor. It is understood that the configuration of the secondary winding is substantially the same as that of the circuit M1 except that the position of the polarity mark of the secondary winding is reversed, and thus a detailed description thereof will be omitted.

In Fig. 2, the up output unit 23 is constructed so that the circuit M1 shown in Fig. 4A is connected in parallel to distribute the operation current through a plurality of transistors so that the current flowing through each transistor is reduced. That is, in the up-output section of the secondary winding of the power transformer T ₁ , a plurality of transistors Q ₁ , Q ₂ , ... are connected in parallel (the drains of the transistors are connected to the drains and the sources are connected to the sources) Each transistor is provided with a charge discharge portion separately. The down output unit 24 also has a configuration in which the circuit M2 shown in FIG. 4B is connected in parallel with the up output unit 23.

As in the present embodiment, the up-output section 23 composed of a transistor group operating as a positive pulse part of a square wave and the down output section 24 composed of a transistor group operating as a negative pulse part of a square wave, By inputting the square wave signal outputted from the switching section 12 to the gate of each transistor, the current flowing to each transistor is reduced to 1 / n, and the power loss is accordingly lowered. Therefore, it is possible to operate stably without providing a separate heat sink for each transistor. In other words, each of the UP output unit 23 and the DOWN output unit 24 includes a plurality of modules M1 and M2, which are modules shown in FIGS. 4A and 4B, connected in parallel, And a plurality of transistors are connected in parallel. By doing so, since the current flowing through each transistor is reduced to 1 / n (where n is the number of transistors used in each output section), the power loss due to the drain-source internal resistance R _{DS (on)} And the heat generated in each transistor is also minimized, so that it can operate stably without using a separate heat sink.

Also, as the switching frequency of the inverter increases, the power loss due to the drain-source capacitance (Coss) of each transistor (MOSFET) increases. To reduce such power loss, A snubber circuit composed of a diode Dd, a capacitor Cd and a resistor Rd is connected between the drain and the source (see Figs. 4A and 4B). Therefore, the heat loss due to the drain-source capacitance (Coss) of the transistor can be dissipated from the resistor Rd to prevent the thermal runaway of the transistor. The heat loss due to the internal resistance R _{DS (on)} of the n transistors is calculated as follows.

Therefore, it can be seen that heat loss can be reduced to 1 / n by connecting n transistors in parallel as shown in the drawing. In terms of component cost, one high-power transistor costs more than a few low-power transistors, so the cost of implementing the circuit is also lower.

In Fig. 2, the up output unit 23 has a structure in which, for example, three modules (M1) having a configuration as shown in Fig. 4A are connected in parallel. That is, the drain terminals a of the transistors belonging to each module are commonly connected and the source terminals b of the transistors are commonly connected to each other to form a parallel structure. Likewise, the down output section 24 also has a structure in which three modules M2 having the configuration as shown in FIG. 4B are connected in parallel. With this parallel structure, the current flowing through each transistor becomes 1/3 of the total current when the transistor of the output section is turned on, and accordingly, the power loss due to the on-resistance (Rds) of the transistor can be reduced to 1/3. In the present embodiment, the number of modules included in each output section is three, but if the number of modules is increased, the power loss may be lowered to further increase the efficiency, but the physical volume of the device will be increased. The number of modules can be increased or decreased depending on the power rating and the purpose of use.

Each of the output units 23 and 24 of the inverter 14 according to the present embodiment can be manufactured in the form of a small-sized lightweight module having a constant rated output, and these modules can be connected in parallel to constitute a large-capacity inverter . This embodiment can be applied to a centralized ballast or a battery charger for driving an electronic ballast provided in an individual fluorescent lamp in one place, a drive device for a DC motor, and the like. Since a separate heat sink is not required for each transistor, Can be greatly improved.

The configuration of the current feedback unit 25, S1 that senses the current transmitted from the inverter 14 to the transformer T3 side and feeds back the current to the PWM control circuit 21 will be described below. The current feedback unit 25 sensitively changes the current I _PDC flowing through the transistor according to the variation of the input voltage and / or the output voltage. Therefore, the primary coil of the current sensing transformer T2 is connected to the output side of the inverter .

The output signal SENSE of the current feedback unit 25 is fed back to the input terminal SENSE of the PWM control circuit 21. [ The current feedback section 25 includes a current coupling transformer T2, and the polarity of the winding is as shown in the figure. The resistors R6 and R7 convert the current induced in the secondary winding of the transformer T2 into a voltage signal. When the switching transistor (Qs) is on current through the up output unit 23 in the (+) terminal of the high voltage power source (V ₁₎ flows toward the output terminals diode (D3) has an incoming forward-biased conduction and a diode (D4 ) Is reverse biased and does not conduct. The capacitor C6 is used for removing AC noise and the variable resistor VR1 is used for adjusting the potential level of the output signal SENSE and the voltage signal SENSE adjusted by the variable resistor VR1 is supplied to the PWM control circuit 21 ). On the other hand, the switching transistor of the high voltage power source (V ₁₎ (Qs) through the primary winding and the down output 24 of the transformer (T3) from the center tap terminal of the current high-voltage power source (V ₁₎ when the off (-) Terminal to the terminal (-V ₁ ), the forward bias is applied to the diode D4 to conduct and the reverse bias is applied to the diode D3.

The current feedback unit 25 senses the output current to generate a sense signal SENSE for controlling the switching transistor Qs. The current feedback unit 25 electrically isolates the switching unit and the inverter output unit by the transformer T2, 25 are electrically separated from the high voltage power supply V _{1 which} is connected to the (-) terminal (-V ₂ ) of the switching power supply V ₂ and regulates the output level of the inverter. Therefore, oscillation or noise appearing at the output of the inverter can be prevented by the high-frequency operation of the switching transistor Qs.

5A is a circuit diagram showing the configuration of the input rectifier 11 shown in FIG. 1 and includes an AC input portion 51, a high voltage generating portion 53, and a low voltage generating portion 55. FIG. 5B, 5C, and 5D show another example of the high voltage generating unit 53 shown in FIG. 5A. FIG. 5E is connected to the output terminal of the low voltage generating unit 55 shown in FIG. 5A to obtain a low and stable low voltage power DC converter according to an embodiment of the present invention.

5A, a varistor Z ₁ , capacitors C ₁₁ , C ₁₂ , and C ₁₃ , and inductors L ₁ and L ₂ are connected to the AC input unit 51 to clamp an excessive input voltage to a safe level , Is used to block excessive inrush current from the input power supply and to remove noise. The bridge diodes BR ₁ and BR ₂ function to convert the alternating current into direct current by determining the current flow according to the phase of the alternating current power source. The switch S1 is a selection switch according to the AC input voltage (110 V or 220 V).

Of; (TH thermistor) comprises, which maintains a constant resistance in the thermistor regardless of the amount of current filter capacitor (C _1, C ₂₎ for the high voltage generating unit 53 element of the thermistor to rise, the temperature decreases the resistance It prevents the breakdown of the circuit due to instantaneous transient current. That is a current flow in the diode (BR ₁₎ set the capacitor DC voltage V on the high potential level by the charging of the (C _1, C _{2) 1} is generated in accordance with the cycle of the input AC power source. Low-voltage generating unit 55 generates a direct current voltage V ₂ of the low voltage level by the action of an electric charge charged in the capacitor and a forward diode.

5B is a circuit diagram of the high-voltage generating unit 53 shown in FIG. 5A. The AC-to-DC rectifier having a high rated current is divided into several rectifiers and the input and output stages are connected in parallel Multiple rectifier circuit. The bridge diode BR ₁ of the high voltage generating unit 53 shown in FIG. 5A generates a large amount of heat when the operating current is high, so that a heat sink is required and the capacity of the capacitor is also increased. As a result, do.

5A, the input terminals of the respective modules and the output terminals of the respective modules are connected in parallel to each other, so that the total output For example, if you are designing a 500VA rectifier, you can use 10 modules with a rating of 50 VA in parallel. As a result, the total input current is distributed to each module, reducing the power loss consumed by each module. That is, since the loss power is proportional to the resistance and is proportional to the square of the current, the loss power Ploss when n modules having a constant resistance (R) is used is as follows.

In other words, when the total operation current is constant, the use of n modules having the resistor R can reduce the loss power by 1 / n times as compared with the case where one module having the resistor R is used. Therefore, the efficiency of the power supply can be increased.

On the other hand, the output filter 57 connected to the output terminal of each module is connected to the output of the pie (CF) including the capacitors CF ₁₁ to CF ₁₄ and the inductor LF ₁ ) Type low-pass filter that removes the second, third, or higher harmonic noises generated by the high-frequency switching operation. The capacitors and inductors used in this circuit have low current ratings, which results in a small capacitor size and inductor core size and low heat dissipation.

The parallel-connected rectifier shown in FIG. 5B has a structure in which a plurality of small-current (AC to DC) rectifier modules having substantially the same configuration are connected in parallel to distribute input power by 1 / n for each module, This reduces the size of the electrical components used in the module, especially the capacitors and inductors, and reduces the heat generated by the bridge diodes, allowing operation without the need for a separate heat sink. Therefore, as shown in FIG. 5C, a high-power rectifier can be realized by forming integrated circuits in units of modules M ₁ to M _n and connecting them in parallel. In terms of economics, it is much cheaper (about 30% to 50% less) to implement a number of low-power rectifiers in parallel, compared to the cost of implementing a single high-power rectifier. FIG. 5d shows another embodiment of FIG. 5c, in which one or more modules are stacked vertically in consideration of a physical space, and a plurality of such overlap modules are horizontally connected to form a single rectifier Show. The parallel-connected rectifier shown in FIG. 5B can also be applied to an apparatus for converting a three-phase AC input to a DC power supply.

5E is a circuit diagram showing a configuration of a DC / DC converter that is connected to the output terminal of the low voltage generating unit 55 shown in FIG. 5A to obtain a low and stable low voltage power source. The input DC power supply (V _in ) is the output voltage (V ₂ ) of the low voltage generator 55 in FIG. 5A. In the foregoing description, but can be referred to the power output (V _out) of the circuit shown Fig. Power is applied to the switching power supply to 5e, each of convenience, it was denoted as V ₂ of the description.

In the embodiment shown in Figure 5e, PWM control circuit 51 receives a feedback input for output voltage (+ FB) of the converter, receives the sensed voltage (SENSE) generated by the input current, a switching element (Q ₁₎ Off < / RTI > The detailed configuration thereof is the same as that described with reference to FIG. The magnetic bias circuit 55 also performs the same function as described in Fig.

The transistor Q ₁ is turned on / off by the rectangular wave switching signal SW _out generated from the PWM control circuit 21. The transformer T ₁ has a primary winding N _p connected between the input DC power supply V _in and the switching unit so that a square wave power of a high frequency is supplied to the primary winding by turning on and off the switching unit, . When the to the primary winding when the transistor (Q ₁₎ turned on the transformer (T ₁₎ is a current one charging transistor (Q ₁₎ is off is that the charging current to the primary winding transferred to the secondary winding, the transformer ( T ₁ ), the voltage is induced across the secondary winding.

The input current detection unit 33 detects the current flowing through the primary winding of the transformer T ₁ according to the ON / OFF operation of the switching element (transistor Q1) and feeds the current to the PWM control circuit 51. The PWM control circuit 51 receives an error signal obtained by feedback of the output DC power (+ FB) and comparing it with the reference signal, and an input current varying according to the variation of the input voltage (V _in ) And controls the on / off duration of the switching signal SW _out in accordance with the level of the applied voltage to control the amount of current flowing in the primary winding. A rectifying part 57 connected to the secondary winding of the power transformer T ₁ and converting AC power into DC power is provided to obtain a constant voltage output.

On the other hand, the source (source) terminal and the minus of the transistor (Q ₁₎ (-) is the input current detecting section 53 between the terminal connected to the transistor a signal generated according to the current time (Q ₁₎ is turned on the PWM control circuit ( 51). The input current detection unit 53 senses a change in the input side current according to the change in the potential of the input side voltage V _in or the change in the input side current due to the change in the output side load, and feeds back the detected current to the PWM control circuit 51. The PWM control circuit 51 controls the switching operation in accordance with the sensing signal in order to compensate the phenomenon caused by the same current fluctuation.

The input current detection unit 53 detects the change of the current Ipp in accordance with the variation of the input voltage V _in or the output voltage and converts it into a voltage signal and then feeds it back to the PWM control circuit 21 The PWM control circuit 51 adjusts the pulse period of the positive phase of the switching signal SW _out by reflecting the fluctuation of the input voltage V _in or the fluctuation of the output voltage, . If the current I _pp is increased, the current sensing voltage detected by the input current detection unit 53 and fed back to the PWM control circuit 51 is increased, and the PWM control circuit 51 outputs the current I _pp) and adjusts the pulse period of the reduction switching signal (SW _out) is controlled in a direction.

When the transistor Q ₁ is turned on, current is induced in the secondary winding by the current flowing in the primary winding of the current-coupling fraser (T ₂ ). The resistor R1 converts the current induced in the fascia T ₂ into a voltage signal and determines the voltage applied to the sensing terminal SENSE by adjusting the resistance value of the variable resistor R ₂ . The capacitors C ₂ and C ₃ are for ripple and noise removal, and the diode D ₂ functions to convert and rectify the detected rectangular wave signal into a DC signal. Current-coupling Fran spokes Murray (T ₂₎ is the power source (+) according to the primary side and the secondary side separated of the transformer (T ₂₎ in sensing the variation of the current flowing through the primary winding of the transformer (T ₁₎ Polarity are separated from each other to enable a circuit configuration for switching to a high frequency.

The ratio of the primary winding to the secondary winding of the transformer (T ₂ ) is preferably about 1: 50 to 200. For example, in the case of a small power of less than 10 watts, when the continuity current (I _PDC ) of the primary coil of the main transformer T ₁ is less than 1.0 A, the primary of the transformer T ₂ is once The secondary winding is preferably 100 times. The material of the core of the transformer T ₂ is preferably the same as the core of the main transformer T ₁ .

Compared with the conventional ballast, the power loss of the ballast according to an embodiment of the present invention is as follows.

When 240V is applied with the lowest input DC voltage, the consumed current is 50mA to light one 40-watt fluorescent lamp. If the inverter is a half-bridge type converter, the current Ic flowing through this converter is

For a 500 watt inverter,

Therefore, the number of fluorescent lamps of 40 watts that can be connected to a 500 watt inverter becomes about 80. In other words,

In the ballast of the present invention, a fluorescent lamp of 40 watts x 80, that is, 3,200 watts (P1), can be lighted as a 500-watt inverter.

However, in the conventional fluorescent lamp having an electronic ballast, since a current of 110 mA is required to light a fluorescent lamp of 40 watts, the number of fluorescent lamps that can be lit by 500 watts is only 38. [ In other words,

The total power available for power is 40 x 38, or 1,520 watts (P2).

Calculating the efficiency of the present invention and conventional ballast,

Therefore, according to the present invention, about 50% of electric energy can be saved compared with the conventional method.

In addition, the power used by the centralized ballast according to the present invention to light one 40-watt fluorescent lamp is actually 240 V x 0.05 A = 12 watts, and 240 V x 0.11 A = 26.4 watts for a conventional ballast. Accordingly, the power consumption ratio becomes 0.45 (12 / 26.4), and when the conventional ballast is replaced with the ballast of the present invention, an energy saving effect of about 55% can be obtained.

As described above, according to the electronic ballast of the present invention, since the power supplied to the switching frequency oscillation unit (PWM control circuit) and the power supplied to the main power amplifier are completely separated, the oscillation does not occur even when the switching frequency is raised, Efficiency can be obtained. In addition, since the switching frequency can be greatly increased compared to the conventional one, the size of the transformer used in the converter can be reduced, and the number of turns of the coil can be reduced to reduce the energy loss due to the resistance of the coil.

On the other hand, the input rectifier that rectifies the AC power to the DC power source is modularized by the rectifier of the small current type, and then it is connected in parallel to reduce the current flowing through each rectifier module, thereby minimizing the heat loss of the bridge diode included in the rectifier, Even if it is large, it is not necessary to add a separate heat sink, and the cost of implementing a high-power rectifier can be reduced. In addition, it can be seen that the stability is improved by automatically shutting off the power supply when an overcurrent or overvoltage occurs in the switching circuit controlling the inverter.

Claims (12)

A power supply output unit for generating two direct-current power sources of a first power source used for amplifying at a high voltage level and a second power source used for generating a square wave signal by a switching operation; A switching unit operating at a predetermined frequency according to a switching signal to chop the second power supply to a square wave of the frequency and outputting the chopped wave; An inverter unit receiving a square wave signal having a level of the second power source and amplifying the square wave signal into a square wave signal having a level of the first power source to supply power to the discharge lamp; A current feedback unit for detecting an output current of the inverter unit and feeding back the detected output current to the switching unit; And And a switching controller for controlling the pulse phase of the switching signal according to the detection signal detected by the current feedback unit to control the output of the inverter unit to be maintained constant. A power supply output unit for generating two direct-current power sources of a first power source used for amplifying at a high voltage level and a second power source used for generating a square wave signal by a switching operation; A switching unit operating at a predetermined frequency according to a switching signal to chop the second power supply to a square wave of the frequency and outputting the chopped wave; And And an up output section and a down output section that are alternately turned on or off according to a logic level of the input square wave signal, and the output terminal is connected to the intermediate tap terminal of the first power source through the up output section from the (+ A current path is set or a current path from the mid tap terminal of the first power source to the (-) terminal of the first power source through the down output section is set, and a square wave signal having the level of the second power source is inputted, An inverter unit for amplifying a square wave signal having a level of a first power supply and supplying power to the discharge lamp; A current feedback unit for detecting an output current supplied from the inverter unit to the discharge lamp and feeding back the detected output current to the switching unit; And And a switching controller for controlling the pulse phase of the switching signal according to the sensing signal output from the current feedback unit to control the output of the inverter unit to be maintained constant. 3. The method of claim 2, Wherein the up output section or the down output section includes at least two switching transistors, The drain terminals of the transistors included in the up output unit are commonly connected to the (+) terminal of the first power source and the source terminals of the transistors are connected in common, The source terminals of the transistors included in the down output section are commonly connected to the negative terminal of the first power source and the drain terminals of the transistors are commonly connected, And the common drain terminal of the transistor of the down output section and the common source terminal of the transistor of the up output section are connected in common to form the output terminal of the inverter section. 4. The semiconductor memory device according to claim 3, wherein each of the transistors included in the up output section or the down output section includes A charge discharger for discharging the charge charged in the capacitance between the drain and the source of each transistor; And Further comprising a snubber portion for suppressing a ringing phenomenon caused by a leakage inductance of the primary coil of the transformer and a capacitance between the gate and the source of each transistor. The electronic ballast of claim 4, wherein the snubbers connect a resistor and a capacitor in series to a secondary winding of the transformer in parallel. The charge-discharge device according to claim 4, wherein the charge- A capacitor for charging a charge due to a capacitance between a drain and a source generated while the transistor is off; A resistor for discharging the charge stored in the capacitor while the transistor is on; And And a diode for defining the direction of the current while the transistor is on or off. The power supply apparatus according to claim 1 or 2, wherein the first power supply output unit, which generates the first power supply at the power supply output unit, And a rectifier for receiving the AC power and rectifying the AC power to DC power to generate a voltage of the second power source, wherein each rectifier has substantially the same internal configuration and outputs the same voltage, and the (+) and - >) output terminals are commonly connected to each other. 8. The power module according to claim 7, wherein each of the rectifying sections comprises (+) and (-) output terminals each having a predetermined rating and connects the (+ Wherein the first power output section has a rating required by one power source. The power supply apparatus according to claim 1 or 2, wherein the second power supply output unit, which generates the second power supply in the power supply output unit, A first rectifying part for receiving the AC power and for rectifying it to DC power; A second switching unit for turning on or off a predetermined frequency according to a switching signal; The primary winding is connected between the DC power source of the first rectification part and the second switching part so that the DC power supplied to the primary winding is turned on or off by the second switching part to supply power to the secondary winding ; A second rectifier connected to the secondary winding of the power converter to convert the AC power into DC power and output a second power; A detection unit for sensing a current flowing in the primary winding of the power conversion unit according to the on or off operation of the second switching unit and feeding back the current to the control unit; And And a control unit for generating the switching signal according to an error signal which is fed back to the second power source of the second rectifying unit and is compared with a reference signal and the sensing signal output from the detecting unit. The apparatus as claimed in claim 9, wherein the detecting unit A current flowing in the primary winding of the power conversion unit is supplied to the primary winding in accordance with on or off of the second switching unit and is converted into a predetermined ratio by being supplied between the one pole of the input DC power supply and the second switching unit, A current-coupling converter supplying the secondary winding; And And a signal generator for generating a sensing signal input to the control unit from the power induced in the secondary winding of the current-coupling converter. 10. The apparatus according to claim 9, wherein the second rectifying portion A transistor having a gate terminal and a source terminal connected to both ends of the secondary winding of the power conversion unit and an output terminal drawn out from the drain terminal; And A first snubber circuit between the gate terminal and the source terminal for preventing a ringing phenomenon due to a leakage inductance and a gate capacitance of the power conversion unit and a leakage inductance between the drain terminal and the source terminal and a capacitance between the drain and the source And a snubber circuit for preventing a ringing phenomenon by the snubber circuit. 10. The apparatus according to claim 9, wherein the second rectifying portion A rectifier diode is connected to a secondary winding of the power conversion unit, Wherein a snubber circuit is connected to both ends of the diode or to both ends of the secondary winding of the power conversion unit in order to prevent a ringing phenomenon due to a leakage inductance of the power conversion unit and a junction capacitance of the diode.