JPS61227661A - Parallel device of gate turn-off thyristors - Google Patents

Abstract

PURPOSE:To reduce a loss at switching time and to enhance the current utility rate of each gate turn OFF thyristor (GTO thyristor) by eliminating a transient current unbalance when a plurality of GTO thyristors are switched. CONSTITUTION:A reactor 51 is provided at the cathode side of a GTO thyristor 1, a reactor 52 is provided at the cathode side of a GTO thyristor 2, a cathode side conductor 42 of flat plate shape is provided through these reactors 51, 52 of equal values, and connected with the cathode side terminal K of a gate drive unit 10. The gate terminals of the thyristors 1, 2 and the gate side terminal G of the unit 10 are connected by a gate side conductor 41 of flat plate shape, and the conductors 41, 42 are closely contacted through an insulator to almost set the inductance of the conductor to zero.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a parallel device for operating gate turn-off thyristors in parallel.

[Prior art and its problems]

FIG. 3 is a circuit diagram showing a conventional example in which gate turn-off thyristors connected in parallel are operated by a common gate drive device, in which two gate turn-off thyristors (hereinafter abbreviated as GTO thyristors) 1 and 2 are connected in parallel. A snubber circuit 8, which is connected in parallel and is commonly connected to both GTO thyristors 1 and 2, is used to moderate the voltage change rate dV/dt applied to these GTO thyristors during operation. 8 is composed of a snubber diode 3, a snubber capacitor 4, and a snubber resistor 5.

In order to operate the GTO thyristors 1 and 2 at the same time, a gate drive device 10 is provided in common, and the gate drive device 10 and the gate of the GTO thyristor 1.2 are connected by a gate side conductor 41. , gate drive device 1
0 and the cathode of the GTO thyristor 1.2 are connected by a cathode conductor 42.

FIG. 4 is a waveform diagram of the gate voltage and gate current of the GTO thyristor, where the solid line represents the gate current IQ and the broken line represents the gate voltage vGtl-.

The two GTO thyristors 1 and 2 shown in FIG. 3 have gate currents 1. Even if given at the same time, each GTO thyristor has different switching characteristics, that is, turn-on time and turn-off time, resulting in transient current imbalance during switching. However, the gate drive device 10 cannot be regarded as a current source. Therefore, if the wiring is made so that the gate inductance between the GTO thyristors connected in parallel is zero, the turn-on time and turn-off time of the p GTO thyristors will operate so as to match due to the gate current accommodation. Therefore, the above-mentioned transient current imbalance during switching should be improved.At 0, that is, turn-on, the GTO thyristor, which turns on first and starts flowing current, blocks the on-gate current at its gate and cathode. Generates a voltage in the direction of the GTO
As the thyristor's anode current increases, this voltage also increases, so the on-gate current decreases and the turn-on time increases. Also, since the impedance between the gate and cathode of the GTO thyristor that turns on later is small, the gate current that turned on first and flowed to the 90TO thyristor will suddenly flow into the gate that turned on later. 1. Because the on-gate current increases rapidly and the turn-on time is shortened. As a result, the width of variation in turn-on time is reduced.

At turn-off, the GTO thyristor that was turned off first has recovered its blocking ability between the gate and cathode, so the impedance between the gate and cathode is large, and the off-gate current decreases, so the turn-off time becomes longer, but the GTO thyristor turns off later. GTO thyristor gate
The impedance between the cathodes is also smaller than that of the element that is turned off first, and the gate current is supplied as quickly as when it is turned on, so the turn-off time of the GTO thyristor, which turns off later, is shortened. As the direction increases, the width of variation in turn-off time is eventually reduced.

However, in the conventional circuit shown in FIG. 3, two GTO thyristors 1. By using a flat gate-side conductor 41 or a flat cathode-side conductor 42 between the gate terminals or cathode terminals of '2, and by bringing these side conductors into close contact with each other through an insulator, the gate circuit can be constructed. Although the wiring inductance is reduced as much as possible, it does not become zero. Therefore, as mentioned above, this wiring inductance causes transient current imbalance when the GTO thyristors connected in parallel operate, so it is necessary to reduce the operating frequency and reduce the flow side efficiency. It has disadvantages that cannot be gained.

Furthermore, GTO thyristors have a greater variation in characteristics than normal thyristors, which also promotes current imbalance, resulting in disadvantages such as increased device size and cost due to decreased current utilization. On the other hand, if the selection of elements is strengthened in order to reduce the width of variation, there is a drawback that the yield rate will decrease and the cost of the elements will increase.〇 [Object of the Invention] This invention By eliminating the transient current imbalance that occurs when switching thyristors using a common gate drive device, it is possible to increase the current utilization rate of each element and ease the selection conditions for elements, resulting in smaller devices and lower costs. The purpose is to provide a parallel device for gate turn-off thyristors.

[Key points of the invention]

In this invention, when a plurality of GTO thyristors connected in parallel are operated by a common gate driving device, a reactor having an equal inductance value is connected in series to the cathode of each GTO thyristor, and then connected in parallel. Connect the gate terminals of each GTO thyristor with the terminals of the gate drive device using a flat gate conductor through the reactor mentioned above and the terminals of the gate drive device using a flat cathode conductor. However, by bringing these gate-side conductors and cathode-side conductors into close contact through an insulator, even when GTO thyristors with large variations in operating time are connected in parallel, the turn-on time and turn-off time of each can be made to match. , which attempts to eliminate transient current imbalance during switching ◇ [Embodiment of the invention] Figure 1 is a circuit diagram showing an embodiment of the invention, in which two GTO thyristors are connected in parallel. This is the case.

In FIG. 1, a reactor 51 is connected to the cathode of one GTO thyristor 1, and a reactor 52 is connected to the other GTO thyristor 2, but the inductance values of the reactors 51 and 52 are relatively small. may be used, but they shall have the same value. Note that reactors #51 and 52 may be configured to have an appropriate inductance value by using wiring on the cathode side. By connecting two series circuits of GTO thyristor and reactor in parallel! a A parallel circuit of GTO thyristors is constructed, and a common snubber circuit, that is, a snubber diode 3, a snubber capacitor 4, and a snubber resistor 5 are connected to these as shown.

A flat gate-side conductor 4 is connected to the gate of each GTO thyristor from the gate drive device 10 common to both thyristors 1 and 2.
1 is provided, and also from the gate drive device 10 to each GTO
The above-mentioned reactors 51 and 52 are connected to the cathode of the thyristor.
A flat cathode side conductor 42 is connected through the
Further, the gate side conductor 41 and the cathode side conductor 42 are configured to be in close contact with each other via an insulator to supply gate current to each GTO thyristor 1, 2.

When constructed as described above, two conductors 4 having a flat plate shape are formed.
1 and 42, the wiring inductance of the gate circuit of each GTO thyristor is significantly reduced due to electromagnetic coupling, so that the gate current accommodation effect due to the change in the impedance between the gate and cathode of the element itself is effectively exerted as described above. Ru. Furthermore, when the GTO thyristor performs a switching operation, the voltage generated in the series-connected reactors 51 and 52 due to a change in the main current is in the direction of blocking the on-gate current when the GTO thyristor turns on. When the GTO thyristor turns off, the voltage is in the direction of blocking the off-gate current, which further promotes the above-mentioned gate current accommodation by the element itself, so there is a difference in the operating times of the two GTO thyristors 1 and 2. Even if there is a difference, the turn-on or turn-off operations of both devices will rapidly match. Therefore, even if there is a large variation in the switching characteristics of each element, the width of the variation will be reduced and transient current sharing will be reduced. It will be good.

FIG. 2 is a block diagram showing the configuration of the embodiment circuit shown in FIG. 1, in which two flat GTO thyristors are used. That is, the anode sides of GTO thyristors 1 and 2 are commonly connected by the heat sink 31, but their cathode sides are connected to the heat sink 32 through the insulators 61 and 62, respectively.
are installed, and the heat generated from the GTO thyristors 1 and 2 is dissipated by these heat sinks 31 and 32.

A reactor 51 is provided on the cathode side of the GTO thyristor 1, and a reactor 52 is provided on the cathode side of the GTO thyristor 2.
A flat cathode-side conductor 42 is provided through the gate, and is connected to the cathode-side terminal K of the gate drive device 10. Note that main circuit terminals are provided on the side of the reactors 51 and 52 opposite to the GTO thyristor, but illustration thereof is omitted.

Further, the gate terminals of GTO thyristors 1 and 2 and the gate side terminal G of the gate drive device 10 are connected by a flat gate side conductor 41, and this gate side conductor 41 and cathode side conductor 42 are not shown. By arranging the conductors in close contact with each other with no insulating material in between, the inductance of these conductors is reduced to almost zero. Furthermore, snubber circuit 8
One end is connected to the heat radiating body 31, and the other end is connected to the canard side conductor 42. By adopting the configuration shown in FIG. 2, as mentioned above, the width of variation in switching characteristics is reduced and transient current sharing is also improved.
Although both FIG. 2 and FIG. 2 are explained using a parallel connection circuit of two GTO thyristors, the same applies to a case where three or more GTO thyristors are connected in parallel.

〔Effect of the invention〕

According to this invention, a plurality of series circuits are formed by connecting reactors having the same inductance value in series to the cathode sides of a plurality of GTO thyristors, and these series circuits are connected in parallel to each other to form a common gate drive device. The conductor used when supplying gate current is a flat plate, and the gate-side conductor and cathode-side conductor are configured to be in close contact with each other via an insulator. ・With this configuration, the conductor between each GTO thyristor is Since the gate current accommodating effect is effectively exhibited, even if there is a variation in the operating time of each GTO thyristor, the width of the variation is reduced, and transient current imbalance is suppressed, reducing loss during switching. Furthermore, since there is no risk of the GTO thyristor being destroyed by attempting to cut off a current exceeding the maximum controllable current value, the switching frequency can be increased and the current utilization rate can be increased.Furthermore, variations in element characteristics can be reduced. Since there is less need for suppression through sorting, this has the effect of greatly contributing to downsizing of the device and cost reduction.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing the configuration of the embodiment circuit shown in FIG. 1.0 FIG. 3 is a gate turn-off thyristor connected in parallel. FIG. 4 is a circuit diagram showing a conventional example in which the gate turn-off thyristors are operated by a common gate driving device. FIG. 3...
Snubber diode, 4... Snubber capacitor,
5... Snubber resistor, 8... Snubber circuit, 10... Gate drive device, 31.32...
... Heat sink, 41 ... Gate side conductor, 42.
...Cathode side conductor, 51.52...Reactor, 61゜62...Insulator〇Figure 1 Figure 2

Claims (1)

[Claims] 1) In a device for simultaneously operating a plurality of gate turn-off thyristors connected in parallel by a common gate drive device, the cathodes of the plurality of gate turn-off thyristors arranged close to each other have the same inductance value. One end of the reactor is connected separately, a series circuit of the reactor and the gate turn-off thyristor is connected in parallel with each other, and the wiring resistance and inductance from the gate drive device to each gate turn-off thyristor are approximately equal and small. A wiring means and a cathode wiring means from the gate driving device to the other end of the reactor having substantially equal and small wiring resistance and inductance, and the gate wiring means and the cathode wiring means are closely arranged through an insulator. A parallel device for gate turn-off thyristors, characterized in that: 2) In the parallel device according to claim 1, the gate wiring means or the cathode wiring means is a planar conductor or a gate driver including a terminal of a gate driving device and a gate terminal of each gate turn-off thyristor, respectively. A parallel device for gate turn-off thyristors, characterized in that the terminal of the device and the other end of each reactor are comprised of a planar conductor.