JPH0295165A - Dc/dc converter - Google Patents

Abstract

PURPOSE:To always operate the switching mode of a switch in a similar mode, and to simplify a switching control by so constructing to turn on all the switches if an input voltage is of a predetermined value or less. CONSTITUTION:In a switched capacitor type DC/DC converter, capacitors C1, C2, and a plurality of switches 1, 2, 3, 5, 6, 7 are associated, and the duty ratio of the switching operations of the switches 1, 2, 3, 5, 6, 7 is altered to control the charging voltage of a smoothing capacitor C3. The series connection state of the capacitors C1, C2 is switched by the switching operations of the plurality of switches 1, 2, 3, 5, 6, 7, the discharged capacitors C1, C2 are charged by a DC power source 10, the charged capacitors C1, C2 are discharged, and the capacitor C3 is charged. If the voltage of the power source 10 is high, the duty ratio of the switching operations is controlled in a range in which all the switches are not simultaneously turned ON, while if the voltage of the power source 10 is of a predetermined value or less, all the switches are simultaneously turned ON. Thus, if the voltage of the power source 10 is reduced, the voltage of the power source 10 can be applied directly to a load.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention uses a plurality of switches to switch the connection of an integral number of series-connected capacitors that are charged by a DC power source, and charge and discharge the capacitors each time they are switched. The present invention relates to a Swiss capacitor type DC-DC converter that obtains a DC output voltage.

[Conventional technology]

Recently, switching regulators have been widely used as DC-DC converters due to their small size, light weight, and high efficiency, and it is expected that the demand for portable devices will continue to increase in the future. However, the switching regulators currently mainly used include switching transistors, rectifiers, diodes, transformers,
It is composed of circuit parts such as choke coils, and it is difficult to integrate it into an IC (integration) due to the presence of magnetic parts.
There is a problem that there is a limit to miniaturization.

To solve this problem, a switched capacitor transformer has been proposed in Japanese Patent Laid-Open No. 58-58863. This pinched capacitor transformer is composed of a plurality of switching transistors and an integral number of capacitors, which facilitates IC (integration) and reduces the ripple content of the output voltage.

In addition, efforts have been made to facilitate raising and lowering the output voltage and converting the polarity.

[Problem to be solved by the invention]

By the way, the above-mentioned swiss titanium capacitor transformer has a transformation ratio that is an integer ratio in principle. For example, if the input voltage is designed to be 12V and the output voltage is 5V, the transformation ratio will be 2:1. Therefore, in principle, the input voltage is IOV for the output voltage 5■
or more is required. Excessive input voltage can be controlled by switching duty ratio. However, since a voltage drop occurs due to the on-resistance of the switching transistor, it is actually necessary to make the minimum allowable input voltage higher than IOV. Further, since the voltage drop is determined by the product of the on-resistance of the switching transistor and the load current flowing through the switching transistor, it is necessary to increase the lower limit value of the input voltage as the load current increases. In other words, considering the usage conditions of a DC/DC converter, it is desirable to widen the allowable input voltage range compared to the normal rated input in order to cope with input voltage fluctuations, but this transformer has a limited input voltage range. There is a problem that

Therefore, the inventor provided a booster switch that directly connects the DC power supply and the smoothing capacitor, so that the input voltage is
It is proposed that when the voltage falls below V, only the booster switch is operated to prevent the voltage of the smoothing capacitor from decreasing.

However, with such a configuration, the addition of the booster switch complicates the circuit.

Another problem is that the switching modes of the plurality of switches when the input voltage is at a predetermined value are different from the switching modes of the booster switch, requiring complicated switching control.

Furthermore, there is a problem in that power transmission efficiency decreases when the voltage of the DC power source decreases.

SUMMARY OF THE INVENTION In view of these problems, it is an object of the present invention to provide a DC-DC converter that can obtain a wide allowable input voltage range without performing complicated switching control and that does not reduce power transmission efficiency.

[Means to solve the problem]

A first invention includes an integral number of series-connected capacitors connected to a DC power source, a plurality of switches for switching the series order of the capacitors, and a smoothing capacitor charged by the capacitor and connected to a load, and the switch In a switched capacitor type DC-DC converter, which charges a capacitor in a discharged state and discharges a capacitor in a charged state to charge the smoothing capacitor each time the series order is changed by switching the capacitor, one end of each of the capacitors is connected. Two switches among the plurality of switches are connected, one end of one switch and one end of a diode among the plurality of switches are connected to the other end, and each other end of the switch and the diode is connected to the other end of the switch and the diode. The charging voltage of the smoothing capacitor is controlled by changing the duty ratio of the switching operation of all the switches, and when the voltage of the DC power supply is below a predetermined value, It is characterized in that all the switches are configured to be conductive.

A second invention is characterized in that an inductance is interposed in the circuit from the DC power source to the switch, and a capacitor is connected in parallel to the DC power source.

[Effect]

In the first invention, the series connection state of the capacitors is changed by the switching operation of the plurality of switches.

Each time the series connection state of the capacitors is switched, the discharging capacitor is charged by the DC power supply, the charging capacitor is discharged, and the smoothing capacitor is charged. Apply the charging voltage of the smoothing capacitor to the load. When the voltage of the DC power supply is high, the duty ratio of the switching operation is controlled to the extent that all switches are not turned on at the same time. If the voltage of the DC power supply is below a predetermined value, all switches are turned on at the same time.

As a result, when the voltage of the DC power supply decreases, the voltage of the DC power supply can be applied directly to the load.

In the second invention, the connection state of the capacitor is changed by the switching operation of the plurality of switches. Each time the connection state of the capacitor is switched, the discharging capacitor is charged by the DC power supply, the charging capacitor is discharged, and the smoothing capacitor is charged. Apply the charging voltage of the smoothing capacitor to the load.

When the voltage of the DC power supply is high, the duty ratio of the switching operation is controlled to the extent that all switches are not turned on at the same time. If the voltage of the DC power supply is below a predetermined value, all switches are turned on at the same time. Inductance reduces the input voltage of the switch.

Thereby, when the voltage of the DC power supply decreases, the voltage of the DC power supply can be applied directly to the load, and the switching losses of the switch are reduced.

〔Example〕

The present invention will be described in detail below with reference to drawings showing embodiments thereof.

FIG. 1 is a circuit diagram of a DC-DC converter according to the present invention. A DC (direct current) power source 10, which is an input power source made of, for example, a battery, is connected between the voltage input terminals jl+t2. − side press-fit terminal 1. is connected to one side voltage output terminal too through a series circuit of switches 1 and 2 made up of semiconductor switches, and the other side voltage input terminal t2 is directly connected to the other side voltage output terminal t2°. A series circuit of a capacitor C1 and a diode 4 is connected in parallel to the switch 2, and a switch 3 made of a semiconductor switch is connected at the midpoint between the capacitor CI and the diode 4.
It is connected to the other side input terminal t2 via. The other side voltage input terminal t2 is connected to the -control voltage output terminal t through a series circuit of a switch 7 made of a semiconductor switch and a diode 8. A series circuit of a capacitor C2 and a switch 6 made of a semiconductor switch is connected in parallel to the diode 8. The connection intermediate point between the switch 6 and the capacitor C2 is connected to the negative side pressure input terminal 1 through the switch 5 which is a semiconductor switch. is connected to. Also - a control voltage output terminal t,. and the other side voltage output terminal t
A smoothing capacitor C3 is connected between the two voltage output terminals t1° and t2°, and a series circuit of the output inductance L0 and the load 11 is interposed between the two voltage output terminals t1° and t2°. Output side capacitor C0 is connected in parallel.

For example, the switches 1 and 5 are P-channel MO3PET.
For example, N is used for switches 2, 3, 6, and 7.
Channel MO3-FET is used.

The switches 1 and 6.7 are supplied with a clock signal φ8 for switching them, and the switches 2 and 35 are supplied with a clock signal φ5 for switching them from a clock signal generating section (not shown).

This clock signal φ3. As shown in FIG. 2, the phases φ and φ are 180' out of phase with each other.

Also, the clock signal φ3. The time width of φ is the input voltage v8
When is above a predetermined value, the output voltage V is within the range in which both clock signals φ3゜φ are not output simultaneously. It is designed to change depending on the

Furthermore, when the input voltage ■1 decreases and reaches a predetermined value or less, both clock signals φ1. φ, are temporarily turned on at the same time. And switch 1, 2, 3, 5
．． By controlling the duty ratio of each switching of 6.7, the output voltage can be made constant.

Next, the operation of the DC-DC converter configured as described above will be explained with reference to FIGS. 1 to 7.

[The specifications of the IC-nc converter are input voltage V and 12V.
, output voltage V. is 5■, and the required input voltage tolerance range is now 7 to 16V. The input voltage ■1 is I, ignoring the voltage drops of switches 1, 2, 3, 5, 6, and 7.
OV or more, the clock signal φ1. φ.

By performing PWM (Pulse Width Modulation) control that changes the time width of , an output voltage V0 of 5cm can be stably obtained. That is, the input voltage V.

is greater than or equal to IOV, switches 1 and 67 and switches 2 and 3.5 alternately perform switching operations. Assuming that capacitor C2 has already been charged with a potential difference of 5V and capacitor C1 has completed discharging, switch 1.6.7 is in the on state and switch 2.3.5 is in the off state, as shown in FIG. etc. How many circuits are there? And the input current to the capacitor C is the on-resistance R1 of the switch 1,
The current flows through the capacitor C1, the diode 4, the on-resistance R4 of the switch 6, and the on-resistance R1 of the switch 7. Further, the discharge current of the capacitor C2 is determined by the on-resistance Rh of the switch 6, the on-resistance R of the smoothing capacitor c3, and the on-resistance R of the switch 7.
It flows through 7. As a result, capacitor C4 is charged with a potential difference V, -V0 (=115=7V), while energy is supplied from capacitor c2 to smoothing capacitor c3 and load 11 by discharging.

Next, switch I, 6.7 is in the off state, switch 2.3.
When 5 is turned on, a circuit such as that shown in FIG. 4 is formed. and the input current I of capacitor c2.

flows through the on-resistance R5 of the switch 5, the capacitor c2, the diode 8, the on-resistance R2 of the switch 2, the capacitor C1, and the on-resistance R3 of the switch 3. Further, the discharge current of the capacitor c1 flows through the on-resistance R2 of the switch 2, the smoothing capacitor C2, and the on-resistance R8 of the switch 3. As a result, capacitor C2 is charged in the same manner as described above, while capacitor CI supplies energy to smoothing capacitor C3 and load 11 by discharging.

Incidentally, when the switches 1, 2, 3, 5, and 6.7 are all turned off, the circuit becomes as shown in FIG. 5, and energy is supplied to the load 11 only from the smoothing capacitor C3. Such a switch operation generates the clock signal φ8. shown in FIG.
By repeating at the frequency of φ, Figs. 3 and 5
Energy is continuously supplied to the load 11 in the order of the circuits shown in FIGS.

Here, the smoothing capacitor C3 smoothes voltage fluctuations caused by the energy supplied from the capacitor CI+02 at high frequencies due to the frequency of the clock signal or the switching operation of the switch. And the output voltage V0 is switch 1
, 2, 3, 5, and 6.7 are constant, they change according to fluctuations in the load 11.

Therefore, the output voltage ■. In order to stabilize the clock signal φ3. as shown by the broken line in FIG. The time width T of φ. By changing N, its duty ratio T. N/T (TON...
- PWM control is performed to control the on-state time (T...period) according to the output voltage v0. In other words, when the load is high, the duty ratio is increased as shown by the broken line, and when the load is low, the duty ratio is decreased as shown by the solid line, and the capacitors C+ and C
The charging voltage of z is controlled and the output voltage V is held constant.

In this way, this DC-DC converter has an input voltage of V, apart from the voltage controlled by PIIM control.

is divided by capacitors C,,C, to output voltage V.

Therefore, the input/output ratio is 2:1.

Now, when the input voltage v8 becomes, for example, 9V, the output voltage V as mentioned above. The output voltage V decreases and cannot be maintained at 5V. is below a predetermined value, the clock signal φ4. The time width T of φ.

Switches 1, 2, 3, 5, 6.7 are controlled so that both N are wide, and the clock signals φ
Switching is performed so that both are temporarily turned on at the same time.

When switches 1, 2.3, 5.6.7 are turned on at the same time, the circuit shown in FIG. 6 is formed.

As a result, from the DC power supply 10 to the on-resistance R1 of the switch 1
, a charging current flows to the capacitor C1 through the capacitor C1 and the on-resistance R3 of the switch 3, and the charging current flows to the capacitor C1 through the on-resistance R3 of the switch 50.
A charging current flows through the on-resistance Rs, the capacitor C2, and the on-resistance R1 of the switch 7 to the capacitor c2. Furthermore, the DC power supply 10 has on-resistances R+ and Rz of the switch/7 switch 12.
It is connected to the smoothing capacitor C3 and the load 11 via the DC power supply 10, and an input current (2), which is the sum of the charging current of the capacitors C, C2 and the current to the load 11, flows from the DC power supply 10.

In the periods S-, Sb, Sc, and Sa shown in FIG. 7, the equivalent circuits of the respective periods are shown in FIGS. 6, 3, 6, and 4. Therefore, in the equivalent circuit of FIG. 6 during the period Sll, current flows from the DC power supply 10 to the load 11 and the smoothing capacitor C3, and the output voltage v0 becomes 5V. In other words, the positive side voltage VC++ of capacitor C1゜C2
■Cm is Vc+-Vcz-(11=■.+R2・(Vi-V.)/(R++R2)
...(2) = (R6・V4 +Rs・Vo)
/ (Rs +Rh)>V.

=5...(3) By the way, the on-resistance of the P-channel semiconductor switch used for switches 1 and 5 is as follows for switches 2.3.6.
This is larger than the on-resistance of the N-channel semiconductor switch used in No. 7.

Therefore, the positive side voltage of capacitor C8 in the equivalent circuit of FIG.
i...(41) Therefore, the positive side voltage V,
is higher than the voltage of the DC power supply 10, and the input current from the DC power supply 10 is 1. does not flow. Furthermore, the diode 4 blocks current from flowing from the capacitor C1C2 to the DC power supply 10 side. That is, as the capacitor C2 discharges to the load 11 side, the terminal voltage of the series circuit of the capacitors C, , C, and so on increases.

DC power supply 10 until the input voltage V decreases and the input voltage V decreases.
No current flows from. Thus, the input voltage V.

If is greater than IOV, as described above, current is supplied by the clock signals φ, φ shown in FIG. 2 and the equivalent circuit shown in FIG. In the state shown in Figures 2 and 3, the DC power supply 1
From the 0 side, the current is cut off.

FIG. 7 shows the clock signal φ3. 3 is a timing chart showing the relationship between φ, switch input side voltage VX, input current I8, and output voltage v0. As is clear from this figure, the clock signal φ3. The period S and Sc during which φ and φ are simultaneously output is the input current ■.

flows, and as a result, the capacitors C+ and Cx are charged, and the voltage of the DC power supply 10 is directly applied to the load 11, resulting in an output voltage ■. rises.

and clock signal φ3. Input voltage V and output voltage V at the leading and trailing edges of φ5. Although spike noise occurs, it is absorbed by the smoothing circuit including the output inductance L0 and the output capacitor C8, and the load 11 is supplied with a DC voltage with less ripple and spike noise.

This makes it possible to expand the allowable input voltage range.

In addition, when the input voltage (■) is greater than or equal to a predetermined value or less than a predetermined value, the output voltage (■) is set in a switching mode that changes the time width of the clock signal φ3φ. Since the stabilization of the clock signal φ3゜φゎ is achieved, the control operation of the clock signal φ3゜φゎ becomes common and simple. Furthermore, there is no need to provide a separate booster switch for switching when the input voltage Vi decreases, and the number of switches does not increase.

FIG. 8 is a circuit diagram of a DC-DC converter according to the second invention. Voltage input terminal 1. ．． An input end capacitor C8 is interposed between the voltage input terminal 1 and the switches 1 and 5, and an input inductance is interposed between the voltage input terminal 1 and the switches 1 and 5. The other circuit configuration is the same as the circuit shown in FIG.

This DC-DC converter is the D
The switching operation is similar to that of a switch in a C-DC converter.

However, when switches 1, 6.7 or 2, 3.5 are turned on and input current 2 flows, the output side of the input inductance, that is, the input side voltage v of switches 1 and 5.
g decreases. Therefore, the period S3°Sc shown in FIG. 9 is longer for the same input terminal.

And period Sb.

When the DC power supply 10 changes from S, to period Sc,S,
The input current ■, suddenly tries to flow from , but the input current I
, a reverse voltage VX is generated on the input side inductance L1, and the input side voltage v7 of the switch 1.5! is VZ=V□−■18 (5). When the input voltage Vl of the switch is reduced in this way, the voltage drop at the switch is suppressed and the switching loss is reduced.

Here, the input voltage (1) is 12V, and the output voltage is V. When is 5V, the power transmission efficiency e is: e = 5 / (12/2) xloo = 83.3
% (6), and when the input voltage is above a predetermined value, high power transmission efficiency can be obtained.

By the way, when the input voltage (2) drops below 10V, energy is supplied from the DC power supply 10 to the load 11 by the equivalent circuit shown in FIG. 6, but since this is a series regulator circuit, for example, input voltage V,
9V, output voltage V. When is 5V, the power transmission efficiency e is: e = 5/9 X100 = 55.6%...(
7), and when the input voltage {circle around (2)} becomes less than IOV, the power transmission efficiency decreases.

In other words, the power transfer efficiency e is: e=V. /Vi

FIG. 9 shows the clock signal φ1. in this DC-DC converter. φ, switch input voltage ■β, and charging current I
, is a timing chart showing the relationship between . When the clock signal φ3 or φ is applied and the switch 1.6.7 or 2.3.5 is turned on, the input current I flows to the output side of the input inductance L1, that is, the switch 1.5.
The input side voltage VZ decreases. On the other hand, the input current I is smoothed by the input capacitor C8 and has a smooth waveform lower than the peak value shown in FIG. As described above, according to the second invention, as in the first invention, it is possible to expand the allowable input voltage range, reduce the switching loss of the switch, and always obtain high power transmission efficiency.

〔Effect of the invention〕

As detailed above, 1. According to the second invention, the switching mode of the switch can be performed in the same mode regardless of whether the input voltage is above or below a predetermined value, and switching control becomes simple. Furthermore, the allowable input voltage range can be expanded to prevent a decrease in output voltage due to a decrease in input voltage without providing a separate switch such as a booster switch.

Further, the second invention has effects such as being able to prevent the power transmission efficiency from decreasing when the voltage of the DC power supply becomes lower than a predetermined value, and can provide a high multiplier and high efficiency DC-DC converter.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of the DC-DC converter according to the first invention, FIG. 2 is a waveform diagram of a clock signal, and FIGS. An equivalent circuit diagram corresponding to the operation, FIG. 7 is a timing chart of the clock signal, switch input side voltage, input current, and output voltage, FIG. 8 is a circuit diagram of the DC-DC converter according to the second invention, and FIG. 9 is The clock signal of the DCDC converter,
It is a timing chart of switch input side voltage and input current. 1 2.3, 5, 6.7...Switch 4.8...Diode 10...DC power supply 11...Load C+,
Cw...Capacitor C3...Smoothing capacitor L,
...Input side inductance C8...Input side capacitor Lo...Output side inductance C0...Output side capacitor Patent Applicant

Claims (1)

[Claims] 1. A device comprising: an integral number of series-connected capacitors connected to a DC power supply; a plurality of switches for switching the series order of the capacitors; and a smoothing capacitor charged by the capacitors and connected to a load. , a switched capacitor type DC-DC converter that charges a capacitor in a discharged state and discharges a capacitor in a charged state to charge the smoothing capacitor each time the series order is changed by switching the switch, each of the capacitors Two switches of the plurality of switches are connected to one end, one end of one of the switches and one end of a diode are connected to the other end, and each other of the switch and the diode is connected to the other end. the ends are respectively connected to one end and the other end of the smoothing capacitor,
The charging voltage of the smoothing capacitor is controlled by changing the duty ratio of the switching operation of all the switches, and when the voltage of the DC power supply is below a predetermined value, all the switches are configured to conduct. Featured DC
-DC converter. 2. D according to claim 1, characterized in that an inductance is interposed in the circuit from the DC power source to the switch, and a capacitor is connected in parallel to the DC power source.
C-DC converter.