JPH026454B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a voltage-controlled frequency variable square wave oscillator.

In conventional voltage-controlled frequency-variable square wave oscillators, both the high-level period and the low-level period of the pulse cannot be changed, and one of the periods remains constant. Therefore, not only is it not possible to obtain a rectangular wave with a constant on/off ratio and variable period, but when this rectangular wave oscillator is used to drive complementary type transistors in the subsequent stage, there is an imbalance between the on/off periods of both transistors. A balance will result in one transistor operating more frequently than the other. Therefore, the lifespan of the one transistor is shortened, and as a result, the lifespan of the entire circuit is shortened.

The present invention improves this drawback, allows both transistors to be equally driven, and extends the life of the entire circuit.

The present invention will be explained in more detail below with reference to the drawings. FIG. 1 shows a conventional example. In the figure, resistance
R ₂ , R ₃ , operational amplifier AMP1 and capacitor C ₁
The circuit composed of is an integrator, and a voltage comparator is provided at the output of this integrator. That is, the voltage comparator is composed of resistors R ₆ , R ₇ , R ₈ and an operational amplifier AMP2. Then, the output of the voltage comparator controls transistor Q ₀ and capacitor C ₁
control the charging and discharging of As a result, a rectangular wave is obtained from the voltage comparator, and this rectangular wave is divided into rectangular waves having mutually opposite phases in a collector-emitter phase dividing circuit in the next stage. That is, this phase dividing circuit has resistors R ₉ ,
This phase divider circuit, consisting of R ₁₀ , R ₁₁ and transistor Q ₁ , is connected to a bush pull amplifier via capacitors C ₂ and C ₃ . This push-pull amplifier consists of resistors _R12 to _R15 , transistors
It consists of Q ₂ , Q ₃ and transformer T.
An output square wave is obtained from the output OUT of the pull amplifier. In such a configuration, the output voltage of the comparator is -
At V ₀ volts, transistor Q ₀ is cut off and the non-inverting input of operational amplifier AMP2 is provided with a potential divided by resistors R ₇ and R ₈ . That is, when the resistance values of the resistors R ₇ and R ₈ are defined as r ₇ and r ₈ , respectively, -V ₀ ×(r ₇ /r ₇ +r ₈ ) volts are applied to the positive input of the operational amplifier AMP2. In this state, if a voltage of Vi is applied to the input terminal IN, the resistance
Charging current flows to capacitor C ₁ through R ₁ and R ₂ ,
The output of the integrator falls approximately linearly. When the output voltage of this integrator reaches -V ₀ *(r ₇ /r ₇ +r ₈ ) volts, the output voltage of the comparator will be +V ₀ volts. At this time, the transistor Q ₀ becomes conductive, and the charge stored in the capacitor C ₁ is discharged through the resistor R ₂ and the transistor Q ₀ . This discharge current is determined by the Zener diode DZ and resistor _R2 . On the other hand, due to this discharge, the output of the integrator increases almost linearly, and the voltage increases to +V ₀ ×
When (r ₇ /r ₇ +r ₈ ) volts is reached, the output of the comparator is again −V ₀ volts. By repeating this, a square wave output is obtained from the comparator. Here, as the voltage at the input terminal IN increases, the current charged in the capacitor _C1 increases, so the rate of fall of the integrator output voltage increases. On the other hand, there is no change in the discharge current of the capacitor _C1 , and the rate of increase in the output voltage of the integrator is constant. This input terminal
Figure 2 shows the output of the integrator when a voltage that monotonically increases linearly with time is applied to IN, and Figure 3 shows the output of the comparator. In these figures, the horizontal axis shows time and the vertical axis shows potential, and in the output of the integrator in FIG. 2, the time required for the output of the integrator to change from +Va volts to -Va volts becomes shorter as time passes. On the other hand, the change time from -Va volts to +Va volts is constant regardless of the passage of time. Therefore, the period t ₀ in which the output of the comparator shown in FIG. 3 is +V ₀ volts is constant, but the periods t ₁ and t ₁ ' in which it is -V ₀ volts become shorter as time passes. And such third
The phase division circuit of FIG. 1 is driven by the rectangular wave shown in the figure. As a result, the transistor in Figure 1
Q ₂ is conductive during the period when the output of the comparator is −V ₀ , that is, during the period t ₁ , t _{1 '} ... in FIG _.
The cutoff period will be the cutoff period. Transistor _Q5 in FIG. 1 operates completely opposite to transistor _Q2 .
As a result, an output similar to the waveform shown in FIG. 3 is obtained from the output OUT in FIG. 1. It has the above characteristics, keeps the input voltage constant,
If you set the circuit constants well, the transistor Q ₂
The conduction and non-conduction times of Q3 and _Q3 can be made equal, and the on/off
It is possible to obtain a square wave with the same off ratio, but if you want to make the rectangular wave period variable, you must
The off ratios are no longer equal. Furthermore, if these on-off ratios are no longer equal, both transistors Q ₂ and Q ₃
There will be a difference in the conduction time. Therefore, there is a difference in the lifespan of both transistors Q ₂ and Q ₃ , and as a result, the lifespan of the entire circuit is shortened.

The present invention improves these drawbacks,
A first resistor R26 connects the non-inverting input to which the comparison current of the operational amplifier AMP is inputted to the output terminal of the operational amplifier AMP, and a voltage obtained from the outside is used to control the positive and negative voltages symmetrical about the 0 potential of the operational amplifier AMP. A comparison voltage source that provides a comparison voltage of
Diode D1 conducts when the output of is positive voltage.
, a diode D2 that conducts when the output of the operational amplifier AMP is a negative voltage, and a diode D2 that conducts when the output of the operational amplifier AMP is a negative voltage, and a diode D2 that is connected between the terminal that provides a negative comparison voltage of the comparison voltage source and the non-inverting input of the operational amplifier AMP. A resistor R connecting the input to the output terminal of the operational amplifier AMP
25, and a capacitor C21 connecting the inverting input of the operational amplifier AMP to the negative power supply.

FIG. 4 shows an embodiment of the present invention in which a conventional collector-emitter phase dividing circuit and push-pull amplifier are connected to the rear stage of the oscillation circuit. Here, the voltage control transistor FET controls the potential at points based on the voltage applied to its input terminal IN by the division ratio of the resistor R ₂₁ , the transistor FET, and the resistor R ₂₂ . This allows the operational amplifier
When the output point of AMP is on the positive potential side, a comparison voltage is applied to the non-inverting input of the operational amplifier AMP via the diode _D1 by the division ratio of the resistor _R23 and the first resistor _R26 . When the point is on the negative potential side, a comparison voltage is applied to the non-inverting input of the operational amplifier AMP via the diode _D2 by the division ratio of the resistors _R24 and _R26 . Therefore, when the output of the operational amplifier AMP is at a positive potential, +V ₀ volts, a charging current flows through the second resistor R ₂₅ to the capacitor C ₂₁ ,
When the potential at the point, ie, the potential at the inverting input, gradually increases and becomes equal to the comparison voltage, the output point of the operational amplifier is inverted and becomes a negative potential, −V ₀ volts. When this point becomes a negative potential, the capacitor C ₂₁ begins to discharge, the potential at the point gradually drops, and when it becomes equal to the comparison potential, the output point of the operational amplifier is inverted again,
Becomes a positive potential. This operation is repeated to form an oscillation circuit. Therefore, as explained in Figure 1,
FIG. 5 shows the voltage waveform at a point when a linearly increasing voltage is applied to the input terminal IN, and FIG. 6 shows the voltage waveform at a point. In FIGS. 5 and 6, the horizontal axis represents time and the vertical axis represents potential. If the potentials at the points in FIG. 4 are +Vi volts and -Vi volts, respectively, the curve shown by the dotted line in FIG. 5 is {(+V ₀ )−(Vi)}(r ₂₃ /r ₂₃ +r ₂₆ ) It's a bolt. However, r ₂₃ and r ₂₆ are the resistance values of the resistors R ₂₃ and R ₂₆ , respectively. Moreover, the curve shown by the dotted line in FIG. 5 is {(-V ₀ )-(-Vi)}(r ₂₄ /r ₂₄ +r ₂₆ ) volts.

However, _r24 is the resistance value of resistor _R24 . That is, these curves serve as comparison voltage curves for the operational amplifier AMP. Therefore, as the capacitor C ₂₁ is charged and discharged, the potential shown in FIG. 4 becomes the state shown by the solid line in FIG. 5. On the other hand, the waveform at the 4th point is the 6th point.
As shown in the figure, each time the solid line in Figure 5 matches the curve, the value changes from +V ₀ to -V ₀ and from -V ₀ to +V _0.
Reverse to . Also, as shown in this figure, as the input voltage to the input terminal IN in Figure 4 increases, -V ₀
The periods t ₂₁ , t ₂₁ ′... and the periods t ₂₀ ,... of +V ₀ become shorter. That is, the frequency gradually becomes higher. However, if the input voltage to the input terminal IN is constant,
No matter what the input voltage is, the +V ₀ and -V ₀ periods are always equal. Therefore, the fourth
The on/off times of the transistors Q ₂ and Q ₃ in the latter stage of the figure are equal, and the rectangular wave obtained from the output OUT has a waveform with an on/off ratio of 1:1. or,
Although transistors Q ₂ and Q ₂ operate in opposite directions,
They are driven evenly, and shortening of the life of the entire circuit due to differences in driving time can be avoided.

[Brief explanation of drawings]

Figure 1 is a conventional example, and Figures 2 and 3 are
1, FIG. 4 shows one embodiment of the present invention, and FIGS. 5 and 6 show waveform diagrams of the points in FIG. 4, respectively. In the figure, AMP, AMP1, AMP2 are operational amplifiers,
_Q0 to _Q3 are transistors, T is a transformer, R- is a resistor, C- is a capacitor, FET is a voltage control transistor, and _D1 and _D2 are diodes.

Claims (1)

[Claims] 1. A first resistor R26 that connects the non-inverting input of the operational amplifier AMP, into which the comparison current is input, to the output terminal of the operational amplifier AMP;
A comparison voltage source that provides positive and negative comparison voltages that are symmetrical about the zero potential of AMP, and a terminal of the operational amplifier AMP between the terminal that provides the positive comparison voltage of the comparison voltage source and the non-inverting input of the operational amplifier AMP. A diode D1 conducts when the output is a positive voltage, and a diode D1 conducts when the output of the operational amplifier AMP is a negative voltage, between a terminal that provides a negative comparison voltage of the comparison voltage source and the non-inverting input of the operational amplifier AMP. Diode D2 and the inverting input of the operational amplifier AMP are connected to the operational amplifier.
A voltage-controlled rectangular wave oscillator comprising: a resistor R25 that connects the output terminal of the AMP; and a capacitor C21 that connects the inverting input of the operational amplifier AMP to a negative power supply.