JP6714157B2 - Power supply device and power supply system using the same - Google Patents

Description

The present invention relates to a power supply device and a power supply system, and more particularly to a power supply device including a forward converter that converts AC power into DC power, and a power supply system using the power supply device.

For example, Japanese Patent Laying-Open No. 2008-92734 (Patent Document 1) includes a plurality of switching elements, a forward converter that converts AC power of a commercial frequency into DC power, a sine wave signal of a commercial frequency, and a commercial frequency There is disclosed a power supply device including a control device that generates a control signal for controlling a plurality of switching elements based on a comparison result with a triangular wave signal having a sufficiently high frequency. Each of the plurality of switching elements is turned on and off at a frequency having a value according to the frequency of the triangular wave signal.

JP, 2008-92734, A

However, the conventional power supply device has a problem that switching loss occurs each time the switching element is turned on and off, and the efficiency of the power supply device is reduced.

Therefore, a main object of the present invention is to provide a highly efficient power supply device and a power supply system using the same.

The power supply device according to the present invention includes a plurality of switching elements, a forward converter that converts AC power of a commercial frequency into DC power, and a commercial converter that eliminates a deviation between a reference DC voltage and an output DC voltage of the converter. A first control unit that outputs a sine wave signal of a frequency is compared with a sine wave signal and a triangular wave signal of a frequency higher than the commercial frequency to control the switching elements based on the comparison result. And a frequency adjusting unit that adjusts the frequency of the triangular wave signal to the lower limit value within a range in which deviation can be eliminated.

In the power supply device according to the present invention, since the frequency of the triangular wave signal is adjusted to the lower limit value within the range in which the deviation between the reference DC voltage and the output DC voltage of the forward converter can be eliminated, the switching element is turned on and off. The number of times can be adjusted to the lower limit. Therefore, the switching loss generated in the switching element can be suppressed to be small, and the efficiency of the power supply device can be improved.

It is a circuit block diagram which shows the structure of the stabilized power supply device by Embodiment 1 of this invention. FIG. 2 is a circuit diagram showing a main part of the stabilized power supply device shown in FIG. 1. FIG. 2 is a block diagram showing a configuration of a portion related to control of a converter in the control device shown in FIG. 1. FIG. 4 is a circuit block diagram showing a main part of the gate control circuit shown in FIG. 3. 5 is a time chart illustrating the waveforms of the voltage command value, the triangular wave signal, and the gate signal shown in FIG. 4. FIG. 7 is a circuit block diagram showing a modified example of the first embodiment. FIG. 7 is a circuit block diagram showing another modification of the first embodiment. FIG. 9 is a circuit block diagram showing still another modification of the first embodiment. It is a block diagram which shows the structure of the uninterruptible power supply system by Embodiment 2 of this invention. It is a circuit block diagram which shows the structure of the uninterruptible power supply U1 shown in FIG. It is a block diagram which shows the structure of the uninterruptible power supply system by Embodiment 3 of this invention. It is a circuit block diagram which shows the structure of the uninterruptible power supply U0 shown in FIG.

[Embodiment 1]
1 is a circuit block diagram showing a configuration of a stabilized power supply device 1 according to a first embodiment of the present invention. The stabilized power supply device 1 temporarily converts the three-phase AC power from the commercial AC power supply 15 into DC power, converts the DC power into stabilized three-phase AC power, and supplies it to the load 16. .. In FIG. 1, for simplification of the drawing and description, only a circuit of a portion corresponding to one phase (for example, U phase) of the three phases (U phase, V phase, W phase) is shown.

In FIG. 1, the stabilized power supply device 1 includes an AC input terminal T1, an AC output terminal T2, electromagnetic contactors 2 and 12, current detectors 3 and 9, reactors 5 and 10, a converter 6, a DC line L1 and a capacitor 4. , 7, 11, an inverter 8, an operation unit 13, and a control device 14.

The AC input terminal T1 receives AC power of commercial frequency from the commercial AC power supply 15. The AC output terminal T2 is connected to the load 16. The load 16 is driven by AC power. The electromagnetic contactor 2 and the reactor 5 are connected in series between the AC input terminal T1 and the input node of the converter 6. The capacitor 4 is connected to the node N1 between the electromagnetic contactor 2 and the reactor 5. The electromagnetic contactor 2 is turned on when the stabilized power supply device 1 is used, and is turned off, for example, during maintenance of the stabilized power supply device 1.

The instantaneous value of the AC input voltage Vi appearing at the node N1 is detected by the control device 14. The current detector 3 detects the AC input current Ii flowing through the node N1 and supplies the control device 14 with a signal Iif indicating the detected value.

The capacitor 4 and the reactor 5 constitute a low-pass filter, and allow the commercial AC power supply 15 to pass the AC power of the commercial frequency to the converter 6 so that the signal of the switching frequency generated in the converter 6 passes to the commercial AC power supply 15. Prevent.

The converter 6 is controlled by the controller 14 and converts the AC power supplied from the commercial AC power supply 15 into DC power and outputs the DC power to the DC line L1. The capacitor 7 is connected to the DC line L1 and smoothes the voltage of the DC line L1. The output voltage of the converter 6 can be controlled to a desired value. The instantaneous value of the DC voltage Vdc appearing on the DC line L1 is detected by the controller 14. The DC line L1 is connected to the input node of the inverter 8.

The inverter 8 is controlled by the control device 14, and converts the DC power supplied from the converter 6 via the DC line L1 into AC power having a commercial frequency and outputs the AC power. The output voltage of the inverter 8 can be controlled to a desired value. The output node of the inverter 8 is connected to one terminal of the reactor 10, and the other terminal (node N2) of the reactor 10 is connected to the AC output terminal T2 via the electromagnetic contactor 12. The capacitor 11 is connected to the node N2.

The current detector 9 detects an instantaneous value of the output current Io of the inverter 8 and gives a signal Iof indicating the detected value to the control device 14. The instantaneous value of the AC output voltage Vo appearing at the node N2 is detected by the control device 14.

The reactor 10 and the capacitor 11 form a low-pass filter, pass the AC power of the commercial frequency generated by the inverter 8 to the AC output terminal T2, and the signal of the switching frequency generated by the inverter 8 is output to the AC output terminal T2. Prevent passing through. The inverter 8, the reactor 10, and the capacitor 11 form an inverse converter. The electromagnetic contactor 12 is turned on when the stabilized power supply device 1 is used, and is turned off, for example, during maintenance of the stabilized power supply device 1.

The operation unit 13 includes a plurality of buttons operated by the user of the stabilized power supply device 1, an image display unit that displays various kinds of information, and the like. By operating the operation unit 13 by the user, the power source of the stabilized power supply device 1 can be turned on and off, and the stabilized power supply device 1 can be manually or automatically operated.

The control device 14 controls the stabilized power supply device 1 as a whole based on the signal from the operation unit 13, the AC input voltage Vi, the AC input current Ii, the DC voltage Vdc, the AC output current Io, the AC output voltage Vo, and the like. That is, the control device 14 controls the converter 6 so that the DC voltage Vdc becomes the reference DC voltage Vr.

The controller 14 operates based on the output signal Iof of the current detector 9 and compares the output current Io of the inverter 8 (that is, the load current IL) with the predetermined value Ic. When Io>Ic, the control device 14 determines that the AC power is being supplied from the stabilized power supply device 1 to the load 16 and selects the normal operation mode (second operation mode). When Io<Ic, the control device 14 determines that AC power is not being supplied from the stabilized power supply device 1 to the load 16 and selects the power saving operation mode (first operation mode).

Further, when the normal operation mode is selected, the control device 14 compares the sine wave signal of the commercial frequency with the triangular wave signal of the frequency fH sufficiently higher than the commercial frequency, and based on the comparison result, the converter. A plurality of gate signals (control signals) for controlling 6 are generated.

Further, when the power saving operation mode is selected, the controller 14 adjusts the frequency of the triangular wave signal to the lower limit value fL within a range in which the DC voltage Vdc can be set to the reference DC voltage Vr, and the sine of the commercial frequency is used. The level of the wave signal and the level of the triangular wave signal of frequency fL are compared, and a plurality of gate signals for controlling the converter 6 are generated based on the comparison result.

FIG. 2 is a circuit diagram showing a main part of the stabilized power supply device 1 shown in FIG. Although FIG. 1 shows only the part related to one phase of the three-phase AC voltage, FIG. 2 shows the part related to three phases. In addition, the electromagnetic contactors 2 and 12, the operation unit 13, and the control device 14 are not shown.

In FIG. 2, the stabilized power supply device 1 includes AC input terminals T1a, T1b, T1c, AC output terminals T2a, T2b, T2c, current detectors 7, 9, capacitors 4a, 4b, 4c, 11a, 11b, 11c and a reactor. 5a, 5b, 5c, 10a, 10b, 10c, a converter 6, DC lines L1 and L2, and an inverter 8.

The AC input terminals T1a, T1b, T1c respectively receive the three-phase AC voltage (U-phase AC voltage, V-phase AC voltage, and W-phase AC voltage) from the commercial AC power supply 15 (FIG. 1). A three-phase AC voltage synchronized with the three-phase AC voltage from the commercial AC power supply 15 is output to the AC output terminals T2a, T2b, T2c. The load 16 is driven by the three-phase AC voltage from the AC output terminals T2a, T2b, T2c.

Reactors 5a, 5b and 5c have one terminals connected to AC input terminals T1a, T1b and T1c, respectively, and the other terminals connected to input nodes 6a, 6b and 6c of converter 6, respectively. One electrodes of capacitors 4a, 4b, 4c are respectively connected to one terminals of reactors 5a-5c, and the other electrodes thereof are both connected to neutral point NP.

Capacitors 4a to 4c and reactors 5a to 5c form a low-pass filter, pass three-phase AC power of commercial frequency from AC input terminals T1a, T1b, and T1c to converter 6, and switch the switching frequency generated in converter 6. Cut off the signal. The instantaneous value of the AC input voltage Vi appearing at one terminal of the reactor 5a is detected by the controller 14 (FIG. 1). The current detector 7 detects the AC input current Ii flowing through the node N1 (that is, the AC input terminal T1a) and gives the control device 14 a signal Iif indicating the detected value.

Converter 6 includes IGBTs (Insulated Gate Bipolar Transistors) Q1 to Q6 and diodes D1 to D6. The IGBT constitutes a switching element. The collectors of IGBTs Q1 to Q3 are all connected to DC line L1, and their emitters are connected to input nodes 6a, 6b and 6c, respectively. The collectors of IGBTs Q4 to Q6 are connected to input nodes 6a, 6b, 6c, respectively, and their emitters are both connected to DC line L2. Diodes D1 to D6 are connected in antiparallel to IGBTs Q1 to Q6, respectively.

The IGBTs Q1 and Q4 are controlled by the gate signals Au and Bu, the IGBTs Q2 and Q5 are controlled by the gate signals Av and Bv, respectively, and the IGBTs Q3 and Q6 are controlled by the gate signals Aw and Bw, respectively. The gate signals Bu, Bv, Bw are inversion signals of the gate signals Au, Av, Aw, respectively.

The IGBTs Q1 to Q3 are turned on when the gate signals Au, Av, Aw are set to the “H” level, and are turned off when the gate signals Au, Av, Aw are set to the “L” level, respectively. The IGBTs Q4 to Q6 are turned on when the gate signals Bu, Bv, Bw are set to the “H” level, and turned off when the gate signals Bu, Bv, Bw are set to the “L” level, respectively.

Each of the gate signals Au, Bu, Av, Bv, Aw, Bw is a pulse signal train and is a PWM (Pulse Width Modulation) signal. The phases of the gate signals Au and Bu, the phases of the gate signals Av and Bv, and the phases of the gate signals Aw and Bw are shifted by 120 degrees. The gate signals Au, Bu, Av, Bv, Aw, Bw are generated by the controller 14. A method of generating the gate signals Au, Bu, Av, Bv, Aw, Bw will be described later.

For example, when the voltage level of the AC input terminal T1a is higher than the voltage level of the AC input terminal T1b, the IGBTs Q1 and Q5 are turned on, and the reactor 5a, the IGBTQ1, the DC line L1, the capacitor 7, and the DC line L2 from the AC input terminal T1a. , IGBTQ5, and the reactor 5b, current flows to the AC input terminal T1b, and the capacitor 7 is charged to a positive voltage.

On the contrary, when the voltage level of the AC input terminal T1b is higher than the voltage level of the AC input terminal T1a, the IGBTs Q2 and Q4 are turned on, and the reactor 5b, the IGBTQ2, the DC line L1, the capacitor 7, the DC line from the AC input terminal T1b. A current flows through the AC input terminal T1a via L2, the IGBT Q4, and the reactor 5a, and the capacitor 7 is charged to a positive voltage. The same applies to other cases.

Each of the IGBTs Q1 to Q6 is turned on and off at a predetermined timing by the gate signals Au, Bu, Av, Bv, Aw, and Bw, and the on time of each of the IGBTs Q1 to Q6 is adjusted, so that each of the input nodes 6a to 6c can be controlled. It is possible to convert the given three-phase AC voltage into a DC voltage Vdc (voltage between terminals of the capacitor 7).

Inverter 8 includes IGBTs Q11 to Q16 and diodes D11 to D16. The IGBT constitutes a switching element. The collectors of IGBTs Q11 to Q13 are all connected to DC line L1, and their emitters are connected to output nodes 8a, 8b and 8c, respectively. The collectors of IGBTs Q14 to Q16 are connected to output nodes 8a, 8b and 8c, respectively, and their emitters are both connected to DC line L2. The diodes D11 to D16 are connected in antiparallel to the IGBTs Q11 to Q16, respectively.

The IGBTs Q11 and Q14 are controlled by the gate signals Xu and Yu, the IGBTs Q12 and Q15 are controlled by the gate signals Xv and Yv, respectively, and the IGBTs Q13 and Q16 are controlled by the gate signals Xw and Yw, respectively. The gate signals Yu, Yv, Yw are inversion signals of the gate signals Xu, Xv, Xw, respectively.

The IGBTs Q11 to Q13 are turned on when the gate signals Xu, Xv, and Xw are set to the "H" level, and turned off when the gate signals Xu, Xv, and Xw are set to the "L" level, respectively. The IGBTs Q14 to Q16 are turned on when the gate signals Yu, Yv, Yw are set to the "H" level, and are turned off when the gate signals Yu, Yv, Yw are set to the "L" level, respectively.

Each of the gate signals Xu, Yu, Xv, Yv, Xw, Yw is a pulse signal train and is a PWM signal. The phases of the gate signals Xu and Yu, the phases of the gate signals Xv and Yv, and the phases of the gate signals Xw and Yw are shifted by 120 degrees. The gate signals Xu, Yu, Xv, Yv, Xw, Yw are generated by the controller 14.

For example, when the IGBTs Q11 and Q15 are turned on, the positive side DC line L1 is connected to the output node 8a via the IGBT Q11, and the output node 8b is connected to the negative side DC line L2 via the IGBT Q15 to output the output node 8a. , 8b, a positive voltage is output.

When the IGBTs Q12 and Q14 are turned on, the positive side DC line L1 is connected to the output node 8b via the IGBTQ12, the output node 8a is connected to the negative side DC line L2 via the IGBTQ14, and the output node 8a. , 8b, a negative voltage is output.

Between the DC lines L1 and L2 by turning on and off each of the IGBTs Q11 to Q16 at predetermined timing by the gate signals Xu, Yu, Xv, Yv, Xw, and Yw, and adjusting the on time of each of the IGBTs Q11 to Q16. It is possible to convert the DC voltage of the above into a three-phase AC voltage.

Reactors 10a-10c have one terminals connected to output nodes 8a, 8b, 8c of inverter 8, and the other terminals connected to AC output terminals T2a, T2b, T2c, respectively. One electrodes of capacitors 11a, 11b and 11c are connected to the other terminals of reactors 10a to 10c, respectively, and the other electrodes thereof are both connected to neutral point NP.

Reactors 10a to 10c and capacitors 11a, 11b, and 11c form a low-pass filter, and pass three-phase AC power of commercial frequency from inverter 8 to AC output terminals T2a, T2b, and T2c to generate switching in inverter 8. Cut off frequency signals.

The current detector 9 detects the AC output current Io flowing through the reactor 10a and gives a signal Iof indicating the detected value to the control device 14. The instantaneous value of AC output voltage Vo appearing at the other terminal (node N2) of reactor 10a is detected by control device 14 (FIG. 1).

The voltage fluctuation rate of the three-phase AC voltage appearing at the AC output terminals T2a, T2b, T2c is smaller than the voltage fluctuation rate of the three-phase AC voltage from the commercial AC power supply 15. The voltage fluctuation rate of the AC voltage is represented by, for example, a fluctuation range of the AC voltage when the rated voltage is used as a reference (100%). The voltage fluctuation rate of the AC voltage Vi supplied from the commercial AC power supply 15 is ±10% with reference to the rated voltage. On the other hand, the voltage fluctuation rate of the AC voltage Vo output from the stabilized power supply device 1 is ±2%.

FIG. 3 is a block diagram showing a configuration of a portion related to control of converter 6 in control device 14 shown in FIG. In FIG. 3, the control device 14 includes a reference voltage generation circuit 21, a voltage detector 22, subtractors 23 and 25, an output voltage control circuit 24, an output current control circuit 26, and a gate control circuit 27.

The reference voltage generation circuit 21 generates a reference DC voltage Vr. The reference DC voltage Vr is a rated voltage of the voltage between the terminals of the capacitor 7 (that is, the DC voltage between the DC lines L1 and L2) Vdc. The voltage detector 22 detects the instantaneous value of the DC voltage Vdc of the capacitor 7 and outputs a signal Vdcf indicating the detected value. The subtractor 23 obtains a deviation ΔVdc between the reference DC voltage Vr and the output signal Vdcf of the voltage detector 22.

The output voltage control circuit 24 adds the value proportional to the deviation ΔVdc and the integrated value of the deviation ΔVdc to generate the current command value Iir. The subtractor 25 obtains a deviation ΔIi between the current command value Iir and the signal Iif from the current detector 3. The output current control circuit 26 adds a value proportional to the deviation ΔIi and an integrated value of the deviation ΔIi to generate a voltage command value Vir. The voltage command value Vir becomes a sine wave signal having a commercial frequency.

The gate control circuit 27 controls the gate signals Au, Bu, Av for controlling the IGBTs Q1 to Q6 of the converter 6 based on the voltage command value Vir, the output signal Iif of the current detector 3, and the deviation ΔVdc from the subtractor 23. , Bv, Aw, Bw are generated.

FIG. 4 is a circuit block diagram showing a main part of the gate control circuit 27. 4, the gate control circuit 27 includes a determiner 31, a frequency adjusting unit 32, an oscillator 33, a triangular wave generator 34, a comparator 35, a buffer 36, and an inverter 37.

The determiner 31 operates based on the output signal Iof of the current detector 9 (FIGS. 1 and 2 ), compares the output current Io of the inverter 8 (that is, the load current IL) with a predetermined value Ic, and compares them. A signal φ31 indicating the result is output. When Io>Ic, the signal φ31 is set to the “L” level, and the normal operation mode (second operation mode) is selected. When Io<Ic, the signal φ31 is set to the “H” level, and the power saving operation mode (first operation mode) is selected.

The frequency adjustment unit 32 controls the oscillation frequency of the oscillator 33 (that is, the frequency of the output clock signal φ33 of the oscillator 33) based on the output signal φ31 of the determiner 31 and the deviation ΔVdc from the subtractor 23 (FIG. 3). To do. The oscillator 33 is, for example, a voltage controlled oscillator. The oscillation frequency of the oscillator 33 (that is, the frequency of the output clock signal φ33) can be controlled.

When the output signal φ31 of the determiner 31 is at the “L” level (in the normal operation mode), the frequency adjusting unit 32 sets the frequency of the output clock signal φ33 of the oscillator 33 to be sufficiently higher than the commercial frequency (for example, 60 Hz). The frequency is set to a predetermined high frequency fH (for example, 20 KHz). In this case, the IGBTs Q1 to Q6 of the converter 6 are switched at a sufficiently high frequency fH, so that the response speed of the converter 6 is increased. Therefore, even if the load current IL is larger than the predetermined value Ic, the DC voltage Vdc can be set to the reference DC voltage Vr, and the deviation ΔVdc=Vr−Vdc from the subtractor 23 becomes zero.

Further, when the output signal φ31 of the determiner 31 is changed from the “L” level to the “H” level (when the normal operation mode is changed to the power saving operation mode), the frequency adjustment unit 32 outputs the oscillator 33 of the oscillator 33. The frequency of the output clock signal φ33 is gradually decreased from the frequency fH.

When the frequency of the clock signal φ33 is decreased, the switching frequencies of the IGBTs Q1 to Q6 of the converter 6 decrease and the response speed of the converter 6 decreases. Therefore, the response speed for changing the DC voltage Vdc to the reference DC voltage Vr decreases, and the deviation ΔVdc=Vr−Vdc from the subtractor 23 becomes a negative value.

When the deviation ΔVdc reaches the negative predetermined value VM, the frequency adjusting unit 32 stops the fall of the frequency of the output clock signal φ33 of the oscillator 33. In this case, the deviation ΔVdc becomes 0 after the elapse of a certain delay time. If the deviation ΔVdc is made lower than the predetermined negative value VM, the deviation ΔVdc cannot be made zero. Therefore, in the power saving operation mode, the frequency adjusting unit 32 adjusts the frequency of the clock signal φ33 to the lower limit value fL within the range in which the DC voltage Vdc can be the reference DC voltage Vr.

The triangular wave generator 34 outputs a triangular wave signal Cu having the same frequency as the output clock signal φ33 of the oscillator 33. The comparator 35 compares the voltage command value Vir from the output current control circuit 26 (FIG. 3) with the triangular wave signal Cu from the triangular wave generator 34 and outputs a gate signal Au indicating the comparison result. The buffer 36 supplies the gate signal Au to the converter 6. Inverter 37 inverts gate signal Au, generates gate signal Bu, and supplies it to converter 6.

The gate control circuit 27 generates the gate signals Av, Bv and the gate signals Aw, Bw in the same manner as the gate signals Au, Bu. However, the phases of the gate signals Au and Bu, the phases of the gate signals Av and Bv, and the phases of the gate signals Aw and Bw are shifted by 120 degrees.

5A, 5B, and 5C are time charts showing waveforms of the voltage command value Vir, the triangular wave signal Cu, and the gate signals Au and Bu shown in FIG. As shown in FIG. 5A, the voltage command value Vir is a sine wave signal having a commercial frequency. The frequency of the triangular wave signal Cu is higher than the frequency (commercial frequency) of the voltage command value Vir. The positive peak value of the triangular wave signal Cu is higher than the positive peak value of the voltage command value Vir. The negative peak value of the triangular wave signal Cu is lower than the negative peak value of the voltage command value Vir.

As shown in FIGS. 5A and 5B, when the level of the triangular wave signal Cu is higher than the voltage command value Vir, the gate signal Au becomes the “L” level, and the level of the triangular wave signal Cu is the voltage command value Vir. If lower than that, the gate signal Au becomes "H" level. The gate signal Au becomes a positive pulse signal train.

During a period in which the voltage command value Vir is positive, the pulse width of the gate signal Au increases as the voltage command value Vir increases. During the period in which the voltage command value Vir is negative, the pulse width of the gate signal Au decreases as the voltage command value Vir decreases. As shown in FIGS. 5B and 5C, the gate signal Bu becomes an inverted signal of the gate signal Au. Each of the gate signals Au and Bu is a PWM signal.

The waveforms of the gate signals Av, Bv and the gate signals Aw, Bw are similar to the waveforms of the gate signals Au, Bu. However, the phases of the gate signals Au and Bu, the phases of the gate signals Av and Bv, and the phases of the gate signals Aw and Bw are shifted by 120 degrees.

As can be seen from FIGS. 5A, 5B, and 5C, when the frequency of the triangular wave signal Cu is increased, the frequencies of the gate signals Au, Bu, Av, Bv, Aw, and Bw also increase, and the IGBTs Q1 to Q6 The switching frequency (number of times of turning on/off/second) becomes high. When the switching frequencies of the IGBTs Q1 to Q6 increase, the switching loss generated in the IGBTs Q1 to Q6 increases and the efficiency of the stabilized power supply device 1 decreases. However, when the switching frequencies of the IGBTs Q1 to Q6 are increased, the voltage fluctuation rate of the DC voltage Vdc can be reduced even when the load current IL is large. When the DC voltage Vdc becomes stable, the voltage fluctuation rate of the AC output voltage Vo decreases, and a high quality AC output voltage Vo can be obtained.

Conversely, when the frequency of the triangular wave signal Cu is lowered, the frequencies of the gate signals Au, Bu, Av, Bv, Aw, Bw are lowered, and the switching frequencies of the IGBTs Q1 to Q6 are lowered. When the switching frequencies of the IGBTs Q1 to Q6 decrease, the switching loss generated in the IGBTs Q1 to Q6 decreases and the efficiency of the stabilized power supply device 1 increases. However, when the switching frequencies of the IGBTs Q1 to Q6 decrease, the voltage fluctuation rate of the DC voltage Vdc increases when the load current IL is large. When the DC voltage Vdc fluctuates, the voltage fluctuation rate of the AC output voltage Vo increases and the waveform of the AC output voltage Vo deteriorates.

In the conventional stabilized power supply device, the frequency of the triangular wave signal Cu is fixed to a frequency fH (for example, 20 KHz) sufficiently higher than the commercial frequency (for example, 60 Hz), and the voltage fluctuation rate is suppressed to a small value (±2%). .. Therefore, although it is possible to drive the load 16 (for example, a computer) having a small allowable range for the voltage fluctuation rate, a comparatively large switching loss occurs in the IGBTs Q1 to Q6, and the efficiency of the stabilized power supply device decreases. doing.

However, when the load current IL is sufficiently small, or when the load 16 is in the standby state and does not consume current, the frequency of the triangular wave signal Cu is set to a frequency fL lower than the frequency fH (for example, 15 KHz). , IGBTs Q1 to Q6 can reduce the switching loss.

Therefore, in the first embodiment, it is possible to set the frequency of the triangular wave signal Cu to a relatively high frequency fH to reduce the voltage fluctuation rate and the AC output voltage Vo to the reference AC voltage Vr. A power saving operation mode is provided in which the frequency of the triangular wave signal Cu is set to the lower limit value fL within the range to reduce switching loss. When the output current Io of the inverter 8 is larger than the predetermined value Ic, the normal operation mode is selected, and when the output current Io of the inverter 8 is smaller than the predetermined value Ic, the power saving operation mode is selected.

Next, the usage method and operation of the stabilized power supply device 1 will be described. First, the case where AC power is supplied from the stabilized power supply device 1 to the load 16 and the output current Io (that is, the load current IL) is larger than the predetermined value Ic will be described. In this case, the electromagnetic contactors 2 and 12 are turned on. The three-phase AC voltage supplied from the commercial AC power supply 15 is converted into the DC voltage Vdc by the converter 6.

That is, in control device 14 (FIG. 3 ), reference voltage generation circuit 21 generates reference DC voltage Vr, and voltage detector 22 generates signal Vdcf indicating the detected value of DC voltage Vdc. The deviation ΔVdc between the reference DC voltage Vr and the signal Vdcf is generated by the subtractor 23, and the output voltage control circuit 24 generates the current command value Iir based on the deviation ΔVdc. A deviation ΔIi between the current command value Iir and the signal Iif from the current detector 3 (FIGS. 1 and 2) is generated by the subtractor 25, and the output current control circuit 26 generates the voltage command value Vir based on the deviation ΔIi. To be done.

In the gate control circuit 27 (FIG. 4), the output current Io is larger than the predetermined value Ic, so that the output signal φ31 of the determiner 31 is set to the “L” level and the normal operation mode is selected. When the signal φ31 is set to the “L” level, the frequency adjusting unit 32, the oscillator 33, and the triangular wave generator 34 generate the triangular wave signal Cu having a relatively high frequency fH. The voltage command value Vir and the triangular wave signal Cu are compared by the comparator 35, and the gate signals Au and Bu are generated by the buffer 36 and the inverter 37.

In the gate control circuit 27, the gate signals Av and Bv and the gate signals Aw and Bw are generated in the same manner as the gate signals Au and Bu. In converter 6 (FIG. 2), each of IGBTs Q1 to Q6 is turned on and off based on gate signals Au, Bu, Av, Bv, Aw, and Bw, and the three-phase AC voltage of the commercial frequency from commercial AC power supply 15 is converted into DC. It is converted into the voltage Vdc. This DC voltage Vdc is reconverted into a three-phase AC voltage of commercial frequency by the inverter 8 and supplied to the load 16. The load 16 is operated by the three-phase AC power supplied from the stabilized power supply device 1.

In this normal operation mode, each of the IGBTs Q1 to Q6 is turned on and off at a relatively high frequency fH, so that a stable DC voltage Vdc can be generated even when the load current IL is large, and the voltage fluctuation rate is small. It is possible to generate a quality AC voltage Vo. However, the switching loss generated in the IGBTs Q1 to Q6 increases, and the efficiency of the stabilized power supply device 1 decreases.

Next, for example, the case where the load 16 is in the standby state, AC power is not supplied from the stabilized power supply device 1 to the load 16, and the output current Io (that is, the load current IL) is smaller than the predetermined value Ic will be described. .. Even in this case, the electromagnetic contactors 2 and 12 are turned on. The three-phase AC voltage supplied from the commercial AC power supply 15 is converted into the DC voltage Vdc by the converter 6.

That is, in control device 14 (FIG. 3 ), reference voltage generation circuit 21 generates reference DC voltage Vr, and voltage detector 22 generates signal Vdcf indicating the detected value of DC voltage Vdc. The deviation ΔVdc between the reference DC voltage Vr and the signal Vdcf is generated by the subtractor 23, and the output voltage control circuit 24 generates the current command value Iir based on the deviation ΔVdc. A deviation ΔIi between the current command value Iir and the signal Iif from the current detector 3 (FIGS. 1 and 2) is generated by the subtractor 25, and the output current control circuit 26 generates the voltage command value Vir based on the deviation ΔIi. To be done.

In the gate control circuit 27 (FIG. 4), the output current Io is smaller than the predetermined value Ic, so the output signal φ31 of the determiner 31 is set to the “H” level, and the power saving operation mode is selected. When the signal φ31 is set to the “H” level, the frequency adjusting unit 32 gradually lowers the frequency of the output clock signal φ33 of the oscillator 33 from the frequency fH.

When the frequency of the clock signal φ33 decreases, the response speed for changing the DC voltage Vdc to the reference AC voltage Vr decreases, and the deviation ΔVdc from the subtractor 23 (FIG. 3) becomes a negative value. When the deviation ΔVo reaches the predetermined negative value VM, the frequency adjustment unit 32 stops the decrease of the oscillation frequency of the oscillator 33. As a result, the frequency of the clock signal φ33 is set to the lower limit value fL within the range in which the AC output voltage Vo can be set to the reference AC voltage Vr.

The triangular wave generator 34 generates a triangular wave signal Cu having the same frequency fL as the clock signal φ33. The voltage command value Vir and the triangular wave signal Cu are compared by the comparator 35, and the gate signals Au and Bu are generated by the buffer 36 and the inverter 37.

In the gate control circuit 27, the gate signals Av and Bv and the gate signals Aw and Bw are generated in the same manner as the gate signals Au and Bu. In converter 6 (FIG. 2), each of IGBTs Q1 to Q6 is turned on and off based on gate signals Au, Bu, Av, Bv, Aw, and Bw, and a three-phase AC voltage of commercial frequency from commercial AC power supply 15 is converted into DC. It is converted into the voltage Vdc. This DC voltage Vdc is reconverted into a three-phase AC voltage of commercial frequency by the inverter 8 and supplied to the load 16. The load 16 receives the three-phase AC voltage and stands by without consuming current.

In this power saving operation mode, each of the IGBTs Q1 to Q6 is turned on and off at a relatively low frequency fL, so that the switching loss generated in the IGBTs Q1 to Q6 is reduced and the efficiency of the stabilized power supply device 1 is increased.

As described above, in the first embodiment, when the load current IL is larger than the predetermined value Ic, the frequency of the triangular wave signal Cu is set to a relatively high frequency fH and the load current IL is smaller than the predetermined value Ic. In this case, the frequency of the triangular wave signal Cu is set to the lower limit value fL within the range in which the DC voltage Vdc can be the reference DC voltage Vr. Therefore, when the load 16 is in the standby state in which the current is not consumed, the switching loss generated in the IGBTs Q1 to Q6 of the converter 6 can be reduced and the efficiency of the stabilized power supply device 1 can be increased.

FIG. 6 is a circuit block diagram showing a modification of the first embodiment, which is compared with FIG. In FIG. 6, in this modification, the frequency adjusting unit 32 is replaced with the frequency adjusting unit 41. When the output signal φ31 of the determiner 31 is set to the “H” level, the frequency adjustment unit 41 monitors the deviation ΔVo from the subtractor 23 and lowers the frequency of the output clock signal φ33 of the oscillator 33 from fH. Let

When the frequency of the clock signal φ33 is decreased, the response speed for changing the DC voltage Vdc to the reference DC voltage Vr becomes slow, and the deviation ΔVdc=Vr−Vdcf from the subtractor 23 becomes a negative value. When the deviation ΔVdc reaches the negative predetermined value Vm, the frequency adjusting unit 41 gradually increases the frequency of the output clock signal φ33 of the oscillator 33, and when ΔVdc=0, increases the frequency of the clock signal φ33. Stop.

As a result, the frequency of the clock signal φ33 is set to the lower limit value fL within the range in which the DC voltage Vdc can be the reference DC voltage Vr. Other configurations and operations are the same as those in the first embodiment, and therefore description thereof will not be repeated. Also in this modification, the same effect as that of the first embodiment can be obtained.

FIG. 7 is a circuit block diagram showing another modification of the first embodiment, which is compared with FIG. In FIG. 7, in this modification, the frequency adjusting unit 32 is replaced with the frequency adjusting unit 42. When the output signal φ31 of the determiner 31 falls from the “H” level to the “L” level, the frequency adjusting unit 42 monitors the deviation ΔVdc from the subtractor 23 and outputs the output clock signal of the oscillator 33. The frequency of φ33 is increased from the lower limit value fL.

As the frequency of the clock signal φ33 is increased, the response speed for changing the DC voltage Vdc to the reference DC voltage Vr becomes faster, and the deviation ΔVdc=Vr-Vdcf from the subtractor 23 changes from a negative value toward 0. .. The frequency adjustment unit 41 stops the rise of the frequency of the clock signal φ33 when ΔVdc=0.

As a result, the frequency of the clock signal φ33 (that is, the frequency of the triangular wave signal Cu) is set to the lower limit value within the range in which the DC voltage Vdc can be the reference DC voltage Vr regardless of the magnitude of the load current IL. It Other configurations and operations are the same as those in the first embodiment, and therefore description thereof will not be repeated. Also in this modification, the same effect as that of the first embodiment can be obtained.

FIG. 8 is a circuit block diagram showing still another modification of the first embodiment, which is compared with FIG. In FIG. 8, in this modification, a switch 43 is added between the determiner 31 and the frequency adjusting unit 32. The first terminal 43a of the switch 43 receives the output signal φ31 of the determiner 31, the second terminal 43b of the switch 43 receives the signal SE generated by the operation unit 13 (FIG. 1), and the common terminal 43c of the switch 43 receives the frequency signal. It is connected to the adjusting unit 32. The user of the stabilized power supply device 1 operates the operation unit 13 to generate the signal φ43 and the signal SE.

The switch 43 is controlled by the signal φ43 generated by the operation unit 13. When the signal φ43 is at the “H” level, the first terminal 43a of the switch 43 and the common terminal 43c are electrically connected, and the output signal φ31 of the determiner 31 is given to the frequency adjusting unit 32 via the switch 43. In this case, this modification is the same as that of the first embodiment.

When the signal φ43 is at the “L” level, the second terminal 43b and the common terminal 43c of the switch 43 are electrically connected, and the signal SE from the operation unit 13 is given to the frequency adjustment unit 32 via the switch 43. When the signal SE is at “L” level, the frequency adjusting unit 32 sets the frequency of the output clock signal φ33 of the oscillator 33 to a relatively high frequency fH.

Further, when the signal SE is at the “H” level, the frequency adjusting unit 32 sets the frequency of the output clock signal φ33 of the oscillator 33 to the lower limit value fL within a range in which the DC voltage Vdc can be set to the reference DC voltage Vr. Set.

That is, when the signal SE is at the “H” level and the load current IL decreases and the deviation ΔVdc becomes a positive value, the frequency adjusting unit 32 monitors the deviation ΔVdc and adjusts the frequency of the triangular wave signal Cu. The value of the triangular wave signal Cu is adjusted to the lower limit value by stopping the decrease of the frequency of the triangular wave signal Cu when the deviation ΔVdc becomes the negative value VM.

Further, when the signal SE is at the “H” level and the load current IL increases and the deviation ΔVo becomes a negative value, the frequency adjusting unit 32 increases the frequency of the triangular wave signal Cu while monitoring the deviation ΔVo. Then, the value of the triangular wave signal Cu is adjusted to the lower limit value by stopping the increase of the frequency of the triangular wave signal Cu when the deviation ΔVdc becomes 0.

In this modification, the same effect as that of the first embodiment is obtained, and in addition, by operating the operation unit 13, the normal operation mode (φ43=L, SE=, which sets the frequency of the triangular wave signal Cu to a relatively high value fH). It is possible to select a desired operation mode from L) and a power saving operation mode (φ43=L, SE=H) that sets the frequency of the triangular wave signal Cu to the lower limit value fL. Instead of the frequency adjusting unit 32, the frequency adjusting unit 41 (FIG. 6) or the frequency adjusting unit 42 (FIG. 7) may be provided.

[Second Embodiment]
FIG. 9 is a block diagram showing a configuration of an uninterruptible power supply system according to Embodiment 2 of the present invention. In FIG. 9, this uninterruptible power supply system includes a stabilized power supply device 1, a plurality (two in FIG. 9) of uninterruptible power supply devices U1 and U2, and a plurality (two in this case) of batteries B1 and B2. ..

As shown in FIG. 1, the stabilized power supply device 1 includes an AC input terminal T1 and an AC output terminal T2. The AC input terminal T1 receives the AC voltage Vi from the bypass AC power supply 45. The bypass AC power supply 45 may be a private generator that outputs AC power or a commercial AC power supply.

As described in the first embodiment, stabilized power supply device 1 once converts AC voltage Vi received from bypass AC power supply 45 into DC voltage Vdc, and converts the DC voltage Vdc into AC voltage Vo of commercial frequency. Output to the AC output terminal T2. The voltage fluctuation rate (for example, ±2%) of AC output voltage Vo is smaller than the voltage fluctuation rate (for example, ±10%) of AC input voltage Vi.

Further, as described in the first embodiment, the stabilized power supply device 1 has a triangular wave signal within a range in which the DC voltage Vdc can be the reference DC voltage Vr when the output current Io is smaller than the predetermined value Ic. The frequency of Cu is adjusted to the lower limit value fL to reduce the loss generated in the converter 6. When the output current Io is larger than the predetermined value Ic, the stabilized power supply device 1 sets the frequency of the triangular wave signal Cu to a relatively high value fH and maintains the DC voltage Vdc at the reference DC voltage Vr stably.

Each of the uninterruptible power supply devices U1 and U2 includes an AC input terminal T11, a bypass input terminal T12, a battery terminal T13, and an AC output terminal T14. The AC input terminal T11 receives an AC voltage Vi having a commercial frequency from the commercial AC power supply 15. The bypass input terminal T12 receives the AC voltage Vo from the AC output terminal T2 of the stabilized power supply device 1.

The battery terminal T13 is connected to the corresponding battery B1 or B2. Each of batteries B1 and B2 stores DC power. The AC output terminal T14 is connected to the corresponding load LD1 or LD2. The loads LD1 and LD2 are driven by the AC power supplied from the uninterruptible power supply units U1 and U2, respectively.

The uninterruptible power supply U1 normally converts the AC power from the commercial AC power supply 15 into DC power and stores the DC power in the battery B1 at the commercial frequency while the AC power is being supplied from the commercial AC power supply 15. To the load LD1.

At this time, the uninterruptible power supply U1 once converts the AC voltage Vi received from the commercial AC power supply 15 into a DC voltage Vdc, converts the DC voltage Vdc into an AC voltage Vo having a commercial frequency, and outputs the AC voltage Vo to an AC output terminal T14. .. The voltage fluctuation rate (for example, ±2%) of AC output voltage Vo is smaller than the voltage fluctuation rate (for example, ±10%) of AC input voltage Vi.

Further, the uninterruptible power supply U1 converts the DC power of the battery B1 into AC power of commercial frequency and supplies it to the load LD1 at the time of power failure when the supply of AC power from the commercial AC power supply 15 is stopped. Therefore, even if a power failure occurs, the operation of the load LD1 can be continued while the DC power is stored in the battery B1.

Further, the uninterruptible power supply U1 supplies the AC power from the stabilized power supply 1 to the load LD1 when the built-in inverter fails. The uninterruptible power supply U2 is also the same as the uninterruptible power supply U1.

When the inverters of the uninterruptible power supply units U1 and U2 are not in failure, the regulated power supply unit 1 does not supply power to the loads LD1 and LD2. Therefore, the output current Io of the stabilized power supply unit 1 is the predetermined value Ic. Smaller than. In this case, converter 6 of stabilized power supply device 1 is driven at the frequency of lower limit value fL, and the loss generated in converter 6 is reduced.

When the inverter of the uninterruptible power supply U1 (or U2) fails, AC power is supplied from the stabilized power supply 1 to the load LD1 (or LD2), so the output current Io of the stabilized power supply 1 is a predetermined value. It becomes larger than Ic. In this case, converter 6 of stabilized power supply device 1 is driven at a relatively high frequency fH, and AC voltage Vo having a small voltage fluctuation rate is supplied to load LD1 (or LD2).

FIG. 10 is a circuit block diagram showing the configuration of the uninterruptible power supply U1. The uninterruptible power supply U1 is for converting the three-phase AC power from the commercial AC power supply 15 into DC power once, converting the DC power into three-phase AC power, and supplying it to the load LD1. In FIG. 10, for simplification of the drawing and description, only a circuit of a portion corresponding to one phase (for example, U phase) of the three phases (U phase, V phase, W phase) is shown.

In FIG. 10, the uninterruptible power supply U1 includes an AC input terminal T11, a bypass input terminal T12, a battery terminal T13, and an AC output terminal T14. The AC input terminal T11 receives AC power of commercial frequency from the commercial AC power supply 15. The bypass input terminal T12 receives AC power of commercial frequency from the stabilized power supply device 1.

The battery terminal T13 is connected to the battery (power storage device) B1. The battery B1 stores DC power. A capacitor may be connected instead of the battery B1. The AC output terminal T14 is connected to the load LD1. The load LD1 is driven by AC power.

The uninterruptible power supply U1 further includes electromagnetic contactors 51, 57, 63, 65, current detectors 52, 60, capacitors 53, 58, 62, reactors 54, 61, converter 55, bidirectional chopper 56, inverter 59. , A semiconductor switch 64, an operation unit 66, and a control device 67.

The electromagnetic contactor 51 and the reactor 54 are connected in series between the AC input terminal T11 and the input node of the converter 55. The capacitor 53 is connected to the node N11 between the electromagnetic contactor 51 and the reactor 54. The electromagnetic contactor 51 is turned on when the uninterruptible power supply U1 is used, and is turned off, for example, during maintenance of the uninterruptible power supply U1.

The instantaneous value of the AC input voltage Vi appearing at the node N11 is detected by the control device 67. Whether or not a power failure has occurred is determined based on the instantaneous value of the AC input voltage Vi. The current detector 52 detects the AC input current Ii flowing through the node N11 and gives a signal Iif indicating the detected value to the control device 67.

The capacitor 53 and the reactor 54 constitute a low-pass filter, and allow the commercial AC power supply 15 to pass the AC power of the commercial frequency to the converter 55 so that the signal of the switching frequency generated in the converter 55 passes to the commercial AC power supply 15. Prevent.

The converter 55 is controlled by the control device 67, and normally converts the AC power into the DC power and outputs the DC power to the DC line L11 when the AC power is supplied from the commercial AC power supply 15. During a power outage in which the supply of AC power from the commercial AC power supply 15 is stopped, the operation of converter 55 is stopped.

Converter 55 has the same configuration as converter 6 (FIG. 2) and includes 6 sets of IGBTs and diodes. The output voltage of the converter 55 can be controlled to a desired value. The capacitor 53, the reactor 54, and the converter 55 form a forward converter.

The capacitor 58 is connected to the DC line L11 and smoothes the voltage of the DC line L11. The instantaneous value of the DC voltage Vdc appearing on the DC line L11 is detected by the control device 67. DC line L11 is connected to the high voltage side node of bidirectional chopper 56, and the low voltage side node of bidirectional chopper 56 is connected to battery terminal T13 via electromagnetic contactor 57.

The electromagnetic contactor 57 is turned on when the uninterruptible power supply U1 is used, and is turned off, for example, during maintenance of the uninterruptible power supply U1 and the battery B1. The instantaneous value of the inter-terminal voltage Vb of the battery B1 appearing at the battery terminal T13 is detected by the control device 67.

The bidirectional chopper 56 is controlled by the control device 67, and stores the DC power generated by the converter 55 in the battery B1 during the normal time when the AC power is supplied from the commercial AC power supply 15, and stores the AC power from the commercial AC power supply 15 in the normal condition. At the time of a power failure in which the supply of electric power is stopped, the DC power of the battery B1 is supplied to the inverter 59 via the DC line L11.

When storing the DC power in the battery B1, the bidirectional chopper 56 steps down the DC voltage Vdc of the DC line L11 and supplies it to the battery B1. When supplying the DC power of the battery B1 to the inverter 59, the bidirectional chopper 56 boosts the terminal voltage Vb of the battery B1 and outputs it to the DC line L11. The DC line L11 is connected to the input node of the inverter 59.

The inverter 59 is controlled by the controller 67 and converts the DC power supplied from the converter 55 or the bidirectional chopper 56 via the DC line L11 into AC power of commercial frequency and outputs the AC power. That is, the inverter 59 normally converts the DC power supplied from the converter 55 via the DC line L11 into AC power, and converts the DC power supplied from the battery B1 via the bidirectional chopper 56 into AC power during a power failure. Convert to electricity. The output voltage of the inverter 59 can be controlled to a desired value. Inverter 59 has the same configuration as inverter 8 (FIG. 2) and includes 6 sets of IGBTs and diodes.

The output node of the inverter 59 is connected to one terminal of the reactor 61, and the other terminal (node N12) of the reactor 61 is connected to the AC output terminal T4 via the electromagnetic contactor 63. The capacitor 62 is connected to the node N12.

The current detector 60 detects an instantaneous value of the output current Io of the inverter 59 and gives a signal Iof indicating the detected value to the control device 67. The instantaneous value of AC output voltage Vo appearing at node N12 is detected by control device 67.

The reactor 61 and the capacitor 62 form a low pass filter, pass the AC power of the commercial frequency generated by the inverter 59 to the AC output terminal T14, and the signal of the switching frequency generated by the inverter 59 is output to the AC output terminal T14. Prevent passing through. The inverter 59, the reactor 61, and the capacitor 62 form an inverse converter.

The electromagnetic contactor 63 is controlled by the control device 67, is turned on in the inverter power supply mode for supplying the AC power generated by the inverter 59 to the load LD1, and is a bypass for supplying the AC power from the stabilized power supply device 1 to the load LD1. It is turned off in the power supply mode.

The semiconductor switch 64 includes a thyristor and is connected between the bypass input terminal T12 and the AC output terminal T14. The electromagnetic contactor 65 is connected in parallel to the semiconductor switch 64. The semiconductor switch 64 is controlled by the control device 67, is normally turned off, and is instantly turned on when the inverter 59 fails, and supplies the AC power from the stabilized power supply device 1 to the load LD1. The semiconductor switch 64 is turned off after a predetermined time has elapsed since it was turned on.

The electromagnetic contactor 65 is turned off in the inverter power supply mode in which the AC power generated by the inverter 59 is supplied to the load LD1, and is turned on in the bypass power supply mode in which the AC power from the stabilized power supply device 1 is supplied to the load LD1.

Further, the electromagnetic contactor 65 is turned on when the inverter 59 fails, and supplies the AC power from the stabilized power supply device 1 to the load LD1. That is, when the inverter 59 fails, the semiconductor switch 64 is instantly turned on for a predetermined time and the electromagnetic contactor 65 is turned on. This is to prevent the semiconductor switch 64 from being overheated and damaged.

The operation unit 66 includes a plurality of buttons operated by the user of the uninterruptible power supply U1, an image display unit that displays various types of information, and the like. By operating the operation unit 66, the user can turn on and off the power of the uninterruptible power supply U1, and select either one of the bypass power supply mode and the inverter power supply mode. There is.

The control device 67 determines the entire uninterruptible power supply U1 based on the signal from the operation unit 66, the AC input voltage Vi, the AC input current Ii, the DC voltage Vdc, the battery voltage Vb, the AC output current Io, and the AC output voltage Vo. To control. That is, control device 67 detects whether or not a power failure has occurred based on the detected value of AC input voltage Vi, and controls converter 55 and inverter 59 in synchronization with the phase of AC input voltage Vi.

Further, the control device 67 controls the converter 55 so that the DC voltage Vdc becomes the reference DC voltage Vr during the normal time when the AC power is supplied from the commercial AC power supply 15, and supplies the AC power from the commercial AC power supply 15. When there is a power outage, the operation of the converter 55 is stopped.

Further, control device 67 normally controls bidirectional chopper 56 so that battery voltage Vb becomes reference battery voltage Vbr, and during power failure, bidirectional chopper 56 so that DC voltage Vdc becomes reference DC voltage Vr. To control. Further, the control device 67 controls the inverter 59 so that the AC output voltage Vo becomes the reference AC voltage Vor.

Next, the operation of the uninterruptible power supply U1 will be described. It is assumed that the user of the uninterruptible power supply U1 operates the operation unit 66 to select the inverter power supply mode. When the inverter power supply mode is selected during the normal time when the AC power is supplied from the commercial AC power supply 15, the semiconductor switch 64 and the electromagnetic contactor 65 are turned off and the electromagnetic contactors 51, 57, 63 are turned on.

The AC power supplied from the commercial AC power supply 15 is converted into DC power by the converter 55. The DC power generated by the converter 55 is stored in the battery B1 by the bidirectional chopper 56, converted into AC power of commercial frequency by the inverter 59, and supplied to the load LD1.

When the supply of the AC power from the commercial AC power supply 15 is stopped, that is, when a power failure occurs, the operation of the converter 55 is stopped, and the DC power of the battery B1 is supplied to the inverter 59 by the bidirectional chopper 56. The inverter 59 converts the DC power from the bidirectional chopper 56 into AC power of commercial frequency and supplies it to the load LD1. Therefore, the operation of the load LD1 can be continued while the DC power is stored in the battery B1.

As described above, when the inverter 59 is not in failure in the inverter power supply mode, power is not supplied from the stabilized power supply device 1 to the load LD1, so that the output current Io of the stabilized power supply device 1 is about 0A. , Smaller than the predetermined value Ic. Therefore, the converter 6 of the stabilized power supply device 1 is driven at the lower limit frequency fL, and the loss generated in the converter 6 is suppressed to be small.

When the inverter 59 fails in the inverter power feeding mode, the semiconductor switch 64 is instantly turned on, the electromagnetic contactor 63 is turned off, and the electromagnetic contactor 65 is turned on. As a result, the AC power from the stabilized power supply device 1 is supplied to the load LD1 via the semiconductor switch 64 and the electromagnetic contactor 65, and the operation of the load LD1 is continued. The semiconductor switch 64 is turned off after a certain time, and the semiconductor switch 64 is prevented from being overheated and damaged.

In this case, since the AC power is supplied from the stabilized power supply device 1 to the load LD1, the output current Io of the stabilized power supply device 1 becomes larger than the predetermined value Ic. Therefore, the converter 6 of the stabilized power supply device 1 is driven at a relatively high frequency fH, and the AC voltage Vo having a small voltage fluctuation rate is supplied to the load LD1.

Further, when the user of the uninterruptible power supply U1 operates the operation unit 66 to select the bypass power supply mode, the situation is the same as when the inverter 59 fails in the inverter power supply mode. That is, the electromagnetic contactor 63 and the semiconductor switch 64 are turned off and the electromagnetic contactor 65 is turned on, and the stabilized power supply device 1 supplies AC power to the load LD1 via the electromagnetic contactor 65. At this time, since the output current Io of the stabilized power supply device 1 becomes larger than the predetermined value Ic, the converter 6 of the stabilized power supply device 1 is driven at a relatively high frequency fH, and the AC voltage Vo having a small voltage fluctuation rate is loaded. It is supplied to LD1.

Uninterruptible power supply U2 has the same configuration and operation as uninterruptible power supply U1, and therefore description thereof will not be repeated. Also in the second embodiment, the same effect as in the first embodiment can be obtained.

[Third Embodiment]
11 is a block diagram showing a configuration of an uninterruptible power supply system according to a third embodiment of the present invention, and is a diagram to be compared with FIG. 9. Referring to FIG. 11, the uninterruptible power supply system differs from the uninterruptible power supply system of FIG. 9 in that stabilized power supply device 1 is replaced by uninterruptible power supply device U0 and battery B0.

The uninterruptible power supply U0 has the functions of both the stabilized power supply 1 and the uninterruptible power supply U1. That is, the uninterruptible power supply U0 includes an AC input terminal T11, a bypass input terminal T12, a battery terminal T13, and an AC output terminal T14. The AC input terminal T11 receives an AC voltage Vi having a commercial frequency from the commercial AC power supply 15. The bypass input terminal T12 receives the AC voltage Vi of the commercial frequency from the bypass AC power supply 45. The battery terminal T13 is connected to the battery B0. The battery B0 stores DC power. The AC output terminal T14 is connected to the bypass input terminals T12 of the uninterruptible power supply units U1 and U2.

The uninterruptible power supply unit U0, during normal operation when AC power is supplied from the commercial AC power supply 15, temporarily converts the AC power from the commercial AC power supply 15 into DC power, stores the DC power in the battery B0, and stores the commercial frequency. The AC power is converted to AC power and is supplied to the bypass input terminals T12 of the uninterruptible power supply units U1 and U2.

At this time, the uninterruptible power supply U0 once converts the AC voltage Vi received from the commercial AC power supply 15 into the DC voltage Vdc, converts the DC voltage Vdc into the AC voltage Vo having the commercial frequency, and outputs the AC voltage Vo to the AC output terminal T14. .. The voltage fluctuation rate (for example, ±2%) of AC output voltage Vo is smaller than the voltage fluctuation rate (for example, ±10%) of AC input voltage Vi.

Further, the uninterruptible power supply U0 converts the DC power of the battery B0 into AC power of commercial frequency and outputs the AC power to the AC output terminal T14 during a power failure in which the supply of AC power from the commercial AC power supply 15 is stopped. Therefore, for example, even when a power failure occurs when the uninterruptible power supply U1 is in the bypass power supply mode, the operation of the load LD1 can be continued while the DC power is stored in the battery B0.

Further, the uninterruptible power supply U0 supplies the AC power from the bypass AC power supply 45 to the bypass input terminals T12 of the uninterruptible power supplies U1 and U2 when the built-in inverter fails.

Further, the uninterruptible power supply unit U0, like the stabilized power supply unit 1, when the output current Io is smaller than the predetermined value Ic, the triangular wave signal Cu in the range in which the DC voltage Vdc can be set to the reference DC voltage Vr. The frequency of is adjusted to the lower limit value fL to reduce the loss generated in the converter 55. When the output current Io is larger than the predetermined value Ic, the uninterruptible power supply U0 sets the frequency of the triangular wave signal Cu to a relatively high value fH and maintains the DC voltage Vdc at the reference DC voltage Vr stably.

If the inverter 59 of the uninterruptible power supply units U1 and U2 has not failed, power is not supplied from the uninterruptible power supply unit U0 to the loads LD1 and LD2, so the output current Io of the uninterruptible power supply unit U0 is a predetermined value. It is smaller than Ic. In this case, converter 55 of uninterruptible power supply U0 is driven at the frequency of lower limit value fL, and the loss generated in converter 55 is reduced.

When the inverter of the uninterruptible power supply U1 (or U2) fails, AC power is supplied from the uninterruptible power supply U0 to the load LD1 (or LD2), so the output current Io of the uninterruptible power supply U0 is a predetermined value. It becomes larger than Ic. In this case, converter 55 of uninterruptible power supply U0 is driven at a relatively high frequency fH, and AC voltage Vo having a small voltage fluctuation rate is supplied to load LD1 (or LD2).

FIG. 12 is a circuit block diagram showing the configuration of the uninterruptible power supply U0, and is a diagram to be compared with FIG. Referring to FIG. 12, uninterruptible power supply U0 differs from uninterruptible power supply U1 of FIG. 10 in that control device 67 is replaced by control device 70.

The control device 70 performs the same operation as the control device 67, and when the output current Io is smaller than the predetermined value Ic, the frequency of the triangular wave signal Cu is within a range in which the DC voltage Vdc can be set to the reference DC voltage Vr. Is adjusted to the lower limit value fL to reduce the loss generated in the converter 55. Further, when the output current Io is larger than the predetermined value Ic, the control device 70 sets the frequency of the triangular wave signal Cu to a relatively high value fH and stably maintains the DC voltage Vdc at the reference DC voltage Vr.

Other configurations and operations are the same as those in the second embodiment, and therefore description thereof will not be repeated. Also in the third embodiment, the same effect as that of the first embodiment can be obtained.

It goes without saying that the above-described first, second, third and various modifications may be combined as appropriate.

The embodiments disclosed this time are to be considered as illustrative in all points and not restrictive. The present invention is shown not by the above description but by the claims, and is intended to include meanings equivalent to the claims and all modifications within the scope.

1 stabilized power supply device, T1, T1a, T1b, T1c, T11 AC input terminal, T2, T2a, T2b, T2c, T14 AC output terminal, T12 bypass input terminal, T13 battery terminal, 2, 12, 51, 57, 63 , 65 electromagnetic contactor, 3, 9, 52, 60 current detector, 4, 4a, 4b, 4c, 7, 11, 11a, 11b, 11c, 53, 58, 62 capacitor, 5, 5a, 5b, 5c, 10,10a,10b,10c,54,61 reactor, 6,55 converter, 8,37,59 inverter, 13,66 operation unit, 14,67,70 control device, 15 commercial AC power supply, 16, LD1, LD2 load , D1 to D6, D11 to D16 diodes, Q1 to Q6, Q11 to Q16 IGBTs, 21 reference voltage generation circuit, 22 voltage detector, 23, 25 subtractor, 24 output voltage control circuit, 26 output current control circuit, 27 gate Control circuit, 31 judging device, 32, 41, 42 frequency adjusting part, 33 oscillator, 34 triangular wave generator, 35 comparator, 36 buffer, 43 switch, U0, U1, U2 uninterruptible power supply device, B0, B1, B2 battery , 45 bypass AC power supply, 56 bidirectional chopper, 64 semiconductor switch.

Claims (13)

A forward converter including a plurality of switching elements, for converting AC power of commercial frequency into DC power,
A first control unit that outputs a sine wave signal of the commercial frequency so that a deviation between a reference DC voltage and an output DC voltage of the forward converter is eliminated;
A second control unit that compares the levels of the sine wave signal and a triangular wave signal having a frequency higher than the commercial frequency, and generates a control signal for controlling the plurality of switching elements based on the comparison result. ,
A frequency adjusting unit for adjusting the frequency of the triangular wave signal to a lower limit value within a range capable of eliminating the deviation ,
The frequency adjusting unit increases the frequency of the triangular wave signal when the deviation reaches a negative predetermined value while decreasing the frequency of the triangular wave signal, and when the deviation becomes zero. A power supply device that adjusts the frequency of the triangular wave signal to the lower limit value by stopping the increase of the frequency of the triangular wave signal . The frequency adjusting unit adjusts the frequency of the triangular wave signal to the lower limit value within a range in which the deviation can be eliminated, and the triangular wave to a predetermined value larger than the lower limit value. The power supply device according to claim 1, which executes a selected one of the second operation mode for setting the frequency of the signal. Furthermore, an inverse converter that converts the DC power generated by the forward converter into AC power of the commercial frequency and supplies the AC power to a load,
A current detector for detecting the load current,
When the detected value of the current detector is smaller than a predetermined current value, the first operation mode is selected, and when the detected value of the current detector is larger than the predetermined current value, the first operation mode is selected. The power supply device according to claim 2, further comprising: a selection unit that selects a second operation mode. The power supply device according to claim 2, further comprising a selection unit that selects a desired operation mode from the first and second operation modes. Furthermore, an inverse converter that converts direct-current power to alternating-current power of the commercial frequency and supplies it to a load is provided,
The forward converter converts AC power supplied from a commercial AC power supply to DC power,
During normal time when AC power is being supplied from the commercial AC power supply, DC power generated by the forward converter is supplied to the inverse converter and stored in a power storage device,
The power supply device according to claim 1, wherein the DC power of the power storage device is supplied to the inverse converter during a power failure in which the supply of AC power from the commercial AC power supply is stopped. Further, receiving the alternating-current power of the commercial frequency generated by the inverse converter and the alternating-current power of the commercial frequency supplied from a bypass alternating-current power supply, and if the inverse converter is normal, it is output from the inverse converter. The power supply device according to claim 5, further comprising a switching circuit that applies AC power to the load, and supplies the AC power from the bypass AC power supply to the load when the inverse converter fails. Comprises first and second power supplies,
The first power supply device is
A first forward converter for converting AC power of commercial frequency from a commercial AC power supply into DC power;
A first inverse converter for converting DC power into AC power of the commercial frequency,
During the normal time when the AC power is supplied from the commercial AC power supply, the DC power generated by the first forward converter is supplied to the first inverse converter and stored in the first power storage device. The
During a power failure in which the supply of AC power from the commercial AC power supply is stopped, the DC power of the first power storage device is supplied to the first inverse converter,
The second power supply device is
A second forward converter having a plurality of switching elements and converting the AC power of the commercial frequency into DC power;
A second inverse converter that converts the DC power generated by the second forward converter into AC power of the commercial frequency;
A first control unit that outputs a sine wave signal of the commercial frequency so that there is no deviation between the reference DC voltage and the output DC voltage of the second forward converter;
A second control unit that compares the levels of the sine wave signal and a triangular wave signal having a frequency higher than the commercial frequency, and generates a control signal for controlling the plurality of switching elements based on the comparison result. ,
A frequency adjusting unit for adjusting the frequency of the triangular wave signal to a lower limit value within a range capable of eliminating the deviation,
The frequency adjusting unit increases the frequency of the triangular wave signal when the deviation reaches a negative predetermined value while decreasing the frequency of the triangular wave signal, and when the deviation becomes zero. By stopping the rise of the frequency of the triangular wave signal, it is configured to adjust the frequency of the triangular wave signal to the lower limit value,
When the first power supply device is normal, AC power is supplied from the first inverse converter to the load, and supply of AC power from the second inverse converter to the load is stopped. ,
When the first power supply device fails, the supply of the AC power from the first inverse converter to the load is stopped and the AC power is supplied from the second inverse converter to the load. Power supply system. The frequency adjusting unit adjusts the frequency of the triangular wave signal to a lower limit within a range in which the deviation can be eliminated, and the triangular wave signal to a predetermined value larger than the lower limit. The power supply system according to claim 7, which executes a selected one of the second operation mode for setting the frequency of the selected one. The second power supply device is
Furthermore, a current detector for detecting the output current of the second inverse converter,
When the detected value of the current detector is smaller than a predetermined current value, the first operation mode is selected, and when the detected value of the current detector is larger than the predetermined current value, the first operation mode is selected. The power supply system according to claim 8, further comprising: a selection unit that selects a second operation mode. The power supply system according to claim 8, wherein the second power supply device further includes a selection unit that selects a desired operation mode from the first and second operation modes. The power supply system according to claim 7, wherein the second forward converter converts AC power of the commercial frequency from a bypass AC power supply into DC power. The second forward converter converts AC power from the commercial AC power supply into DC power,
During the normal time when the AC power is supplied from the commercial AC power source, the DC power generated by the second forward converter is supplied to the second inverse converter and stored in the second power storage device. The
The power supply system according to claim 7, wherein the DC power of the second power storage device is supplied to the second inverse converter during a power failure in which the supply of the AC power from the commercial AC power supply is stopped. The first power supply device further includes a first input node that receives the commercial-frequency AC power generated by the first inverse converter, and the commercial-frequency AC power from the second power supply device. Receiving a second input node and a first output node connected to the load, the first input node being the first output node when the first inverse converter is normal. And a first switching circuit connecting the second input node to the first output node if the first inverse converter fails,
The second power supply device further receives a third input node that receives the AC power of the commercial frequency generated by the second inverse converter, and a third input node that receives the AC power of the commercial frequency from a bypass AC power supply. 4 input nodes and a second output node connected to the second input node, the third input node being connected to the second output when the second inverse converter is normal. 13. The power supply system according to claim 12, further comprising a second switching circuit connected to the node and connecting the fourth input node to the second output node if the second inverse converter fails.

Images