JP6379553B2 - Conversion device - Google Patents

Description

  The present invention relates to a conversion device that converts direct current into alternating current.

For example, FIG. 20 is an example of a circuit diagram (excluding the control unit) showing a conventional converter (power conditioner) 100 (see, for example, Patent Document 1 (FIG. 1)). The converter 100 can convert the direct current output of the photovoltaic power generation panel 2 into an alternating current output and output it to the commercial power system 3.
In the figure, a booster circuit 10 includes a DC reactor 15, a diode 16, and a switching element Qb made of, for example, an FET (Field Effect Transistor), and constitutes a boost chopper circuit. A small-capacitance capacitor 36 for smoothing is provided on the input side of the booster circuit 10.

The output of the booster circuit 10 is supplied to the DC bus _{L B.} The DC bus L _B, electrolytic capacitor 29 of a large capacity for smoothing is connected.
The inverter circuit 11 includes switching elements Q1 to Q4 made of, for example, FETs. The high-frequency switching operation of the switching elements Q1 to Q4, the inverter circuit 11 converts the DC voltage of the DC bus L _B into an AC voltage, and outputs the AC power.

  Further, the conversion device 1 includes a filter circuit 21 between the inverter circuit 11 and the commercial power system 3. The filter circuit 21 includes two AC reactors 22 and a capacitor 23 provided at the subsequent stage of the AC reactor 22. The filter circuit 21 has a function of removing high-frequency components contained in the AC power output from the inverter circuit 11. The AC power from which the high frequency component has been removed by the filter circuit 21 is supplied to the commercial power system 3.

  FIG. 21 is a graph showing an example of a current flowing through the electrolytic capacitor 29 during the operation of the conversion device 100. The horizontal axis represents time [seconds] and the vertical axis represents current [A]. The fine vertical stripes are actually high-frequency components due to high-frequency switching, but are represented in this way for convenience of illustration. The waveform envelope fluctuates at a period of 0.01 seconds, that is, at a frequency twice the commercial frequency of 50 Hz. Since such a current containing a large amount of high-frequency components flows through the electrolytic capacitor 29, if the wiring pattern connecting the electrolytic capacitor 29 and the inverter circuit 11 is not made as short as possible, ringing is caused by the parasitic inductance of the wiring pattern and a sudden current change caused by switching. Occurs and becomes a noise radiation source. Therefore, the electrolytic capacitor 29 is mounted on a single substrate in close proximity to the inverter circuit 11 and the booster circuit 10.

  Now, although the lifetime of the photovoltaic power generation panel 2 is generally said to be 20 years, the conversion device 100 is about 10 years. Therefore, if it exceeds 10 years, the inspection and replacement of the conversion device 100 are required. Among the component parts of the converter 100, the electrolytic capacitor 29 has the shortest useful life, which is the cause of the lifetime of about 10 years.

JP 2009-165275 A

For example, when it is necessary to replace the electrolytic capacitor 29 after about 10 years, if only the electrolytic capacitor 29 mounted on the board is replaced, it is difficult to keep the replacement work quality constant. Accompanying sex. If it cannot be kept constant, the reliability of the conversion device 100 after replacement may be reduced. Therefore, it is common to replace the substrate or the conversion device with priority given to not impairing reliability and work efficiency.
However, components other than the electrolytic capacitor 29 usually still have a useful life. Therefore, it is problematic from the viewpoint of resource saving and cost to replace all the substrates or conversion devices including the parts that can still be used.

  In view of such conventional problems, an object of the present invention is to facilitate replacement of only an electrolytic capacitor in a converter such as a power conditioner.

The present disclosure includes the following inventions. However, the present invention is defined by the claims.
The present invention according to an expression is a direct-to-alternating conversion device including a booster circuit, a DC bus, and an inverter circuit in order as viewed from the input side, and an absolute value of an AC voltage target value to be output. However, when the input voltage exceeds the input DC voltage, the booster circuit is boosted to generate an absolute value of the voltage target value and the inverter circuit is in a state of performing only necessary polarity inversion, and the voltage target value When the absolute value of the voltage is lower than the input DC voltage, the boosting operation of the boosting circuit is stopped and the inverter circuit is operated to generate the voltage target value, and the smoothing connected to the DC bus A small-capacitance capacitor, and an electrolytic capacitor that is on the input side of the booster circuit and is provided independently on an independent substrate and has a larger capacity than the small-capacitance capacitor.

  ADVANTAGE OF THE INVENTION According to this invention, in converters, such as a power conditioner, replacement | exchange of only an electrolytic capacitor can be made easy.

It is a block diagram which shows an example of the system provided with the conversion apparatus from direct current | flow to alternating current. It is a figure which shows the internal circuit of the converter in FIG. 1 in detail. It is a block diagram of a control part. It is a graph which shows an example of the result of having calculated | required the time-dependent change of a DC input voltage detection value and a booster circuit current detection value by simulation. It is a figure which shows the aspect at the time of averaging a DC input voltage detection value which an averaging process part performs. It is a control block diagram for demonstrating the control processing by a control processing part. It is a flowchart which shows the control processing of a booster circuit and an inverter circuit. (A) is a graph which shows an example of the result of having calculated | required the boost circuit current command value calculated | required in feedback control by the control process part, and the boost circuit current detection value when controlled according to this, by simulation, (b) FIG. 5 is a graph showing an example of a result obtained by simulation of a booster circuit voltage target value obtained by a control processing unit in feedback control and a booster circuit voltage detection value when controlled according to the booster circuit voltage. It is a figure which shows an example of an inverter output voltage command value. (A) is a graph comparing a booster circuit carrier wave and a booster circuit reference wave, and (b) is a drive waveform for driving the switching element Qb generated by the booster circuit control unit. (A) is a graph comparing the inverter circuit carrier and the inverter circuit reference wave, (b) is a drive waveform for driving the switching element Q1 generated by the inverter circuit controller, and (c) is It is a drive waveform for driving the switching element Q3 which the inverter circuit control part produced | generated. It is the figure which showed an example of the current waveform of the alternating current power which a converter outputs with an example of a reference wave and the drive waveform of each switching element. (A) is the graph which showed the AC waveform output from the inverter circuit, the system phase power supply, and the both-ends voltage of AC reactor, each voltage waveform, (b) showed the current waveform which flows into AC reactor. It is a graph. It is a wave form diagram which shows simply the characteristic of operation | movement of a converter. It is a wave form diagram which shows simply the characteristic of operation | movement of a converter. It is a graph which shows an example of the electric current which flows into an electrolytic capacitor, a horizontal axis represents time [second], and the vertical axis | shaft represents electric current [A]. FIG. 3 is a circuit diagram showing the main part of the conversion device of FIG. 2 from the viewpoint of a “substrate” (however, details are omitted). It is a perspective view which shows the housing | casing of the converter as a power conditioner. It is a perspective view which shows the other example about the housing | casing of the converter as a power conditioner. It is an example of the circuit diagram (however, a control part is excluded) which shows the conventional converter (power conditioner). FIG. 21 is a graph showing an example of a current flowing through an electrolytic capacitor during the operation of the conversion device of FIG. 20, where the horizontal axis represents time [seconds] and the vertical axis represents current [A].

[Summary of Embodiment]
The gist of the embodiment of the present invention includes at least the following.

  (1) This is a converter from direct current to alternating current that includes a booster circuit, a DC bus, and an inverter circuit in order from the input side, and the absolute value of the target voltage value of the alternating current to be output is When the input voltage exceeds the input DC voltage, the booster circuit is boosted to generate an absolute value of the voltage target value, and the inverter circuit performs only necessary polarity reversal. When the absolute value is lower than the input DC voltage, the boosting operation of the booster circuit is stopped and the inverter circuit is operated to generate the voltage target value, and the smoothing connected to the DC bus And a small-capacitance capacitor provided on the input side of the booster circuit, provided independently on an independent substrate, and having a larger capacity than the small-capacitance capacitor.

  In the converter configured as described in (1) above, the booster circuit and the inverter circuit alternately perform high-frequency switching, and as a whole, modulation for high-frequency switching is minimized. Therefore, it is not necessary to set the DC bus to a constant voltage. Therefore, the capacitor connected to the DC bus may be a small-capacitance capacitor that can smooth high-frequency switching. As a result, the large-capacity electrolytic capacitor can be provided not on the DC bus but on the input side of the booster circuit, and can be provided independently on an independent substrate. Thereby, the structure which can replace | exchange easily only the electrolytic capacitor with a comparatively short lifetime is realizable.

(2) In (1), a part of the housing of the conversion device may be opened so that the electrolytic capacitor can be attached and detached together with the substrate.
In this case, since only the electrolytic capacitor can be replaced with the substrate by attaching and detaching, the replacement work is easy and the cost required for replacement is reduced. Since the booster circuit and the inverter circuit mounted on another substrate can be used continuously, it is reasonable.

(3) In addition, in (1), an electrolytic capacitor box that houses the electrolytic capacitor is provided separately from the main body of the casing of the conversion device, and the electrolytic capacitor box is connected to the main body by a connector or a terminal. It may be detachable by connection.
In this case, since the electrolytic capacitor box can be replaced by attachment / detachment via the connector connection, the replacement work is extremely easy, and the cost required for replacement is reduced. Since the booster circuit and the inverter circuit mounted on another substrate can be used continuously, it is reasonable. In addition, by replacing in units of boxes, there is almost no possibility of dropping foreign matter, for example, on another substrate during the replacement operation, and a highly reliable replacement operation can be realized.

[Details of the embodiment]
Hereinafter, embodiments of the invention will be described in detail with reference to the drawings.

《Conversion device configuration》
FIG. 1 is a block diagram illustrating an example of a system including a DC to AC converter. In the figure, a photovoltaic power generation panel 2 as a DC power source is connected to the input end of the converter 1, and an AC commercial power system 3 is connected to the output end. This system converts the direct current power generated by the solar power generation panel 2 into alternating current power, and performs an interconnection operation for output to the commercial power system 3.
Converter 1, an inverter for outputting a step-up circuit 10 the DC power photovoltaic panel 2 is output is provided, to convert the power provided to the DC bus L _B from the booster circuit 10 into AC power to a commercial power system 3 The circuit 11 and the control part 12 which controls operation | movement of these both circuits 10 and 11 are provided.

FIG. 2 is an example of a circuit diagram of the conversion device 1.
The booster circuit 10 includes a DC reactor 15, a diode 16, and a switching element Qb made of, for example, an FET (Field Effect Transistor), and constitutes a boost chopper circuit.
On the input side of the booster circuit 10, a first voltage sensor 17, a first current sensor 18, and a large capacity (mF level) electrolytic capacitor 26 for smoothing are provided.

The first voltage sensor 17 detects the DC input voltage detection value Vg (DC input voltage value) of the DC power output from the photovoltaic power generation panel 2 and input to the booster circuit 10, and outputs it to the control unit 12. The first current sensor 18 detects a booster circuit current detection value Iin (DC input current value) that is a current flowing through the DC reactor 15, and outputs it to the control unit 12. Note that a current sensor may be further provided in front of the electrolytic capacitor 26 in order to detect the DC input current detection value Ig.
The control unit 12 has a function of calculating the input power Pin from the DC input voltage detection value Vg and the booster circuit current detection value Iin and performing MPPT (Maximum Power Point Tracking) control on the photovoltaic power generation panel 2. doing.

  Further, the switching element Qb of the booster circuit 10 is controlled so that the period for performing the switching operation with the inverter circuit 11 is alternately switched, as will be described later. Therefore, the booster circuit 10 outputs the boosted power to the inverter circuit 11 during the period during which the switching operation is performed, and the photovoltaic power generation panel 2 outputs the booster circuit 10 during the period during which the switching operation is stopped. Is output to the inverter circuit 11 without boosting.

Between the booster circuit 10 and the inverter circuit 11, a small smoothing capacitor (μF level) capacitor 19 (smoothing capacitor) is connected. For example, a film capacitor can be used as the capacitor 19.
The inverter circuit 11 includes switching elements Q1 to Q4 made of FET (Field Effect Transistor). These switching elements Q1 to Q4 constitute a full bridge circuit.
Each of the switching elements Q1 to Q4 is connected to the control unit 12 and can be controlled by the control unit 12. The control unit 12 performs PWM control of the operation of each switching element Q1 to Q4. Thereby, the inverter circuit 11 converts the power given from the booster circuit 10 into AC power.

The conversion device 1 includes a filter circuit 21 between the inverter circuit 11 and the commercial power system 3.
The filter circuit 21 includes two AC reactors 22 and a capacitor 23 (output smoothing capacitor) provided at the subsequent stage of the AC reactor 22. The filter circuit 21 has a function of removing high-frequency components contained in the AC power output from the inverter circuit 11. The AC power from which the high frequency component has been removed by the filter circuit 21 is supplied to the commercial power system 3.

  As described above, the booster circuit 10 and the inverter circuit 11 convert the DC power output from the photovoltaic power generation panel 2 into AC power, and output the converted AC power to the commercial power system 3 via the filter circuit 21.

  The filter circuit 21 is connected to a second current sensor 24 for detecting an inverter current detection value Iinv (current flowing through the AC reactor 22), which is a current value output from the inverter circuit 11. Further, a second voltage sensor 25 for detecting a voltage value on the commercial power system 3 side (system voltage detection value Va) is connected between the filter circuit 21 and the commercial power system 3.

The second current sensor 24 and the second voltage sensor 25 output the detected system voltage detection value Va (AC system voltage value) and the inverter current detection value Iinv to the control unit 12. The second current sensor 24 may be provided before the capacitor 23 as shown in the figure, but may be provided after the capacitor 23.
The control unit 12 controls the booster circuit 10 and the inverter circuit 11 based on the system voltage detection value Va and the inverter current detection value Iinv and the above-described DC input voltage detection value Vg and the booster circuit current detection value Iin.

<< Minimum modulation method for power converters >>
Next, FIG. 14 and FIG. 15 are waveform diagrams simply showing the characteristics of the operation of the conversion device 1. Although both figures show the same contents, FIG. 14 particularly displays the amplitude relationship from the DC input to the AC output so that it is easy to see, and FIG. 15 particularly displays the control timing so that it can be easily seen. The upper part of FIG. 14 and the left column of FIG. 15 are waveform diagrams showing the operation of a conventional converter that is not the minimum modulation method, for comparison. Further, the lower part of FIG. 14 and the right column of FIG. 15 are waveform diagrams showing the operation of the minimum modulation type conversion apparatus 1 (FIG. 2).

First, in the upper stage of FIG. 14 (or the left column of FIG. 15), in the conventional converter, the output of the booster circuit with respect to the DC input, that is, the DC voltage _VDC (in FIG. 2, the switching element Qb and the DC reactor 15 are mutually connected. The voltage appearing at the connection point) is in the form of an equidistant pulse train having a value higher than _VDC . This output is smoothed, a DC bus _{L B,} appears as voltage _{V B.} In contrast, the inverter circuit performs PWM-controlled switching while inverting the polarity in a half cycle. As a result, after the smoothing by the filter circuit, an AC voltage V _AC sine wave as an AC output.

Next, the lower minimum modulation scheme of Figure 14, the absolute value of the voltage target value V _AC of the AC waveform, in accordance with the comparison result of the DC voltage V _DC is input, the boosting circuit 10 and the inverter circuit of FIG. 2 11 operates. In other words, when the absolute value of the voltage target value is V _AC <V _DC (or V _AC ≦ V _DC ), the booster circuit 10 stops (“ST” in the figure), and V _AC ≧ V _DC (or V _AC > V _DC ), the booster circuit 10 performs a boosting operation (“OP” in the figure). The output of the booster circuit 10 is smoothed by the capacitor 19 (FIG. 2), the DC bus _{L B,} appears as voltage _{V B} illustrated.

On the other hand, the inverter circuit 11 performs high-frequency switching when V _AC <V _DC (or V _AC ≦ V _DC ) according to the comparison result between the absolute value of the voltage target value V _AC and the DC voltage V _DC. (“OP” in the figure) and when V _AC ≧ V _DC (or V _AC > V _DC ), the high-frequency switching is stopped (“ST” in the figure). When the high frequency switching is stopped, the inverter circuit 11 has either the switching elements Q1 and Q4 turned on, Q2 and Q3 turned off, the switching elements Q1 and Q4 turned off, and the Q2 and Q3 turned on. By selecting, only necessary polarity inversion is performed. The output of the inverter circuit 11 is smoothed by the filter circuit 21, and a desired AC output is obtained.

Here, as shown in the right column of FIG. 15, the booster circuit 10 and the inverter circuit 11 alternately perform high-frequency switching operations, and when the booster circuit 10 performs a boost operation, the inverter circuit 11 to stop the high-frequency switching is performed only the necessary polarity inversion with respect to the voltage of the DC bus L _B. Conversely, when the inverter circuit 11 performs a high-frequency switching operation, the booster circuit 10 is stopped and the voltage of the electric circuit L _in (FIG. 2) is passed.

  By performing the alternating high-frequency switching operation of the booster circuit 10 and the inverter circuit 11 as described above, the number of times of switching of the switching elements Q1 to Q4 and Qb is reduced as a whole, and the switching loss is greatly reduced by that amount. Is done. The frequency of the high frequency switching is, for example, 20 kHz, while the polarity inversion switching in the inverter circuit 11 is 100 Hz or 120 Hz, which is twice the commercial frequency. That is, the polarity inversion frequency is very small compared to the high frequency switching frequency, and therefore, the switching loss is small.

Further, by performing the alternating high-frequency switching operation of the booster circuit 10 and the inverter circuit 11, the iron loss of the reactor (DC reactor 15, AC reactor 22) is reduced.
Furthermore, since the capacitor 19 is sufficient to smooth the switching high frequency, the capacitor 19 does not need the smoothing action of the low-frequency AC component that is three times the system frequency. Therefore, a capacitor having a small capacity (for example, 10 μF or 22 μF) can be used.

<< System connection of conversion equipment >>
Hereinafter, grid interconnection by the conversion device 1 will be described in detail.

[1.1 About the control unit]
FIG. 3 is a block diagram of the control unit 12. As shown in FIG. 3, the control unit 12 functionally includes a control processing unit 30, a booster circuit control unit 32, an inverter circuit control unit 33, and an averaging processing unit 34.
A part or all of the functions of the control unit 12 may be configured by a hardware circuit, or part or all of the functions may be realized by causing a computer (computer program) to be executed by a computer. . Software (computer program) for realizing the function of the control unit 12 is stored in a storage device (not shown) of the computer.

The booster circuit control unit 32 controls the switching element Qb of the booster circuit 10 based on the command value and the detection value given from the control processing unit 30, and causes the booster circuit 10 to output the electric power of the current corresponding to the command value. .
The inverter circuit control unit 33 controls the switching elements Q1 to Q4 of the inverter circuit 11 based on the command value and the detection value given from the control processing unit 30, and the power of the current corresponding to the command value is converted into the inverter circuit. 11 to output.

The control processing unit 30 is provided with a DC input voltage detection value Vg, a booster circuit current detection value Iin, a system voltage detection value Va, and an inverter current detection value Iinv.
The control processing unit 30 calculates the input power Pin and its average value <Pin> from the DC input voltage detection value Vg and the booster circuit current detection value Iin.
The control processing unit 30 sets the DC input current command value Ig * (described later) based on the input power average value <Pin> to perform MPPT control on the photovoltaic power generation panel 2, and includes the booster circuit 10 and the inverter Each circuit 11 has a function of feedback control.

The DC input voltage detection value Vg and the booster circuit current detection value Iin are given to the averaging processing unit 34 and the control processing unit 30.
The averaging processor 34 samples the DC input voltage detection value Vg and the booster circuit current detection value Iin given from the first voltage sensor 17 and the first current sensor 18 at predetermined time intervals set in advance, respectively. And the averaged DC input voltage detection value Vg and booster circuit current detection value Iin are provided to the control processing unit 30.

FIG. 4 is a graph showing an example of results obtained by simulating changes with time in the DC input voltage detection value Vg and the booster circuit current detection value Iin.
The DC input current detection value Ig is a current value detected on the input side of the electrolytic capacitor 26.
As shown in FIG. 4, it can be seen that the DC input voltage detection value Vg, the booster circuit current detection value Iin, and the DC input current detection value Ig fluctuate in a cycle of ½ of the system voltage.

As shown in FIG. 4, the reason why the DC input voltage detection value Vg and the DC input current detection value Ig fluctuate periodically is as follows. That is, the booster circuit current detection value Iin varies greatly from approximately 0 A to the peak value in a half cycle of the AC cycle according to the operations of the booster circuit 10 and the inverter circuit 11. Therefore, the fluctuation component cannot be completely removed by the electrolytic capacitor 26, and the DC input current detection value Ig becomes a pulsating flow including a component that fluctuates in a half cycle of the AC cycle. On the other hand, the output voltage of the photovoltaic power generation panel changes depending on the output current.
For this reason, the periodic fluctuation occurring in the DC input voltage detection value Vg is ½ period of AC power output from the converter 1.
The averaging processing unit 34 averages the DC input voltage detection value Vg and the booster circuit current detection value Iin in order to suppress the influence due to the above-described periodic fluctuation.

FIG. 5 is a diagram illustrating an aspect when the DC input voltage detection value Vg performed by the averaging processing unit 34 is averaged.
The averaging processing unit 34 samples a given DC input voltage detection value Vg a plurality of times at predetermined time intervals Δt in a period L from a certain timing t1 to a timing t2 (in the drawing, Black spot timing), and an average value of the obtained DC input voltage detection values Vg is obtained.

Here, the averaging processing unit 34 sets the period L to a length that is ½ of the periodic length of the commercial power system 3. In addition, the averaging processing unit 34 sets the time interval Δt to a period sufficiently shorter than the length of the ½ cycle of the commercial power system 3.
Thereby, the averaging process part 34 calculates | requires accurately the average value of the direct-current input voltage detected value Vg which fluctuates periodically synchronizing with the period of the commercial power system 3, shortening the sampling period as much as possible. Can do.
Note that the sampling time interval Δt can be set to, for example, 1/100 to 1/1000 of the cycle of the commercial power system 3, 20 microseconds to 200 microseconds, or the like.

The averaging processing unit 34 can also store the period L in advance, or can acquire the system voltage detection value Va from the second voltage sensor 25 and set the period L based on the cycle of the commercial power system 3. You can also
In addition, here, the period L is set to ½ the period length of the commercial power system 3, but if the period L is set to at least a ½ period of the commercial power system 3, the DC input The average value of the voltage detection value Vg can be obtained with high accuracy. This is because the DC input voltage detection value Vg periodically fluctuates with a length of ½ of the cycle length of the commercial power system 3 due to the operations of the booster circuit 10 and the inverter circuit 11 as described above.
Therefore, when it is necessary to set the period L longer, the period L is set to an integral multiple of the 1/2 cycle of the commercial power system 3, such as 3 or 4 times the 1/2 cycle of the commercial power system 3. do it. As a result, the voltage fluctuation can be grasped in units of cycles.

As described above, the booster circuit current detection value Iin also periodically fluctuates in a half cycle of the commercial power system 3, as with the DC input voltage detection value Vg.
Therefore, the averaging processing unit 34 also obtains an average value of the booster circuit current detection value Iin by a method similar to the DC input voltage detection value Vg shown in FIG.
The control processing unit 30 sequentially obtains the average value of the DC input voltage detection value Vg and the average value of the booster circuit current detection value Iin for each period L.
The averaging processing unit 34 gives the average value of the obtained DC input voltage detection value Vg and the average value of the boost circuit current detection value Iin to the control processing unit 30.

  In this example, as described above, the averaging processing unit 34 performs the average value of the DC input voltage detection value Vg (DC input voltage average value <Vg>) and the average value of the boost circuit current detection value Iin (boost circuit current average). Value <Iin>), and the control processing unit 30 uses these values to control the booster circuit 10 and the inverter circuit 11 while performing MPPT control on the solar power generation panel 2. Even when the direct current fluctuates and becomes unstable, the control unit 12 outputs the output from the photovoltaic power generation panel 2 to the DC input voltage average value <Vg> obtained by removing the fluctuation component due to the operation of the converter 1 and the booster circuit current. The average value <Iin> can be obtained with high accuracy. As a result, MPPT control can be performed suitably and it can suppress effectively that the power generation efficiency of the photovoltaic power generation panel 2 falls.

In addition, as described above, when the conversion device 1 operates, the DC power voltage (DC input voltage detection value Vg) or current (boost circuit current detection value Iin) output from the photovoltaic power generation panel 2 varies. The fluctuation cycle substantially coincides with a half cycle of AC power output from the inverter circuit 11 (a half cycle of the commercial power system 3).
In this regard, in this example, during the period L set to ½ of the periodic length of the commercial power system 3, each of the DC input voltage detection value Vg and the boost circuit current detection value Iin is AC. Since sampling was performed a plurality of times at a time interval Δt shorter than a half cycle of the system and the DC input voltage average value <Vg> and the booster circuit current average value <Iin> were obtained from the results, the DC current voltage and current were Even if it fluctuates periodically, the DC input voltage average value <Vg> and the booster circuit current average value <Iin> can be accurately obtained while shortening the sampling period as much as possible.

The control processing unit 30 sets the DC input current command value Ig * based on the above-described input power average value <Pin>, and based on the set DC input current command value Ig * and the above value, the booster circuit 10 and the command value for the inverter circuit 11 are obtained.
The control processing unit 30 has a function of giving the obtained command value to the booster circuit control unit 32 and the inverter circuit control unit 33 and performing feedback control on the booster circuit 10 and the inverter circuit 11 respectively.

FIG. 6 is a control block diagram for explaining feedback control of the booster circuit 10 and the inverter circuit 11 by the control processing unit 30.
The control processing unit 30 includes a first calculation unit 41, a first adder 42, a compensator 43, and a second adder 44 as functional units for controlling the inverter circuit 11.
The control processing unit 30 includes a second calculation unit 51, a third adder 52, a compensator 53, and a fourth adder 54 as functional units for controlling the booster circuit 10.

FIG. 7 is a flowchart showing control processing of the booster circuit 10 and the inverter circuit 11. Each functional unit illustrated in FIG. 6 controls the booster circuit 10 and the inverter circuit 11 by executing the processing illustrated in the flowchart illustrated in FIG.
Hereinafter, control processing of the booster circuit 10 and the inverter circuit 11 will be described with reference to FIG.

First, the control processing unit 30 obtains the current input power average value <Pin> (step S9) and compares it with the input power average value <Pin> at the previous calculation to set the DC input current command value Ig *. (Step S1). The input power average value <Pin> is obtained based on the following formula (1).
Input power average value <Pin> = <Iin × Vg> (1)

In equation (1), Iin is a boost circuit current detection value, Vg is a DC input voltage detection value (DC input voltage value), and a DC input voltage average value that is an averaged value by the averaging processing unit 34. <Vg> and the booster circuit current average value <Iin> are used.
In each of the following equations related to control other than Equation (1), instantaneous values that are not averaged are used for the booster circuit current detection value Iin and the DC input voltage detection value Vg.
“<>” Indicates an average value in parentheses. The same applies hereinafter.

The control processing unit 30 gives the set DC input current command value Ig * to the first calculation unit 41.
In addition to the DC input current command value Ig *, the first calculation unit 41 is also supplied with a DC input voltage detection value Vg and a system voltage detection value Va.
The 1st calculating part 41 calculates the average value <Ia *> of the output electric current command value as the converter 1 based on following formula (2).
Average output current command value <Ia *> = <Ig * × Vg> / <Va> (2)

Further, the first calculation unit 41 obtains an output current command value Ia * (output current target value) based on the following equation (3) (step S2).
Here, the first calculation unit 41 obtains the output current command value Ia * as a sine wave having the same phase as the system voltage detection value Va.
Output current command value Ia * = (√2) × <Ia *> × sin ωt (3)

As described above, the first calculation unit 41 obtains the output current command value Ia * based on the input power average value <Pin> (DC power input power value) and the system voltage detection value Va.
Next, the first computing unit 41 computes an inverter current command value Iinv * (current target value of the inverter circuit), which is a current target value for controlling the inverter circuit 11, as shown in the following formula (4) ( Step S3).
Inverter current command value Iinv * = Ia * + s CaVa (4)

However, in Formula (4), Ca is the electrostatic capacitance of the capacitor | condenser 23 and s is a Laplace operator.
In Expression (4), the second term on the right side is a value added in consideration of the current flowing through the capacitor 23 of the filter circuit 21.
The output current command value Ia * is obtained as a sine wave having the same phase as the system voltage detection value Va, as shown in the above equation (3). That is, the control processing unit 30 controls the inverter circuit 11 so that the current Ia (output current) of the AC power output from the conversion device 1 is in phase with the system voltage (system voltage detection value Va).

When the first calculation unit 41 obtains the inverter current command value Iinv *, the first calculation unit 41 gives the inverter current command value Iinv * to the first adder 42.
The inverter circuit 11 is feedback controlled by this inverter current command value Iinv *.

In addition to the inverter current command value Iinv *, the current adder current detection value Iinv is given to the first adder 42.
The first adder 42 calculates the difference between the inverter current command value Iinv * and the current inverter current detection value Iinv, and gives the calculation result to the compensator 43.

When the difference is given, the compensator 43 converges the difference based on a proportional coefficient or the like to obtain an inverter voltage reference value Vinv # that can be used as the inverter current command value Iinv *. The compensator 43 supplies the inverter voltage reference value Vinv # to the inverter circuit control unit 33, thereby causing the inverter circuit 11 to output power at the voltage Vinv according to the inverter voltage reference value Vinv #.
The electric power output from the inverter circuit 11 is subtracted by the system voltage detection value Va by the second adder 44 and then given to the AC reactor 22 and fed back as a new inverter current detection value Iinv. Then, the difference between the inverter current command value Iinv * and the inverter current detection value Iinv is calculated again by the first adder 42, and the inverter circuit 11 is controlled based on this difference as described above.

  As described above, the inverter circuit 11 is feedback controlled by the inverter current command value Iinv * and the inverter current detection value Iinv (step S4).

On the other hand, in addition to the DC input voltage detection value Vg and the system voltage detection value Va, the inverter current command value Iinv * calculated by the first calculation unit 41 is given to the second calculation unit 51.
The second calculation unit 51 calculates the inverter output voltage command value Vinv * (voltage target value of the inverter circuit) based on the following formula (5) (step S5).
Inverter output voltage command value Vinv * = Va + s LaIinv * (5)

In Equation (5), La is the AC reactor inductance, and s is the Laplace operator.
In Expression (5), the second term on the right side is a value added in consideration of the voltage generated at both ends of the AC reactor 22.
As described above, in this example, the inverter current command value Iinv that is a current target value for controlling the inverter circuit 11 so that the current phase of the AC power output from the inverter circuit 11 is in phase with the system voltage detection value Va. An inverter output voltage command value Vinv * (voltage target value) is set based on *.

When the inverter output voltage command value Vinv * is obtained, the second calculation unit 51 compares the DC input voltage detection value Vg with the absolute value of the inverter output voltage command value Vinv * as shown in the following formula (6). Then, the larger one is determined as the boost circuit voltage target value Vo * (step S6).
Boost circuit voltage target value Vo * = Max (absolute value of Vg, Vinv *) (6)

Furthermore, the second calculator 51 calculates the booster circuit current command value Iin * based on the following equation (7) (step S7).
Boost circuit current command value Iin * =
{| (Iinv * × Vinv *) | + (s C Vo *) × Vo *} / Vg (7)

However, in Formula (7), C is the electrostatic capacitance of the capacitor | condenser 19, and s is a Laplace operator.
In Expression (7), the term added to the absolute value of the product of the inverter current command value Iinv * and the inverter output voltage command value Vinv * is a value that takes into account reactive power passing through the capacitor 19.
When the capacitance C of the capacitor 19 is sufficiently small, the following formula (8) is established.
Boost circuit current command value Iin * = {| (Iinv * × Vinv *) |} / Vg (8)

When the second calculation unit 51 obtains the booster circuit current command value Iin *, the second calculator 51 gives the booster circuit current command value Iin * to the third adder 52.
The booster circuit 10 is feedback controlled by this booster circuit current command value Iin *.
The third adder 52 is provided with the current booster circuit current detection value Iin in addition to the booster circuit current command value Iin *.
The third adder 52 calculates the difference between the booster circuit current command value Iin * and the current booster circuit current detection value Iin and gives the calculation result to the compensator 53.

When the above difference is given, the compensator 53 converges the difference and obtains a boost circuit voltage reference value Vbc # that can be used as the boost circuit current command value Iin * based on a proportional coefficient or the like. The compensator 53 supplies the booster circuit voltage reference value Vbc # to the booster circuit control unit 32, thereby causing the booster circuit 10 to output power at the voltage Vo according to the booster circuit voltage reference value Vbc #.
The electric power output from the booster circuit 10 is subtracted by the DC input voltage detection value Vg by the fourth adder 54, is then supplied to the DC reactor 15, and is fed back as a new booster circuit current detection value Iin. Then, the difference between the booster circuit current command value Iin * and the booster circuit current detection value Iin is calculated again by the third adder 52, and the booster circuit 10 is controlled based on this difference as described above.

As described above, the booster circuit 10 is feedback-controlled by the booster circuit current command value Iin * and the booster circuit current detection value Iin (step S8).
After step S8, the control processing unit 30 obtains the current input power average value <Pin> based on the equation (1) (step S9).

  The control processing unit 30 compares the input power average value <Pin> at the previous calculation with the DC input current so that the input power average value <Pin> becomes the maximum value (follows the maximum power point). Set command value Ig *.

  As described above, the control processing unit 30 controls the booster circuit 10 and the inverter circuit 11 while performing MPPT control on the photovoltaic power generation panel 2.

As described above, the control processing unit 30 feedback-controls the inverter circuit 11 and the booster circuit 10 with the current command value.
FIG. 8A is a graph showing an example of a result obtained by simulation of the booster circuit current command value Iin * obtained by the control processing unit 30 in the feedback control and the booster circuit current detection value Iin when controlled according to the command. (B) shows an example of a result obtained by simulation of the booster circuit voltage target value Vo * obtained by the control processing unit 30 in the feedback control and the booster circuit voltage detection value Vo when controlled according to the booster circuit voltage. It is a graph.

As shown in FIG. 8A, it can be seen that the boost circuit current detection value Iin is controlled by the control processing unit 30 along the boost circuit current command value Iin *.
Further, as shown in FIG. 8B, since the booster circuit voltage target value Vo * is obtained by the above equation (6), the absolute value of the inverter output voltage command value Vinv * is approximately equal to the DC input voltage detection value Vg. In the period described above, it changes so as to follow the absolute value of the inverter output voltage command value Vinv *, and to follow the DC input voltage detection value Vg in other periods.
It can be seen that the booster circuit voltage detection value Vo is controlled by the control processing unit 30 along the booster circuit voltage target value Vo *.

FIG. 9 is a diagram illustrating an example of the inverter output voltage command value Vinv *. In the figure, the vertical axis represents voltage and the horizontal axis represents time. The broken line shows the voltage waveform of the commercial power system 3, and the solid line shows the waveform of the inverter output voltage command value Vinv *.
Converter 1 outputs electric power using inverter output voltage command value Vinv * shown in FIG. 9 as a voltage target value by control according to the flowchart of FIG.
Therefore, the converter 1 outputs the electric power of the voltage according to the waveform of the inverter output voltage command value Vinv * shown in FIG.

  As shown in the figure, both waves have substantially the same voltage value and frequency, but the phase of the inverter output voltage command value Vinv * is advanced several times with respect to the voltage phase of the commercial power system 3. ing.

As described above, the control processing unit 30 of this example performs the feedback control of the booster circuit 10 and the inverter circuit 11 to change the phase of the inverter output voltage command value Vinv * with respect to the voltage phase of the commercial power system 3. About 3 degrees.
The angle by which the phase of the inverter output voltage command value Vinv * is advanced with respect to the voltage phase of the commercial power system 3 may be several degrees, and is different from the voltage waveform of the commercial power system 3 as will be described later. Is set in a range where the phase is approximately 90 degrees advanced with respect to the voltage waveform of the commercial power system 3. For example, it is set in a range of values larger than 0 degree and smaller than 10 degrees.

The phase advance angle is determined by the system voltage detection value Va, the inductance La of the AC reactor 22, and the inverter current command value Iinv * as shown in the above equation (5). Among these, the system voltage detection value Va and the inductance La of the AC reactor 22 are fixed values that are not controlled, and therefore the phase advance angle is determined by the inverter current command value Iinv *.
The inverter current command value Iinv * is determined by the output current command value Ia * as shown in the above equation (4). As the output current command value Ia * increases, the advanced component in the inverter current command value Iinv * increases, and the advance angle (advance angle) of the inverter output voltage command value Vinv * increases.

Since the output current command value Ia * is obtained from the above equation (2), the angle to advance the phase is adjusted by the DC input current command value Ig *.
As described above, the control processing unit 30 of this example sets the DC input current command value Ig so that the phase of the inverter output voltage command value Vinv * is advanced by about 3 degrees with respect to the voltage phase of the commercial power system 3. * Is set.

[1.2 Control of booster circuit and inverter circuit]
The booster circuit control unit 32 controls the switching element Qb of the booster circuit 10. Further, the inverter circuit control unit 33 controls the switching elements Q1 to Q4 of the inverter circuit 11.

  The booster circuit control unit 32 and the inverter circuit control unit 33 generate a booster circuit carrier wave and an inverter circuit carrier wave, respectively, and these carrier waves are booster circuit voltage reference values Vbc # that are command values given from the control processing unit 30, and Modulation is performed using the inverter voltage reference value Vinv # to generate a drive waveform for driving each switching element.

  The step-up circuit control unit 32 and the inverter circuit control unit 33 control each switching element based on the drive waveform, whereby an alternating current waveform approximated to the step-up circuit current command value Iin * and the inverter current command value Iinv *. Electric power is output to the booster circuit 10 and the inverter circuit 11.

FIG. 10A is a graph comparing the booster carrier and the waveform of the booster circuit voltage reference value Vbc #. In the figure, the vertical axis represents voltage and the horizontal axis represents time. In FIG. 10A, for easy understanding, the wavelength of the booster carrier wave is shown longer than the actual wavelength.
The booster circuit carrier wave generated by the booster circuit control unit 32 is a triangular wave whose local minimum value is “0”, and the amplitude A1 is the booster circuit voltage target value Vo * given from the control processing unit 30.
In addition, the frequency of the booster circuit carrier wave is set by the booster circuit control unit 32 according to a control command from the control processing unit 30 so as to have a predetermined duty ratio.

  As described above, the booster circuit voltage target value Vo * is equal to the inverter output voltage command value Vinv * during the period W1 in which the absolute value of the inverter output voltage command value Vinv * is approximately equal to or greater than the DC input voltage detection value Vg. Following the absolute value, it changes so as to follow the DC input voltage detection value Vg in the other periods. Therefore, the amplitude A1 of the booster circuit carrier also changes according to the booster circuit voltage target value Vo *.

  In this example, it is assumed that the detected DC input voltage value Vg is 250 volts and the voltage amplitude of the commercial power system 3 is 288 volts.

  The waveform of the booster circuit voltage reference value Vbc # (hereinafter also referred to as booster circuit reference wave Vbc #) is a value obtained by the control processing unit 30 based on the booster circuit current command value Iin *, and is the inverter output voltage command value Vinv. The absolute value of * is a positive value in a period W1 in which the absolute value is larger than the DC input voltage detection value Vg. In the period W, the booster circuit reference wave Vbc # has a waveform that approximates the waveform formed by the booster circuit voltage target value Vo *, and intersects the booster carrier wave.

  The booster circuit control unit 32 compares the booster circuit carrier wave with the booster circuit reference wave Vbc #, and the booster circuit reference wave Vbc #, which is the target value of the voltage across the DC reactor 15, becomes equal to or higher than the booster carrier wave. A drive waveform for driving the switching element Qb is generated so as to be turned on in the portion and turned off in the portion below the carrier wave.

FIG. 10B shows a drive waveform for driving the switching element Qb generated by the booster circuit control unit 32. In the figure, the vertical axis represents voltage and the horizontal axis represents time. The horizontal axis is shown to coincide with the horizontal axis of FIG.
This drive waveform indicates the switching operation of the switching element Qb, and by applying it to the switching element Qb, the switching operation according to the drive waveform can be executed. The drive waveform constitutes a control command that turns off the switching element when the voltage is 0 volts and turns on the switching element when the voltage is positive.

The booster circuit control unit 32 generates a drive waveform so that the switching operation is performed in a period W1 in which the absolute value of the inverter output voltage command value Vinv * is equal to or greater than the DC input voltage detection value Vg. Therefore, the switching element Qb is controlled so as to stop the switching operation within the range of the DC input voltage detection value Vg or less.
Each pulse width is determined by the intercept of the carrier wave for the booster circuit which is a triangular wave. Therefore, the pulse width increases as the voltage increases.

  As described above, the booster circuit control unit 32 modulates the booster circuit carrier wave with the booster circuit reference wave Vbc #, and generates a drive waveform representing the pulse width for switching. The booster circuit control unit 32 performs PWM control of the switching element Qb of the booster circuit 10 based on the generated drive waveform.

  When a switching element Qbu (not shown) that conducts in the forward direction of the diode in parallel with the diode 16 is installed, the switching element Qbu uses a driving waveform that is inverted from the driving waveform of the switching element Qb. However, in order to prevent the switching element Qb and the switching element Qbu from conducting simultaneously, a dead time of about 1 microsecond is provided when the drive pulse of the switching element Qbu shifts from OFF to ON.

  FIG. 11A is a graph comparing the carrier wave for the inverter circuit and the waveform of the inverter voltage reference value Vinv #. In the figure, the vertical axis represents voltage and the horizontal axis represents time. In FIG. 11A, the wavelength of the carrier wave for the inverter circuit is shown longer than the actual wavelength for easy understanding.

The inverter circuit carrier generated by the inverter circuit control unit 33 is a triangular wave having an amplitude center of 0 volts, and its one-side amplitude is set to the boost circuit voltage target value Vo * (the voltage target value of the capacitor 23). Therefore, the amplitude A2 of the carrier wave for the inverter circuit has a period that is twice (500 volts) the detected DC input voltage value Vg and a period that is twice the voltage of the commercial power system 3 (maximum 576 volts). .
Further, the frequency is set by the inverter circuit control unit 33 so as to have a predetermined duty ratio by a control command or the like by the control processing unit 30.

  As described above, the booster circuit voltage target value Vo * is equal to the inverter output voltage command value Vinv * during the period W1 in which the absolute value of the inverter output voltage command value Vinv * is approximately equal to or greater than the DC input voltage detection value Vg. Following the absolute value, in the period W2, which is the other period, it changes so as to follow the DC input voltage detection value Vg. Therefore, the amplitude A2 of the inverter circuit carrier also changes in accordance with the boost circuit voltage target value Vo *.

  The waveform of the inverter voltage reference value Vinv # (hereinafter also referred to as inverter circuit reference wave Vinv #) is a value obtained by the control processing unit 30 based on the inverter current command value Iinv *, and is generally a voltage amplitude of the commercial power system 3. It is set to be the same as (288 volts). Therefore, the inverter circuit reference wave Vinv # intersects the booster circuit carrier in a portion where the voltage value is in the range of −Vg to + Vg.

  The inverter circuit control unit 33 compares the inverter circuit carrier wave with the inverter circuit reference wave Vinv #, and is turned on when the inverter circuit reference wave Vinv #, which is the voltage target value, is greater than or equal to the inverter circuit carrier wave. A drive waveform for driving the switching elements Q1 to Q4 is generated so as to be turned off at the portion.

FIG. 11B shows a drive waveform for driving the switching element Q <b> 1 generated by the inverter circuit control unit 33. In the figure, the vertical axis represents voltage and the horizontal axis represents time. The horizontal axis is shown so as to coincide with the horizontal axis of FIG.
The inverter circuit control unit 33 generates the drive waveform so that the switching operation is performed in the range W2 where the voltage of the inverter circuit reference wave Vinv # is in the range of −Vg to + Vg. Therefore, in the other range, the switching element Q1 is controlled so as to stop the switching operation.

FIG. 11C shows a drive waveform for driving the switching element Q3 generated by the inverter circuit control unit 33. In the figure, the vertical axis represents voltage and the horizontal axis represents time.
For the switching element Q3, the inverter circuit control unit 33 compares the inverted wave of the inverter circuit reference wave Vinv # indicated by the broken line in the drawing with a carrier wave to generate a drive waveform.
Also in this case, the inverter circuit control unit 33 generates the drive waveform so that the voltage of the inverter circuit reference wave Vinv # (the inverted wave thereof) is switched in the range W2 between −Vg and + Vg. Therefore, in the other range, the switching element Q3 is controlled so as to stop the switching operation.

  The inverter circuit control unit 33 generates the inverted driving waveform of the switching element Q1 for the driving waveform of the switching element Q2, and inverts the driving waveform of the switching element Q3 for the driving waveform of the switching element Q4. To create

  As described above, the inverter circuit control unit 33 modulates the inverter circuit carrier wave with the inverter circuit reference wave Vinv #, and generates a drive waveform representing a pulse width for switching. The inverter circuit control unit 33 performs PWM control on the switching elements Q1 to Q4 of the inverter circuit 11 based on the generated drive waveform.

  The booster circuit control unit 32 of this example outputs power so that the current flowing through the DC reactor 15 matches the booster circuit current command value Iin *. As a result, the booster circuit 10 is caused to perform a switching operation in a period W1 (FIG. 10) in which the absolute value of the inverter output voltage command value Vinv * is approximately equal to or greater than the DC input voltage detection value Vg. The booster circuit 10 outputs power so that a voltage equal to or higher than the DC input voltage detection value Vg is approximated to the absolute value of the inverter output voltage command value Vinv * in the period W1. On the other hand, during the period in which the absolute value of the inverter output voltage command value Vinv * is approximately equal to or less than the DC input voltage detection value Vg, the booster circuit control unit 32 stops the switching operation of the booster circuit 10. Therefore, during a period equal to or less than the DC input voltage detection value Vg, the booster circuit 10 outputs the DC power output from the photovoltaic power generation panel 2 to the inverter circuit 11 without boosting.

Moreover, the inverter circuit control part 33 of this example outputs electric power so that the electric current which flows into AC reactor 22 may correspond to inverter electric current command value Iinv *. As a result, the inverter circuit 11 is caused to perform a switching operation in a period W2 (FIG. 11) in which the inverter output voltage command value Vinv * is approximately −Vg to + Vg. That is, the inverter circuit 11 is caused to perform a switching operation in a period in which the absolute value of the inverter output voltage command value Vinv * is equal to or less than the DC input voltage detection value Vg.
Therefore, the inverter circuit 11 performs a switching operation while the booster circuit 10 stops the switching operation, and outputs AC power approximate to the inverter output voltage command value Vinv *.
In addition, since the inverter circuit reference wave Vinv # and the inverter output voltage command value Vinv * are approximate, they overlap in FIG.

  On the other hand, the inverter circuit control unit 33 stops the switching operation of the inverter circuit 11 in a period other than the period W2 where the voltage of the inverter output voltage command value Vinv * is approximately −Vg to + Vg. During this time, the inverter circuit 11 is supplied with the electric power boosted by the booster circuit 10. Therefore, the inverter circuit 11 that has stopped the switching operation outputs the power supplied from the booster circuit 10 without stepping down.

  That is, the converter 1 of this example performs switching operation so that the booster circuit 10 and the inverter circuit 11 are alternately switched, and superimposes the electric power output from each of them to thereby approximate the inverter output voltage command value Vinv *. Outputs waveform AC power.

Thus, in this example, when the absolute value of the inverter output voltage command value Vinv * is higher than the DC input voltage detection value Vg, the booster circuit 10 is operated to operate the inverter output voltage command value. Control is performed so that the inverter circuit 11 is operated when a voltage at a portion where the absolute value of Vinv * is lower than the DC input voltage detection value Vg is output. Therefore, since the inverter circuit 11 does not step down the power boosted by the booster circuit 10, the potential difference when the voltage is stepped down can be kept low, so that the loss due to switching of the booster circuit can be reduced and higher. AC power can be output with high efficiency.
Furthermore, since both the booster circuit 10 and the inverter circuit 11 operate based on the inverter output voltage command value Vinv * (voltage target value) set by the control unit 12, the booster circuit power output so as to be switched alternately. Thus, it is possible to suppress the occurrence of deviation and distortion with respect to the power of the inverter circuit.

FIG. 12 is a diagram illustrating an example of a current waveform of AC power output from the converter 1 along with an example of a reference wave and a driving waveform of a switching element.
In FIG. 12, the reference wave Vinv # and carrier wave of the inverter circuit, the drive waveform of the switching element Q1, the reference wave Vbc # and carrier wave of the booster circuit, the drive waveform of the switching element Qb, and the conversion device 1 are output in order from the top. The graph which shows the command value and measured value of the current waveform of alternating current power is represented. The horizontal axis of each graph indicates time and is shown to coincide with each other.

As shown in the figure, it can be seen that the actual measured value Ia of the output current is controlled to coincide with the command value Ia *.
Further, it can be seen that the period of switching operation of the switching element Qb of the booster circuit 10 and the period of switching operation of the switching elements Q1 to Q4 of the inverter circuit 11 are controlled to be switched alternately.

  In this example, as shown in FIG. 8A, the booster circuit obtained based on the above equation (7) is controlled so that the current flowing through the DC reactor 15 coincides with the current command value Iin *. As a result, the voltages of the booster circuit and the inverter circuit have the waveforms shown in FIG. 8B, and the high-frequency switching operations of the booster circuit 10 and the inverter circuit 11 have a stop period, respectively. It becomes possible.

[1.3 Current phase of output AC power]
The booster circuit 10 and the inverter circuit 11 of this example output AC power having a voltage waveform approximate to the inverter output voltage command value Vinv * to the filter circuit 21 connected to the subsequent stage under the control of the control unit 12. The converter 1 outputs AC power to the commercial power system 3 via the filter circuit 21.

Here, the inverter output voltage command value Vinv * is generated as a voltage phase advanced by the control processor 30 several times with respect to the voltage phase of the commercial power system 3 as described above.
Therefore, the AC voltage output from the booster circuit 10 and the inverter circuit 11 is also a voltage phase advanced by several degrees with respect to the voltage phase of the commercial power system 3.

  Then, the AC reactor 22 (FIG. 2) of the filter circuit 21 is applied to both ends of the AC voltage of the booster circuit 10 and the inverter circuit 11 on one side and the commercial power system 3 on the other side. It will be different.

FIG. 13A is a graph showing the voltage waveforms of the AC voltage output from the inverter circuit 11, the commercial power system 3, and the both-ends voltage of the AC reactor 22, respectively. In the figure, the vertical axis represents voltage and the horizontal axis represents time.
As shown in the drawing, when both ends of the AC reactor 22 are applied with voltages that are several degrees out of phase with each other, the voltages at both ends of the AC reactor 22 are the voltages that are applied across the ends of the AC reactor 22 with voltages that are several degrees out of phase with each other. Difference.

  Therefore, as shown in the figure, the phase of the voltage across the AC reactor 22 is approximately 90 degrees ahead of the voltage phase of the commercial power system 3.

FIG. 13B is a graph showing a waveform of a current flowing through the AC reactor 22. In the figure, the vertical axis represents current and the horizontal axis represents time. The horizontal axis is shown so as to coincide with the horizontal axis in FIG.
The current phase of the AC reactor 22 is delayed by 90 degrees with respect to the voltage phase. Therefore, as shown in the figure, the current phase of the AC power output through the AC reactor 22 is substantially synchronized with the current phase of the commercial power system 3.

Accordingly, the voltage phase output from the inverter circuit 11 is advanced several times with respect to the commercial power system 3, but the current phase substantially matches the current phase of the commercial power system 3.
Therefore, as shown in the graph shown in the lowermost stage of FIG. 12, the current waveform output from the conversion device 1 is substantially the same as the voltage phase of the commercial power system 3.

  As a result, an alternating current having substantially the same phase as that of the voltage of the commercial power system 3 can be output, so that the power factor of the alternating power can be suppressed from decreasing.

<Current flowing in the electrolytic capacitor>
Next, the current flowing through the electrolytic capacitor 26 in the conversion device 1 configured and operating as described above will be described.
As shown in the circuit of FIG. 2, the electrolytic capacitor 26 is provided on the input side of the booster circuit 10 away from the inverter circuit 11. Further, the presence of the DC reactor 15 reduces the influence of the high frequency components received from the inverter circuit 11 and the booster circuit 10.

  FIG. 16 is a graph showing an example of the current flowing through the electrolytic capacitor 26, where the horizontal axis represents time [seconds] and the vertical axis represents current [A]. This waveform has a frequency twice as high as the frequency of the commercial power system 3 (1/2 period), like the boost circuit current detection value Iin of FIG. However, since it is not a pulsating waveform like the boost circuit current detection value Iin, and the inflow and outflow of the electric charge of the electrolytic capacitor 26 are repeated, it becomes a substantially sinusoidal waveform centered on zero. Further, a small amount of high frequency components when the booster circuit 10 operates is included near the bottom of the negative waveform. The portion drawn with a solid line also includes a minute ripple in detail, but is omitted.

  For comparison, in the case of the conventional converter 100 shown in FIG. 20, the current flowing between the booster circuit 10 and the electrolytic capacitor 29 varies between a predetermined current value and 0 in the switching cycle of the booster circuit 10. . In addition, the current flowing between the electrolytic capacitor 29 and the inverter circuit 11 is inverted in polarity at the switching cycle of the inverter circuit 11. As described above, in the case of the conventional conversion device 100, since the current flowing through the wiring pattern around the electrolytic capacitor 29 is greatly changed, the parasitic inductance accompanying the length of the wiring pattern significantly affects the deterioration of the ringing. On the other hand, in the converter 1 of FIG. 2, since the DC reactor 15 exists between the electrolytic capacitor 26 and the switching element Qb of the booster circuit 10, between the electrolytic capacitor 26 and the switching element Qb of the booster circuit 10, The harmonic component of the current that fluctuates with the switching period is suppressed. When the waveform of FIG. 16 is compared with the waveform of FIG. 21, it can be seen that the high-frequency component of the current flowing into and out of the electrolytic capacitor 26 is dramatically reduced.

  Therefore, even if the electrolytic capacitor 26 of FIG. 2 is provided away from the inverter circuit 11 or the booster circuit 10 via a cable (covered wire), the cable does not become a problem level as a noise radiation source. This makes it possible to install the electrolytic capacitor 26 as follows.

<Electrolytic capacitor substrate>
FIG. 17 is a circuit diagram in which the main part of the conversion device 1 of FIG. 2 is viewed from the viewpoint of the “board” (however, details are omitted). In the figure, for example, circuits other than the electrolytic capacitor 26 in the conversion device 1 are mounted on the main substrate SB1. On the other hand, the electrolytic capacitor 26 is independently provided on the substrate SB2 independent of the main substrate SB1. For example, a cable 61 is used for connection from the substrate SB1 to the substrate SB2, and the electrolytic capacitor 26 is connected through a connector 62 provided on the substrate SB2. With such a configuration, it becomes easy to attach and detach only the electrolytic capacitor 26 together with the substrate SB2 at the time of replacement work accompanying the life of the electrolytic capacitor 26. Further, it is not necessary to touch the circuit components mounted on the substrate SB1, and the circuit components can be used continuously.

<Summary>
Summarizing the above description, in the converter 1 described above, the booster circuit 10 and the inverter circuit 11 alternately perform high-frequency switching, and the modulation for high-frequency switching is minimized as a whole. Therefore, it is not necessary to the DC bus L _B at a constant voltage. Thus, the capacitor 19 to be connected to the DC bus L _B is sufficient for small capacitor enough to smooth the high-frequency switching. As a result, an electrolytic capacitor 26 having a large capacity, rather than the DC bus L _B, it can be provided on the input side of the booster circuit 10, moreover, can be provided alone separate substrate SB2. Thereby, the structure which can replace | exchange easily only the electrolytic capacitor 26 with a comparatively short lifetime is realizable.

<< Case Structure Example 1 >>
FIG. 18 is a perspective view showing a housing 1A of the conversion device 1 as a power conditioner. The housing 1A is usually a rectangular parallelepiped. For example, a detachable lid 1A1 is provided on a part of the surface side. When the lid 1A1 is opened, a substrate SB2 on which an electrolytic capacitor 26 (the number shown in the figure is an example) is mounted. For example, the board SB2 is connected to another board SB1 (FIG. 17) by a connector or a terminal by being mounted at a predetermined position, and can be easily removed.

  Therefore, when replacing the electrolytic capacitor 26, the lid 1A1 is opened, the old electrolytic capacitor 26 is removed together with the substrate SB2, and the new electrolytic capacitor 26 is mounted at a predetermined position together with the substrate SB2. In this case, since only the electrolytic capacitor 26 can be replaced with the substrate SB2 by attaching and detaching, the replacement work is easy and the cost required for the replacement is reduced. Further, since it is not necessary to interfere with the other substrate SB1 (FIG. 17) in the replacement work, the possibility of dropping foreign substances, for example, on the other substrate is reduced, and a highly reliable replacement work is realized. Can do. Moreover, since the booster circuit 10 and the inverter circuit 11 mounted on the other substrate SB1 (FIG. 17) can be used continuously, it is reasonable.

<< Case Structure Example 2 >>
FIG. 19 is a perspective view showing another example of the housing 1A of the conversion device 1 as the power conditioner. In the figure, the housing 1A includes a main body 1B that accommodates components other than the electrolytic capacitor 26, and an electrolytic capacitor box 1C that accommodates the electrolytic capacitor 26 independent of the main body 1B. The main body 1B and the electrolytic capacitor box 1C are each provided with a connector 63 that can be connected to and disconnected from each other.

  In this case, since the electrolytic capacitor box 1C can be replaced by attachment / detachment via the connector connection, the replacement work is extremely easy, and the cost required for the replacement is reduced. Since the booster circuit 10 and the inverter circuit 11 mounted on the other substrate SB1 (FIG. 17) in the main body 1B can be used continuously, it is reasonable. In addition, by replacing the electrolytic capacitor box unit without opening the main body 1B, there is almost no possibility of dropping foreign substances on other substrates in the main body 1B during the replacement work, and a highly reliable replacement. Work can be realized. The electrolytic capacitor box 1C attached to the main body 1B is securely fixed to the main body 1B by means such as screwing. Alternatively, the electrolytic capacitor box 1C may be formed into a cassette shape, electrically connected and mechanically fixed simply by being mounted on the main body 1B. In addition, it may replace with a connector connection and may be a terminal connection with easy attachment / detachment.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

DESCRIPTION OF SYMBOLS 1 Converter 1A Case 1A1 Lid 1B Main part 1C Electrolytic capacitor box 2 Solar power generation panel 3 Commercial power system 10 Booster circuit 11 Inverter circuit 12 Control part 15 DC reactor 16 Diode 17 First voltage sensor 18 First current sensor 19 Capacitor DESCRIPTION OF SYMBOLS 21 Filter circuit 22 AC reactor 23 Capacitor 24 2nd current sensor 25 2nd voltage sensor 26, 29 Electrolytic capacitor 30 Control processing part 32 Booster circuit control part 33 Inverter circuit control part 34 Averaging processing part 36 Capacitor 41 1st calculating part 42 the first adder 43 compensator 44 second adder 51 the second operation unit 52 third adder 53 compensator 54 fourth adder 61 cable 62 connector 100 converter L _B DC bus L _in path Q1 to Q4, Qb switching element B1, SB2 board

Claims (3)

In order from the input side, a DC to AC converter comprising a booster circuit including a DC reactor , a DC bus, and an inverter circuit,
When the absolute value of the AC voltage target value to be output exceeds the input DC voltage, the boost circuit is boosted to generate the absolute value of the voltage target value, and the inverter circuit performs only necessary polarity inversion. And when the absolute value of the voltage target value is lower than the input DC voltage, the boost operation of the boost circuit is stopped and the inverter circuit is operated to generate the voltage target value. And
A smoothing small-capacitance capacitor connected to the DC bus;
An electrolytic capacitor on the input side of the booster circuit, which is used to flow in and out of electric charges in a sinusoidal shape having a frequency twice that of the alternating current, and is provided independently on an independent substrate, and has a larger capacity than the small-capacitance capacitor And a conversion device.   The converter according to claim 1, wherein a part of the casing of the converter is opened so that the electrolytic capacitor can be attached and detached together with the substrate.   2. The electrolytic capacitor box for accommodating the electrolytic capacitor is provided separately from a main body portion of the casing of the conversion device, and the electrolytic capacitor box can be attached to and detached from the main body portion by connector or terminal connection. Conversion device.