JP5826642B2 - Power conversion apparatus and method - Google Patents

Description

Embodiments of the present invention relates to a power converter及beauty how.

The power converter for railways has a configuration that mainly takes power from a high-voltage overhead line such as DC 1500 V or AC 20 kV. For example, a high-voltage circuit system that supplies power to a vehicle driving motor, a control circuit, etc. It is necessary to ensure a sufficient withstand voltage between the low-voltage circuit systems.
Among them, a drive circuit for a voltage-driven semiconductor element is a circuit that connects a voltage-driven semiconductor element connected to a high-voltage circuit system and a control circuit for a low-voltage circuit system that controls its on / off, and has a high withstand voltage. Required.
A drive circuit for a general voltage-driven semiconductor element supplies a control power supply and a control signal generated on the low-voltage circuit system side to the drive circuit, and the control power supply and the control signal are separately used in the drive circuit using separate insulation transformers, etc. Thus, a configuration for ensuring insulation is employed (see, for example, Patent Document 1).
In addition, many examples have been proposed in which a photocoupler is used instead of an insulating transformer for the insulation of the control signal.

JP 2003-299344 A

However, as a drive circuit for a voltage-driven semiconductor element, a control power supply and a control signal generated on the low-voltage circuit system side are supplied to the drive circuit, and the control power supply and the control signal are separately used in the drive circuit using separate insulation transformers, etc. If the structure for ensuring insulation is adopted, there arises a problem that the number of parts is increased and the outer shape of the board is increased accordingly.
An object of the present invention is to provide, while ensuring the insulation of the control power supply and control signal in the drive circuit to provide a power conversion device及beauty how that can suppress an increase in the size of the board outline.

The power conversion unit of the power conversion device according to the embodiment includes a switching element having a gate terminal , converts supplied power, and supplies drive power to the drive motor.
The control power supply unit supplies control power for driving the switching element.
The gate control signal generator generates a gate control signal for controlling the on / off timing of the switching element.
Thus, the modulation unit generates a control power signal by superimposing the gate control signal on the control power.
On the other hand, the gate power supply generation unit generates a gate power supply based on the control power signal input through the isolation transformer, and the demodulation unit performs the gate control based on the control power signal input through the isolation transformer. Demodulate the signal.
As a result, the driving unit drives the switching element based on the generated gate power supply and the demodulated gate control signal.

FIG. 1 is a schematic block diagram of a drive power system of a DC train. FIG. 2 is a diagram illustrating the detailed configuration of the inverter. FIG. 3 is a schematic configuration diagram of the gate control circuit. FIG. 4 is a detailed configuration diagram of the gate circuit. FIG. 5 is a schematic configuration diagram of a gate control circuit according to a modification of the first embodiment. FIG. 6 is a detailed configuration diagram of a gate circuit according to a second modification of the first embodiment. FIG. 7 is a schematic configuration diagram of the gate control circuit according to the second embodiment. FIG. 8 is a schematic configuration diagram of a gate control circuit according to the third embodiment.

Hereinafter, the power converter of an embodiment is explained, referring to drawings.
[1] First Embodiment FIG. 1 is a schematic configuration block diagram of a drive power system of a DC train.
The first embodiment is a power conversion device mounted on a DC train.
As shown in FIG. 1, the DC train 10 is connected to a feeder (overhead wire) 11 via a pantograph (current collector) 12, and a power converter 15 installed via a wheel 13 and a track 14. And a motor 16 that drives the DC train 10 in response to the power supply from the power converter 15.

  The power conversion device 15 is connected to a charging circuit (not shown), supplies a stored power as a control power supply, a controller 22 that controls the entire power conversion device 15, and an inverter (VVVF inverter) circuit that drives the motor 16. 23, and a gate control circuit 24 for performing gate control of transistors to be described later constituting the inverter 23.

FIG. 2 is a diagram illustrating the detailed configuration of the inverter.
Each of the inverters 23 is composed of an insulated gate bipolar transistor (IGBT) and has a first high potential side transistor TU1, a second high potential side transistor TU2, and a third high potential side transistor TU2 connected to a pantograph 12 side which is a high potential side power source. A high potential side transistor TU3 is provided.
Further, the inverter 23 is composed of an insulated gate bipolar transistor (IGBT), and a first low potential side transistor TL1, a second low potential side transistor TL2, and a second low potential side transistor TL2 each having an emitter terminal connected to the wheel 13 side which is a low potential side power source. 3 A low potential side transistor TL3 is provided.

  Here, the emitter terminal of the first high potential side transistor TU1 is connected to the collector terminal of the first low potential side transistor TL1, and the emitter terminal of the second high potential side transistor TU2 is the collector of the second low potential side transistor TL2. The emitter terminal of the third high potential side transistor TU1 is connected to the collector terminal of the third low potential side transistor TL3. Further, a feedback diode DU1 is connected in parallel with the first high potential side transistor TU1, a feedback diode DU2 is connected in parallel with the second high potential side transistor TU2, and a feedback diode DU3 is connected in parallel with the third high potential side transistor TU1. A feedback diode DL1 is connected in parallel with the first low potential side transistor TL1, a feedback diode DL2 is connected in parallel with the second low potential side transistor TL1, and a feedback diode DL3 is connected in parallel with the third low potential side transistor TL1. Is connected.

  In FIG. 2, the first high-potential side transistor TU1 and the first low-potential side transistor TL1 form a pair of transistor groups, and the U-phase current is supplied by alternately repeating on / off. Similarly, the second high-potential side transistor TU2 and the second low-potential side transistor TL2 constitute a pair of transistor groups, and alternately turn on and off to supply the V-phase current, and the third high-potential side transistor TL2 The transistor TU3 and the third low-potential side transistor TL3 form a pair of transistor groups, and supply a W-phase current by alternately turning on and off. As a result, the motor 16 configured as an AC induction motor is driven.

Next, a schematic configuration of the gate control circuit 24 will be described.
FIG. 3 is a schematic configuration diagram of the gate control circuit.
In FIG. 3, for simplification of description, a system mainly including the first high potential side transistor TU1 and the feedback diode DU1 will be described.

  The gate control circuit 24 is broadly divided into a DC power signal PWD supplied from the control power source 21 and a gate control signal (pulse signal) CS from the controller 22 to convert the DC power signal PWD into the gate control signal CS. The modulation circuit 31 that modulates the output signal and outputs the control power signal CPW on which the control signal is superimposed, and the control power signal CPW is supplied to the primary side (low voltage side), and the high voltage control power is supplied to the secondary side (high voltage side). An isolation transformer 32 that outputs the signal HCPW, a gate power generation circuit 33 that is connected to the secondary side (high voltage side) of the isolation transformer 32 and generates a gate power from the high voltage control power signal HCPW, and a high voltage control power signal HCPW A control signal demodulating circuit 34 for demodulating and outputting the gate control signal CS from the first high potential side control based on the input gate control signal CS And a transistor driving circuit 35 that generates the signal SU1 and drives the first high potential side transistor TU1 to the third high potential side transistor TU3 and the first low potential side transistor TL1 to the third low potential side transistor TL3. .

In FIG. 3, for simplification of illustration, only the system of the first high-potential side control signal SU1 is shown in the transistor drive circuit 35, but actually, as shown in FIG. A system of 2 high potential side control signal SU2, third high potential side control signal SU3, first low potential side control signal SL1 to third low potential side control signal SL3 is also provided and operates in the same manner.
In the above configuration, the gate power generation circuit 33 includes a positive terminal TP that supplies a positive voltage Vgp, an intermediate terminal TA that supplies an intermediate voltage AG, and a negative terminal TN that supplies a negative voltage Vgn.

  The circuit corresponding to the system of the first high potential side control signal SU1 of the transistor drive circuit 35 is a high potential side transistor (NPN transistor) 41P in which the positive terminal is connected to the collector terminal and the control signal CS is input to the base terminal. A low potential side in which an emitter terminal is connected to the emitter terminal of the high potential side transistor 41P and a gate of the first high potential side transistor TU1, a control signal is input to the base terminal, and a negative terminal TN is connected to the collector terminal. Transistor (PNP transistor) 41N.

Next, the detailed configuration of the gate control circuit 24 will be described.
FIG. 4 is a detailed configuration diagram of the gate circuit.
The modulation circuit 31 modulates a power signal PWD based on a switching circuit 53 including a high potential side switching transistor (n channel MOS transistor) 51 and a low potential side switching transistor (n channel MOS transistor) 52, and a gate control signal CS. The oscillation frequency control unit 54 generates a control power signal CPW on which the gate control signal CS is superimposed.

Here, the drain terminal of the high potential side switching transistor 51 is connected to the primary high potential side of the isolation transformer 32, and the source terminal is connected to the negative side of the control power supply. Further, the drain terminal of the low potential side switching transistor 52 is connected to the low potential side on the primary side of the insulating transformer 32, and the source terminal is connected to the negative side of the control power supply.
The gate power supply generation circuit 33 includes a diode bridge rectifier circuit 61 having diodes D1 to D4 and a capacitor smoothing circuit 62 composed of a pair of smoothing capacitors C1 and C2.

  The control signal demodulation circuit 34 includes a high-potential side bandpass filter 71 having a capacitor C11, a coil L11, and a resistor R11, a backflow prevention diode D11, and a low-potential side bandpass filter 72 having a capacitor C21, a coil L21, and a resistor R21. , A backflow prevention diode D21, and a high potential side low pass filter 73 having a resistor R31 and a capacitor C31.

  In addition, the control signal demodulation circuit 34 includes a low-potential side low-pass filter 74 having a resistor R41 and a capacitor C41, a pull-up resistor R51, a pull-down resistor R52, and a pull-up resistor R51 and a pull-down resistor R52 connected in series. A smoothing capacitor C41 connected in parallel and current limiting resistors R61 and R62 having one end connected to the positive terminal P are provided.

  The control signal demodulating circuit 34 has a gate terminal connected to the connection point between the pull-up resistor R51 and the smoothing capacitor C41, a drain terminal connected to the other end of the current limiting resistor R61, and a source terminal connected to the intermediate terminal TA. The first switching transistor (n-channel MOS transistor) 81 that drives the high potential side transistor 41P and the low potential side transistor 41N, the gate terminal is connected to the drain terminal of the first switching transistor 81, and the drain terminal is the current limiting resistor. A second terminal for driving the high potential side transistor 41P and the low potential side transistor 41N by connecting the other end of R62 and the gate terminals of the high potential side transistor 41P and the low potential side transistor 41N and connecting the source terminal to the negative side terminal TN. Switching transistor (n-channel MO It includes a transistor) 82, a.

Next, the operation of the first embodiment will be described.
When the gate control signal CS is input to the modulation circuit 31, in the oscillation frequency control unit 54 in the modulation circuit 31, when the gate control signal CS is at “H” level (on command state), the gate control signal CS is set to “L”. Select the oscillation frequency of the high-frequency alternating current corresponding to the “level” (off command state). For example, in the ON command state where the gate control signal CS is “H” level, the oscillation frequency control unit 54 sets the oscillation frequency of the high frequency alternating current to 100 kHz, and in the OFF command state where the gate control signal CS is “L” level, The oscillation frequency of the high frequency alternating current is 30 kHz.

Thereby, the high potential side switching transistor 51 and the low potential side switching transistor 52 of the switching circuit 53 are driven by the oscillation frequency control unit 54 to generate a rectangular wave alternating current by a push-pull method and output it to the insulating transformer 32. Become.
That is, when the gate control signal CS is “H” level on command state, 100 kHz high frequency alternating current is output to the insulation transformer 32, and when the gate control signal CS is “L” level off command state, 30 kHz high frequency alternating current is output. Output to the isolation transformer 32. This means that high-frequency alternating current modulated based on the gate control signal CS is input to the isolation transformer.

And the high frequency alternating current input into the primary side used as the low voltage | pressure side of the insulation transformer 32 is transformed by the insulation transformer 32 in an insulated state, and is transmitted to the secondary side used as the high voltage side.
The secondary output of the isolation transformer 32 is branched and one of the outputs is input to a gate power supply generation circuit 33 configured by a diode bridge rectifier circuit 61 and a capacitor smoothing circuit 62. As a result, the gate power supply generation circuit 33 performs full-wave rectification to generate a stable positive voltage Vgp (positive power supply) and negative voltage Vgn (negative power supply) and supply them to each unit.
The other branched secondary output of the isolation transformer 32 is input to the control signal demodulation circuit 34.

  In the control signal demodulating circuit 34, the band pass filter 71 and the band pass filter 72 operate so as to pass a high frequency alternating current of 100 kHz and a high frequency alternating current of 30 kHz when the gate control signal CS is in the “H” level on command state. Only the component corresponding to the gate control signal CS is extracted from the secondary side output of the transformer 32 and output. On the other hand, the low-pass filter 73 and the low-pass filter 74 operate so as to pass only high-frequency alternating current of 30 kHz in the off command state in which the gate control signal CS is “L” level.

As a result, the control signal demodulating circuit 34 effectively uses the high potential side transistor 41P and the low potential side transistor 41N corresponding to the system of the first high potential side control signal SU1 of the transistor drive circuit 35 based on the gate control signal CS. Will be driven.
As a result, according to the first embodiment, the gate control signal CS is input via the one isolation transformer 32 that supplies the driving power of the motor 16, and the motor is synchronized with the input gate control signal CS. The high potential side transistor 41P and the low potential side transistor 41N constituting the inverter 23 can be driven by controlling the gate control circuit 24 that drives 16.

  Similarly, the gate control signal CS is input through one insulating transformer 32 that supplies driving power to the motor 16, and the second high potential side transistor TU2, the third high potential side transistor TU3, and the first low potential side. The transistors TL1 to TL3 can be driven.

Therefore, according to the first embodiment, the insulation of both the control power supply 21 that supplies the control power supply and the controller 22 that outputs the gate control signal CS is formed by the single insulation transformer 32 while configuring the low-voltage circuit system. Therefore, it is possible to simplify the apparatus configuration and improve the reliability of the apparatus and reduce the manufacturing cost of the apparatus.
Furthermore, the installation area of the insulating element that insulates the low-voltage path system from the high-voltage circuit system can be reduced, and consequently the board area of the control circuit board can be reduced.

[1.1] First Modification of First Embodiment In the first embodiment described above, the input to the control signal demodulation circuit 34 is branched from the secondary coil of the isolation transformer 32. The first modification of the embodiment is an embodiment in which a tertiary coil is provided in an insulating transformer and a control signal is demodulated based on the output of the tertiary coil.

FIG. 5 is a schematic configuration diagram of a gate control circuit according to a modification of the first embodiment.
In FIG. 5, for simplification of description, a system mainly including the first high-potential side transistor TU1 and the feedback diode DU1 will be described, and the same parts as those in FIG. The detailed description is incorporated herein by reference.

  The gate control circuit 24 is broadly divided into a DC power signal PWD supplied from the control power source 21 and a gate control signal (pulse signal) CS from the controller 22 to convert the DC power signal PWD into the gate control signal CS. The modulation circuit 31 that modulates the output signal and outputs the control power signal CPW on which the control signal is superimposed, and the control power signal CPW is supplied to the primary side (low voltage side), and the high voltage control power is supplied to the secondary side (high voltage side). An isolation transformer 32 that outputs the signal HCPW, a gate power generation circuit 33 that is connected to the secondary side (high voltage side) of the isolation transformer 32 and generates a gate power from the high voltage control power signal HCPW, and a high voltage control power signal HCPW A control signal demodulating circuit 34 for demodulating and outputting the gate control signal CS from the first high potential side control based on the input gate control signal CS And a transistor driving circuit 35 that generates the signal SU1 and drives the first high potential side transistor TU1 to the third high potential side transistor TU3 and the first low potential side transistor TL1 to the third low potential side transistor TL3. .

5, for simplification of illustration, only the system of the first high-potential side control signal SU1 is shown in the transistor drive circuit 35 as in FIG. As shown, the second high-potential-side control signal SU2, the third high-potential-side control signal SU3, the first low-potential-side control signal SL1 to the third low-potential-side control signal SL3 are also provided and operate similarly. doing.
In the above configuration, the insulating transformer 32A includes a tertiary coil on the high-pressure circuit side in addition to the primary side coil and the secondary side coil.

As a result, the control signal demodulation circuit 34A demodulates and outputs the gate control signal CS from the high voltage control signal HS output from the tertiary coil.
Other operations are the same as those in the first embodiment.
According to the first modification of the first embodiment, in addition to the effects of the first embodiment, the circuit on the motor drive system side (gate power generation circuit 33 side) and the circuit on the motor control system side It is possible to drive in different voltage ranges (lower voltage ranges), to further reduce the size of circuit components, and to further reduce the component cost and the board area.

[1.2] Second Modification of First Embodiment In the above description, the gate power supply generation circuit 33 and the control signal demodulation circuit 34 (34A) perform control using a full-wave rectified signal. The second modification is an embodiment in which control is performed using a half-wave rectified signal.
FIG. 6 is a detailed configuration diagram of a gate circuit according to a second modification of the first embodiment. In FIG. 6, the same parts as those in FIG. 4 are denoted by the same reference numerals.
The modulation circuit 31 has the same configuration as that in FIG.
The insulation transformer 32A of the second modified example is provided with a tertiary coil as in the first modified example, and the control signal demodulation circuit 34A demodulates the control signal based on the output of the tertiary coil.
Further, the gate power generation circuit 33A of the second modification performs half-wave rectification.

  The second modification includes a diode half-wave rectifier circuit 91 having a diode D51 and a diode D52, and a capacitor smoothing circuit 62 composed of a pair of smoothing capacitors C1 and C2.

The control signal demodulating circuit 34A includes a high potential side band pass filter 71 having a capacitor C11, a coil L11 and a resistor R11, a backflow prevention diode D11, and a high potential side low pass filter 73 having a resistor R31 and a capacitor C31. ing.
The control signal demodulating circuit 34A has a pull-up resistor R51, a current limiting resistor R62 having one end connected to the positive terminal P, a gate terminal connected to a connection point between the pull-up resistor 51 and the capacitor C31, and a drain. A switching transistor 82 having a terminal connected to the other end of the current limiting resistor R61 and a source terminal connected to the intermediate terminal TA to drive the high potential side transistor 41P and the low potential side transistor 41N (second). .

Next, the operation of the second modification will be described.
When the gate control signal CS is input to the modulation circuit 31, in the oscillation frequency control unit 54 in the modulation circuit 31, when the gate control signal CS is at “H” level (on command state), the gate control signal CS is set to “L”. Select the oscillation frequency of the high-frequency alternating current corresponding to the “level” (off command state).

As a result, the switching circuit 53 is driven by the oscillation frequency control unit 54 so that the high-potential side switching transistor 51 and the low-potential side switching transistor 52 generate rectangular wave alternating current by the push-pull method and output it to the isolation transformer 32. .
And the high frequency alternating current input into the primary side used as the low voltage | pressure side of the insulation transformer 32 is transformed by the insulation transformer 32 in an insulated state, and is transmitted to the secondary side used as the high voltage side.

  The secondary output of the isolation transformer 32 is input to a gate power supply generation circuit 33 </ b> A configured by a diode half-wave rectification circuit 91 and a capacitor smoothing circuit 62. Thereby, the gate power supply generation circuit 33A performs half-wave rectification, generates a stable positive voltage Vgp (positive power supply) and a negative voltage Vgn (negative power supply), and supplies them to each unit.

The tertiary output of the isolation transformer 32 is input to the control signal demodulation circuit 34A.
In the control signal demodulating circuit 34A, the band pass filter 71 operates so as to pass the 100 kHz high frequency alternating current and the 30 kHz high frequency alternating current when the gate control signal CS is in the “H” level on-command state. Only the component corresponding to the gate control signal CS is extracted from the side output and output. On the other hand, the low-pass filter 73 operates so as to pass only high-frequency alternating current of 30 kHz in the off command state where the gate control signal CS is “L” level.

As a result, the control signal demodulating circuit 34A effectively has the high potential side transistor 41P and the low potential side transistor 41N corresponding to the system of the first high potential side control signal SU1 of the transistor drive circuit 35 based on the gate control signal CS. Will be driven.
As a result, according to the second modification of the first embodiment, in addition to the effects of the first embodiment, one insulating transformer that supplies driving power to the motor 16 while further reducing the number of components. The gate control signal CS is input via the input terminal 32, and the gate control circuit 24 that drives the motor 16 is controlled in synchronization with the input gate control signal CS. The potential side transistor 41N can be driven.

[2] Second Embodiment The first embodiment described above is a power conversion device mounted on a DC train, but the second embodiment is a power conversion device mounted on an AC train.

FIG. 7 is a schematic configuration diagram of the gate control circuit according to the second embodiment.
The power converter 15A according to the second embodiment is different from the power converter 15 according to the first embodiment in that a transformer 101 that converts the voltage of the supplied AC power and two transformers 101, as shown in FIG. An AC / DC converter (ADC) 102 that performs AC / DC conversion based on the secondary output, and a smoothing capacitor 103 that smoothes the output signal of the ADC 102 and supplies it to the inverter 23 are provided.
Therefore, the effect of the second embodiment is the same as that of the first embodiment except that AC power is used, and the same modification as that of the first embodiment can be performed.

[3] Third embodiment.
In each of the above embodiments, the gate control signal CS is simply transmitted from the low voltage circuit side to the high voltage circuit side. However, in the third embodiment, an abnormality on the high voltage circuit side is detected and transmitted to the controller 22. It is an embodiment in the case of doing.

FIG. 8 is a schematic configuration diagram of a gate control circuit according to the third embodiment.
In FIG. 8, the same parts as those in FIG. 3 are denoted by the same reference numerals.
8 differs from FIG. 3 in that a tertiary coil is provided on the primary side of the insulation transformer 32B, and an abnormal state from the high-voltage circuit system side is detected via the abnormality detection circuit 111, and the abnormality detection signal SE is sent to the controller 22 as an abnormality detection signal SE. It is a point to output.
In this case, the abnormal state includes an abnormal state of the secondary coil voltage of the insulating transformer 32B.
It is also possible to set the gate power generation circuit 33, the control signal demodulation circuit, etc. to output a predetermined voltage when an abnormality is detected.

According to the third embodiment, it is possible to detect a decrease in the gate voltage of the voltage-driven transistor and to easily avoid a situation such as destruction of the voltage-driven transistor.
In addition, the abnormality detection signal can be transmitted from the high voltage circuit system side to the low voltage circuit system side even though the low voltage circuit system side and the high voltage circuit system side are insulated via one insulating transformer 32B. Thus, abnormality detection can be performed at an early stage and an abnormal state can be dealt with early.

[4] Effects of Embodiment As described above, according to each embodiment, it is possible to transmit a signal of a control drive system and a signal of a control system by one insulating transformer 32, 32A, 32B. , Reliability can be improved by reducing the number of parts. Furthermore, the apparatus can be miniaturized.

[5] Modification of Embodiment In the above description, only the signal for controlling power conversion is described as the gate control signal CS. However, the gate control signal CS is configured to include a non-conduction command and an oscillation stop command. It is also possible.
In the above description, an insulating transformer is used as an insulating means (insulating element). However, a configuration is adopted in which insulation is performed via a photocoupler instead of the insulating transformer, and a booster circuit is provided at the subsequent stage of the photocoupler. It is also possible to do.

In the above description, a case where a cored core transformer is used as the insulating transformers 32, 32A, 32B has been described. However, an air core transformer may be used.
Moreover, although IGBT and a bipolar transistor were used as each transistor, it can also be comprised so that MOSFET may be used.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

10 DC train 11 Feed wire (overhead wire)
12 Pantograph (current collector)
13 Wheel 14 Line 15, 15A Power converter 16 Motor 21 Control power supply 22 Controller 23 Inverter 24 Gate control circuit 31 Modulation circuit 32, 32A, 32B Insulation transformer (insulation means, insulation element)
33, 33A Gate power supply generation circuit 34, 34A Control signal demodulation circuit 35 Transistor drive circuit 51 High potential side switching transistor 52 Low potential side switching transistor 53 Switching circuit 54 Oscillation frequency controller 61 Diode bridge rectifier circuit 62 Capacitor smoothing circuit 71 High potential Side band pass filter 72 Low potential side band pass filter 73 High potential side low pass filter 74 Low potential side low pass filter 74
111 Abnormality detection circuit CPW control power signal CS gate control signal HCPW high voltage control power signal HS high voltage control signal SE abnormality detection signal

Claims (5)

A power conversion unit having a switching element having a gate terminal and converting the supplied power to supply the driving power to the driving motor;
A control power supply for supplying control power for driving the switching element;
A gate control signal generator for generating a gate control signal for controlling the on / off timing of the switching element;
A modulation unit that generates a control power signal by superimposing the gate control signal on the control power;
A gate power generation unit that generates a gate power based on the control power signal input via an isolation transformer;
A demodulator that demodulates the gate control signal based on the control power signal input via the isolation transformer;
Based on the generated gate power supply and the demodulated gate control signal, a driving unit that drives the switching element;
The power converter provided with.   The gate power generation unit includes a full-wave rectification circuit that generates the gate power by performing full-wave rectification of the control power signal.
  The power conversion device according to claim 1.   The gate control signal generation unit is configured to make a frequency of a signal indicating timing to turn on the switching element different from a frequency of a signal indicating timing to turn off the switching element.
  The power converter according to claim 1 or 2.   The gate power generation unit receives the control power signal via a secondary coil of the isolation transformer,
  The control power signal is input to the demodulator through a tertiary coil of the insulation transformer.
  The power converter device as described in any one of Claims 1 thru | or 3. A switching element and an insulating transformer having a gate terminal, a way Ru runs power conversion device supplies drive power to the rotating motor drive converts the power supplied,
Generating a gate control signal for controlling on / off timing of the switching element;
Generating a control power signal by superimposing the gate control signal on control power for driving the switching element;
Generating a gate power source based on the control power signal input through the isolation transformer;
Demodulating the gate control signal based on the control power signal input via the isolation transformer;
Driving the switching element based on the generated gate power source and the demodulated gate control signal;
Law who with.

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