JP4290669B2 - Noise suppression circuit - Google Patents

Description

  The present invention relates to a noise suppression circuit that suppresses noise propagating on first and second conductive lines.

  Power electronics devices such as switching power supplies, inverters, lighting circuits for lighting devices, and the like have a power conversion circuit that converts power. The power conversion circuit has a switching circuit that converts direct current into rectangular alternating current. For this reason, the power conversion circuit generates a ripple voltage having a frequency equal to the switching frequency of the switching circuit and noise associated with the switching operation of the switching circuit. This ripple voltage and noise adversely affect other devices. Therefore, it is necessary to provide a means for reducing ripple voltage and noise between the power conversion circuit and another device or line.

  Recently, power line communication has been considered promising as a communication technique used in building a communication network in the home, and its development is being promoted. In power line communication, communication is performed by superimposing a high-frequency signal on the power line. In this power line communication, noise is generated on the power line due to the operation of various electric / electronic devices connected to the power line, which causes a decrease in communication quality such as an increase in error rate. Therefore, a means for reducing noise on the power line is required. In power line communication, it is necessary to prevent a communication signal on the indoor power line from leaking to the outdoor power line.

  Noise that propagates through two conductive lines includes normal mode (differential mode) noise that causes a potential difference between the two conductive lines, and common mode noise that propagates through the two conductive lines in the same phase. There is.

In order to suppress these noises, it is effective to provide a line filter in a power supply line, a signal line, or the like. Patent Document 1 describes an AC line filter that removes noise on an AC power supply line. This AC line filter includes a negative phase transformer for suppressing a normal mode and two common mode choke coils on a pair of power supply lines. That is, a plurality of inductors are provided on the same line.
JP 10-256859 A

  In the line filter, a large circuit value (inductance) is used as the inductor on the line, and therefore, the parasitic component becomes a big problem. If there is a parasitic component, each circuit element has a self-resonance point (self-resonant frequency) due to the element itself and the parasitic component. A parasitic capacitor exists in parallel in the inductor on the line, and a self-resonance point is generated by forming a parallel resonance circuit. The self-resonance point is a limit value at which the inductor acts as a property of the inductor, and at a frequency higher than the self-resonance point, the self-resonance point acts as a capacitor instead of an inductor. In this case, since a through-path due to a parasitic capacitor occurs, the high frequency performance does not increase in the band above the self-resonance point, and desired characteristics cannot be obtained. Since the inductance of the inductor on the line has a large value, a parasitic capacitor having a capacitance of about several pF naturally occurs in manufacturing the coil. In this case, since the inductance value is large, the self-resonance point has a low frequency. That is, since it has a self-resonance point at a low frequency, it adversely affects high frequency performance above the self-resonance frequency.

  The line filter described in Patent Document 1 does not improve the adverse effects caused by such parasitic capacitors. This line filter requires a coil with a large inductance value as an inductor on the line when attempting to obtain attenuation on the low frequency side. In this case, since the inductance value is large, a parasitic capacitor with a slight capacitance is required. However, a self-resonant point must be formed and a self-resonant point existing at a low frequency must be used. When a self-resonance point exists, the inductor has the property of a capacitor, resulting in a circuit in a state that is equivalently different from the designed circuit configuration. When using an inductor on the line that has a self-resonance point at a low frequency, in order to reduce the attenuation on the high frequency side, a plurality of coils and a capacitor are used together, such as a T-type filter. Must be configured. For this reason, in order to reduce noise satisfactorily over a wide range, a multi-stage configuration often requires a plurality of coils, and the mounting area constituting the filter has to be increased. Furthermore, in the case of the common mode, there is a limit to the capacitors that can be used due to restrictions such as leakage current, and the influence of the parasitic capacitor component of the coil is increased, which may affect the high frequency characteristics.

  Further, in practice, there is a resistance component equivalently in parallel with the inductor on the line, and there is a limit to the amount of attenuation that can be obtained due to this influence. Furthermore, depending on the impedance of the noise source, the noise reduction effect changes greatly depending on whether the inductor is used as the input or the capacitor is used as the input.

  The present invention has been made in view of such problems, and its purpose is to improve the deterioration of attenuation characteristics due to parasitic components and impedance fluctuations without increasing the number of inductors on the line, and to cover a wide range from low to high frequencies. An object of the present invention is to provide a noise suppression circuit capable of obtaining good attenuation characteristics.

  A noise suppression circuit according to a first aspect of the present invention is a noise suppression circuit that suppresses noise propagating on first and second conductive lines, and includes a first winding provided on the first conductive line. And a second winding and a first capacitor connected in series with each other, one end connected to one end of the first winding and the other end connected to the second conductive line. One series circuit, a third winding and a second capacitor connected in series with each other, one end connected to the other end of the first winding and the other end to the second winding And a second series circuit connected between the first capacitor and the second capacitor. The second winding and the third winding are magnetically coupled to the first winding on the first conductive line.

In the noise suppression circuit according to the first aspect of the present invention, a normal mode noise suppression circuit is configured. In this noise suppression circuit, the attenuation characteristic obtained by the circuit part composed of the first winding and the first series circuit, and the attenuation characteristic obtained by the circuit part composed of the first winding and the second series circuit. As a result, the deterioration of the attenuation characteristics due to parasitic components and impedance fluctuations can be improved even in the configuration in which only the inductor component by the first winding is provided on the line (first conductive line). Good attenuation characteristics can be obtained over a wide range from high to high.
In particular, an attenuation peak is formed on the low frequency side due to the relationship between the first winding and the second winding, and an attenuation peak is formed on the high frequency side due to the resonance circuit in the second series circuit. In addition, in the middle region between these attenuation peaks, a peak of a self-resonance point is formed by the first winding and its parasitic capacitor. By adjusting the relationship between the circuit values and adjusting these peak positions, desired attenuation characteristics can be obtained over a wide range.

Here, in order to obtain desired attenuation characteristics over a wide range, it is preferable to satisfy the following conditions. That is, when the inductance of the third winding is xL and the inductance of the first winding is LL,
xL <LL
And when the inductance of the second winding is IL,
IL <LL
Is preferably satisfied.

When the coupling coefficient between the first winding and the second winding is k1, and the coupling coefficient between the first winding and the third winding is k2,
k1 <k2
Is preferably satisfied.
In particular, it is preferable that the coupling coefficient k2 between the first winding and the third winding is strong. Ideally, it is preferable that k2≈1.

The noise suppression circuit according to the first aspect of the present invention may further include a resistance element connected in parallel to the second capacitor in the second series circuit.
Thereby, even when there is a parasitic resistance as a parasitic component of the first winding, the influence is reduced, and a better attenuation characteristic can be obtained.

A noise suppression circuit according to a second aspect of the present invention is a noise suppression circuit for suppressing noise propagating on the first and second conductive lines, and the first winding provided on the first conductive line. And a first series circuit including a second winding and a first capacitor connected in series with each other, one end connected to one end of the first winding and the other end connected to ground. , Including a third winding and a second capacitor connected in series with each other, one end connected to the other end of the first winding and the other end to the second winding in the first series circuit A second series circuit connected between the first winding and the first capacitor; and a fourth winding provided on the second conductive line and magnetically coupled to the first winding; Including a fifth winding and a third capacitor connected, one end connected to one end of the fourth winding. A third series circuit having one end connected to ground, and a sixth winding and a fourth capacitor connected in series, one end connected to the other end of the fourth winding and the other end Comprises a fourth series circuit connected between the fifth winding and the third capacitor in the third series circuit. The second winding and the third winding are magnetically coupled to the first winding on the first conductive wire, and the fifth winding and the sixth winding are the second Are magnetically coupled to the fourth winding on the conductive wire.

In the noise suppression circuit according to the second aspect of the present invention, a common mode noise suppression circuit is configured. In this noise suppression circuit, with respect to the noise component propagating on the first conductive line, the attenuation characteristic obtained by the circuit portion composed of the first winding and the first series circuit, the first winding, A synergistic effect with the attenuation characteristic obtained by the circuit portion including the second series circuit is obtained. Similarly, with respect to the noise component propagating on the second conductive line, the attenuation characteristic obtained by the circuit portion including the fourth winding and the third series circuit, the fourth winding and the fourth A synergistic effect with the attenuation characteristic obtained by the circuit portion composed of the series circuit is obtained. Due to these synergistic effects, even in the configuration in which only the inductor component by one winding (first and fourth winding) is provided on each line (first and second conductive lines), the parasitic component and The deterioration of the attenuation characteristic due to impedance fluctuation is improved, and a good attenuation characteristic can be obtained over a wide range from a low range to a high range.
In particular, an attenuation peak is formed on the low-frequency side due to the relationship between the first winding and the second winding, and the relationship between the fourth winding and the fifth winding, and resonance in the second series circuit. An attenuation peak is formed on the high frequency side by the resonance circuit in the circuit and the fourth series circuit. In addition, in the middle region between these attenuation peaks, a self-resonance point due to the first winding and its parasitic capacitor and a peak at the self-resonance point due to the fourth winding and its parasitic capacitor are formed. By adjusting the relationship between the circuit values and adjusting these peak positions, desired attenuation characteristics can be obtained over a wide range.

Here, in order to obtain desired attenuation characteristics over a wide range, it is preferable to satisfy the following conditions. That is, when the inductance of the third winding and the inductance of the sixth winding are both xL, and the inductance of the first winding and the inductance of the fourth winding are both LL,
xL <LL
And when the inductance of the second winding and the inductance of the fifth winding are both IL,
IL <LL
Is preferably satisfied.
By satisfying such conditions, better damping characteristics can be obtained.

Further, the coupling coefficient between the first winding and the second winding and the coupling coefficient between the fourth winding and the fifth winding are both k1, the first winding and the third winding. And the coupling coefficient between the fourth winding and the sixth winding are both k2,
k1 <k2
Is preferably satisfied.
By satisfying such conditions, better damping characteristics can be obtained.
In particular, it is preferable that the coupling coefficient between the first winding and the third winding and the coupling coefficient k2 between the fourth winding and the sixth winding are strong. Ideally, it is preferable that k2≈1.

In the noise suppression circuit according to the second aspect of the present invention, the first resistance element connected in parallel to the second capacitor in the second series circuit and the fourth capacitor in the fourth series circuit are connected in parallel. You may make it further provide the connected 2nd resistance element.
As a result, even when there is a parasitic resistance as a parasitic component of the first and fourth windings, the influence is reduced and a better attenuation characteristic can be obtained.

According to the noise suppression circuit of the first aspect of the present invention, each winding in the first and second series circuits is magnetically coupled to the first winding on the first conductivity. To obtain a synergistic effect between the attenuation characteristic obtained by the circuit part composed of one winding and the first series circuit and the attenuation characteristic obtained by the circuit part composed of the first winding and the second series circuit. Can do. As a result, only the inductor component of the first winding is provided on the line (first conductive line), and the deterioration of attenuation characteristics due to parasitic components and impedance fluctuations is improved without increasing the number of inductors on the line. In addition, a good attenuation characteristic can be obtained over a wide range from the low range to the high range.

According to the noise suppression circuit of the second aspect of the present invention, each winding in the first and second series circuits is magnetically coupled to the first winding on the first conductivity, and the second conductivity on Since the respective windings in the third and fourth series circuits are magnetically coupled to the fourth winding of the circuit, the circuit portion including the first winding and the first series circuit and the fourth winding Attenuation characteristics obtained by a circuit portion comprising a third series circuit, a circuit portion comprising a first winding and a second series circuit, and a circuit portion comprising a fourth winding and a fourth series circuit Thus, a synergistic effect with the attenuation characteristic obtained can be obtained. Thereby, it is the structure which provided only the inductor component by one coil | winding (1st and 4th coil | winding) on each line (1st and 2nd conductive wire), without increasing the inductor on a line, It is possible to improve the deterioration of attenuation characteristics due to parasitic components and impedance fluctuations, and obtain good attenuation characteristics over a wide range from low to high frequencies.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[First Embodiment]

  First, the noise suppression circuit according to the first embodiment of the present invention will be described. FIG. 1 shows a configuration example of a noise suppression circuit according to the present embodiment. This noise suppression circuit relates to a circuit for suppressing normal mode noise.

  This noise suppression circuit includes a pair of terminals 1A and 1B, another pair of terminals 2A and 2B, a first conductive line 3 connecting the terminals 1A and 2A, and a second connecting the terminals 1B and 2B. The conductive wire 4 is provided. The noise suppression circuit also includes a first winding 11 provided on the first conductive line 3 and one end connected to one end of the first winding 11 on the first conductive line 3. A first series circuit 5 having the other end connected to the second conductive line 4 and a second series having one end connected to the other end of the first winding 11 on the first conductive line 3. Circuit 6.

  The first series circuit 5 includes a second winding 12 and a first capacitor C1 connected in series with each other. One end of the second winding 12 is connected to one end of the first winding 11 and the other end is connected to one end of the first capacitor C1. The other end of the first capacitor C 1 is connected to the second conductive line 4. The second series circuit 6 includes a third winding 13 and a second capacitor C2 connected in series with each other. One end of the third winding 13 is connected to the other end of the first winding 11, and the other end is connected to one end of the second capacitor C2. The other end of the second capacitor C2 (the other end of the second series circuit 6) is connected between the second winding 12 and the first capacitor C1 in the first series circuit 5.

  The noise suppression circuit further includes a core 10 around which a first winding 11, a second winding 12 and a third winding 13 are wound in common. The second winding 12 and the third winding 13 are magnetically coupled to the first winding 11 via the core 10. The first inductor 11, the second inductor L2, and the third inductor L3 are formed in each winding portion by the windings and the core 10 around which the windings are wound in common. Since each inductor is formed of the same common core 10, it is magnetically coupled to each other. In the figure, the black circles marked on each winding indicate the polarity of the winding and the direction of winding. The polarity of each winding is preferably in the same direction.

Here, the circuit conditions of the noise suppression circuit will be described with reference to FIG.
As shown in FIG. 2, the inductance of the entire first winding 11 (first inductor L1) is LL, the inductance of the entire second winding (second inductor L2) is IL, and the third The inductance in the entire winding (third inductor L3) is expressed as xL. Further, the capacitance of the first capacitor C1 is expressed as dC, and the capacitance of the second capacitor C2 is expressed as xC. The coupling coefficient between the first winding 11 and the second winding 12 is denoted as k1, and the coupling coefficient between the first winding 11 and the third winding 13 is denoted as k2.

In the noise suppression circuit, the inductance IL of the second winding 12 and the inductance xL of the third winding 13 are preferably set to be smaller than the inductance LL of the first winding 11.
IL <LL
xL <LL

For example, for the inductance IL of the second winding 12,
LL ≒ 2IL
In accordance with the desired attenuation characteristic, it is preferable to set the value around ½ of the inductance LL.
The inductance xL of the third winding 13 is preferably set sufficiently smaller than the inductance LL of the first winding 11. For example, it is desirable that the third winding 13 is constituted by a winding of about one turn or two turns.

The coupling coefficient k2 between the first winding 11 and the third winding 13 is preferably larger than the coupling coefficient k1 between the first winding 11 and the second winding 12.
k1 <k2
In particular, the coupling coefficient k2 between the first winding 11 and the third winding 13 is ideally k2≈1. Further, the coupling coefficient k1 between the first winding 11 and the second winding 12 is the condition of the inductance IL described above,
LL ≒ 2IL
If you satisfy
k1 ≒ 1 / √2
It is preferable that it is a grade.

  The second winding 11 and the third winding 13 are also magnetically coupled. When the coupling coefficient between the first winding 11 and the third winding 13 is k2≈1, the degree of magnetic coupling between the second winding 11 and the third winding 13 is the first winding. The degree of magnetic coupling between the wire 11 and the second winding 12 is almost the same.

  The capacitance dC of the first capacitor C1 and the capacitance xC of the second capacitor C2 may be small values. In particular, the capacitance xC may be a negligible value.

Next, the operation of this noise suppression circuit will be described.
In this noise suppression circuit, the first winding 11 and the first series circuit 5 are magnetically coupled to the first winding 11 in the first and second series circuits 5 and 6. A synergistic effect of the attenuation characteristic obtained by the circuit part consisting of the above and the attenuation characteristic obtained by the circuit part consisting of the first winding 11 and the second series circuit 6 is obtained.

  In this noise suppression circuit, an attenuation peak is formed on the low frequency side due to the relationship between the inductance LL of the first winding 11 and the inductance IL of the second winding 12. Therefore, for example, as described above, the characteristic on the low frequency side can be adjusted by adjusting the inductance IL around the value about 1/2 of the inductance LL. Also, an attenuation peak is formed on the high frequency side due to the relationship between the resonance circuit in the second series circuit 6, that is, the inductance xL of the third winding 13 and the capacitance xC of the second capacitor C2. Therefore, by adjusting the inductance xL and the capacitance xC in the second series circuit 6, the characteristics on the high frequency side can be adjusted. Note that these attenuation peaks may disappear depending on the adjustment of the circuit value. In addition, in the middle region between these attenuation peaks, a peak of the self-resonance point is formed by the first winding 11 and its parasitic capacitor. The peak of the self-resonance point can also be moved to the high frequency side or the low frequency side by adjustment. The overall characteristics can be achieved, for example, by adjusting the inductances IL, xL and capacitance xC. As described above, by appropriately adjusting the relationship between the circuit values and adjusting the above three peak positions, desired attenuation characteristics can be obtained over a wide range. As a result, even in the configuration in which only the inductor component L1 by the first winding 11 is provided on the line (first conductive line 3), the deterioration of the attenuation characteristics due to parasitic components and impedance fluctuations is improved, and the low Good attenuation characteristics can be obtained over a wide range from high to high. In this noise suppression circuit, the other end of the second series circuit 6 is not directly connected to the second conductive wire 4, and the second winding 12 and the first capacitor in the first series circuit 5 are not connected. Since it is connected to C1, the leakage current from the first conductive line 3 side does not exceed the amount defined by the first capacitor C1. That is, the improvement effect of the attenuation characteristic by the second series circuit 6 can be obtained without increasing the leakage current from the first conductive line 3 side.

When adjusting the position of the attenuation peak,
It is fundamental that the peak frequency in the low frequency is less than the peak frequency in the high frequency, and it is preferable to adjust the values of each inductance and capacitance so that such a condition is satisfied. A peak having the maximum attenuation is formed when the peak frequency in the low band and the peak frequency in the high band are substantially the same.
Hereinafter, the characteristics of the noise suppression circuit will be examined in detail by simulation.

First, the characteristics of the left circuit portion 21 (see FIG. 3) composed of the first winding 11 and the first series circuit 5 will be considered. FIG. 4 shows the result of simulating the attenuation characteristics in the circuit portion 21 on the left side with the circuit conditions as follows. The horizontal axis represents frequency (Hz), and the vertical axis represents attenuation (dB). The inductance IL of the second winding 12 is set to a ratio (LL: IL = 2: 1) that is half the value of the inductance LL of the first winding 11. As shown in the figure, one attenuation peak 41 is generated by the circuit portion 21 on the left side. Note that FIG. 4 shows characteristics that do not take parasitic components into consideration.
・ Circuit condition Input / output impedance Z = 50Ω
Inductance LL of the first winding 11 = 5 mH
Inductance IL of the second winding 12 = 2.5 mH
(LL: IL = 2: 1)
Capacitance dC of the first capacitor C1 = 6600 pF
Coupling coefficient k1 = 1 / √2 = 0.707

FIGS. 5A to 5C show characteristics when the value of the inductance IL and the value of the input / output impedance Z are changed with respect to the circuit conditions of FIG. 5A shows the characteristics when the input / output impedance Z is 50Ω, FIG. 5B shows the characteristics when the input / output impedance Z is 10 mΩ, and FIG. 5C shows the characteristics when the input / output impedance Z is 50 kΩ. . 5A to 5C, the value of the inductance IL is increased by 10% with respect to the circuit condition of FIG. That is,
Inductance IL of second winding 12 = 2.75 mH
(LL: IL = 2: 1.1)
It was. Compared with the characteristics shown in FIG. 4, it can be seen that the attenuation peak 41 is shifted to the low frequency side under any impedance condition. This means that the attenuation peak 41 can be adjusted to the low frequency side by increasing the IL ratio from the condition of LL: IL = 2: 1 in the left circuit portion 21.

  Next, the characteristics of the right circuit portion 22 (see FIG. 6) composed of the first winding 11 and the second series circuit 6 will be considered. Here, it is assumed that a parasitic capacitor C20 is generated in parallel with the first winding 11 in consideration of a parasitic component. The circuit portion 22 on the right side shown in FIG. 6 can be equivalently expressed as shown in FIG.

FIG. 9 shows the result of simulating the attenuation characteristics in the circuit portion 22 on the right side under the following circuit conditions. The characteristics when the inductance xL of the third winding 13 was set to 1 μH and 3.05 μH were simulated.
・ Circuit condition Input / output impedance Z = 50Ω
Inductance LL of the first winding 11 = 5 mH
Inductance xL of the third winding 13 = 1 μH, 3.05 μH
Capacitance xC of the second capacitor C2 = 200 pF
The capacitance of the parasitic capacitor C20 = 5 pF
Coupling coefficient k2 = 0.99
For comparison, the characteristics of only the left circuit portion 21 (see FIG. 8) including the parasitic capacitor C20 were also simulated (curves of xC and xL = 0 in FIG. 9). The circuit conditions for the left circuit portion 21 are as follows.
・ Circuit condition Input / output impedance Z = 50Ω
Inductance LL of the first winding 11 = 5 mH
Inductance IL of second winding 12 = 2.75 mH
(LL: IL = 2: 1.1)
Capacitance dC of the first capacitor C1 = 6600 pF
The capacitance of the parasitic capacitor C20 = 5 pF
Coupling coefficient k1 = 1 / √2 = 0.707

  Looking at the characteristics of only the circuit portion 21 on the left side, it can be seen that the characteristics on the high frequency side are deteriorated due to the influence of the parasitic capacitor C20. In addition, the attenuation peak on the low frequency side is not steep. On the other hand, when looking at the characteristics of only the circuit portion 22 on the right side, two attenuation peaks 51 and 52 are generated. The low-frequency side attenuation peak 51 is the peak of the self-resonance point of the first winding 11, that is, the peak of the parallel resonance circuit formed by the first winding 11 and its parasitic capacitor. The attenuation peak 52 on the high frequency side is a peak due to the series resonance circuit in the second series circuit 6. The two attenuation peaks 51 and 52 due to the circuit portion 22 on the right side can be adjusted by changing the inductance xL of the third winding 13. In the circuit portion 22 on the right side, even when the parasitic capacitor C20 exists in the first winding 11 and there is a self-resonance point, the self-resonance can be achieved by adjusting the inductance xL of the third winding 13. It is possible to move the point to the high frequency side. Thereby, the influence of the parasitic capacitor C20 can be reduced equivalently.

  Next, consider the characteristics of the circuit in which the right circuit portion 22 is added to the left circuit portion 21, that is, the entire noise suppression circuit. Here, it is assumed that a parasitic capacitor C20 is generated in parallel with the first winding 11 in consideration of a parasitic component. 10 to 12 show the simulation results of the attenuation characteristics of the entire noise suppression circuit. For comparison, the characteristics of only the right circuit portion 22 (see FIG. 6) including the parasitic capacitor C20 are also shown (curves of xL = 1 μH and 3.05 μH in the figure). The characteristics of the circuit portion 22 on the right side shown in FIGS. 10 to 12 are the same as those shown in FIG. That is, the circuit conditions are the same as those shown in FIG.

In the simulation of FIG. 10, the circuit conditions for the entire noise suppression circuit are as follows. The conditions for the right circuit portion 22 (xC = 200 pF, xL = 1 μH) are added to the conditions for the left circuit portion 21 in the simulation of FIG. A curve indicated by a solid line in FIG. 10 indicates the characteristics of the entire noise suppression circuit.
・ Circuit condition Input / output impedance Z = 50Ω
Inductance LL of the first winding 11 = 5 mH
Inductance IL of second winding 12 = 2.75 mH
(LL: IL = 2: 1.1)
Inductance xL of the third winding 13 = 1 μH
Capacitance dC of the first capacitor C1 = 6600 pF
Capacitance xC of the second capacitor C2 = 200 pF
The capacitance of the parasitic capacitor C20 = 5 pF
Coupling coefficient k1 = 1 / √2 = 0.707
Coupling coefficient k2 = 0.99

  From the result of FIG. 10, it is understood that three attenuation peaks 61, 62, and 63 are generated in the entire noise suppression circuit. The attenuation peak 61 on the lowest side is due to the circuit portion 21 on the left side, and is a peak formed by the relationship between the inductance LL of the first winding 11 and the inductance IL of the second winding 12. The highest attenuation peak 63 is due to the circuit portion 22 on the right side, and is a peak due to the series resonance circuit in the second series circuit 6. The intermediate attenuation peak 62 is a peak at the self-resonance point of the first winding 11. Only the circuit portion 21 on the left side of FIG. 9 deteriorates the characteristics on the high frequency side due to the influence of the parasitic capacitor C20 and loses the steepness of the attenuation peak on the low frequency side. Overall, they have been improved. That is, the steepness occurs in the attenuation peak 61 on the low frequency side, and the attenuation peaks 62 and 63 are formed, so that the characteristics on the high frequency side are improved.

  Here, the positions of the three attenuation peaks 61, 62, 63 can be adjusted by changing circuit values. FIG. 11 shows characteristics when the value of xL is increased with xL = 3.05 μH for the circuit conditions of FIG. A curve indicated by a solid line in FIG. 11 indicates the characteristics of the entire noise suppression circuit. Compared to the characteristics shown in FIG. 10, the low-frequency side attenuation peak 61 is shifted to the low-frequency side, and the intermediate attenuation peak 62 is shifted to the high-frequency side. As a result, the region between the low-frequency attenuation peak 61 and the intermediate attenuation peak 62 is widened. This means that the band in which the inductor L1 on the line functions as an ideal inductor is widened.

  Further, FIG. 12 shows characteristics when IL value is decreased and xL value is further increased while IL = 2.36 mH and xL = 3.47 μH with respect to the circuit conditions of FIG. . A curve indicated by a two-dot chain line in FIG. For comparison, the result of the simulation of FIG. 11 is also shown (solid curve). In this case, as shown in the figure, the low-frequency side attenuation peak 61 shifts to the high-frequency side, and the high-frequency side attenuation peak 63 shifts to the low-frequency side, so that the three attenuation peaks 61, 62, 63 as a whole. Characteristics that form one attenuation peak are obtained. As a result, the largest attenuation is obtained.

  Furthermore, the change in the attenuation characteristic due to the difference in input / output impedance Z was examined. The results are shown in FIGS. 13 (A) and 13 (B). 13A shows the characteristics when the input / output impedance Z is 10 mΩ, and FIG. 13B shows the characteristics when the input / output impedance Z is 10 kΩ. The circuit conditions are the same as the conditions in each characteristic shown in FIG. 12 except for the value of the input / output impedance Z. In this noise suppression circuit, three attenuation peaks 61, 62, and 63 are generated regardless of whether the impedance is low (FIG. 13A) or high impedance (FIG. 13B). The characteristic of the attenuation characteristic is almost maintained.

As described above, according to the noise suppression circuit of the present embodiment, each winding in the first and second series circuits 5 and 6 is magnetically connected to the first winding 11 on the first conductive 3. Since the coupling is made, the attenuation characteristic obtained by the circuit portion composed of the first winding 11 and the first series circuit 5 and the circuit portion composed of the first winding 11 and the second series circuit 6 are combined. Thus, a synergistic effect with the attenuation characteristic obtained can be obtained. As a result, only the inductor component of the first winding 11 is provided on the line (first conductive line 3), and the attenuation characteristics are deteriorated due to parasitic components and impedance fluctuations without increasing the number of inductors on the line. And a good attenuation characteristic can be obtained over a wide range from a low range to a high range.
[Modification of First Embodiment]

Next, a modification of the noise suppression circuit according to the present embodiment will be described. Note that components that are substantially the same as those of the noise suppression circuit according to the first embodiment are given the same reference numerals, and descriptions thereof are omitted as appropriate.
<First Modification>

  FIG. 14 shows a noise suppression circuit according to a first modification of the present embodiment. This noise suppression circuit further includes a resistance element R1 with respect to the circuit configuration of FIG. The resistance element R1 is connected in parallel to the second capacitor C2 in the second series circuit 6. The first winding 11 includes a parasitic resistance R20 in parallel in addition to the parasitic capacitor C20 as a parasitic component. This first modification improves the deterioration of the attenuation characteristics due to the influence of the parasitic resistance R20.

FIG. 15 shows the result of simulating the attenuation characteristics when the resistance element R1 is not provided in this noise suppression circuit (configuration in which the resistance element R1 is omitted in FIG. 14). The circuit conditions are as follows. The resistance value of the parasitic resistance R20 was calculated for the cases of 12.5 kΩ, 25 kΩ, 50 kΩ, and ∞. The resistance value ∞ is equivalent to the case where there is no parasitic resistance R20 equivalently.
・ Circuit condition Input / output impedance Z = 50Ω
Inductance LL of the first winding 11 = 5 mH
Inductance IL of second winding 12 = 2.75 mH
(LL: IL = 2: 1.1)
Inductance xL of the third winding 13 = 3.05 μH
Capacitance dC of the first capacitor C1 = 6600 pF
Capacitance xC of the second capacitor C2 = 200 pF
The capacitance of the parasitic capacitor C20 = 5 pF
Coupling coefficient k1 = 1 / √2 = 0.707
Coupling coefficient k2 = 0.99

  From the result of FIG. 15, the attenuation characteristic changes due to the presence of the parasitic resistance R20, and the higher the resistance value, the larger the attenuation. Therefore, ideally, a higher resistance value is preferable, but since the parasitic resistance R20 is caused by the performance of the first winding 11 as a coil, there is actually a limit to increasing the resistance value. . When a realistic resistance value exists as the parasitic resistance R20, the attenuation peak disappears and the characteristics become flat. In the noise suppression circuit according to the first modification, the deterioration of the attenuation characteristics due to the influence of the parasitic resistance R20 can be improved by setting the resistance value xR of the resistance element R1 to an appropriate value.

  FIGS. 16A to 16C show the simulation results of the attenuation characteristics of the noise suppression circuit. 16A shows the characteristics when the resistance value xR of the resistance element R1 is 2.5 kΩ, FIG. 16B shows the characteristics when it is 5 kΩ, and FIG. 16C shows the characteristics when it is 1 kΩ. The resistance value of the parasitic resistor R20 was set to 50 kΩ. Other circuit conditions are the same as in FIG. For comparison, the attenuation characteristic when the resistance element R1 is not provided (R = 50 kΩ, ∞) is also illustrated. A solid curve indicates the attenuation characteristic of the noise suppression circuit.

  When the resistance value xR of the resistance element R1 is 2.5 kΩ (FIG. 16A), the attenuation characteristic is improved as a whole. When the resistance value xR is 5 kΩ (FIG. 16B), the attenuation peak on the low frequency side is reproduced. When the resistance value xR is set to 1 kΩ (FIG. 16C), the attenuation characteristic is improved particularly on the middle and high frequency side. In this way, by changing the resistance value xR, the characteristics can be adjusted so as to obtain a desired attenuation characteristic. For example, the resistance element R1 may be set to a resistance value xR of about 1/10 or less of the resistance value of the parasitic resistance R20.

As described above, according to the first modification, the resistance element R1 is provided in parallel with the second capacitor C2, and therefore the parasitic resistance R20 exists as a parasitic component of the first winding 11. Even so, the influence is reduced, and a better attenuation characteristic can be obtained.
<Second Modification>

  FIG. 17 shows a noise suppression circuit according to the second modification. This noise suppression circuit further includes an auxiliary capacitor C11 in addition to the circuit configuration of the first modification example of FIG. The auxiliary capacitor C <b> 11 has one end connected to the other end of the first winding 11 and the other end connected to the second conductive line 4.

18A and 18B show the simulation results of the attenuation characteristics of the noise suppression circuit. FIG. 18A shows the characteristics when the input / output impedance Z is 50Ω, and FIG. 16B shows the characteristics when the input / output impedance Z is 50 kΩ. The circuit conditions are as follows. For comparison, the attenuation characteristics when the auxiliary capacitor C11 is not provided are also illustrated. A solid curve indicates the attenuation characteristic of the noise suppression circuit.
・ Circuit conditions Input / output impedance Z = 50Ω, 10kΩ
Inductance LL of the first winding 11 = 5 mH
Inductance IL of second winding 12 = 2.75 mH
(LL: IL = 2: 1.1)
Inductance xL of the third winding 13 = 3.05 μH
Capacitance dC of the first capacitor C1 = 6600 pF
Capacitance xC of the second capacitor C2 = 200 pF
Capacitance CC of auxiliary capacitor C11 = 940 pF
The capacitance of the parasitic capacitor C20 = 5 pF
Resistance value of resistance element R10 = 2.5 kΩ
Resistance value of parasitic resistance R20 = 50 kΩ
Coupling coefficient k1 = 1 / √2 = 0.707
Coupling coefficient k2 = 0.99

From the result of FIG. 18A, it can be seen that the characteristic on the high frequency side is improved by providing the auxiliary capacitor C11. Further, from the result of FIG. 18B, it can be seen that the characteristics are improved over the entire band in a high impedance environment. As described above, according to the second modified example, since the auxiliary capacitor C11 is provided, a better attenuation characteristic can be obtained particularly in a high impedance environment.
<Third Modification>

FIG. 19 shows a noise suppression circuit according to the third modification. This noise suppression circuit is obtained by reversing the positional relationship between the third winding 13 and the second capacitor C2 in the second series circuit 6 with respect to the circuit configuration of FIG. That is, one end of the second capacitor C2 is connected to the other end of the first winding 11, and the other end is connected to one end of the third winding 13, and the other end of the third winding 13 is connected to the other end. The first series circuit 5 is connected between the second winding 12 and the first capacitor C1.
<Fourth Modification>

FIG. 20 shows a noise suppression circuit according to the fourth modification. In the noise suppression circuit, the connection destination of the other end of the second series circuit 6 is not between the second winding 12 and the first capacitor C1, but with the second configuration, compared to the circuit configuration of FIG. The conductive wire 4 is used.
<Fifth Modification>

FIG. 21 shows a noise suppression circuit according to the fifth modification. The noise suppression circuit reverses the positional relationship between the third winding 13 and the second capacitor C2 in the second series circuit 6 with respect to the circuit configuration of FIG. The other end of 6 is connected to the second conductive line 4 instead of between the second winding 12 and the first capacitor C1.
<Sixth Modification>

FIG. 22 shows a noise suppression circuit according to the sixth modification. This noise suppression circuit changes the connection destination of the other end of the second series circuit 6 to the second conductive wire 4 with respect to the circuit configuration of FIG. The positional relationship between the winding 12 and the first capacitor C1 is reversed. One end of the first capacitor C 1 is connected to one end of the first winding 11 and the other end is connected to one end of the second winding 12. The other end of the second winding 12 is connected to the second conductive wire 4.
<Seventh Modification>

  FIG. 23 shows a noise suppression circuit according to a seventh modification. This noise suppression circuit has the same configuration as the circuit of FIG. 21 for the second series circuit 6 and the same configuration as the circuit of FIG. 22 for the first series circuit 5 with respect to the circuit configuration of FIG. It is a thing. That is, as in the circuit of FIG. 21, the positional relationship between the third winding 13 and the second capacitor C2 in the second series circuit 6 is reversed, and the other end of the second series circuit 6 is connected. The tip is changed to the second conductive wire 4. Similarly to the circuit of FIG. 22, the positional relationship between the second winding 12 and the first capacitor C1 in the first series circuit 5 is reversed.

In addition, the structure which combined each circuit of FIGS. 19-23 with each circuit of FIG. 14 or FIG. 17 is also possible. That is, in each circuit of FIGS. 19 to 23, a circuit configuration further including a resistance element R1 and a circuit configuration further including an auxiliary capacitor C11 are possible.
[Second Embodiment]

Next, a noise suppression circuit according to a second embodiment of the present invention will be described.
FIG. 24 shows a configuration example of the noise suppression circuit according to the present embodiment. The present embodiment relates to a circuit for suppressing common mode noise. Note that components that are substantially the same as those of the noise suppression circuit according to the first embodiment are given the same reference numerals, and descriptions thereof are omitted as appropriate.

  The noise suppression circuit includes a first winding 11 provided on the first conductive wire 3 and one end connected to one end of the first winding 11 on the first conductive wire 3 and the like. A first series circuit 5-1 having one end connected to ground, and a second series circuit 6-1 having one end connected to the other end of the first winding 11 on the first conductive wire 3; It has. The noise suppression circuit is further provided on the second conductive line 4, the fourth winding 14 magnetically coupled to the first winding 11, and one end of the fourth on the second conductive line 4. A third series circuit 5-2 connected to one end of the other winding 14 and the other end connected to the ground, and the other end of the fourth winding 14 on the second conductive wire 4 at one end. And a fourth series circuit 6-2 connected to.

  The configuration of the first series circuit 5-1 and the second series circuit 6-1 is the same as that of the noise suppression circuit of FIG. 1 except that the other end of the first series circuit 5-1 is grounded. This is the same as the first and second series circuits 5 and 6. The third series circuit 5-2 includes a fifth winding 15 and a third capacitor C3 connected in series with each other. One end of the fifth winding 15 is connected to one end of the fourth winding 14 and the other end is connected to one end of the third capacitor C3. The other end of the third capacitor C3 is grounded. The fourth series circuit 6-2 includes a sixth winding 16 and a fourth capacitor C4 connected in series with each other. One end of the sixth winding 16 is connected to the other end of the fourth winding 14 and the other end is connected to one end of the fourth capacitor C4. The other end of the fourth capacitor C4 (the other end of the fourth series circuit 6-2) is connected between the fifth winding 15 and the third capacitor C3 in the third series circuit 5-2. ing.

  The noise suppression circuit further includes a core 10 in which each winding is wound in common. The second winding 12 and the third winding 13 are magnetically coupled to the first winding 11 via the core 10, and the fifth winding 15 and the sixth winding 15 are The fourth winding 14 is magnetically coupled. By each winding and the core 10 in which they are commonly wound, the first inductor 11, the second inductor L2, the third inductor L3, the fourth inductor L4, the fifth inductor L5 in each winding portion, And the 6th inductor L6 is formed. Since each inductor is formed of the same common core 10, it is magnetically coupled to each other. In the figure, the black circles marked on each winding indicate the polarity of the winding and the direction of winding. The polarity of each winding is preferably in the same direction. The first and fourth windings 11 and 14 are wound around a common core 10 to be magnetically coupled to each other so as to suppress common mode noise in cooperation to form a common mode choke coil. Yes.

  The noise suppression circuit can obtain a good attenuation characteristic by satisfying the same circuit conditions as those of the circuit according to the first embodiment. Here, description will be made using the same symbols as those shown in FIG. 2 as the symbol of the circuit value of the circuit portion connected to the first conductive line 3 side. The same symbol is used for the circuit value of the circuit portion connected to the fourth conductive line 4 side. That is, for the fourth conductive wire 4 side, the inductance of the entire fourth winding 14 (fourth inductor L4) is LL, the inductance of the entire fifth winding (fifth inductor L5) is IL, The inductance in the entire sixth winding (sixth inductor L6) is expressed as xL. Further, the capacitance of the third capacitor C3 is expressed as dC, and the capacitance of the fourth capacitor C4 is expressed as xC. The coupling coefficient between the fourth winding 14 and the fifth winding 15 is denoted as k1, and the coupling coefficient between the fourth winding 14 and the sixth winding 16 is denoted as k2.

Also in this noise suppression circuit, it is preferable that the inductance IL of the second winding 12 and the inductance xL of the third winding 13 are set to be smaller than the inductance LL of the first winding 11. . Similarly, the inductance IL of the fifth winding 15 and the inductance xL of the sixth winding 16 are preferably set to be smaller than the inductance LL of the fourth winding 14.
IL <LL
xL <LL

As in the first embodiment, for example, regarding the inductance IL of the second winding 12,
LL ≒ 2IL
In accordance with the desired attenuation characteristic, it is preferable to set the value around ½ of the inductance LL. The same applies to the fifth winding 15.
The inductance xL of the third winding 13 is preferably set sufficiently smaller than the inductance LL of the first winding 11. For example, it is desirable that the third winding 13 is constituted by a winding of about one turn or two turns. Similarly, the sixth winding 16 is preferably set sufficiently smaller than the inductance LL of the fourth winding 14.

As for the coupling coefficient, the coupling coefficient k2 between the first winding 11 and the third winding 13 is the same as that of the first winding 11 and the second winding 12, as in the first embodiment. The coupling coefficient is preferably larger than k1.
k1 <k2
In particular, the coupling coefficient k2 between the first winding 11 and the third winding 13 is ideally k2≈1. Further, the coupling coefficient k1 between the first winding 11 and the second winding 12 is the condition of the inductance IL described above,
LL ≒ 2IL
If you satisfy
k1 ≒ 1 / √2
It is preferable that it is a grade. The same applies to the coupling coefficient k2 between the fourth winding 14 and the sixth winding 16, and the coupling coefficient k1 between the fourth winding 14 and the fifth winding 15.

  The fifth winding 15 and the sixth winding 16 are also magnetically coupled. When the coupling coefficient between the fourth winding 14 and the sixth winding 16 is k2≈1, the degree of magnetic coupling between the fifth winding 15 and the sixth winding 16 is the fourth winding. The degree of magnetic coupling between the wire 14 and the fifth winding 15 is almost the same.

Next, the operation of this noise suppression circuit will be described.
In this noise suppression circuit, each winding in the first and second series circuits 5-1 and 6-1 is magnetically coupled to the first winding 11, so that it propagates on the first conductive line 3. For the noise component, the attenuation characteristic obtained by the circuit portion composed of the first winding 11 and the first series circuit 5-1, and the first winding 11 and the second series circuit 6-1. A synergistic effect with the attenuation characteristic obtained by the circuit portion consisting of Similarly, with respect to the noise component propagating on the second conductive wire 4, the windings in the third and fourth series circuits 5-2 and 6-2 are magnetically coupled to the fourth winding 14. Therefore, the attenuation characteristic obtained by the circuit portion including the fourth winding 14 and the third series circuit 5-2, and the fourth winding 14 and the fourth series circuit 6-2 are included. A synergistic effect with the attenuation characteristic obtained by the circuit portion is obtained. Due to these synergistic effects, only the inductor component of one winding (first and fourth windings 11 and 14) is provided on each line (first and second conductive wires 3 and 4). However, the deterioration of attenuation characteristics due to parasitic components and impedance fluctuations is improved, and good attenuation characteristics can be obtained over a wide range from low to high frequencies.

  Also in this noise suppression circuit, three attenuation peaks can be obtained in the same manner as the circuit according to the first embodiment. By adjusting the relationship between each circuit value and adjusting the peak position, it is desired over a wide range. The attenuation characteristics are obtained. That is, an attenuation peak is formed on the low frequency side due to the relationship between the first winding 11 and the second winding 12 and the relationship between the fourth winding 14 and the fifth winding 15, and the second An attenuation peak is formed on the high frequency side by the resonance circuit in the series circuit 6-1 and the resonance circuit in the fourth series circuit 6-2. Further, in the middle region between these attenuation peaks, a self-resonance point by the first winding 11 and its parasitic capacitor and a self-resonance point by the fourth winding 14 and its parasitic capacitor are formed. The method for adjusting the position of the attenuation peak is the same as that in the first embodiment.

Thus, according to the noise suppression circuit according to the present embodiment, only the inductor component with one winding is provided on each line, without increasing the number of inductors on the line, parasitic components, impedance fluctuations, etc. It is possible to improve the deterioration of the attenuation characteristic due to the above and obtain a good attenuation characteristic over a wide range from the low range to the high range.
[Modification of Second Embodiment]

Next, a modification of the noise suppression circuit according to the present embodiment will be described. Note that components that are substantially the same as those of the noise suppression circuit according to the second embodiment are given the same reference numerals, and descriptions thereof are omitted as appropriate.
<First Modification>

  FIG. 25 shows a noise suppression circuit according to a first modification of the present embodiment. This noise suppression circuit is further provided with first and second resistance elements R1, R2 and first and second auxiliary capacitors C11, C12 with respect to the circuit configuration of FIG. The first resistance element R1 is connected in parallel to the second capacitor C2 in the second series circuit 6-1. The second resistance element R2 is connected in parallel to the fourth capacitor C4 in the fourth series circuit 6-2. The first auxiliary capacitor C11 has one end connected to the other end of the first winding 11 and the other end connected to ground. The second auxiliary capacitor C12 has one end connected to the other end of the fourth winding 14 and the other end connected to ground.

The operations and effects obtained by providing the first and second resistance elements R1 and R2 are the same as those of the first modification (FIG. 14) in the first embodiment. The operation and effect of providing the first and second auxiliary capacitors C11 and C12 are the same as those of the second modification (FIG. 17) in the first embodiment.
<Second Modification>

FIG. 26 shows a noise suppression circuit according to the second modification. This noise suppression circuit is different from the circuit configuration of FIG. 24 in the positional relationship between the third winding 13 and the second capacitor C2 in the second series circuit 6-1 and the fourth series circuit 6- 2, the positional relationship between the sixth winding 16 and the fourth capacitor C4 is reversed. That is, for the second series circuit 6-1, one end of the second capacitor C 2 is connected to the other end of the first winding 11 and the other end is connected to one end of the third winding 13. The other end of the third winding 13 is connected between the second winding 12 and the first capacitor C1 in the first series circuit 5-1. As for the fourth series circuit 6-2, one end of the fourth capacitor C4 is connected to the other end of the fourth winding 14, and the other end is connected to one end of the sixth winding 16. The other end of the sixth winding 16 is connected between the fourth winding 14 and the third capacitor C3 in the third series circuit 5-2.
<Third Modification>

FIG. 27 shows a noise suppression circuit according to the third modification. In the noise suppression circuit, the other end of the second series circuit 6-1 is connected to the ground instead of between the second winding 12 and the first capacitor C1 with respect to the circuit configuration of FIG. It is a thing. Further, the other end of the fourth series circuit 6-2 is connected to the ground instead of between the fifth winding 15 and the third capacitor C3.
<Fourth Modification>

FIG. 28 shows a noise suppression circuit according to the fourth modification. This noise suppression circuit is different from the circuit configuration of FIG. 24 in the positional relationship between the third winding 13 and the second capacitor C2 in the second series circuit 6-1 and the fourth series circuit 6- 2, the positional relationship between the sixth winding 16 and the fourth capacitor C4 is reversed, and the connection destination of the other end of the second series circuit 6-1 and the fourth series circuit 6-2. The other end is connected to ground.
<Fifth Modification>

  FIG. 29 shows a noise suppression circuit according to the fifth modification. This noise suppression circuit is different from the circuit configuration of FIG. 24 in the relationship between the connection positions of the windings 13 and 16 and the capacitors C2 and C4 in the second and fourth series circuits 6-1 and 6-2. In addition, the windings 13 and 16 are made common and configured as a single winding. That is, in this noise suppression circuit, one end of the second capacitor C2 of the second series circuit 6-1 is connected to the other end of the first winding 11, and the fourth series circuit 6-2. One end of the fourth capacitor C4 is connected to the other end of the fourth winding 14, and the third winding 13 of the second series circuit 6-1 and the fourth series circuit 6-2. The sixth winding 16 is shared, and one end of the shared winding is connected to the other ends of the capacitors C2 and C4 of the second and fourth series circuits 6-1 and 6-2. And the other end is grounded.

According to this modification, when the third winding 13 and the sixth winding 16 are shared, the third winding 13 and the sixth winding 16 are provided separately. Compared to a simple configuration, it is easy to downsize.
<Sixth Modification>

  FIG. 30 shows a noise suppression circuit according to a sixth modification. This noise suppression circuit is different from the circuit configuration shown in FIG. 24 in the relationship between the connection positions of the windings 12 and 15 and the capacitors C1 and C3 in the first and third series circuits 5-1 and 5-2. In addition, the windings 12 and 15 are made common and configured by a single winding. That is, in this noise suppression circuit, one end of the first capacitor C1 of the first series circuit 5-1 is connected to one end of the first winding 11, and the third series circuit 5-2. One end of the third capacitor C3 is connected to one end of the fourth winding 14, and the second winding 12 of the first series circuit 5-1 and the third series circuit 5-2. The fifth winding 15 is shared, and one end of the shared winding is connected to the other ends of the capacitors C1 and C3 of the first and third series circuits 5-1 and 5-2. And the other end is grounded.

According to this modified example, when the second winding 12 and the fifth winding 15 are provided in common, the second winding 12 and the fifth winding 15 are provided separately. Compared to a simple configuration, it is easy to downsize.
<Seventh Modification>

  FIG. 31 shows a noise suppression circuit according to a seventh modification. This noise suppression circuit is a combination of the fifth modification and the sixth modification. That is, the third winding 13 and the sixth winding 16 are shared by the configuration of the fifth modification (FIG. 29) and the configuration of the fifth modification (FIG. 30). Similarly, the second winding 12 and the fifth winding 15 are shared.

  According to this modification, the third winding 13 and the sixth winding 16 are made common, and the second winding 12 and the fifth winding 15 are made common, so that it is simpler. This can be realized with a simple configuration and can be easily reduced in size.

  In addition, the structure which combined each circuit of FIGS. 26-31 and the circuit of FIG. 25 is also possible. That is, in each circuit of FIGS. 26 to 31, a circuit configuration further including resistance elements R1 and R2 and a circuit configuration further including auxiliary capacitors C11 and C12 are possible.

It is a circuit diagram showing an example of 1 composition of a noise suppression circuit concerning a 1st embodiment of the present invention. It is explanatory drawing of the circuit value in the noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a circuit diagram for demonstrating the effect | action of the circuit part of the left side of the noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a characteristic view which shows the effect | action of the circuit part of the left side of the noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a characteristic view which shows the effect | action of the circuit part of the left side of the noise suppression circuit which concerns on the 1st Embodiment of this invention, (A) is when input-output impedance Z is 50 ohms, (B) is input-output impedance Z When 10 mΩ, (C) shows the characteristics when the input / output impedance Z is 50 kΩ. It is a circuit diagram for demonstrating the effect | action of the circuit part of the right side of the noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a circuit diagram which shows the equivalent circuit of the circuit part of the right side of the noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a circuit diagram which shows the equivalent circuit at the time of considering a parasitic component in the circuit part of the left side of the noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a characteristic view which shows the effect | action of the circuit part of the right side of the noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a characteristic view which shows the effect | action of the whole noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a characteristic view which shows the effect | action of the whole noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a characteristic view which shows the effect | action of the whole noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a characteristic view which shows the effect | action of the whole noise suppression circuit which concerns on the 1st Embodiment of this invention, (A) is when input-output impedance Z is 10 mΩ, (B) is when input-output impedance Z is 10 kΩ. Show properties. It is a circuit diagram which shows the 1st modification of the noise suppression circuit which concerns on the 1st Embodiment of this invention. FIG. 5 is a characteristic diagram showing an operation when a parasitic resistance is included as a parasitic component in the noise suppression circuit according to the first embodiment of the present invention. It is a characteristic view which shows the effect | action of the 1st modification of the noise suppression circuit which concerns on the 1st Embodiment of this invention, When (A) adds the resistance component of 2.5 kohm, (B) is 5 kohm. When a resistance component is added, (C) shows the characteristics when a 1 kΩ resistance component is added. It is a circuit diagram which shows the 2nd modification of the noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a characteristic view which shows the effect | action of the 2nd modification of the noise suppression circuit which concerns on the 1st Embodiment of this invention, (A) is the input-output impedance Z when the input-output impedance Z is 50 ohms. Shows the characteristics when is 10 kΩ. It is a circuit diagram which shows the 3rd modification of the noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a circuit diagram which shows the 4th modification of the noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a circuit diagram which shows the 5th modification of the noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a circuit diagram which shows the 6th modification of the noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a circuit diagram which shows the 7th modification of the noise suppression circuit which concerns on the 1st Embodiment of this invention. It is a circuit diagram which shows one structural example of the noise suppression circuit which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows the 1st modification of the noise suppression circuit which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows the 2nd modification of the noise suppression circuit which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows the 3rd modification of the noise suppression circuit which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows the 4th modification of the noise suppression circuit which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows the 5th modification of the noise suppression circuit which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows the 6th modification of the noise suppression circuit which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows the 7th modification of the noise suppression circuit which concerns on the 2nd Embodiment of this invention.

Explanation of symbols

C1 ... first capacitor, C2 ... second capacitor, C20 ... parasitic capacitor, R20 ... parasitic resistor, L1 ... first inductor, L2 ... second inductor, L3 ... third inductor, L4 ... fourth Inductor, L5 ... fifth inductor, L6 ... sixth inductor, 3 ... first conductive wire, 4 ... second conductive wire, 5 ... first series circuit, 6 ... second series circuit, 5- DESCRIPTION OF SYMBOLS 1 ... 1st series circuit, 6-1 ... 2nd series circuit, 5-2 ... 3rd series circuit, 6-2 ... 4th series circuit, 10 ... Core, 11 ... 1st coil | winding, 12 ... 2nd winding, 13 ... 3rd winding, 14 ... 4th winding, 15 ... 5th winding, 16 ... 6th winding.

Claims (8)

A noise suppression circuit for suppressing noise propagating on the first and second conductive lines,
A first winding provided on the first conductive wire;
A second winding and a first capacitor connected in series with each other, one end connected to one end of the first winding and the other end connected to the second conductive line 1 series circuit;
A third winding and a second capacitor connected in series with each other, one end connected to the other end of the first winding and the other end connected to the second winding and the first A second series circuit connected between the capacitor and
The noise suppression circuit, wherein the second winding and the third winding are magnetically coupled to the first winding on the first conductive line. When the inductance of the third winding is xL and the inductance of the first winding is LL,
xL <LL
As well as
When the inductance of the second winding is IL,
IL <LL
The noise suppression circuit according to claim 1, wherein: When the coupling coefficient between the first winding and the second winding is k1, and the coupling coefficient between the first winding and the third winding is k2,
k1 <k2
The noise suppression circuit according to claim 1 or 2, wherein: The noise suppression circuit according to claim 1, further comprising a resistance element connected in parallel to the second capacitor in the second series circuit. A noise suppression circuit for suppressing noise propagating on the first and second conductive lines,
A first winding provided on the first conductive wire;
A first series circuit including a second winding and a first capacitor connected in series with each other, one end connected to one end of the first winding and the other end connected to ground;
A third winding and a second capacitor connected in series with each other, one end connected to the other end of the first winding and the other end of the second winding in the first series circuit. A second series circuit connected between a winding and the first capacitor;
A fourth winding provided on the second conductive line and magnetically coupled to the first winding;
A third series circuit including a fifth winding and a third capacitor connected in series with each other, one end connected to one end of the fourth winding and the other end connected to ground;
A sixth winding and a fourth capacitor connected in series with each other, one end connected to the other end of the fourth winding, and the other end of the fifth series in the third series circuit A fourth series circuit connected between a winding and the third capacitor;
The second winding and the third winding are magnetically coupled to the first winding on the first conductive line, and the fifth winding and the sixth winding Is magnetically coupled to the fourth winding on the second conductive line. When the inductance of the third winding and the inductance of the sixth winding are both xL, and the inductance of the first winding and the inductance of the fourth winding are both LL,
xL <LL
And when both the inductance of the second winding and the inductance of the fifth winding are IL,
IL <LL
The noise suppression circuit according to claim 5 , wherein: The coupling coefficient between the first winding and the second winding and the coupling coefficient between the fourth winding and the fifth winding are both k1, the first winding and the third winding. When the coupling coefficient with the other winding and the coupling coefficient between the fourth winding and the sixth winding are both k2,
k1 <k2
The noise suppression circuit according to claim 5 or 6 , wherein: A first resistance element connected in parallel to the second capacitor in the second series circuit; and a second resistance element connected in parallel to the fourth capacitor in the fourth series circuit. noise suppression circuit according to any one of claims 5 to 7, characterized in that it comprises.

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