JP2016208664A - Inverter controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an inverter, executing PWM control, capable of suppressing a common mode voltage generated when an amplitude of a fundamental wave is substantially zero.SOLUTION: A controller 30, applied to an inverter 10 having a plurality of phases and executing pulse width modulation control for converting DC power into AC power by changing switching states of switching elements SUp-SWn provided for each phase on the basis of comparison of fundamental waves VU*, VV*, VW* to carriers CU, CV, CW, sets a predetermined carrier of inversion phase to be a reverse phase relative to a predetermined carrier of reference phase in a plurality of phases.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an inverter control device capable of performing pulse width modulation control.

  An inverter capable of performing pulse width modulation (PWM) control is used as a power source of a synchronous permanent magnet motor or a current driven stepping motor. When PWM control is performed in the inverter, the switching element is turned off and on at a predetermined carrier cycle in a state where a current is passed through the switching element (Patent Document 1).

JP-A-7-99795

  Here, when the command value of the output torque of the motor becomes substantially zero, the command value of the output current or output voltage output from the inverter to the motor winding is made substantially zero. When the command value of the output current or the output voltage becomes approximately 0, the amplitude of the fundamental wave that is the command value of the output current or the output voltage becomes approximately 0 in a plurality of phases included in the inverter. In this case, since the fundamental wave of each phase has almost the same waveform, when the switching element off-on control is performed based on the comparison between the fundamental wave and the carrier, the off-on state of the switching element of each phase becomes substantially the same. For this reason, there is a concern that a large common mode voltage is generated when the switching elements of the respective phases are simultaneously turned on.

  The present invention has been made in view of the above problems, and has as its main object to reduce the common mode voltage generated when the amplitude of the fundamental wave is substantially zero in an inverter that performs PWM control.

  The first invention is applied to the inverter (10, 10a) having a plurality of phases, and is provided for each phase based on a comparison between the fundamental waves (VU * to VZ *) and the carriers (CU to CZ). Inverter control devices (30, 30a) that perform pulse width modulation control for converting DC power into AC power by changing the open / closed state of the switching elements (SUp to SZn), and in the plurality of phases, An anti-phase control unit that controls a carrier having a predetermined inversion phase to an anti-phase with respect to a carrier having a predetermined reference phase is provided.

  If the amplitude of the fundamental wave is substantially 0 and the phase of the carrier of each phase is the same, the switching elements of each phase are turned on almost simultaneously and turned off almost simultaneously. Thereby, a large common mode voltage is generated while the switching element is turned on. In view of this, the inverted phase carrier is opposite in phase to the reference phase carrier. With this configuration, the reference phase voltage waveform and the inverted phase voltage waveform cancel each other. For this reason, it is possible to reduce the common mode voltage generated when the amplitude of the fundamental wave is substantially zero.

  The second invention is applied to the inverter (10b) having a plurality of phases, and changes the open / closed state of the switching elements (SUp to SZn) provided for each phase based on the comparison between the fundamental wave and the carrier. Thus, an inverter control device (30b) that performs pulse width modulation control for converting DC power into AC power, the inverter includes two windings having a plurality of phases at an electrical angle of 180 degrees relative to each other Power is output to a rotating electrical machine (21b) having a combination of the above, wherein the control device (30b) inverts the voltages of the respective phases in the combination of the two windings. To do.

  In the combination of the two windings, the voltage waveforms cancel each other by inverting the voltages of the respective phases. For this reason, it is possible to reduce the common mode voltage, and it is possible to suppress the instantaneous magnitude of the main frequency component of noise. Further, since the two windings form an electrical angle of 180 degrees with each other, the output voltage of the inverter effectively acts on the output of the rotating electrical machine.

The electrical block diagram of 1st Embodiment. The figure explaining the reason that common mode voltage increases when the amplitude of a fundamental wave becomes substantially zero. The figure explaining the common mode voltage reduction effect | action by 1st Embodiment. The figure explaining the shift | offset | difference of the voltage of a reference | standard phase and the voltage of an inversion phase which arises by the difference between turn-on time and turn-off time. The figure explaining the effect | action which reduces the shift | offset | difference of the voltage of the reference | standard phase by the 1st Embodiment, and the voltage of an inversion phase. The figure which shows the effect of 1st Embodiment. The electrical block diagram of 2nd Embodiment. The electrical block diagram of 3rd Embodiment. The figure showing the armature winding of 3rd Embodiment.

(First embodiment)
DESCRIPTION OF EMBODIMENTS A first embodiment in which an inverter control device according to the present invention is applied to a vehicle (for example, an electric vehicle or a hybrid vehicle) provided with a multiphase rotating machine (three-phase rotating electrical machine) as an in-vehicle main unit will be described with reference to the drawings. To do.

  FIG. 1 shows an electrical configuration diagram representing the power system of the first embodiment. The power system includes an inverter 10 that converts DC power into AC power, a motor generator 21 that is supplied with power from the inverter 10, and a control device 30 that controls the inverter 10. In the present embodiment, the motor generator 21 is an in-vehicle main machine and is connected to a drive shaft (not shown). The motor generator 21 is, for example, an interior permanent magnet synchronous motor (IPMSM). The motor generator 21 is connected to a battery 20 as a DC power source via the inverter 10. The output voltage of the battery 20 is, for example, 100V or more.

  The inverter 10 includes a series connection body of upper arm switches SUp, SVp, SWp and lower arm switches SUn, SVn, SWn. The U-phase of the motor generator 21 is connected to the connection point of the U-phase upper and lower arm switches SUp and SUn, and the V-phase of the motor generator 21 is connected to the connection point of the V-phase upper and lower arm switches SVp and SVn. The W phase of the motor generator 21 is connected to a connection point between the upper and lower arm switches SWp and SWn.

  In the present embodiment, voltage controlled semiconductor switching elements are used as the switches SUp to SWn, and more specifically, IGBTs are used. And each freewheel diode DUp-DWn is connected to each switch SUp-SWn in antiparallel. Further, the inverter 10 includes a smoothing capacitor 11 on the battery 20 side.

  The electric power system uses, as phase current detection means, a U-phase current sensor 12U that detects a current that flows in the U-phase of the motor generator 21, a V-phase current sensor 12V that detects a current that flows in the V-phase, and a current that flows in the W-phase. And a W-phase current sensor 12W for detection. In addition, the electric power system includes a rotation angle sensor 13 (for example, a resolver) that detects a rotation angle (electrical angle θe) of the motor generator 21 as a rotation angle detection unit.

  The control device 30 controls the inverter 10 so as to feedback control the control amount (torque in the present embodiment) of the motor generator 21 to the target value (hereinafter, target torque Trq *). Specifically, the control device 30 generates the operation signals gUp to gWn for operating the off / on states (open / closed states) of the switches SUp to SWn constituting the inverter 10 based on the detection values of the various sensors, and the operation signals gUp to PWM control is performed by outputting gWn to each of the switches SUp to SWn. The target torque Trq * is, for example, a control device provided outside the control device 30, and is output from a control device higher than the control device 30.

  The operation of the control device 30 will be described in detail below. Current command generator 31 generates target currents IU *, IV *, IW *, which are target values of phase currents IU, IV, IW, based on target torque Trq * and electrical angle θe.

  Specifically, the current command generation unit 31 calculates the d-axis current target value id * and the q-axis based on the rotational angular velocity ω of the motor generator 21 calculated based on the electrical angle θe and the target torque Trq *. The current target value iq * is calculated. Further, the current command generation unit 31 performs coordinate conversion of the d-axis current target value id * and the q-axis current target value iq * based on the electrical angle θe, and obtains the target currents IU *, IV *, and IW *. Generate.

  Deviation calculation units 32U, 32V, and 32W calculate deviations ΔIU, ΔIV, and ΔIW between detected values of phase currents IU, IV, and IW and target currents IU *, IV *, and IW *. The PID calculation units 33U, 33V, 33W perform PID (Proportional Integral Derivative) calculation based on the deviations ΔIU, ΔIV, ΔIW, and target sine waves VU *, VV * which are target voltages of the phase voltages VU, VV, VW. , VW * is calculated. Since the target sine waves VU *, VV *, and VW * that are the target voltages of the phase voltages VU, VV, and VW are each provided with a phase difference of 120 degrees, the phase voltages VU, VV, and VW are also 120 respectively. A degree phase difference is provided.

  The comparators 34U, 34V, and 34W are operation signals for the upper arm switches SUp, SVp, and SWp by comparing the target sine waves (fundamental waves) VU *, VV *, and VW * with the carrier (carrier wave). Upper arm operation signals gUp, gVp, gWp are output. The NOT circuits 35U, 35V, and 35W invert the upper arm operation signals gUp, gVp, and gWp, and output lower arm operation signals gUn, gVn, and gWn that are operation signals for the lower arm switches SUn, SVn, and SWn.

  The upper arm operation signals gUp, gVp, gWp and the corresponding lower arm operation signals gUn, gVn, gWn are complementary signals (signals whose logics are inverted). That is, the upper arm switches SUp, SVp, SWp and the corresponding lower arm switches SUn, SVn, SWn are alternately turned on. The upper arm switches SUp, SVp, SWp and the corresponding lower arm switches SUn, SVn, SWn are provided with a dead time so that they are not turned on at the same time.

  Here, when PWM control is performed, the switches SUp to SWn are turned off according to the carrier frequency. A common mode voltage is generated by turning the switches SUp to SWn off and on. In particular, when the amplitude of the target sine waves VU *, VV *, and VW * approaches 0V, the common mode voltage increases. When the common mode voltage is increased, electromagnetic noise due to the common mode voltage is increased, and the electrolytic corrosion of the bearing of the motor generator 21 due to the common mode voltage is deteriorated.

  The reason why the common mode voltage increases when the amplitude of the target sine waves VU *, VV *, and VW * approaches 0V will be described with reference to FIG.

  When the amplitudes of the target sine waves VU *, VV *, and VW * are 0V, the waveforms of the target sine waves VU *, VV *, and VW * are the same. Therefore, the U-phase switches SUp and SUn, the V-phase switches SVp and SVn, and the W-phase switches SWp and SWn are turned on and off in synchronization.

  For this reason, the phase voltages VU, VV, VW simultaneously increase from 0 V to the power supply voltage Vdc, and then decrease simultaneously from the power supply voltage Vdc to 0 V. For this reason, the amplitude of the common mode voltage VC is Vdc, which is the maximum value. Here, the common mode voltage VC is a value obtained by dividing the sum of the detected values of the phase voltages VU, VV, VW by 3 which is the number of phases.

  Therefore, the control device 30 (anti-phase control unit) of the present embodiment controls the U phase as a reference phase and the V phase as an inverted phase, and controls the V phase carrier CV to be in an opposite phase with respect to the U phase carrier CU. carry out. The waveforms of the carriers CU, CV, and CW and the common mode voltage VC in the present embodiment will be described with reference to FIG.

  In a situation where the target sine waves VU * and VV * are 0V, which is an average value of the carriers CU and CV, the V-phase carrier CV is in an opposite phase to the U-phase carrier CU. For this reason, the waveform of the U-phase voltage VU and the waveform of the V-phase voltage VV are inverted. That is, the phase voltages VU and VV change so that the change in the U-phase voltage VU and the change in the V-phase voltage VV cancel each other. As a result, the common mode voltage VC changes alternately between Vdc / 3 and 2Vdc / 3. That is, the peak value of the common mode voltage VC is 2/3 and the amplitude is 1/3 compared to the case where the phase carriers CU, CV, and CW are the same.

  Here, if there is a difference between the turn-on time Ton and the turn-off time Toff in the switches SUp to SWn, even if the operation signals gVp and gVn are inverted with respect to the operation signals gUp and gUn, the U-phase voltage VU There is a concern that a deviation occurs between the V-phase voltage VV and the V-phase voltage VV. Here, turn-on means that the lower arm switches SUn, SVn, and SWn are turned on, and turn-off means that the lower arm switches SUn, SVn, and SWn are turned off.

  A difference between the U-phase voltage VU and the V-phase voltage VV caused by the difference between the turn-on time Ton and the turn-off time Toff of the switches SUp to SWn will be described with reference to FIG. The turn-on time Ton is represented by the sum of the turn-on delay time T1 and the fall time T2. The turn-off time Toff is represented by the sum of the turn-off delay time T3 and the rise time T4.

  The turn-on delay time T1 is a time required for charging the input capacitances of the switches SUp to SWn and for the gate voltages of the switches SUp to SWn to rise to the threshold voltage. The fall time T2 is the time required for the output voltage to fall. The turn-off delay time T3 is a time required until the input capacitances of the switches SUp to SWn are discharged and the gate voltages of the switches SUp to SWn are lowered. The rise time T4 is a time required for the output voltage to rise. In the following description, it is assumed that the turn-on delay time T1 is longer than the turn-off delay time T3, and the fall time T2 is longer than the rise time T4.

  At time TA, the U-phase carrier CU exceeds the target sine wave VU * (0 V). As a result, the operation signal gUn is set high and the switch SUn is turned on. Further, the V-phase carrier CV is lower than the target sine wave VV * (0 V). As a result, the operation signal gVn is set high and the switch SVn is turned on. As the operation signal changes, the phase voltage VU falls and the phase voltage VV rises. Here, the phase voltage VV rises earlier than the phase voltage VU. As a result, the change in the phase voltage VU cannot be canceled out by the change in the phase voltage VV, and there is a concern that the peak value of the common mode voltage VC increases.

  At time TB, the U-phase carrier CU falls below the target sine wave VU * (0 V). As a result, the operation signal gUn is set low and the switch SUn is turned off. Further, the V-phase carrier CV is lower than the target sine wave VV * (0 V). As a result, the operation signal gVn is set high and the switch SVn is turned on. As the operation signal changes, the phase voltage VU rises and the phase voltage VV falls. Here, the phase voltage VV rises later than the phase voltage VU. As a result, the change in the phase voltage VU cannot be canceled out by the change in the phase voltage VV, and there is a concern that the peak value of the common mode voltage VC increases.

  The U-phase voltage VU reaches ½ of the power supply voltage Vdc at the trailing edge of the U-phase voltage VU, which is the reference phase voltage, after the time “T1 + T2 / 2” has elapsed from the time TA. The V-phase voltage VV reaches 1/2 of the power supply voltage Vdc after the time “T3 + T4 / 2” has elapsed from the time TA. That is, the V-phase voltage VV reaches 1/2 of the power supply voltage Vdc earlier than the U-phase voltage VU by a deviation ΔT (= (T1 + T2 / 2) − (T3 + T4 / 2)).

  Similarly, at the rise of the U-phase voltage VU that is the voltage of the reference phase, the U-phase voltage VU reaches 1/2 of the power supply voltage Vdc after the time “T3 + T4 / 2” has elapsed from the time TA. The V-phase voltage VV reaches ½ of the power supply voltage Vdc after the time “T1 + T2 / 2” has elapsed from the time TA. That is, the V-phase voltage VV is delayed by a deviation ΔT (= (T1 + T2 / 2) − (T3 + T4 / 2)) from the U-phase voltage VU, and reaches 1/2 of the power supply voltage Vdc.

  Therefore, the control device 30 of the present embodiment provides the offset voltage ΔV for the V-phase carrier CV that is the carrier of the inversion phase, so that the U-phase voltage VU caused by the difference between the turn-on time Ton and the turn-off time Toff described above. And the V-phase voltage VV are corrected. This correction will be described with reference to FIG.

  As shown in FIG. 5, the V-phase carrier CV is increased, that is, offset by an offset voltage ΔV corresponding to the deviation ΔT. The offset voltage ΔV is calculated by integrating the slope of the carrier CV, which is a triangular wave, with the deviation ΔT. Due to the offset of the V-phase carrier CV, the time when the V-phase carrier CV falls below the target sine wave VV * is delayed by a deviation ΔT, and the time when the V-phase carrier CV exceeds the target sine wave VV * is advanced by a deviation ΔT.

  Thereby, at the fall of U-phase voltage VU, the time when U-phase voltage VU reaches 1/2 of power supply voltage Vdc is the same as the time when V-phase voltage VV reaches 1/2 of power supply voltage Vdc. Further, at the rise of the U-phase voltage VU, the time when the U-phase voltage VU reaches 1/2 of the power supply voltage Vdc and the time when the V-phase voltage VV reaches 1/2 of the power supply voltage Vdc are the same. That is, it is possible to reduce the difference between the change in the U-phase voltage VU and the change in the V-phase voltage VV due to the difference between the turn-on time Ton and the turn-off time Toff.

  That is, since the inverted-phase carrier CV is a triangular wave, according to the configuration in which a predetermined amount of offset voltage ΔV is provided to the inverted-phase carrier CV based on the difference between the turn-on time Ton and the turn-off time Toff, ΔV> 0 As a result, the rise of the phase voltage VV of the inversion phase is delayed, and the fall of the inversion phase is accelerated. Further, when ΔV <0, the rising time of the phase voltage VV of the inversion phase is accelerated and the time of falling of the inversion phase is delayed. In this way, when the carrier is a triangular wave, the difference between the reference phase phase voltage VU and the inverted phase voltage VV caused by the difference between the switch turn-on time Ton and the turn-off time Toff is eliminated with a simple configuration. be able to.

  Returning to the description of FIG. 1, the U-phase carrier waveform generation unit 37 </ b> U generates a U-phase carrier CU based on the frequency input from the carrier frequency generation unit 36. U-phase carrier waveform generation unit 37U outputs U-phase carrier CU to comparator 34U and outputs U-phase carrier CU as W-phase carrier CW to comparator 34W.

  The phase generator 38 calculates the phase θV based on the amplitudes of the target sine waves VU *, VV *, and VW *. Specifically, the phase θV is set to 180 degrees on condition that the amplitudes of the target sine waves VU *, VV *, and VW * are substantially zero. When the amplitudes of the target sine waves VU *, VV *, and VW * are not substantially 0, the phase θV is set to 0 degree.

  The offset generation unit 39 acquires detection values of the U-phase voltage VU and V-phase voltage VV from a voltage acquisition unit (not shown) that acquires detection values of the U-phase voltage VU, V-phase voltage VV, and W-phase voltage VW, respectively. . The offset generation unit 39 acquires a turn-on delay time T1, a fall time T2, a turn-off delay time T3, and a rise time T4 based on the detected values of the U-phase voltage VU and the V-phase voltage VV. Then, the offset generator 39 calculates the deviation ΔT based on the turn-on delay time T1, the fall time T2, the turn-off delay time T3, and the rise time T4, and calculates the offset voltage ΔV based on the calculation result. To do. When the amplitudes of the target sine waves VU *, VV *, and VW * are not substantially 0, the offset generation unit 39 sets the offset voltage ΔV to 0V.

  The V-phase carrier waveform generation unit 37V receives the U-phase carrier CU from the U-phase carrier waveform generation unit 37U, the phase θV from the phase generation unit 38, and the offset voltage ΔV from the offset generation unit 39. The V-phase carrier waveform generation unit 37V generates a V-phase carrier CV based on the U-phase carrier CU, the phase θV, and the offset voltage ΔV, and outputs the V-phase carrier CV to the comparator 34V.

  Here, V generated by the V-phase carrier waveform generation unit 37V on the condition that the amplitudes of the target sine waves VU *, VV *, and VW * are substantially 0 based on the phase θV generated by the phase generation unit 38. The phase carrier CV has an opposite phase to the U-phase carrier CU. The noise reduction effect by setting the carrier to the opposite phase works effectively when the amplitudes of the phase voltage command values VU *, VV *, and VW * (fundamental wave) are substantially zero. Therefore, when the amplitude of the fundamental wave is substantially 0, the inverted phase carrier is set to the opposite phase.

  FIG. 6 shows a noise frequency characteristic (light color) when carrier inversion according to the present embodiment is performed, and a noise frequency characteristic (dark color) when carrier inversion is not performed. The noise frequency characteristic is obtained by converting the common mode voltage VC from the time domain to the frequency domain using Fourier transform. Comparing the noise frequency characteristic when carrier inversion is performed with the noise frequency characteristic when carrier inversion is not performed, the common mode voltage VC is reduced by about 3 to 6 dB in a frequency band of 1 MHz or less.

(Second Embodiment)
FIG. 7 shows an electrical configuration diagram representing the power system of the second embodiment. Here, the same components as those of the first embodiment shown in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

  The motor generator 21a shown in FIG. 7 is a six-phase rotating electric machine. Motor generator 21a has X, Y, and Z phases in addition to U, V, and W phases as compared with motor generator 21 shown in FIG. Inverter 10a is an inverter having six phases, and has X, Y, and Z phases in addition to U, V, and W phases, similarly to motor generator 21a. The power system of the present embodiment includes, as phase current detection means, an X-phase current sensor 12X that detects a current flowing in the X phase of the motor generator 21a, a Y-phase current sensor 12Y that detects a current flowing in the Y phase, and a Z phase. And a Z-phase current sensor 12Z for detecting a current flowing through the.

  The inverter 10a includes a series connection of upper arm switches SXp, SYp, SZp and lower arm switches SXn, SYn, SZn in addition to a series connection body of upper arm switches SUp, SVp, SWp and lower arm switches SUn, SVn, SWn. Has a body. The free wheel diodes DXp to DZn are connected in antiparallel to the switches SXp to SZn.

  The control device 30a generates operation signals gUp to gZn that operate the off / on states of the switches SUp to SZn, and outputs the operation signals gUp to gZn to the switches SUp to SZn. The current command unit 31a of the control device 30a generates X, Y, and Z phase target currents IX *, IY *, and IZ * in addition to U, V, and W phase target currents IU *, IV *, and IW *. . The control device 30a includes deviation calculation units 32X, 32Y, and 32Z in addition to the deviation calculation units 32U, 32V, and 32W. The control device 30a includes PID calculation units 33X, 33Y, and 33Z in addition to the PID calculation units 33U, 33V, and 33W. In addition to the comparators 34U, 34V, and 34W, the control device 30a includes comparators 34X, 34Y, and 34Z. In addition to NOT circuits 35U, 35V, and 35W, NOT circuits 35X, 35Y, and 35Z are provided.

  The control device 30a includes an operation signal gUp by a current command unit 31a, deviation calculation units 32X, 32Y, 32Z, PID calculation units 33X, 33Y, 33Z, comparators 34X, 34Y, 34Z, and NOT circuits 35X, 35Y, 35Z. The operation signals gXp to gZu are generated in the same manner as .about.gWu.

  Here, the control device 30a includes a first carrier waveform generation unit 37a1 and a second carrier waveform generation unit 37a2. The first carrier waveform generation unit 37a1 generates a U-phase carrier CU based on the frequency input from the carrier frequency generation unit 36. The first carrier waveform generation unit 37a1 outputs the U-phase carrier CU to the comparator 34U, outputs the U-phase carrier CU as the V-phase carrier CV to the comparator 34V, and the U-phase carrier CU as the W-phase carrier CW. Output to 34W.

  The U-phase carrier CU is input from the first carrier waveform generation unit 37a1, the phase θX is input from the phase generation unit 38, and the offset voltage ΔX is input from the offset generation unit 39 to the second carrier waveform generation unit 37a2. An X-phase carrier CX is generated based on the U-phase carrier CU, the phase θX, and the offset voltage ΔV. On the condition that the amplitudes of the target sine waves VU *, VV *, and VW * are substantially 0, the X-phase carrier CX generated by the second carrier waveform generation unit 37a2 has an opposite phase to the U-phase carrier CU. Is done. The second carrier waveform generator 37a2 outputs the X-phase carrier CX to the comparator 34X, outputs the X-phase carrier CX to the comparator 34Y as the Y-phase carrier CY, and compares the X-phase carrier CX as the Z-phase carrier CZ. To 34Z.

  In the present embodiment, the inverter 10a is an even-numbered phase, and among all the phases, half is set as the reference phase, and the remaining half (phase not set as the reference phase) is set as the inverted phase. Specifically, among the six phases, U, V, and W are set as reference phases, and X, Y, and Z are set as inverted phases. By setting in this way, changes in all phases are canceled out, and the common mode voltage VC can be more effectively suppressed.

(Third embodiment)
FIG. 8 shows an electrical configuration diagram representing the power system of the third embodiment. Here, the same components as those of the first embodiment shown in FIG. 1 and the second embodiment shown in FIG. 7 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

  The motor generator 21b of this embodiment is a three-phase rotating electric machine having a three-phase double winding. Motor generator 21b has X, Y, and Z phases in addition to U, V, and W phases as compared with motor generator 21 shown in FIG. Further, compared to the motor generator 21a shown in FIG. 7, voltages are applied independently to the U, V, and W phases and the X, Y, and Z phases.

  FIG. 9 shows the armature winding of the motor generator 21b. The motor generator 21b has windings 22U, 22V, 22W, 22X, 22Y, and 22Z. The windings 22U, 22V, and 22W are connected to each other at a neutral point, and the windings 22X, 22Y, and 22Z are connected to each other at a neutral point. The neutral points of the windings 22U, 22V, and 22W and the neutral points of the windings 22X, 22Y, and 22Z are not connected and are insulated.

  Here, the U-phase winding 22U and the X-phase winding 22X form an electrical angle of 180 degrees. Further, the V-phase winding 22V and the Y-phase winding 22Y form an electrical angle of 180 degrees. The W-phase winding 22W and the Z-phase winding 22Z form an electrical angle of 180 degrees. In other words, the motor generator 21b includes a combination of two windings having a plurality of phases at an electrical angle of 180 degrees.

  Returning to the description of FIG. 8, the comparator 34U of the control device 30b compares the target sine wave VU * with the carrier CU to generate operation signals gUp and gXn, and outputs them to the switches SUp and SXn, respectively. Further, the operation signals gUp and gXn are inverted by the NOT circuit 35U and output to the switches SUn and SXp as the operation signals gUn and gXp, respectively.

  The comparator 34V of the control device 30b compares the target sine wave VV * with the carrier CV to generate operation signals gVp and gYn, and outputs them to the switches SVp and SYn, respectively. Further, the operation signals gVp and gYn are inverted by the NOT circuit 35V and output to the switches SVn and SYp as the operation signals gVn and gYp, respectively.

  Further, the comparator 34W of the control device 30b compares the target sine wave VW * with the carrier CW to generate operation signals gWp and gZn, and outputs them to the switches SWp and SZn, respectively. Further, the operation signals gWp and gZn are inverted by the NOT circuit 35W and output to the switches SWn and SZp as the operation signals gWn and gZp, respectively.

  As a result, the U-phase voltage VU and the X-phase voltage VX change so as to cancel each other's changes. V-phase voltage VV and Y-phase voltage VY change so as to cancel each other's change. W-phase voltage VW and Z-phase voltage VZ change so as to cancel each other's change. The combination of the U-phase winding 22U and the X-phase winding 22X, the combination of the V-phase winding 22V and the Y-phase winding 22Y, and the combination of the W-phase winding 22W and the Z-phase winding 22Z are as follows: The electrical angles are 180 degrees from each other. Therefore, in the combination of the U-phase voltage VU and the X-phase voltage VX, the combination of the V-phase voltage VV and the Y-phase voltage VY, and the combination of the W-phase voltage VW and the Z-phase voltage VZ, the phase voltages are mutually inverted. In this case, the output voltage of the inverter 10b effectively acts on the output of the motor generator 21b.

(Other embodiments)
-The control apparatus 30 in the said embodiment may be applied other than a 3-phase inverter or a 6-phase inverter. For example, it may be applied to a single phase inverter.

  The motor generator 21 may be, for example, a field winding type synchronous motor instead of the embedded permanent magnet synchronous motor.

  The switches SUp to SUn may be, for example, MOS-FETs instead of the IGBT.

  In the first embodiment, the phase of the W-phase carrier CW is configured to be the same as the phase of the U-phase carrier CU. However, this may be changed. For example, the phase of the W-phase carrier CW may be configured to be the same as the phase of the V-phase carrier CV. Further, the phase of the W-phase carrier CW may be different from both the phase of the U-phase carrier and the phase of the V-phase carrier.

  In the second embodiment, the phases of the U, V, and W phase carriers CU, CV, and CW may be different from each other.

  The d-axis current Id, q-axis current Iq, d-axis current target value id *, and q-axis current target value iq * obtained by converting the detected values of the phase currents IU, IV, IW into the dq-axis coordinate system The deviations ΔIq and ΔId may be calculated. Further, the q-axis target voltage Vq * and the d-axis target voltage Vd * are calculated by performing PID calculation on the deviations ΔIq and ΔId. The target voltages Vq and Vd may be converted into a VUW coordinate system to calculate the target sine waves VU *, VV * and VW *.

  The phase generation unit 38 of the first embodiment calculates the phase θV based on the amplitudes of the target sine waves VU *, VV *, and VW *. By changing this, the phase generator may be configured to calculate the phase θV based on the amplitudes (target values of the output current) of the target currents IU *, IV *, and IW *. Specifically, the phase θV is set to 180 degrees on condition that the amplitudes of the target currents IU *, IV *, and IW * are substantially zero. When the amplitudes of the target currents IU *, IV *, and IW * are not substantially 0, the phase θV is set to 0 degree. Similarly, the phase generation unit may be configured to calculate the phase θV based on the phase currents IU, IV, IW (output current).

  A sawtooth wave may be used as the waveform of the carriers CU, CV, CW, CZ, CY, and CZ instead of the triangular wave.

  Instead of generating the offset voltage ΔV by the offset generator 39, the switch turn-on delay time T1, the fall time T2, the turn-off delay time T3, and the rise time T4 are obtained, and the offset voltage is obtained based on these values. A configuration may be adopted in which ΔV is determined and the control device 30 stores the offset voltage ΔV in advance.

  -In 1st Embodiment and 2nd Embodiment, it may replace with the structure which offsets the carrier of an inversion phase, and it is good also as a structure which reduces the carrier of a reference phase by offset voltage (DELTA) V, ie, offsets.

  The offset generation unit 39 may be configured to acquire the turn-on time Ton and the turn-off time Toff and generate the offset voltage ΔV based on the turn-on time Ton and the turn-off time Toff.

  In the first and second embodiments, the phases θV and θX may always be set to 180 degrees.

  DESCRIPTION OF SYMBOLS 10 ... Inverter, 30 ... Control apparatus (antiphase control part), SUp-SWn ... Switching element.

Claims (7)

Applied to the inverter (10, 10a) having a plurality of phases, and based on a comparison between the fundamental waves (VU * to VZ *) and the carriers (CU to CZ), switching elements (SUp to A control device (30, 30a) of an inverter that performs pulse width modulation control for converting DC power into AC power by changing an open / close state of (SZn),
A control apparatus comprising: an antiphase control unit configured to control a predetermined inversion phase carrier to an antiphase with respect to a predetermined reference phase carrier in the plurality of phases.   The anti-phase control unit (38) controls the carrier of the inversion phase to the anti-phase with respect to the carrier of the reference phase on the condition that the output current or the output voltage of the inverter becomes substantially zero. The control device according to claim 1.   The anti-phase control unit (39) provides a predetermined amount of offset in one carrier of the reference phase and the inversion phase based on a difference between a turn-on time and a turn-off time of the switching element. The control device according to claim 1 or 2. A voltage acquisition unit for acquiring voltages of the reference phase and the inversion phase;
The antiphase control unit acquires a turn-on time and a turn-off time of the switching element based on the reference phase voltage and the inverted phase voltage acquired by the voltage acquisition unit. The control device described.   The control device according to claim 1, wherein the carrier is a triangular wave. The inverter (20a) has an even number of phases;
The anti-phase control unit (30a) sets half of the even-numbered phases as the reference phase and sets the phase that is not set as the reference phase as the inversion phase in the even-numbered phase. The control device according to any one of claims 1 to 5, wherein: DC power is applied to the inverter (10b) having a plurality of phases by changing the open / close state of the switching elements (SUp to SZn) provided for each phase based on the comparison between the fundamental wave and the carrier. An inverter control device (30b) that performs pulse width modulation control for conversion to AC power,
The inverter outputs electric power to a rotating electrical machine (21b) including a combination of two windings having a plurality of phases at an electrical angle of 180 degrees with respect to each other,
The control device (30b) reverses the voltages of each phase in the combination of the two windings.