JP2013258791A - Five-level power converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a five-level power converter that performs charge control of first capacitors in consideration of phase switching.SOLUTION: Three phase inverter units 2U, 2V, 2W employed each have: a first series circuit of switching elements S1-S4 connected in series to a DC voltage source V; a second series circuit of switching elements S5, S6 connected in series to the DC voltage source V; a first capacitor C1 connected to the DC voltage source Vin parallel with the first series circuit and the second series circuit; a second capacitor C2 connected between a common junction of the switching element S1 and the switching element S2 and a common junction of the switching element S3 and the switching element S4; and switching elements S7, S8 interposed between the DC voltage source Vand the first capacitor C1. An intermediate phase is selected from U, V and W phases of voltage command value, and the seventh switching element and the eighth switching element of the selected phase are turned on.

Description

  The present invention relates to a five-level power converter that outputs an AC phase voltage obtained by converting a DC voltage between positive and negative electrodes of one DC voltage source into five voltage levels.

FIG. 6 is a circuit configuration diagram illustrating an example of a main circuit in the five-level power converter, and FIG. 7 is a diagram illustrating a control unit thereof. The three-phase voltage command value V ^* and the second capacitor voltage command value VC ₂ ^* are input to the control unit shown in FIG. 7, the second capacitor voltage VC ₂ is controlled to VC ₂ ^* , and the first capacitor voltage VC is controlled. ₁ is controlled to twice VC ₂ . While the second capacitor voltage VC ₂ is controlled to a desired voltage, select the switching pattern for outputting a 5-level voltage, a gate signal and outputs the inverter unit f. In addition to the 5-level power converter shown in FIG. 6, Patent Document 1 is disclosed as a 5-level inverter.

JP 2011-72118 A

The five-level power converter shown in FIG. 6 controls the charging of the first capacitor C1 in the inverter unit of each phase via the reactor L to the DC power source V _DC and outputs the five-level AC phase voltage. It is necessary to control the voltage in the second capacitor C2 using the current.

When the reactor L connected to the DC power source V _DC is used in common for each phase inverter unit as in the 5-level power converter shown in FIG. 6, the first capacitor C1 in each phase inverter unit is charged in a time-sharing manner. There is a need to. However, the conventional 5-level power converter has not been studied for the charging method of the first capacitor C1, and charging control considering phase switching of the first capacitor C1 in the inverter unit of each phase has not been possible. Further, Patent Literature 1 cannot control the capacitors C1 and C2.

  As described above, it is an object to provide a 5-level power converter capable of performing charging control of the first capacitor in consideration of phase switching.

  The present invention has been devised in view of the above-described conventional problems, and is a five-level power converter that generates an AC output obtained by converting a DC voltage into a plurality of voltage levels, and includes a DC voltage source and the DC voltage. A first series circuit in which first to fourth switching elements are sequentially connected in series between the positive and negative electrodes of the source; and a second series circuit in which fifth and sixth switching elements are sequentially connected in series between the positive and negative electrodes of the DC voltage source; A first capacitor connected in parallel to the first series circuit and the second series circuit between the positive and negative electrodes of the DC voltage source, a common connection point of the first switching element and the second switching element, and a third switching element A second capacitor connected between the first and fourth switching elements, a seventh switching element interposed between the positive terminal of the DC voltage source and the first capacitor, and a negative voltage of the DC voltage source. Extreme and first conde An eighth switching element interposed between the second switching element, the common connection point of the fifth switching element and the sixth switching element as a neutral point of the three-phase inverter unit, and the second switching element A three-phase inverter unit having a common connection point of the element and the third switching element as output terminals of the U phase, the V phase, and the W phase, and an intermediate phase among the voltage command values of the U, V, and W phases. And the seventh switching element and the eighth switching element of the selected phase are turned on.

  Another aspect is a five-level power converter that generates an AC output obtained by converting a DC voltage into a plurality of voltage levels, and includes a first to a fourth between a DC voltage source and the positive and negative electrodes of the DC voltage source. A first series circuit in which switching elements are sequentially connected in series, a second series circuit in which fifth and sixth switching elements are sequentially connected in series between the positive and negative electrodes of the DC voltage source, and a first series circuit between the positive and negative electrodes of the DC voltage source. A first capacitor connected in parallel to one series circuit and a second series circuit; a common connection point of the first switching element and the second switching element; and a common connection point of the third switching element and the fourth switching element. A second capacitor connected in between, a seventh switching element interposed between the positive electrode end of the DC voltage source and the first capacitor, and an insertion between the negative electrode end of the DC voltage source and the first capacitor. 8th switch A common connection point of the fifth switching element and the sixth switching element as a neutral point of the three-phase inverter unit, and a common connection point of the second switching element and the third switching element. A three-phase inverter unit having U-phase, V-phase, and W-phase output terminals, and dividing the phase of the voltage command values of the U, V, and W phases into 20-degree increments to provide an intermediate voltage command During the period when the value is zero-crossing, the intermediate phase is selected, and during other periods, the other phase having the same sign as the voltage command value that is the intermediate phase is selected, and the seventh and eighth switching elements of the selected phase are turned on. It is characterized by that.

  Further, in one embodiment, the commutation for delaying the timing at which the seventh and eighth switching elements are switched from on to off and simultaneously turning on the seventh and eighth switching elements of the selected phase before and after the phase switching is performed. A period is provided.

  In one aspect thereof, the seventh and eighth switching elements of the selected phase are turned on in an arbitrary period among the selected periods.

  Furthermore, the one aspect is characterized in that a protection circuit having a reactor and a third capacitor inserted between the DC voltage source and the three-phase inverter unit is provided.

  According to the present invention, in the five-level power converter, it is possible to perform charging control of the first capacitor in consideration of phase switching.

It is a block diagram which shows an example of the 5-level power converter in this invention. It is a figure which shows the charge mode of the 1st capacitor | condenser in this invention, and charging circuit interruption | blocking mode. It is a figure which shows the connection state of the output voltage of a U-phase and a V-phase inverter unit, and the midpoint of Y connection. It is a time chart which shows the voltage command value in Embodiment 1, and the ON / OFF state of a 7th, 8th switching element. It is a time chart which shows the voltage command value in Embodiment 2, and the ON / OFF state of a 7th, 8th switching element. It is a block diagram which shows the main circuit of the conventional 5 level power converter. It is a block diagram which shows the control part of the conventional 5 level power converter.

  FIG. 1 is a configuration diagram showing a 5-level DC / AC (power) converter in which the 5-level power converter shown in FIG. 6 is modified only to power running. The principle is the same as that of the 5-level power converter shown in FIG.

In FIG. 1, a protection circuit 1 is connected between the positive and negative terminals of a DC power source V _DC , and the output PN of this protection circuit 1 is input to the inverter units 2U, 2V, 2W of each phase. The protection circuit 1 includes a reactor L, a third diode D3, a third capacitor C3, and a regenerative resistor R.

  The inverter units 2U, 2V, and 2W of the respective phases include a first series circuit in which first to fourth switching elements S1 to S4 are sequentially connected in series, and fifth and sixth switching elements S5 and S6 are sequentially connected in series. Two series circuits and a first capacitor C1 are connected in parallel. A second capacitor C2 is connected between the common connection point of the first and second switching elements S1 and S2 and the common connection point of the third and fourth switching elements S3 and S4. A first diode D1 and a seventh switching element S7 are interposed between the first capacitor C1, a parallel circuit composed of the first series circuit and the second series circuit, and the negative terminal of the protection circuit 1 and the first capacitor C1. The second diode D2 and the eighth switching element S8 are interposed between the parallel circuit including the first series circuit and the second series circuit.

  In the five-level power converter in FIG. 6, switching elements 5a, 5b, 6a, 6b, 7a, 7b, 8a, 8b and two switching elements are provided at each location. As shown in FIG. 1, the fifth, sixth, seventh, and eighth switching elements S5, S6, S7, and S8 may be provided one at each location.

  The common connection point of the fifth and sixth switching elements S5 and S6 is the first output terminal A, and the common connection point of the second and third switching elements S2 and S3 is the second output terminal B. The first output terminals A of the U-phase, V-phase, and W-phase inverter units 2U, 2V, and 2W are connected to each other as the neutral point of the Y connection, and the second output terminal B of each phase is the U-phase, V-phase. Connect to load 2 as phase and W phase output terminals.

The control unit 3 includes the voltages V _CU1 , V _CU2 , V _CV1 , V _CV2 , V _CW1 , V _CW2 , three-phase voltage command value V ^* , three-phase voltage detection value of the first capacitor C1 and the second capacitor C2. The sine wave signal is input and a gate signal is output to the first to eighth switching elements S1 to S8 to control the switching elements S1 to S8.

  The first to sixth switching elements S1 to S6 are on / off controlled according to a switching pattern having modes 1 to 8 in Table 1 to be described later, and the seventh and eighth switching elements S7 and S8 are the first to sixth switching elements. Separately from the switching element, the controller 3 performs on / off control.

As shown in FIG. 2A, when the voltage of the first capacitor C1 is smaller than the DC power source V _DC , the first capacitor C1 can be charged by turning on the seventh and eighth switching elements S7, S8. As shown in FIG. 2B, the energy of the reactor L when the seventh and eighth switching elements S7 and S8 are turned off cannot be charged in the first capacitor C1. Therefore, the protection circuit 1 is provided between the positive and negative ends of the DC power source V _DC so that the energy of the reactor L when the seventh and eighth switching elements S7 and S8 are turned off is absorbed by the third capacitor C3.

The inverter units 2U, 2V, 2W of the respective phases have a five-level phase voltage to the load 2 according to the switching pattern shown in Table 1 below when the voltage of the first capacitor C1 is 2E and the voltage of the second capacitor C2 is E. 2E, E, 0, -E, -2E can be output. The voltage of the second capacitor C2, inverter unit 2U in each phase, 2V, AC output voltage of 2W is E or switching pattern for charging or discharging when -E (Table _{1 Switching StateV 2, V 3,} V 6 , V ₇ ).

Table 1 voltage output first to sixth (denoted as in Table ₁ Switching StateV 1 ~V _8.) Mode 1-8 switching elements S1~S6 the output terminal A, between B and the 2 indicates whether the capacitor C2 is charged or discharged.

  Here, the path of the current I between the modes 1 to 8 of the switching pattern in Table 1 and the output terminals A and B will be described.

<Mode 1>
The third, fourth, and fifth switching elements S3, S4, and S5 are turned off, the first, second, and sixth switching elements S1, S2, and S6 are turned on, and the current I is output from the output terminal A → S6 → first capacitor C1. → S1 → S2 → Output terminal B Between the output terminals A and B, the negative side → positive side of the first capacitor C1 is connected, and the voltage between the output terminals A and B is 2E.

<Mode 2>
The second, fourth and fifth switching elements S2, S4 and S5 are turned off, the first, third and sixth switching elements S1, S3 and S6 are turned on, and the current I is output from the output terminal A → S6 → first capacitor C1. → S1 → Second capacitor C2 → S3 → Output terminal B Between the output terminals A and B, the negative side of the first capacitor C1 → the positive side → the positive side of the second capacitor C2 → the negative side is connected in series, and the voltage between the output terminals A and B becomes 2E−E = E. . In this mode 2, the second capacitor C2 is charged when the current I> 0.

<Mode 3>
The first, third, and fifth switching elements S1, S3, and S5 are turned off, the second, fourth, and sixth switching elements S2, S4, and S6 are turned on, and the current I is output from the output terminals A → S6 → S4 → second. It flows through the path of the capacitor C2 → S2 → output terminal B. Between the output terminals A and B, the negative side → positive side of the second capacitor C2 is connected, and the voltage between the output terminals A and B is E. In this mode 3, when the current I> 0, the second capacitor C2 is discharged.

<Mode 4>
The first, second and fifth switching elements S1, S2 and S5 are turned off, the third, fourth and sixth switching elements S3, S4 and S6 are turned on, and the current I is output from the output terminals A → S6 → S4 → S3 → It flows through the path of the output terminal B. Directly sent between the output terminals A and B via the sixth, fourth and third switching elements S6, S4 and S3, the voltage between the output terminals A and B becomes zero.

<Mode 5>
The third, fourth, and sixth switching elements S3, S4, and S6 are turned off, the first, second, and fifth switching elements S1, S2, and S5 are turned on, and the current I is output from the output terminals A → S5 → S1 → S2 → It flows through the path of the output terminal B. Directly sent between the output terminals A and B via the fifth, first and second switching elements S5, S1 and S2, the voltage between the output terminals A and B becomes zero.

<Mode 6>
The second, fourth, and sixth switching elements S2, S4, and S6 are turned off, the first, third, and fifth switching elements S1, S3, and S5 are turned on, and the current I is output from the output terminals A → S5 → S1 → second. It flows through the path of the capacitor C2 → S3 → output terminal B. Between the output terminals A and B, the positive side → the negative side of the second capacitor C2 is connected, and the voltage between the output terminals A and B becomes −E. In this mode 6, when the current I <0, the second capacitor C2 is discharged.

<Mode 7>
The first, third, and sixth switching elements S1, S3, and S6 are turned off, the second, fourth, and fifth switching elements S2, S4, and S5 are turned on, and the current I is output from the output terminal A → S5 → first capacitor C1. → S4 → second capacitor C2 → S2 → output terminal B Between the output terminals A and B, the positive side of the first capacitor → the negative side → the negative side of the second capacitor C2 → the positive side is connected in series, and the voltage between the output terminals A and B is −2E + E = E. In this mode 7, when the current I <0, the second capacitor C2 is charged.

<Mode 8>
The first, second and sixth switching elements S1, S2 and S6 are turned off, the third, fourth and fifth switching elements S3, S4 and S5 are turned on, and the current I is output from the output terminal A → S5 → first capacitor C1. → S4 → S3 → Output terminal B Between the output terminals A and B, the positive side and the negative side of the first capacitor are connected in order, and the voltage between the output terminals A and B is −2E.

  As shown in Table 1, when the output voltage is 2E, E, +0, the sixth switching element S6 is on, the fifth switching element S5 is off, and when the output voltage is -2E, -E, -0, The 6 switching element S6 is turned off and the fifth switching element S5 is turned on.

  For example, if the U-phase and V-phase output voltages are positive, the negative sides of the first capacitor C1 are connected to the midpoint MP (output terminal A) of the Y connection as shown in FIG. . On the other hand, when the U-phase and V-phase output voltages are negative, the positive sides of the first capacitor C1 are connected to the midpoint MP (output terminal A) of the Y connection as shown in FIG. The

In the state shown in FIG. 3 (a) or FIG. 3 (b), when charging the first capacitor C1 from the DC power source V _DC via the reactor L, the DC power source V _DC is not short-circuited, and the U-phase Switching from the inverter unit 2U to the V-phase inverter unit 2V can be performed.

  By providing a commutation period for the seventh switching element S7 and the eighth switching element S8 during the switching of the charging, the current of the reactor L can be commutated from the U-phase inverter unit 2U to the V-phase inverter unit 2V. In the commutation period, the seventh and eighth switching elements S7 and S8 of two different phases are simultaneously turned on by delaying the timing at which the seventh and eighth switching elements S7 and S8 are switched from on to off. Period. When the commutation period is not used, the third capacitor C3 of the protection circuit 1 absorbs the energy of the reactor L as shown in FIG.

[Embodiment 1]
FIG. 4 shows voltage command values V ^* _U , V ^* _V , V ^* _W of the five-level power converter in the first embodiment, and times indicating the on / off states of the seventh and eighth switching elements S7, S8. It is a chart.

In the first embodiment, as shown in FIG. 4, an intermediate phase inverter unit having an intermediate value among the voltage command values V ^* _U , V ^* _V , and V ^* _W is selected, and the first capacitor of the selected phase is selected. It is characterized by charging C1 by 60 degrees (1 / 3π). Specifically, the seventh and eighth switching elements S7 and S8 in the selected intermediate phase inverter unit are turned on to charge the first capacitor C1, and the seventh and eighth switching elements of the inverter unit in the other phases are charged. S7 and S8 are turned off to block the charging path.

Hereinafter, an example of charging the first capacitor C1 in each phase of the voltage command values V ^* _U , V ^* _V , and V ^* _W and blocking the charging path for the first capacitor C1 will be described.
[0 to 1 / 6π] Charges U-phase first capacitor C1, V phase and W phase cut off charging path of first capacitor C1 [1 / 6π to 1 / 2π] Charges W phase first capacitor C1 , V phase and U phase cut off the charging path of the first capacitor C1 [1 / 2π to 5 / 6π] charge the V phase first capacitor C1, U phase and W phase cut off the charging path of the first capacitor C1 [5 / 6π to 7 / 6π] The U-phase first capacitor C1 is charged, and the V-phase and W-phase block the charging path of the first capacitor C1. [7 / 6π to 3 / 2π] W-phase first capacitor C1 V phase and U phase block the charging path of the first capacitor C1 [3 / 2π to 11 / 6π] charging the V phase first capacitor C1, U phase and W phase charging path of the first capacitor C1 [11 / 6π to 2π] charge the U-phase first capacitor C1, V phase and W phase are 1 cut off the charging path of the capacitor C1.

  As shown in FIG. 4, the five-level power converter according to the first embodiment has a commutation period in which charging of the first capacitor C1 is switched to another phase. For example, if commutation is not considered, the seventh and eighth switching elements S7 of the U-phase inverter unit 2U are turned off at 1 / 6π, but the timing of turning off is delayed in consideration of commutation, and the U-phase And a commutation period in which the V-phase inverter units 2U and 2V are simultaneously turned on. During this commutation period, the reactor energy (current) is commutated from the U phase to the V phase.

As described above, according to the five-level power converter in the first embodiment, the intermediate phase and the inverter unit are selected from the three-phase voltage command values V ^* _U , V ^* _V , and V ^* _W , and By controlling the on / off states of the seventh and eighth switching elements S7, S8 of the inverter units 2U, 2V, 2W, the first capacitor C1 of each phase is charged 60 degrees (1 / 3π) by time division. Thus, the phase of the first capacitor C1 can be switched without causing a short circuit, and the capacitor voltage control in the five-level power converter can be performed with a simple control configuration.

  Further, by providing the commutation period, it is possible to commutate the energy stored in the reactor L to another phase. Furthermore, even when the commutation period is not provided, it is possible to absorb the energy of the reactor L by adding the protection circuit 1.

[Embodiment 2]
FIG. 5 shows voltage command values V ^* _U , V ^* _V , V ^* _W of the five-level power converter according to the second embodiment, and times indicating the on / off states of the seventh and eighth switching elements S7, S8. It is a chart.

In the second embodiment, the voltage command values V ^* _U , V ^* _V , V ^* _W , and the intermediate phase of the voltage command values V ^* _U , V ^* _V , V ^* _W , And the first capacitor C1 of each phase is charged by 20 degrees (1 / 9π). Specifically, in the period in which the phase of the voltage command values V ^* _U , V ^* _V , and V ^* _W is divided into 20 degrees (1 / 9π), the period in which the voltage command value serving as the intermediate phase is zero crossing is the intermediate phase. In other periods, the voltage command value selects another phase having the same sign as the intermediate phase.

Hereinafter, charging of the first capacitor C1 in each phase of the voltage command values V ^* _U , V ^* _V , and V ^* _W and blocking of the charging path for the first capacitor C1 are shown.

[0 to 1 / 18π] Charges U-phase first capacitor C1, V phase and W phase cut off charging path of first capacitor C1 [1 / 18π to 1 / 6π] Charges W phase first capacitor C1 , U phase and V phase cut off the charging path of the first capacitor C1 [1 / 6π to 5 / 18π] charge the U phase first capacitor C1, V phase and W phase cut off the charging path of the first capacitor C1 [5 / 18π to 7 / 18π] Charge W-phase first capacitor C1, U phase and V phase cut off charging path of first capacitor C1 [7 / 18π to 1 / 2π] V-phase first capacitor C1 The U phase and the W phase block the charging path of the first capacitor C1 [1 / 2π to 11 / 18π] The W phase first capacitor C1 is charged, the U phase and the V phase are charging paths for the first capacitor C1 [11 / 18π to 13 / 18π] V-phase first capacitor 1 is charged, U phase and W phase block the charging path of the first capacitor C1 [13 / 18π to 5 / 6π] U phase first capacitor C1 is charged, V phase and W phase are charged to the first capacitor C1 The path is cut off [5 / 6π to 17 / 18π] charging the V-phase first capacitor C1, and the U and W phases cut off the charging path of the first capacitor C1 [17 / 18π to 19 / 18π] 1 capacitor C1 is charged, V-phase and W-phase block the charging path of the first capacitor C1 [19 / 18π to 7 / 6π] W-phase first capacitor C1 is charged, U-phase and V-phase are the first capacitor C1 [7 / 6π to 23 / 18π] charge the U-phase first capacitor C1, V phase and W phase block the charging path of the first capacitor C1 [23 / 18π to 25 / 18π] W phase The first capacitor C1 is charged, the U phase and the V phase are the first capacitor Density C1 charging path cut off [25 / 18π to 3 / 2π] V-phase first capacitor C1 is charged, U phase and W phase cut off charging path for first capacitor C1 [3 / 2π to 29 / 18π] Charge the first capacitor C1 of the W phase, the U phase and the V phase cut off the charging path of the first capacitor C1 [29 / 18π to 31 / 18π] The first capacitor C1 of the V phase is charged, the V phase and the W phase are The charging path of the first capacitor C1 is cut off [31 / 18π to 11 / 6π] The U-phase first capacitor C1 is charged, and the V phase and the W phase cut off the charging path of the first capacitor C1 [11 / 6π to 35 / 18π] V-phase first capacitor C1 is charged, U-phase and W-phase cut off charging path of first capacitor C1 [35 / 18π to 2π] U-phase first capacitor C1 is charged, V-phase and W-phase are The charging path of the first capacitor C1 is cut off.

  As shown in FIG. 5, the five-level power converter according to the second embodiment has a commutation period in which charging of the first capacitor C1 is switched to another phase. For example, if commutation is not taken into account, the seventh and eighth switching elements S7 and S8 of the U-phase inverter unit 2U are turned off at 1 / 18π, but the timing of turning off is delayed in consideration of commutation. Thus, a commutation period during which the U-phase and W-phase inverter units 2U and 2W are simultaneously turned on is provided. In this commutation period, the energy (current) of the reactor L is commutated from the U phase to the W phase.

  As described above, according to the five-level power converter in the second embodiment, it is possible to perform capacitor voltage control with a simple control configuration by adding the protection circuit 1.

In addition, the three-phase voltage command values V ^* _U , V ^* _V , V ^* _W to the voltage command values V ^* _U , V ^* _V , V ^* _W are intermediate phase inverter units, and the intermediate phase voltage command value V ^* _U , V ^* _V , V ^* _W and other phases of the same sign are selected, and the ON / OFF states of the seventh and eighth switching elements S7, S8 of the inverter units 2U, 2V, 2W of the respective phases are selected. By controlling, it becomes possible to charge the first capacitor C1 of each phase by 20 degrees (1 / 9π) by time division, and the phase of the first capacitor C1 can be switched without causing a short circuit.

  Further, by providing the commutation period, it is possible to commutate the energy stored in the reactor L to another phase. Furthermore, even when no commutation period is provided, the protection circuit 1 can absorb the energy of the reactor L.

  Although the present invention has been described in detail only for the specific examples described above, it is obvious to those skilled in the art that various changes and modifications are possible within the scope of the technical idea of the present invention. Such variations and modifications are naturally within the scope of the claims.

For example, in the first and second embodiments, the DC power source V _DC is used as the DC voltage source. However, the AC power source may be a rectified DC voltage. In addition, the selection of the seventh and eighth switching elements S7 and S8 has been described using the phase voltage command values of the U, V, and W phases, but the voltage values of the respective phases such as the voltage detector and the voltage obtained by calculation are represented. It may be a thing.

  Further, in the first and second embodiments, the charging period is time-divided into 60 degrees or 20 degrees. However, the voltage of the first capacitor C1 can be adjusted by arbitrarily setting the charging period in the period of 60 degrees or 20 degrees. It is. That is, by setting the period during which the seventh and eighth switching elements S7 and S8 are turned on arbitrarily, the voltage of the first capacitor C1 is not limited to five levels (2E, E, 0, −E, −2E), for example, It is possible to control to 1.5E, 0.5E, -0.5E, -1.5E, and the like.

DESCRIPTION OF SYMBOLS 1 ... Protection circuit 2U, 2V, 2W ... Inverter unit S1-S8 ... 1st-8th switching element 3 ... Control part 4 ... Load A, B ... Output terminal C1-C3 ... 1st-3rd capacitor _VDC ... DC Power supply

Claims (5)

A five-level power converter that generates an AC output by converting a DC voltage into a plurality of voltage levels,
A DC voltage source;
A first series circuit in which first to fourth switching elements are sequentially connected in series between the positive and negative electrodes of the DC voltage source, and a second series circuit in which fifth and sixth switching elements are sequentially connected in series between the positive and negative electrodes of the DC voltage source. A series circuit; a first capacitor connected in parallel to the first series circuit and the second series circuit between the positive and negative electrodes of the DC voltage source; a common connection point of the first switching element and the second switching element; A second capacitor connected between a common connection point of the three switching elements and the fourth switching element, a seventh switching element interposed between the positive terminal of the DC voltage source and the first capacitor, and a DC voltage And an eighth switching element interposed between the negative electrode end of the source and the first capacitor, and a common connection point of the fifth switching element and the sixth switching element is a neutral point of the three-phase inverter unit Commonly connected, it includes a second switching element U-phase common connection point of the third switching element, V-phase, and three-phase inverter unit to the output terminals of the W-phase, and
A five-level power converter, wherein an intermediate phase is selected from voltage command values of U, V, and W phases, and the seventh switching element and the eighth switching element of the selected phase are turned on. A five-level power converter that generates an AC output by converting a DC voltage into a plurality of voltage levels,
A DC voltage source;
A first series circuit in which first to fourth switching elements are sequentially connected in series between the positive and negative electrodes of the DC voltage source, and a second series circuit in which fifth and sixth switching elements are sequentially connected in series between the positive and negative electrodes of the DC voltage source. A series circuit; a first capacitor connected in parallel to the first series circuit and the second series circuit between the positive and negative electrodes of the DC voltage source; a common connection point of the first switching element and the second switching element; A second capacitor connected between a common connection point of the three switching elements and the fourth switching element, a seventh switching element interposed between the positive terminal of the DC voltage source and the first capacitor, and a DC voltage And an eighth switching element interposed between the negative electrode end of the source and the first capacitor, and a common connection point of the fifth switching element and the sixth switching element is a neutral point of the three-phase inverter unit Commonly connected, it includes a second switching element U-phase common connection point of the third switching element, V-phase, and three-phase inverter unit to the output terminals of the W-phase, and
The phase of the voltage command value of the U, V, W phase is divided by 20 degrees, the intermediate phase is selected during the period when the voltage command value as the intermediate phase is zero cross, and the voltage command value as the intermediate phase during the other periods A five-level power converter characterized by selecting the other phase with the same sign and turning on the seventh and eighth switching elements of the selected phase.   A commutation period is provided in which the timings at which the seventh and eighth switching elements are switched from on to off are delayed, and the seventh and eighth switching elements of the selected phase are simultaneously turned on before and after phase switching. A five-level power converter according to claim 1 or 2.   4. The 5 level according to claim 1, wherein the seventh and eighth switching elements of the selected phase are turned on in an arbitrary period of the selected period. Power converter.   5. The five-level circuit according to claim 1, further comprising a protection circuit having a reactor and a third capacitor interposed between the DC voltage source and the three-phase inverter unit. Power converter.

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