JP2012253981A - Five-level conversion circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the following problem: a conventional 5 level conversion circuit requires four DC power supplies and four semiconductor elements through which an electric current runs when converting, thus causing large loss and apparatus upsizing.SOLUTION: A conversion circuit for one phase includes: two DC power sullies; a semiconductor arm pair with three semiconductor elements connected in series; one capacitor series circuit; and one AC switch. Five-level conversion of DC to AC or AC to DC is achieved by reducing the number of the semiconductors through which current runs more than the conventional.

Description

  The present invention relates to a power conversion circuit technology for a semiconductor power conversion device, and more particularly, to a five-level conversion circuit that selects and arbitrarily converts five voltage levels.

  FIG. 6 shows one phase of a five-level conversion circuit using a conventional technique. In FIG. 6, a series circuit of semiconductor switches Q1 to Q8 is connected between a positive electrode and a negative electrode of a DC group power supply BA2 in which DC single power sources b11 to b22 are connected in series, and a connection point between the semiconductor switches Q4 and Q5. Becomes the AC output U and is connected to the AC terminal Uo via the reactor L3. Further, between the connection point of the semiconductor switches Q1 and Q2 and the connection point of Q5 and Q6, an outer terminal of the diode arm pair DA1 in which the diodes D1 and D4 are connected in series is provided in the diode arm pair DA1. The point terminals are respectively connected to connection points of the single DC power sources b11 and b12. Similarly, the outer terminal of the diode arm pair DA2 in which the diodes D2 and D5 are connected in series is connected between the connection point of the semiconductor switches Q2 and Q3 and the connection point of Q6 and Q7. The point terminal has a connection point between the single DC power sources b12 and b21, and a diode arm pair DA3 in which diodes D3 and D6 are connected in series between the connection point of the semiconductor switches Q3 and Q4 and the connection point of Q7 and Q8. The outer terminal is connected to the midpoint terminal of the diode arm pair DA3 at the connection point of the single DC power sources b21 and b22. Further, a capacitor C3 is connected to the AC terminal Uo to form an AC output filter by the reactor L3 and the capacitor C3, and the stepped waveform resulting from switching of the semiconductor switches Q1 to Q8 is shaped into a sinusoidal waveform.

  In such a circuit configuration, when the semiconductor switches Q1 to Q4 are turned on and Q5 to Q8 are turned off, a voltage of + 2E is applied to the AC output U, and when the semiconductor switches Q2 to Q5 are turned on and Q6 to Q8 and Q1 are turned off. When the semiconductor switch Q3 to Q6 is turned on and Q7, Q8, Q1 and Q2 are turned off, a zero voltage is applied to the AC output U and the semiconductor switches Q4 to Q7 are turned on. When Q3 and Q8 are turned off, a voltage of -1E is outputted to the AC output U, and when the semiconductor switches Q5 to Q8 are turned on and when Q1 to Q4 are turned off, a voltage of -2E is outputted to the AC output U. . In this way, by adjusting the on / off state of each of the semiconductor switches Q1 to Q8, a five-level voltage can be output to the AC output U. This circuit is applicable not only in inverter operation for converting from direct current to alternating current but also in rectifier operation for converting from alternating current to direct current. The detailed operation of the circuit of FIG. 6 is disclosed in Patent Document 1.

Japanese Patent Laid-Open No. 2006-271042

As described above, in the conventional circuit shown in FIG. 6, the maximum number of semiconductor switches through which an output current passes between the DC combined power source BA2 and the AC output U is four. For this reason, there is a problem that steady on-loss in the semiconductor switch is increased, the efficiency of the entire apparatus is lowered, and it is difficult to reduce the size and cost.
Further, in a general five-level conversion circuit as shown in FIG. 6, even when the voltage / current output from the AC output U has an AC waveform with positive and negative symmetry, the power shared by the DC single power sources b11 and b12 is the principle. Therefore, independent DC power supplies are required. The same applies to b21 and b22. Therefore, the DC combined power source BA2 as an input requires four single power sources that can supply power independently, which is a great restriction in manufacturing the device. This DC power supply imbalance problem is introduced in, for example, “A multi-level voltage-source converter system with balanced DC voltage” in IEEE-PESC '95 conference records pp 1144 to 1150.
Accordingly, an object of the present invention is to provide a five-level conversion circuit capable of reducing the number of semiconductor switches through which an output current passes as compared with the prior art and reducing generated loss, and operable with two single power supplies as a DC input power supply. is there.

  In order to solve the above-described problem, in the first invention, five voltage levels are generated from a DC power source having three terminals divided into two and having three different voltage levels including zero, In the five-level conversion circuit in which the five voltage levels can be arbitrarily selected, the semiconductor device is combined with the first, second and third arm pairs in which two semiconductor switch arms having anti-parallel connected diodes are connected in series. An alternating-current switch configured, and the first arm pair is disposed between a first direct current terminal having the highest potential of the direct current power source and a second direct current terminal having an intermediate potential, and the second direct current terminal and the potential are The second arm pair is disposed between the lowest third DC terminal and the first reactor and the second arm pair are disposed between the midpoint terminal of the first arm pair and the midpoint terminal of the second arm pair. Through the reactor A series capacitor circuit in which two capacitors are connected in series with the third arm pair in parallel with the third arm pair, and the intermediate capacitor is connected between the intermediate connection point of the series capacitor circuit and the intermediate terminal of the third arm pair. An AC switch is connected to a filter capacitor to an intermediate terminal of the third arm pair, and a circuit configuration in which the intermediate terminal of the third arm pair is an AC output terminal. The first and second reactors are the DC A function of suppressing an inrush current component from a power source to the series capacitor circuit flowing through the first arm pair, the series capacitor circuit, and the second arm pair; and harmonics of the filter capacitor and the 5-level conversion circuit output. Combined with the function of forming a reduced AC filter.

  According to a second aspect of the present invention, in a five-level conversion circuit that generates a DC power source having three terminals divided into two from an AC power source and having three different voltage levels including zero, two diode arms are connected in series. A first and second arm pair configured by connecting, a third arm pair configured by connecting in series two semiconductor switch arms each having a diode connected in antiparallel, and a semiconductor device. An AC switch, and the first arm pair is disposed between a first DC terminal having the highest potential of the DC power supply and a second DC terminal having an intermediate potential, and a second potential having the lowest potential from the second DC terminal. The first arm pair and the second reactor are respectively connected between the DC terminal and the middle point terminal of the first arm pair and the middle point terminal of the second arm pair. Through A series capacitor circuit in which two capacitors are connected in series with the third arm pair in parallel with the third arm pair is connected between the intermediate connection point of the series capacitor circuit and the intermediate terminal of the third arm pair. Are operated as a high power factor rectifier circuit that obtains a direct current from the alternating current power supply by connecting an alternating current power supply to an intermediate terminal of the third arm pair and controlling on / off of the third arm pair and the alternating current switch. .

  According to a third aspect of the present invention, in a five-level conversion circuit that generates three direct current power supplies having three different voltage levels including zero, the diode arm and the diode are reversed. A first arm pair in which semiconductor switch arms connected in parallel are connected in series in this order, a second arm pair in which semiconductor switch arms and diode arms connected in reverse parallel are connected in series in this order, and a diode arm A third arm pair connected in series with each other and an AC switch configured by combining semiconductor devices, a first DC terminal having the highest potential of the DC power supply and a second DC terminal having an intermediate potential The first arm pair between the second DC terminal and the third DC terminal having the lowest potential, and the second arm pair between the second DC terminal and the third DC terminal. Between the midpoint terminal of the arm pair and the midpoint terminal of the second arm pair, the third arm pair is connected in parallel with the third arm pair via a first reactor and a second reactor, respectively. A series capacitor circuit in which two capacitors are connected in series, the AC switch between the intermediate connection point of the series capacitor circuit and the intermediate terminal of the third arm pair, and an AC power source at the intermediate terminal of the third arm pair, Each is connected and operates as a high power factor rectifier circuit that obtains direct current from the alternating current power supply by turning on and off the semiconductor switch and the alternating current switch of the first and second arm pairs.

In the fourth invention, the AC switch in the first to third inventions is configured by connecting arms made of semiconductor devices in anti-series.
In the fifth invention, the AC switch in the first to third inventions is configured by connecting in reverse parallel semiconductor devices having reverse breakdown voltage.

  In the present invention, a series circuit of two single power sources is used as the DC power source, and the number of semiconductor switches through which current passes between the DC power source and the AC (output or input) terminal Uo is up to three, thereby reducing loss. can do. As a result, it is possible to increase the efficiency, cost, and size of the apparatus. Further, since the DC power supply can be a combination of two single power supplies, the conditions of the DC power supply equivalent to that of a general three-level conversion circuit relaxed from the conventional five-level conversion circuit can be achieved.

It is a circuit diagram (for 1 phase) which shows the 1st example of the present invention. It is a circuit diagram (for 1 phase) which shows the modification of the 1st Example of this invention. It is a circuit diagram (for 1 phase) which shows the 2nd Example of this invention. It is a circuit diagram (for 1 phase) which shows the 3rd Example of this invention. It is an operation | movement waveform diagram of the 1st Example of this invention. It is a conventional 5-level conversion circuit diagram (for one phase).

  The main point of the present invention is that as a conversion circuit for one phase, two DC single power supplies, a pair of semiconductor arms in which three semiconductor elements are connected in series, one capacitor series circuit, and one AC switch. In other words, the five-level conversion from direct current to alternating current or the five-level conversion from alternating current to direct current is achieved by reducing the number of semiconductor elements through which a current passes compared to the prior art.

FIG. 1 shows a first embodiment of the present invention. In FIG. 1, an arm pair formed by connecting semiconductor switches Q9 and Q10 in series between a positive electrode and an intermediate terminal of a DC combined power source BA1 in which DC single power sources b1 and b2 each having a voltage of 2E are connected in series. The outer terminal of QA1 is connected between the intermediate terminal of BA1 and the negative electrode, and the outer terminal of arm pair QA2 formed by connecting semiconductor switches Q11 and Q12 in series, respectively. Further, between the midpoint terminals of the arm pairs QA1 and QA2, the outer terminals of the arm pair QA3 formed by connecting semiconductor switches Q13 and Q14 in series via the reactors L1 and L2, are connected. The midpoint of this arm pair QA3 The terminal is connected to the filter capacitor C3 and becomes an AC terminal Uo.
Further, a series capacitor circuit CA1 including capacitors C1 and C2 is connected in parallel with the outer terminals of the arm pair QA3. Between the intermediate connection point of the capacitors C1 and C2 and the midpoint terminal of the arm pair QA3, there is a semiconductor. An AC switch SW1 in which switches Q15 and Q16 are connected in reverse series is connected.

  In such a circuit configuration, when the semiconductor switches Q9 and Q13 are turned on and Q10, Q14 and Q1 of SW1 are turned off, a voltage obtained by smoothing the + 2E voltage is output to the AC terminal Uo, and at this time, the output current passes therethrough. There are two semiconductor switches, Q9 and Q13. Further, by turning off Q12 and turning on Q11 at this time, the voltage applied to the semiconductor switch that is turned off in the arm pairs QA1 to QA3 is clamped at a maximum of 2E, and the AC switch SW1 that is also turned off. The voltage applied to Q16 is clamped to the voltage VC1 of the capacitor C1. At this time, since Q9 and Q11 are on, the voltage of the series capacitor circuit CA1 is maintained at 2E, which is the same as the voltage of the single power supply b1.

  From this state, when the AC switch SW1 is fully turned on and Q13 is turned off, the voltage (+ VC2) of the capacitor C2 is output to the AC terminal Uo. At this time, the semiconductor switch through which the output current passes is Q9, Q15, Q16 or Q11. , Q15, and Q16. At this time, the voltage applied to the semiconductor switch turned off in the arm pairs QA1 to QA3 is clamped at a maximum of 2E.

  Next, when Q10 and Q13 are turned on or Q11 and Q14 are turned on and Q9, Q12 and SW1 are turned off, zero voltage is output to the AC terminal Uo. At this time, there are two semiconductor switches Q10 and Q13 or Q11 and Q14 through which the output current passes. Further, the voltage applied to the semiconductor switch that is turned off in the arm pairs QA1 to QA3 is clamped at a maximum of 2E, and similarly, the voltage applied to the AC switch SW1 is clamped to the voltage VC1 of the capacitor C1 or the voltage VC2 of C2.

  When the semiconductor switches Q12 and Q14 are turned on and Q11, Q13 and SW1 are turned off, a voltage obtained by smoothing the voltage −2E is output to the AC terminal Uo. At this time, there are two semiconductor switches Q12 and Q14 through which the output current passes. Further, when Q9 is turned off and Q10 is turned on at this time, the voltage applied to the semiconductor switch which is turned off in the arm pairs QA1 to QA3 is clamped to 2E at the maximum. Similarly, the voltage applied to Q15 of the AC switch SW1 that is turned off is clamped to the voltage (VC2) of the capacitor C2. At this time, since Q10 and Q12 are on, the voltage of the series capacitor circuit CA1 is maintained at 2E, which is the same as the voltage of the DC single power source b2.

  Next, when the AC switch SW1 is turned on and Q14 is turned off from that state, the voltage (-VC1) of the capacitor C1 is output to the AC terminal Uo. At this time, the semiconductor switch through which the output current passes is Q15, Q16, Q12 or Q15. , Q16, and Q10. At this time, the voltage applied to the semiconductor switch turned off in the arm pairs QA1 to QA3 is clamped at a maximum of 2E.

  Through the above series of operations, the AC terminal Uo can output a voltage obtained by smoothing voltages of five levels of + 2E, + VC2, 0, −VC1, and −2E. FIG. 5 shows ON / OFF patterns of the semiconductor switches Q9 to Q14, Q15, and Q16 and the voltage waveform of the AC terminal Uo at this time. At this time, when the capacitances of the capacitors C1 and C2 are the same and the operations of the semiconductor switches Q9 and Q12, Q10 and Q11, Q5 and Q6, Q15 and Q16 are symmetric in the positive and negative periods as shown in FIG. Since the voltage of Uo is positive and negative and the AC output current is also positive and negative symmetric, the voltages VC1 and VC2 of the capacitors C1 and C2 are on average 1E at the same voltage, and the voltage of the AC terminal Uo is + 2E, + VC2 = + 1E, 0, −VC1 = −1E, −2E are smoothed sinusoidal voltages.

  When the semiconductor switches Q9 and Q11 are turned on and Q10 and Q12 are turned off, the series capacitor circuit CA1 is clamped to the DC single power source b1 through a route of Q9 → reactor L1 → CA1 → reactor L2 → Q11. Conversely, when Q10 and Q12 are on and Q9 and Q11 are off, they are clamped to the DC single power source b2 along the route of Q10 → L1 → CA1 → L2 → Q12. Here, when a potential difference is generated between the DC single power sources b1 and b2, an inrush current tends to flow through CA1 at the timing when the clamp destination of the series capacitor circuit CA1 is switched from b1 to b2 or vice versa. And the inrush current is suppressed by the current suppressing effect of L2.

Further, for example, when Q9, Q11, and Q13 are on and a voltage obtained by smoothing the voltage + 2E is output to the AC terminal Uo, the path of the output current is b1 → Q9, considering the intermediate terminal of the DC group power supply BA1 as a base point. There are two types: a first route that passes through L1, Q13, and C3, and a second route that passes through Q11, L2, C2, C1, Q13, and C3. An LC filter circuit composed of L1 and C3 is configured in the first path, and an LC filter circuit composed of L2 and C3 is configured in the second path. Similarly, when the voltage of the AC terminal Uo is a voltage obtained by smoothing the voltages of + 1E, 0, -1E, and -2E, there are two current paths, both of which constitute an LC filter circuit using L1 and L2. Here, the cutoff frequency ω as an equivalent AC output LC filter when the inductance values of L1 and L2 are selected to be the same Lm is
ω = 1 / √ ((Lm / 2) · C3).
Here, by appropriately selecting the values of Lm and C3, the voltage of the AC terminal Uo is shaped from the stepped waveform shown in FIG. 5 into a continuous sine waveform, and L1 and L2 are inverters. The reactor function of the output LC filter can also be provided.
The conversion circuit of FIG. 1 controls the on / off of each of the semiconductor switches Q9 to Q14, Q15, and Q16 not only in an inverter operation for converting from direct current to alternating current but also in a rectifier operation for converting from alternating current to direct current. It is possible to control the AC side current.

FIG. 2 shows an embodiment using an AC switch SW2 constructed by connecting reverse blocking IGBTs Q21 and Q22 in reverse parallel instead of SW1. The operation is the same as in FIG. The operation is the same as that of FIG. 1 except that Q21 of FIG. 2 is turned on instead of turning on Q15 of FIG. 1, and Q22 is turned on instead of turning on of Q16.
However, when the output current passes through SW1, the circuit of FIG. 1 passes two semiconductor switches of Q15 and Q16, whereas only one of Q21 or Q22 is passed through SW2 of FIG. Since it does not pass, the number of semiconductor switches (including reverse blocking IGBTs) through which the output current passes as a whole 5-level inverter is reduced from 3 to 2 at maximum. As a result, higher efficiency can be achieved.

FIG. 3 shows a second embodiment of the present invention. The difference from FIG. 2 is that the semiconductor switches Q9 to Q12 are changed to diodes D9 to D12, respectively, and an external AC power source is connected to the AC terminal Uo.
In such a circuit configuration, when Q14 and Q22 are turned on and Q13 and Q21 are turned off when the voltage of the external AC power supply is positive and its amplitude is smaller than the voltage VC2 of the capacitor C2, the external AC power supply 1 → AC terminal Uo A short-circuit current flows through the path of Q14 → L2 → D11 → BA1 midpoint terminal M, and the energy of the external AC power supply 1 is accumulated in the reactor L2. When Q14 is turned off from this state, the current is commutated to the path of the midpoint terminal M of the external AC power source 1 → Q22 → C2 → L2 → D11 → BA1, and the energy stored in the reactor L2 is released to the capacitor C2. . Here, since the voltage across the series capacitor circuit CA1 also rises due to the rise in the voltage of the capacitor C2, the current is also shunted to the path of the midpoint terminal M of the external AC power source 1 → Q22 → C1 → L1 → D9 → b1 → BA1. Finally, the energy is charged into the single power source b1 of the DC power source. Here, by controlling the on / off ratio of the semiconductor switch Q14, it becomes possible to control the alternating current input.

Next, when the voltage of the external AC power source is positive and the amplitude thereof is larger than the voltage VC2 of the capacitor C2, when Q22 is turned on and Q13, Q14, Q21 are turned off, the external AC power source 1 → AC terminal Uo → Q22 → C2 → The short-circuit current flows through the path of the midpoint terminal M of L2 → D11 → BA1 and the path of the external AC power source 1 → AC terminal Uo → Q22 → C1 → L1 → D9 → b1 → BA1 midpoint terminal M. Are stored in reactors L1 and L2. When the semiconductor switch Q22 is turned off from this state, the current flows from the external AC power source 1 → AC terminal Uo → Q13 → CA1 (C1, C2) → L2 → D11 → BA1 midpoint terminal M and external AC power source 1 → AC terminal. Current flows through two paths from the middle point M of Uo->Q13->L1->D9->b1-> BA1, and the energy stored in reactors L1 and L2 is finally connected to a single DC power source via series capacitor circuit CA1. The power supply b1 is charged. Here, by controlling the on / off ratio of the semiconductor switch Q22, it is possible to control the alternating current input.
During the period in which the external AC power source is positive, the DC single power source b1 can be charged while controlling the AC current to be input.

  Even when the voltage of the external AC power supply 1 is negative, the same operation as that of the positive polarity is possible due to the target of the circuit, and the DC single power supply b2 can be charged while controlling the AC current. Further, when the voltage of the external AC power supply 1 is positive, the voltage VC2 of the capacitor C2 increases and the voltage VC1 of the capacitor C1 decreases, but when the external AC power supply 1 is negative, the reverse operation is performed. When one period is averaged, VC1 = VC2 = + 1E from the symmetry of operation.

FIG. 4 shows a third embodiment of the present invention. The difference from FIG. 2 is that the semiconductor switches Q9 and Q12 to Q14 are changed to diodes D9 and D12 to D14, respectively, and the external AC power supply 1 is connected to the AC terminal Uo.
In such a circuit configuration, when the voltage of the external AC power supply is positive and its amplitude is smaller than + 1E, when Q10 is turned on and Q11, Q21 and Q22 are turned off, the external AC power supply 1 → AC terminal Uo → D13 → A short-circuit current flows through a path of L1 → Q10 → BA1 midpoint terminal M, and the energy of the external AC power supply is accumulated in the reactor L1. When the semiconductor switch Q10 is turned off and Q22 is turned on from this state, the current is commutated to the path of the midpoint terminal M of the external AC power source 1 → Q22 → C1 → L1 → D9 → b1 → BA1 and stored in the reactor L1. As the capacitor C1 is discharged, the energy is charged into the single DC power supply b1. Here, by controlling the ON / OFF ratio of the semiconductor switches Q10 and Q22, it is possible to control the alternating current that is input.

Next, when the voltage of the external AC power source is positive and its amplitude is larger than the voltage VC2 of the capacitor C2, when Q22 is turned on and Q10, Q11, and Q21 are turned off, the external AC power source 1 → AC terminal Uo → Q22 → C2 → The short-circuit current flows through the path L2 → Q11 → BA1 midpoint terminal M and the external AC power source 1 → AC terminal Uo → Q22 → C1 → L1 → D9 → b1 → BA1. And stored in L2. When the semiconductor switch Q22 is turned off from this state, the current flows from the external AC power source 1 → AC terminal Uo → D13 → CA1 (C1, C2) → L2 → Q11 → BA1 midpoint terminal M and external AC power source 1 → AC. Current flows through two paths of the terminal Uo, D13, L1, D9, b1, and BA1, and the energy stored in the reactors L1 and L2 is finally passed through the series capacitor circuit CA1. The direct current single power source b1 is charged. Here, by controlling the on / off ratio of Q22, it becomes possible to control the alternating current input.
During the period in which the external AC 1 is positive, the DC single power source b1 can be charged while controlling the AC current to be input.

  When the voltage of the external AC power source 1 is negative, the same operation as that of the positive polarity is possible due to the target of the circuit, and the DC single power source b2 can be charged while controlling the AC current. When the voltage of the external AC power source is positive, the voltage VC2 of the capacitor C2 increases and the voltage VC1 of the capacitor C1 decreases. However, when the external AC power source is negative, the reverse operation is performed. If the periods are averaged, VC1 = VC2 = + 1E from the symmetry of operation.

  The present invention is a proposal of a DC-AC conversion circuit that generates high-voltage AC from a small number of DC power sources using a five-level conversion circuit, and an AC-DC conversion circuit. The present invention can be applied to a large-capacity uninterruptible power supply (UPS) and an inverter for driving an electric motor.

Q1-Q16 ... switching element Q21, Q22 ... switching element (reverse blocking type)
QA1, QA2, QA3 ... Arm pair QA4, QA5 ... Arm pair D1-D6, D9-D14 ... Diode b1, b2, b11, b12, b21, b22 ... DC single power supply BA1, BA2, ..DC group power supply 1 ... AC power supply DA1 to DA6 ... Diode arm pair L1, L2, L3 ... Reactor C1 to C3 ... Capacitor CA1 ... Series capacitor circuit SW1, SW2 ... AC switch

Claims (5)

In a five-level conversion circuit having three terminals divided into two, generating five voltage levels from a DC power supply having three different voltage levels including zero, and arbitrarily selecting the five voltage levels ,
A first, second and third arm pair in which two semiconductor switch arms having diodes connected in antiparallel are connected in series, and an AC switch configured by combining semiconductor devices, the potential of the DC power supply being the highest The first arm pair is provided between the first DC terminal and the second DC terminal having an intermediate potential, and the second arm pair is provided between the second DC terminal and the third DC terminal having the lowest potential. The third arm pair is interposed between the midpoint terminal of the first arm pair and the midpoint terminal of the second arm pair via a first reactor and a second reactor, respectively. A series capacitor circuit in which two capacitors are connected in series with each other, and the AC switch is connected between the intermediate connection point of the series capacitor circuit and the intermediate terminal of the third arm pair, and the intermediate switch of the third arm pair is filtered. Conden And with each connecting a circuit configuration of the AC output terminals of the intermediate terminal of the third arm pair,
The first and second reactors have a function of suppressing an inrush current component from the DC power supply to the series capacitor circuit flowing through the first arm pair, the series capacitor circuit, and the second arm pair, and the filter capacitor. And a function of forming an AC filter that reduces harmonics of the output of the five-level conversion circuit. In a five-level conversion circuit that generates a DC power supply having three different voltage levels including zeros, including three terminals divided into two from an AC power supply,
A first and second arm pair configured by connecting two diode arms in series; a third arm pair configured by connecting two semiconductor switch arms having diodes connected in reverse parallel; and a semiconductor device Between the first DC terminal having the highest potential of the DC power source and the second DC terminal having an intermediate potential, and the second DC terminal. And the third DC terminal having the lowest potential, the second arm pair, and the midpoint terminal of the first arm pair and the midpoint terminal of the second arm pair, respectively. And a series capacitor circuit in which two capacitors are connected in series with the third arm pair in parallel with the third arm pair via a second reactor, an intermediate connection point of the series capacitor circuit and the third arm pair. Intermediate terminal and A high power factor for obtaining direct current from the alternating current power source by connecting the alternating current switch between them and an alternating current power source to an intermediate terminal of the third arm pair, and controlling the on / off of the third arm pair and the alternating current switch. A five-level conversion circuit which operates as a rectifier circuit. In a five-level conversion circuit that generates a DC power supply having three different voltage levels including zeros, including three terminals divided into two from an AC power supply,
A first arm pair in which a diode arm and a semiconductor switch arm in which diodes are connected in antiparallel are connected in series in this order, and a second semiconductor switch arm in which diodes are connected in antiparallel and a diode arm are connected in series in this order. An arm switch, a third arm pair in which two diode arms are connected in series, and an AC switch configured by combining semiconductor devices, and the first DC terminal having the highest potential of the DC power supply has an intermediate potential The first arm pair between the second DC terminals, the second arm pair between the second DC terminal and the third DC terminal having the lowest potential, and the midpoint of the first arm pair. Between the terminal and the midpoint terminal of the second arm pair, the third arm pair is connected in parallel with the third arm pair via a first reactor and a second reactor, respectively. A series capacitor circuit in which sensors are connected in series, the AC switch between the intermediate connection point of the series capacitor circuit and the intermediate terminal of the third arm pair, and the AC power source at the intermediate terminal of the third arm pair, A five-level conversion circuit that operates as a high power factor rectifier circuit that obtains direct current from the alternating current power supply by connecting and controlling on / off of the semiconductor switch of the first and second arm pairs and the alternating current switch.   The 5-level conversion circuit according to claim 1, wherein the AC switch is configured by connecting an arm made of a semiconductor device in reverse series.   The 5-level conversion circuit according to claim 1, wherein the AC switch is configured by connecting a semiconductor device having a reverse breakdown voltage in reverse parallel.