JP2007330028A - Power conversion device and protection method for power conversion device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power conversion device and a protection method for power conversion devices wherein if one of conversion units operated in parallel fails, degradation in the switching characteristics of and heat deterioration in the semiconductor switching elements of the other conversion units are prevented and thus it can be prevented from leading to a critical failure, such as breakdown of a semiconductor switching element or arm short-circuiting in the device. <P>SOLUTION: When stacks 1, 2, 3 and 4 respectively output a current of, for example, 300 A and a power conversion device 100 supplies a total output current of 1,200 A, if the stack 1 fails and the output current of the stack 1 is zeroed, a current protection circuit 7 carries out control so that the total output current does not exceed 900 A equivalent to the sum of the output currents of the other three stacks 2, 3 and 4. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention comprises a plurality of semiconductor switching elements, a plurality of converters connected in parallel to convert direct current to alternating current or alternating current to direct current, and a power converter that converts input power to output power in each converter, and The present invention relates to a method for protecting the power converter.

  Power converters that perform AC / DC conversion, DC / AC conversion, frequency conversion, and the like are used in various fields such as factory equipment, railway vehicles, and power systems. In accordance with needs, semiconductor switching elements (power conversion elements) used in power conversion devices have been commercialized with large current capacities.

  In addition, when a large current capacity equal to or higher than the rated current of the semiconductor switching element used in the power conversion device is required, a power conversion unit including a plurality of semiconductor switching elements (for example, a converter circuit, a rectifier circuit, etc.) Are connected in parallel to increase the current capacity of the entire device.

  However, for example, in a power conversion device that operates a plurality of converter circuits in parallel, when an abnormality occurs in the semiconductor switching element and the converter circuit malfunctions, the output current value of the entire device is set to a predetermined value. Therefore, current sharing to other normal converter circuits is increased. For this reason, the semiconductor switching element of the converter circuit that is operating normally is overloaded or has an abnormal temperature rise, resulting in deterioration of the switching characteristics of the semiconductor switching element or thermal deterioration of the semiconductor switching element. There was a risk of serious failure such as destruction or short circuit failure of the converter circuit.

Therefore, in order to ensure the operation reliability of the power converter, when the current on the input side and the current on the output side of the power converter are detected and the output current corresponding to the current corresponding to the input current is not output, or A semiconductor power conversion system has been proposed in which the operation of a device is stopped when the output current larger than the current corresponding to the input current exceeds a set limit, so that the detection of the device failure is accelerated and the failure propagation is prevented (patent) Reference 1).
Japanese Patent No. 2928264

  However, the semiconductor power conversion system of Patent Document 1 is a technique for determining a failure of a power conversion device by detecting a current value on the input side and a current value on the output side of the power conversion device. When parallel operation is performed by connecting in parallel, when one of the converter circuits fails, the switching characteristics of the semiconductor switching element of the other normally operating converter circuit may deteriorate, thermal deterioration, etc. There was a problem that it could not be prevented.

  The present invention has been made in view of such circumstances, and detects the output current of each of a plurality of converters connected in parallel (for example, DC / AC conversion, AC / DC conversion, frequency conversion, etc.), and the detected output In the case where one of the conversion units operated in parallel fails, by determining abnormality of the conversion unit based on the current and limiting the total value of the output current of the conversion unit to a predetermined value or less based on the determination result Even if there is, the switching characteristics of the semiconductor switching element (power conversion element) of the other normally operating converter (power conversion element) can be prevented from deteriorating or thermal deterioration, and the semiconductor switching element insulation breakdown or the arm short circuit failure of the device It is an object of the present invention to provide a power conversion device that can prevent the occurrence of a serious failure such as the above and a method for protecting the power conversion device.

  Another object of the present invention is to provide a control means for controlling the output current by adjusting the on / off period of each semiconductor switching element of the conversion section, and for other conversion sections excluding the conversion section determined to be abnormal. By controlling so that the output current does not exceed a predetermined upper limit value, when an abnormality occurs in one conversion unit, the switching characteristics of the semiconductor switching elements of other conversion units that are operating normally deteriorate or heat An object of the present invention is to provide a power conversion device that prevents deterioration before it can be operated continuously until, for example, maintenance and inspection of a conversion unit determined to be abnormal is performed.

  Another object of the present invention is to specify a period during which the output current detected by the current detection unit is equal to or lower than a predetermined lower limit, and the specified period is an ON period of any semiconductor switching element of the conversion unit. Provided is a power conversion device that can easily determine which semiconductor switching element of a conversion unit is faulty by determining whether or not a semiconductor switching element that is turned on in the ON period is abnormal There is to do.

  Another object of the present invention is to stop the switching operation of the semiconductor switching element of the conversion unit determined to be abnormal so as to stop the conversion unit determined to be abnormal, thereby causing a breakdown or device of the semiconductor switching element. It is an object of the present invention to provide a power conversion device that can prevent a serious failure such as an arm short circuit failure.

  Another object of the present invention is to detect an element current flowing in each semiconductor switching element of a plurality of converters connected in parallel (for example, DC / AC conversion, AC / DC conversion, frequency conversion, etc.), and the detected element An abnormality of the semiconductor switching element is determined based on the current, and based on the determination result, the total value of the output current of the conversion unit is limited to a predetermined value or less, so that one of the conversion units operated in parallel fails. Even in such a case, it is possible to prevent deterioration of the switching characteristics or thermal deterioration of the semiconductor switching elements of other conversion units that are operating normally, such as breakdown of the semiconductor switching elements or failure of the arm short circuit of the device. An object of the present invention is to provide a power conversion device that can prevent a spillover to a serious failure.

  The power conversion device according to the first aspect of the present invention includes a plurality of semiconductor switching elements, wherein a plurality of conversion units that convert direct current to alternating current or alternating current to direct current are connected in parallel, and input power is converted by each of the conversion units. In the power conversion device that converts the output power, a current detection unit that detects an output current of each of the conversion units, and a determination unit that determines abnormality of the conversion unit based on the output current detected by the current detection unit; And a current limiting unit that limits a total value of output currents of the respective conversion units to a predetermined value or less based on a determination result of the determination unit.

  A power conversion device according to a second aspect of the present invention includes, in the first aspect of the invention, control means for controlling an output current of the conversion unit by adjusting an on / off period of each semiconductor switching element of the conversion unit. The output current of each of the conversion units other than the conversion unit determined to be abnormal by the determination unit is controlled so as not to exceed a predetermined upper limit value.

  The power conversion device according to a third aspect of the present invention is the power conversion device according to the second aspect, wherein when the conversion unit determines that the conversion unit is abnormal, the output current detected by the current detection unit is less than or equal to a predetermined lower limit value. A means for identifying, a means for determining which semiconductor switching element of the conversion unit the on-period is specified by the means, and a semiconductor switching element that is turned on in the on-period determined by the means An informing means for informing the abnormality is provided.

  A power conversion device according to a fourth aspect of the present invention includes the stop means for stopping the switching operation of the semiconductor switching element of the conversion unit determined to be abnormal by the determination means in any one of the first to third inventions. It is characterized by.

  A power conversion device according to a fifth aspect of the present invention includes a plurality of semiconductor switching elements, wherein a plurality of conversion units that convert direct current into alternating current or alternating current into direct current are connected in parallel, and input power is output to each of the conversion units. In the power conversion device that converts the current to the semiconductor switching element, an element current detection unit that detects an element current flowing through each of the semiconductor switching elements, and an abnormality of the semiconductor switching element is determined based on the element current detected by the element current detection unit And a current limiting unit configured to limit a total value of output currents of the respective conversion units to a predetermined value or less based on a determination result of the determination unit.

  According to a sixth aspect of the present invention, there is provided a method for protecting a power converter, comprising a plurality of semiconductor switching elements, wherein a plurality of converters for converting direct current to alternating current or alternating current to direct current are connected in parallel, and the input power is supplied to each of the converters. In the protection method for the power conversion device that converts the output power to the output power, the output current of each of the conversion units is detected, the abnormality of the conversion unit is determined based on the detected output current, and based on the determination result, The total value of the output current of each converter is limited to a predetermined value or less.

  In the first invention and the sixth invention, the output current of each of the converters connected in parallel (for example, DC / AC conversion, AC / DC conversion, frequency conversion, etc.) is detected, and based on the detected output current Then, the abnormality of the conversion unit is determined. For example, when the detected output current is smaller than a predetermined value or when the output current cannot be detected, the conversion unit is determined to be abnormal. When it is determined that there is an abnormality, the total value of the output currents of the respective converters is limited to a predetermined value or less. This prevents one of the conversion units connected in parallel and operating in parallel from failing, thereby preventing the load sharing of other normal conversion units from increasing and the output current from increasing. Deterioration of the switching characteristics or thermal deterioration of each semiconductor switching element is prevented in advance to prevent the semiconductor switching element from spreading to a serious failure such as an insulation breakdown or an arm short circuit failure.

  In the second invention, the control means controls the output current by adjusting the on / off period of each semiconductor switching element of the converter. When it is determined that one of the converters connected in parallel and operating in parallel is abnormal, the control means outputs an output current of other converters excluding the converter determined to be abnormal exceeds a predetermined upper limit value. Control to not. This prevents one of the converters connected in parallel and operating in parallel from failing, thereby preventing the load sharing of other normal converters from increasing and the output current from increasing. The part can be operated continuously.

  In the third aspect of the invention, a period in which the output current detected by the current detection unit is equal to or less than a predetermined lower limit value is specified. It is determined which semiconductor switching element of the conversion unit is the ON period of the conversion unit, and the semiconductor switching element that is turned ON in the determined ON period is notified as abnormal. Thereby, it is easily determined which semiconductor switching element is out of order in the conversion unit determined to be abnormal.

  In the fourth invention, the switching operation of the semiconductor switching element of the conversion unit determined to be abnormal is stopped.

  In the fifth invention, the element current flowing through each of the semiconductor switching elements of the converters connected in parallel (for example, DC / AC conversion, AC / DC conversion, frequency conversion, etc.) is detected, and the detected element current is detected. Based on this, an abnormality of the semiconductor switching element is determined. For example, when the detected element current is smaller than a predetermined value or when the element current cannot be detected, the semiconductor switching element is determined to be abnormal. When it is determined that there is an abnormality, the total value of the output currents of the respective converters is limited to a predetermined value or less. This prevents one of the converters connected in parallel and operating in parallel from failing, thereby preventing the load sharing of other normal converters from increasing and the output current from increasing. Deterioration of the switching characteristics or thermal deterioration of the semiconductor switching element is prevented in advance, thereby preventing the semiconductor switching element from spreading to a serious failure such as an insulation breakdown or an arm short circuit failure.

  In the first invention and the sixth invention, the output current of each of the converters connected in parallel (for example, DC / AC conversion, AC / DC conversion, frequency conversion, etc.) is detected, and based on the detected output current Even if one of the converters operated in parallel fails, the abnormality of the converter is determined and the total value of the output current of the converter is limited to a predetermined value or less based on the determination result. , Preventing deterioration of switching characteristics or thermal degradation of semiconductor switching elements of other normally operating converters, and spreading to serious failures such as insulation breakdown of semiconductor switching elements or arm short circuit faults of equipment Can be prevented.

  In the second invention, there is provided control means for controlling the output current by adjusting the on / off period of each semiconductor switching element of the converter, and the output current of other converters excluding the converter determined to be abnormal Is controlled so as not to exceed a predetermined upper limit value, when an abnormality occurs in one converter, the switching characteristics of the semiconductor switching elements of other converters operating normally or thermal deterioration For example, the operation can be continued until the conversion unit determined to be abnormal is maintained and inspected.

  In the third aspect of the invention, the period in which the output current detected by the current detection unit is equal to or less than the predetermined lower limit value is specified, and which semiconductor switching element of the conversion unit is the ON period is determined. By determining and notifying the abnormality of the semiconductor switching element that is turned on in the ON period, it is possible to easily determine which semiconductor switching element of the conversion unit is faulty.

  In the fourth invention, by stopping the switching operation of the semiconductor switching element of the conversion unit determined to be abnormal, the conversion unit determined to be abnormal is stopped, so that the breakdown of the semiconductor switching element or the arm of the device Ripple to a serious failure such as a short-circuit failure can be prevented.

  In the fifth invention, the element current flowing through each of the semiconductor switching elements of the converters connected in parallel (for example, DC / AC conversion, AC / DC conversion, frequency conversion, etc.) is detected, and the detected element current is detected. When one of the conversion units operated in parallel fails by determining abnormality of the semiconductor switching element based on the determination result and limiting the total value of the output current of the conversion unit to a predetermined value or less based on the determination result Even so, it is possible to prevent deterioration of the switching characteristics or thermal deterioration of the semiconductor switching elements of other converters that are operating normally, leading to serious failures such as insulation breakdown of the semiconductor switching elements or arm short circuit failure of the device. Can be prevented.

Embodiment 1
Hereinafter, the present invention will be described with reference to the drawings illustrating embodiments thereof. FIG. 1 is a block diagram showing a configuration of a power conversion apparatus 100 according to the present invention. The power conversion device 100 is, for example, a DC / AC conversion device, which converts a DC voltage (DC power) on the input side into a required AC voltage (AC power) by PWM control and supplies it to the output side (load side). Is.

  The power conversion apparatus 100 includes stacks (converter circuits) 1, 2, 3, 4, a total output current detection circuit 5, a current calculation circuit 6, a current protection circuit 7, a PWM control circuit 8, a gate drive circuit 9, and the like. .

  Each of the stacks 1, 2, 3, and 4 is a converter circuit for converting direct current into alternating current, and is connected in parallel as shown in the figure. As a result, the DC power on the input side is converted into AC power by the respective stacks 1, 2, 3, 4 and supplied to the output side.

  Each of the stacks 1, 2, 3, and 4 includes an output current detection circuit that detects the output currents of the stacks 1, 2, 3, and 4, and detects based on the output current detected by the output current detection circuit. A signal is output to the current calculation circuit 6.

  The current calculation circuit 6 calculates the output current values of the stacks 1, 2, 3, and 4 based on the detection signals (for example, voltage values) input from the stacks 1, 2, 3, and 4, respectively. A signal indicating the total value of the output current is output to the current protection circuit 7. For example, when the output current of each of the stacks 1, 2, 3, 4 is 300 A, a signal indicating that the total value of the output currents of the stacks 1, 2, 3, 4 is 1200 A is output to the current protection circuit 7. .

  Further, when the calculated output current value is equal to or lower than the lower limit value (for example, 50% of the normal output current) (including the case where the output current is not flowing), the current calculation circuit 6 has an abnormality in the corresponding stack. Is generated, and a stop signal for stopping the operation of the stack is output to the PWM control circuit 8.

  Further, the current calculation circuit 6 outputs a timing signal indicating the timing of the output current to the PWM control circuit 8 based on the detection signals input from the stacks 1, 2, 3, 4 respectively.

  If the current calculation circuit 6 determines that an abnormality has occurred in any one of the stacks 1, 2, 3, and 4 based on the calculated output current value, the remaining normal stacks are detected before the abnormality occurs. A signal indicating the total value of the respective output currents is output to the current protection circuit 7. For example, when the output current of each of the stacks 1, 2, 3, and 4 is 300 A during normal operation, when the stack 1 fails and the output current of the stack 1 becomes “0”, the current calculation circuit 6 A signal indicating that the total current of the output currents of the stacks 2, 3 and 4 before the failure is 900A is output to the current protection circuit 7.

  The total output current detection circuit 5 detects the total output current obtained by summing the output currents of the stacks 1, 2, 3, and 4, and outputs a detection signal (for example, a voltage value) to the current protection circuit 7.

  The current protection circuit 7 compares the signal input from the current calculation circuit 6 with the detection signal input from the total output current detection circuit 5 to control the operation of the stacks 1, 2, 3, 4. A stop signal is output to the PWM control circuit 8.

  For example, it is assumed that the stacks 1, 2, 3, and 4 each output a current of 300 A and the power conversion apparatus 100 supplies the total output current 1200 A to the load before the stack abnormality occurs. The current protection circuit 7 sets the total output current of 1200 A as 100% and controls the total output current so as not to exceed this value. That is, when the total output current exceeds 1200 A (100%), the current protection circuit 7 outputs a gate stop signal to the PWM control circuit 8 in order to stop the operations of all the stacks 1, 2, 3, and 4.

  Further, for example, when the stack 1 fails and the output current of the stack 1 becomes “0”, the current protection circuit 7 is 900 A that is the total of the output currents of the remaining three stacks 2, 3, 4, that is, The total output current is controlled not to exceed 900A (75%). More specifically, the output current of each of the stacks 2, 3, and 4 is controlled so as not to exceed 300A.

  The PWM control circuit 8 turns on / off IGBTs (insulated gate bipolar transistors) constituting each of the stacks 1, 2, 3, 4 at a predetermined timing in order to operate the stacks 1, 2, 3, 4 in parallel. A gate control signal for causing the signal to be output is output to the gate drive circuit 9.

  When the stop signal is input from the current calculation circuit 6, the PWM control circuit 8 stops the output of the gate control signal in order to stop the operation of the corresponding stack. In addition, when there is no timing signal input from the current calculation circuit 6, the PWM control circuit 8 specifies a gate control signal output from the PWM control circuit 8 during a period when there is no timing signal input, and is determined to be abnormal. It is determined which IGBT in the stack has failed, and the determined IGBT is notified through a display device (not shown) or the like. As a result, even if any of the stacks 1, 2, 3, and 4 in which the power conversion device 100 is operating in parallel becomes abnormal, it is immediately determined which IGBT in the abnormal stack has failed. can do.

  Further, when a gate stop signal is input from the current protection circuit 7, the PWM control circuit 8 stops the output of the gate control signal in order to stop the operation of all the stacks.

  Based on the gate control signal input from the PWM control circuit 8, the gate drive circuit 9 outputs a gate pulse signal to each gate in each of the stacks 1, 2, 3, and 4 at a predetermined timing.

  FIG. 2 is a block diagram showing the configuration of the stack 1. Since the stacks 2, 3, and 4 have the same configuration as the stack 1, the description thereof is omitted. The stack 1 includes IGBTs 11, 12, 13, and 14, an output current detection circuit 15, and the like.

  The stack 1 constitutes one bridge circuit with the four IGBTs 11, 12, 13, and 14. More specifically, the positive DC input is connected to the collectors of the IGBTs 11 and 12, and the collectors of the IGBTs 13 and 14 are connected to the emitters of the IGBTs 11 and 12, respectively. The negative side (ground level) DC input is connected to the emitters of the IGBTs 13 and 14.

  The emitter of the IGBT 11 and the collector of the IGBT 13 are connected to one output side via the output current detection circuit 15, and the emitter of the IGBT 12 and the collector of the IGBT 14 are connected to the other output side.

  In the operation of the stack 1, an ON signal (gate pulse signal) is applied to the gates of the IGBTs 11 and 14, and an OFF signal (gate pulse signal) is applied to the gates of the IGBTs 12 and 13. In the next cycle, on the contrary, an off signal (gate pulse signal) is applied to the gates of the IGBTs 11 and 14, and an on signal (gate pulse signal) is applied to the gates of the IGBTs 12 and 13. Thus, in one half cycle, current flows in one direction (IGBT 11 arm, IGBT 14 arm) through IGBTs 11 and 14 in the half cycle, and in the opposite half direction (in IGBT 12) in the next half cycle. When the current flows through the arm and the arm of the IGBT 13, direct current is converted into alternating current.

  Next, operation | movement of the power converter device 100 of this invention is demonstrated. FIG. 3 is a time chart showing changes in the output current and total output current of each stack. In the figure, the vertical axis represents the output current and total output current of each stack, and the horizontal axis represents time. 3A shows changes in the conventional output current and the total output current, and FIG. 3B shows changes in the output current and the total output current when the present invention is applied. Note that the stack of the conventional power conversion device includes four IGBTs as in the stack of the present invention, but does not include the output current detection circuit 15. Conventional stacks are also denoted by the same reference numerals as the stacks of the present invention for convenience. Further, the conventional power conversion device does not include the current calculation circuit 6.

  As shown in FIG. 3A, in the conventional example, when each of the stacks 1, 2, 3, and 4 outputs a current of 300 A, for example, the total output current is 1200 A. If, for example, an abnormality occurs in the stack 1 at time t1 and the output current of the stack 1 reaches 0 A, the conventional power conversion device operates normally in order to maintain the total output current 1200 A. In order to output a current of 1200 A in total of the output currents of the three stacks 2, 3, 4, the output current of the stacks 2, 3, 4 is increased from 300 A to 400 A.

  If the rated current determined from the operating environment, ambient temperature, etc. of the IGBTs constituting the stacks 2, 3 and 4 is 350 A, each IGBT in the stacks 2, 3 and 4 has a current exceeding the rated current. May be caused, resulting in deterioration of the switching characteristics or thermal degradation of the IGBT, leading to a serious failure such as an IGBT dielectric breakdown or an IGBT arm short circuit failure.

  As shown in FIG. 3B, when the present invention is applied, for example, each of the stacks 1, 2, 3, 4 outputs a current of 300 A, and the total output current is 1200 A. For example, if an abnormality occurs in the stack 1 at t2, and the output current of the stack 1 becomes 0A, the total output current is limited to 1200A from 75A to 900A. The output current of each of the stacks 2, 3, and 4 can be maintained at 300A. Thereby, deterioration of the switching characteristics or thermal degradation of the IGBT can be prevented, and a large-scale damage accident of the power conversion device such as an IGBT dielectric breakdown or an IGBT arm short circuit failure can be prevented.

  FIG. 4 is a time chart showing an example of specifying which IGBT in the stack 1 is faulty. FIG. 4A shows the relationship between the gate control signal for turning on / off the IGBTs 11, 12, 13, and 14 in the stack 1 and the timing signal of the stack 1. In the figure, for example, in the period “A”, the PWM control circuit 8 outputs a gate control signal for turning on the IGBTs 11 and 14, and in the period “B”, the gate for turning on the IGBTs 12 and 13. Output a control signal. Note that the period (timing) of the gate control signal is an example and is not limited to this.

  The PWM control circuit 8 acquires a timing signal input from the current calculation circuit 6. That is, when the stack 1 is operating normally, the PWM control circuit 8 acquires the timing signal “a” corresponding to the period “A” during which the gate control signal is output, and the gate control signal is output. The timing signal “b” is acquired in correspondence with the “B” period.

  As shown in FIG. 4B, when one or both of the IGBTs 12 and 13 fail and a switching operation is defective (for example, a terminal connection failure such as a gate, collector, or emitter), the IGBTs 12 and 13 When the current flowing through “0” becomes “0”, the output signal of the stack 1 is not detected during this period, and therefore the timing signal “b” is missing. Therefore, the PWM control circuit 8 determines which of the IGBTs in the stack 1 (in this case, the IGBTs 12 and 13) is out of order by determining the missing period among the timing signals input from the current calculation circuit 6. Can be determined.

  Further, as shown in FIG. 4C, when one or both of the IGBTs 11 and 14 fail and a switching operation is defective (for example, a terminal connection failure such as a gate, collector, or emitter), the IGBT 11 , 14 becomes “0”, the output signal of the stack 1 is not detected during this period, and the timing signal “a” is missing. Therefore, the PWM control circuit 8 determines which IGBT (in this case, the IGBTs 11 and 14) of the stack 1 is faulty by determining the missing period of the timing signal input from the current calculation circuit 6. Can be determined.

Embodiment 2
In the first embodiment, the output current of each of the stacks 1, 2, 3, and 4 is detected. However, the configuration is not limited to this, and other configurations may be used. For example, instead of detecting the output currents of the stacks 1, 2, 3, and 4, it is also possible to detect currents (arm currents) flowing through the IGBTs constituting the stack.

  FIG. 5 is a block diagram illustrating a configuration of the stack 30 according to the second embodiment. The stack 30 includes IGBTs 31, 32, 33, and 34, current detection circuits 35, 36, 37, and 38.

  The stack 30 constitutes one bridge circuit with four IGBTs 31, 32, 33, and 34. More specifically, a positive DC input is connected to the collectors of the IGBTs 31 and 32, and the emitter of the IGBT 31 is connected to the collector of the IGBT 33 via the current detection circuit 35. Further, the collector of the IGBT 34 is connected to the emitter of the IGBT 32 via the current detection circuit 36. Negative side (ground level) DC inputs are connected to the emitters of the IGBTs 33 and 34 via current detection circuits 37 and 38, respectively.

  The collector of the IGBT 33 is connected to one output side, and the collector of the IGBT 34 is connected to the other output side. The current detection circuits 35, 36, 37, and 37 detect currents flowing through the IGBTs 31, 32, 33, and 34, respectively. Note that the operation of the stack 30 is the same as that of the first embodiment, and a description thereof will be omitted.

  With the above configuration, even when one of the stacks operated in parallel fails, the deterioration of the switching characteristics or the thermal deterioration of the IGBTs constituting the other stacks can be prevented in advance, and the IGBT breakdown or device failure can be prevented. Ripple to a serious failure such as an arm short circuit failure can be prevented.

Embodiment 3
In the first and second embodiments, the case of a converter circuit (stack) that converts direct current to alternating current has been described. However, the configuration of the power conversion device is not limited to this, and power conversion that converts alternating current to direct current is performed. The present invention can also be applied to an apparatus.

  FIG. 6 is a block diagram illustrating a configuration of the power conversion device 200 according to the third embodiment. The power converter 200 is, for example, an AC / DC converter, and rectifies an AC voltage (AC power) on the input side, converts it to a required DC voltage (DC power), and supplies it to the output side (load side). Is.

  The power conversion device 200 includes rectifier circuits 61, 62, 63, 64, current detection circuits 65, 66, 67, 68, a total output current detection circuit 69, a current protection circuit 70, a current limiting circuit 71, and the like.

  For example, the rectifier circuit 61 performs full-wave rectification by configuring a bridge circuit with four power control diodes. The rectifier circuits 62, 63 and 64 have the same configuration as the rectifier circuit 61, and the rectifier circuits 61, 62, 63 and 64 are connected in parallel.

  Current detection circuits 65, 66, 67, and 68 are connected to the positive output terminals of the rectification circuits 61, 62, 63, and 64, respectively, to detect and detect the output currents of the rectification circuits 61, 62, 63, and 64, respectively. The signal is output to the current protection circuit 70.

  The total output current detection circuit 69 detects the total output current obtained by adding the output currents of the rectifier circuits 61, 62, 63, 64 and outputs a detection signal to the current protection circuit 70.

  The current protection circuit 70 is a control signal for limiting the total output current output from the power converter 200 based on the detection signals input from the current detection circuits 65, 66, 67, 68 and the total output current detection circuit 69. Is output to the current limiting circuit 71.

  The current limiting circuit 71 is constituted by a three-terminal regulator, for example, and limits the total output current to a predetermined value or less based on a control signal from the current protection circuit 70.

  Next, the operation of the power conversion device 200 will be described. For example, it is assumed that the rectifier circuits 61, 62, 63, and 64 each output a current of 300A and the power conversion device 200 supplies the total output current 1200A to the load before the abnormality of the rectifier circuit occurs. The current protection circuit 70 controls the total output current so that the total output current of 1200 A is 100% and does not exceed this value. That is, when the total output current exceeds 1200 A (100%), the current protection circuit 70 turns off the input side switch (not shown) to stop the operation of all the rectifier circuits 61, 62, 63, 64. To do.

  Further, for example, when the rectifier circuit 61 fails and the output current of the rectifier circuit 61 becomes “0”, the current protection circuit 70 is 900 A, which is the sum of the output currents of the remaining three rectifier circuits 62, 63, 64. That is, the current limiting circuit 71 is controlled so that the total output current does not exceed 900 A (75%).

  As described above, in the present invention, even when one of the stack (converter circuit) or rectifier circuit operated in parallel fails, another stack or rectifier circuit that is operating normally is configured. It is possible to prevent deterioration of switching characteristics or thermal deterioration of semiconductor switching elements such as IGBTs or diodes, and to prevent spillover to serious faults such as breakdown of semiconductor switching elements or arm short-circuit faults of devices. In addition, when an abnormality occurs in one stack or rectifier circuit, deterioration of switching characteristics or thermal deterioration of semiconductor switching elements (IGBT, diode, etc.) of other stacks or rectifier circuits that are operating normally can be prevented. Thus, for example, the stack or the rectifier circuit determined to be abnormal can be continuously operated until maintenance or inspection is performed. In addition, it is possible to easily determine which IGBT in the stack has failed. In addition, the stack or rectifier circuit that is determined to be abnormal can be stopped to prevent the IGBT or the diode from breaking down or causing a serious failure such as an arm short circuit failure of the device.

  In particular, if the power converter has a large current capacity, the power converter itself needs to be inspected or maintained frequently, and the power converter is disassembled and cleaned each time. For this reason, every time inspection or maintenance is performed, there is a high possibility that a malfunction of the semiconductor switching element due to poor maintenance or malfunction of a unit such as a stack or a rectifier circuit will occur. The effects of the present invention that can be monitored and prevent thermal degradation due to the flow of current exceeding the rated current of the semiconductor switching element are remarkable.

  In the above-described embodiment, examples of DC / AC conversion and AC / DC conversion power converters have been described. However, the power converter is not limited thereto, and the present invention is also applied to those that perform frequency conversion. Can be applied. In the case of frequency conversion, since AC / DC conversion is followed by DC / AC conversion to perform frequency conversion, the present invention can be applied to either AC / DC conversion or DC / AC conversion, or both.

  In the above-described embodiment, the IGBT and the diode are used. However, the present invention is not limited to this, and the switching operation and the rectifying operation can be performed using another power conversion element such as a thyristor or a semiconductor switching element. Any element can be used as long as it is possible.

  In the above-described embodiment, the case of single-phase alternating current has been described. However, the present invention is not limited to this, and the present invention can also be applied to a multiphase circuit such as three-phase alternating current.

It is a block diagram which shows the structure of the power converter device which concerns on this invention. It is a block diagram which shows the structure of a stack. It is a time chart which shows the change of the output current of each stack, and a total output current. It is a time chart which shows the example which specifies which IGBT in a stack has failed. 6 is a block diagram illustrating a configuration of a stack according to Embodiment 2. FIG. FIG. 6 is a block diagram illustrating a configuration of a power conversion device according to a third embodiment.

Explanation of symbols

1, 2, 3, 4 Stack 5, 69 Total output current detection circuit 6 Current calculation circuit 7, 70 Current protection circuit 8 PWM control circuit 9 Gate drive circuit 11, 12, 13, 14, 31, 32, 33, 34 IGBT
15 Output current detection circuit 35, 36, 37, 38, 65, 66, 67, 68 Current detection circuit 61, 62, 63, 64 Rectifier circuit 71 Current limit circuit

Claims (6)

In a power conversion device configured by a plurality of semiconductor switching elements, wherein a plurality of conversion units that convert direct current to alternating current or alternating current to direct current are connected in parallel, and each of the conversion units converts input power to output power.
A current detection unit for detecting an output current of each of the conversion units;
Determination means for determining an abnormality of the converter based on the output current detected by the current detector;
A power conversion device comprising: a current limiting unit that limits a total value of output currents of the respective conversion units to a predetermined value or less based on a determination result of the determination unit. Control means for adjusting the on / off period of each semiconductor switching element of the converter to control the output current of the converter;
The control means includes
2. The power according to claim 1, wherein the output current of each of the other conversion units excluding the conversion unit determined to be abnormal by the determination unit is controlled so as not to exceed a predetermined upper limit value. Conversion device. Means for specifying a period during which the output current detected by the current detection unit is equal to or lower than a predetermined lower limit when the determination unit determines that the conversion unit is abnormal;
Means for determining which of the semiconductor switching elements of the conversion unit the period specified by the means is an on period;
The power conversion device according to claim 2, further comprising: a notification unit configured to notify an abnormality of the semiconductor switching element that is turned on in the on period determined by the unit.   The power converter according to any one of claims 1 to 3, further comprising a stopping unit that stops a switching operation of the semiconductor switching element of the conversion unit that is determined to be abnormal by the determination unit. In a power conversion device configured by a plurality of semiconductor switching elements, connected in parallel to a plurality of conversion units that convert direct current to alternating current or alternating current to direct current, and to convert input power to output power in each of the conversion units,
An element current detector for detecting an element current flowing through each of the semiconductor switching elements;
A determination unit for determining abnormality of the semiconductor switching element based on the element current detected by the element current detection unit;
A power conversion device comprising: a current limiting unit that limits a total value of output currents of the respective conversion units to a predetermined value or less based on a determination result of the determination unit. In a method for protecting a power conversion apparatus, comprising a plurality of semiconductor switching elements, wherein a plurality of converters for converting direct current to alternating current or alternating current to direct current are connected in parallel, and each of the converters converts input power to output power. ,
Detecting the output current of each of the converters;
Based on the detected output current, the abnormality of the conversion unit is determined,
A method for protecting a power conversion device, comprising: limiting a total value of output currents of the conversion units to a predetermined value or less based on a determination result.

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