JP2007274884A - Power conversion apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power conversion apparatus that defines a frequency range of noises from semiconductor power module, a source of the noise, and impedances to be added. <P>SOLUTION: Noises produced in a common loop such as a rectifying diode module M1 and an IGBT module M2 in the frequency range of 1M to 100 MHz are reduced by adding or inserting at least one or two kinds of impedances (Z). As shown in the figure, Mn-Zn system ferrrite material, Ni-Zn system ferrite material are used in using two kinds of impedances Z1, Z2, and noises in the range of 1M to 100MHz can be reduced effectively by combining them. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a power converter that adds or adds impedance to a circuit through which a noise current flows for the purpose of reducing conductive noise or radiated noise that is conducted or emitted during switching of a power semiconductor.

  In recent years, EMC (electromagnetic interference) regulations have become stricter, and reduction of radiation noise (also simply referred to as noise) has become a technical problem in various industrial devices including general-purpose inverters. In particular, countermeasures are required for the reduction of noise generated by switching of these main components, which are power semiconductors, and power modules on which these are mounted. One countermeasure is the insertion of a ferrite core, which is disclosed in Patent Document 1, for example.

Specific examples of measures for reducing noise include the following.
A magnetic material (ferrite) core is inserted as a noise absorber in the electrode connecting the chip and the connection terminal. Moreover, magnetic powder is mixed in the gel material enclosed in the package (for example, refer patent document 2).
In addition, all input / output wirings and terminals pass through a noise absorbing magnetic material to generate inductance, thereby reducing noise (see, for example, Patent Document 3).
Furthermore, as a countermeasure by adding impedances having two different frequency characteristics, a noise reduction device using a cascade connection of two coils using a toroidal core as a filter is disclosed in, for example, Patent Document 2 for an inverter device and a switching power supply device. As proposed.

However, Patent Document 1 is for inserting the ferrite core to the lead terminal of the diode, although insertion point is identified, an unknown frequency of interest, by adding the impedance of what value therefor It is not clear whether it is good. Furthermore, it is not clear where the noise originates from.
For example, in Patent Document 2, it is considered that a noise generation mechanism is generated by switching of a power semiconductor and is emitted to the outside through a member serving as an antenna. Based on this concept, Patent Document 2 uses a ferrite core, a magnetic powder compound gel, a housing, and the like for a portion (input / output terminal, gel, package, etc.) that is likely to be an antenna. However, almost all of the parts that use the metal correspond to the parts that are considered to be antennas, so that a lot of magnetic material is used and there is a high possibility that they are applied to unnecessary parts.

  Moreover, in the said patent document 4, although the frequency range made into object is specified as 150 kHz-30 MHz, a countermeasure is not clear with respect to the frequency range above 30 MHz. In addition, a plurality of peaks are present in the region of 1 to 30 MHz (about 6 MHz, 9 MHz, 18 MHz, and 29 MHz), but remain after countermeasures, and the more severe the standard becomes (for example, IEC 61800- 3, Conducted Emissions, Category C1 and Category C2 equivalent for PDS (Power Drive System), and the margin for the standard is reduced, which is not sufficient as a countermeasure.

Japanese Patent No. 2851268 JP 2004-207432 A Japanese Patent Laid-Open No. 05-291784 JP 07-212165 A

  In the above-mentioned Patent Document 4, there are two reasons why there are a plurality of peaks even after countermeasures. One indicates that the place where countermeasures are taken does not correspond to the loop that is fundamentally generated, and the other indicates that the impedance value is not appropriate. In Patent Document 2, since the ferrite core is newly inserted for the frequency region after 1 MHz, the latter is difficult to consider, and can be said to be a phenomenon seen when a noise generation loop exists separately. Further, in Patent Document 2, since the countermeasure part is only the input part, no matter how large impedance is additionally inserted, the effect is low when a loop where noise is generated passes through a different part.

In other words, it is not possible to reduce noise in all frequency regions by simply inserting it into the input section. If there is no additional amount of impedance that is appropriate for the frequency and loop that is generated, the generated noise can be completely addressed. I can't do it.
Accordingly, an object of the present invention is to clarify “what type of impedance is additionally inserted” and “noise in which frequency region” and “where it is generated” are reduced.

Here, the principle of the present invention will be described below.
First, in the present invention, the target frequency for which noise is desired to be reduced is limited to 1 to 100 MHz in the standard range of conduction noise 150 kHz to 30 MHz and radiation noise 30 MHz to 1 GHz. The reason is as follows. General-purpose inverters, UPS (uninterruptible power supply), industrial power supplies, or IH (inductive overheat) inverters have EMC-compatible input filters for noise suppression, but this filter suppresses 150 kHz noise. Therefore, a high filter effect can be obtained in the frequency range from about 150 kHz to 1 MHz. However, in the frequency region after MHz, the effect is poor, and the margin for the standard is small and strict. On the other hand, although it is a radiation noise region after 100 MHz, since it is unlikely to occur at a resonance frequency of 100 MHz or later even when considered from realistic circuit constants, the noise intensity itself is small, and there is a need for suppression. Low. Accordingly, the target frequency is 1 to 100 MHz.

  Next, the target noise source is limited to six loops, and the noise caused by these loops is reduced. FIG. 9 shows a practical example of an inverter circuit diagram using a semiconductor power module. That is, a varistor (R) (hereinafter also referred to as an input protection element) B for protecting from a surge and an input filter F for reducing input noise are added to the simple circuit shown in FIGS. 8a and 8b. Considering a more realistic circuit as shown in FIG. 9, since there are a plurality of grounding paths such as the module substrate capacity and the noise filter C grounding, a plurality of common loops are generated via the ground. Specifically, there are loops CL1 to CL6 through which a total of six common noise currents flow as shown in FIGS.

  The first is a common loop CL between the output of the converter MI and the input of the IGBT inverter M2 shown in FIG. 7a, and the second is the common loop CL2 between the inverter output and the input filter shown in FIG. 7b. Is the common loop CL3 between the inverter output and the input protection element B shown in FIG. 7c, and the fourth is the common loop CL4 between the input filter and the input protection element B shown in FIG. A common loop CL5 between the input protection element B and the converter input shown in FIG. 7e, and the sixth is a common loop CL6 between the input filter and the converter input shown in FIG. 7f. Reduce the noise for these six loops.

As a measure for countermeasures, an impedance is additionally inserted in the six common loops. The means for additional insertion is not limited. For example, a core such as a ferrite as described above may be inserted, or an electronic component such as a resistor or an inductance may be used. However, when the LCR resonant circuit formed by the above six common loops is assembled with a small capacity to large capacity class inverter using each module of PIM (Power Integrated Module) 7in1, 6in1, 2in1, 1in1 , L, C, and R circuit constants are assumed to exist in the following ranges, respectively.
L: 5 to 1000 nH
C: 50-5000 pF
R: 0.05 to 10Ω

The impedance Z that the LCR resonant circuit can take in the above range is expressed by the following equation (1).
Z = √ {R ² + (ωL−1 / ωC) ² } (1)
If the additional impedance is Zadd, the noise reduction amount when the impedance is added is expressed by the following equation.
Noise reduction amount [dB] = 20 log {Z / (Z + Zadd)} (2)

When the frequency is 1 MHz to 100 MHz and L, C, and R circuit constants are present in the above ranges, the maximum value Zmax and the minimum value Zmin of Z in the LCR resonant circuit before the impedance is added are as follows.
(A) When fc = 1 MHz, L = 10 nH, C = 400 pF, R = 10Ω, from equation (1),
Zmax = 398Ω
(B) When fc = 100 MHz, L = 5.1 nH, C = 497 pF, R = 0.05Ω,
Zmin = 0.05Ω

Therefore, an impedance to be reduced may be added to Z in the above (a) and (b). Specifically, consider the addition of impedance necessary to reduce 30 dB. The reason for 30 dB is that in the evaluation of actual inverters, the strength obtained when no special measures are taken with only the built-in filter, satisfies the strictest IEC (International Electrotechnical Commission) 61800-3 C3 standard by dropping about 30 dB. Therefore, it was set to 30 dB. In order to reduce 30 dB, the value in parentheses {} in the above equation (2) is
{Z / (Z + Zadd)} = 1/35 (3)
It would be good if

In order to satisfy the relationship of this equation (3), the impedance to be additionally inserted is
In the case of (a), Zadd = 14 kΩ
In the case of (b), Zadd = 1.7Ω
It becomes. From the above, the possible range of the additional impedance Zadd required to reduce by 30 dB is determined as follows.
1Ω <Zadd <14kΩ

The LCR resonance frequency fc is expressed by the following equation (4), and a peak of radiation noise occurs at the resonance frequency corresponding to fc.
√ {(1 / LC) − (R / 2L) ² } / 2π (4)
Therefore, from the equation (4), the values of L, C, and R are determined so that fc falls within the range of 1M to 100 MHz that requires noise reduction, and the above conditions (a) and (b) are derived. is doing.

  However, when two impedances having two different frequency characteristics are used, Ni—Zn ferrite and Mn—Zn ferrite are used. In the above-mentioned Patent Document 4, a toroidal core made of an iron-based fine crystal soft magnetic material is used at a low frequency of 150 kHz to 1 MHz. However, since the present invention targets a frequency region from 1 MHz to 100 MHz, it is effective even in this region. In order to place ferrite having a high material in a suitable material, Mn—Zn ferrite having a large impedance in the 1M to 30 MHz band and Ni—Zn ferrite having a large impedance in the 30M to 100 MHz band are suitable. Moreover, although there is no numerical specification about an impedance value in patent document 2, in this invention, the total value of two impedance shall have a value of 1-14 kohm.

FIG. 6 shows an example of frequency characteristics when two types of ferrite cores are used as impedance.
In FIG. 6, Z1 is a Mn—Zn ferrite material having excellent frequency characteristics of 30 MHz or less, and Z2 is a Ni—Zn ferrite material having excellent frequency characteristics of 30 MHz or more. If these are combined, both frequency bands can be covered.

From the above, the invention of claim 1 is characterized in that an impedance for reducing noise current is provided in at least one place of the common loop of the power conversion device including the semiconductor power module.
In the invention of claim 1, the common loop can be a common loop between a converter output and an inverter input (invention of claim 2). In the invention of claim 1 or 2, the common loop Can be a common loop between the inverter output and the input filter (invention of claim 3).

  In the invention of any one of claims 1 to 3, the common loop can be a common loop between the inverter output and the input protection element (invention of claim 4). In this invention, the common loop can be a common loop between the input filter and the input protection element (the invention of claim 5). In the invention of any one of claims 1 to 5, The common loop can be a common loop between the input protection element and the converter input (invention of claim 6), and in the invention of any one of claims 1 to 6, the common loop is It can be a common loop between the input filter and the converter input (invention of claim 7).

  In the invention of any one of claims 1 to 7, the impedance value can be 1 to 14 kΩ (invention of claim 8). In any invention of claims 1 to 8, the value of the impedance is The noise can have a peak in the vicinity of 1 M to 100 MHz that spans the radiation noise from the conductive electromagnetic wave (invention of claim 9). In the invention of any one of claims 1 to 9, the impedance is: Impedance can be increased in the vicinity of 1 M to 100 MHz spanning radiated noise from conductive electromagnetic waves (invention of claim 10). In any one of claims 1 to 10, the impedance is one type, or Those having two types of frequency characteristics can be used in combination (invention of claim 11).

  In the invention of claim 11, when the impedance having two types of frequency characteristics is used in combination, the combined impedance value of the two types of impedance can be set to 1 to 14 kΩ. In addition, in the invention of claim 11 or 12, one of the two types of impedances is Mn-Zn based ferrite having a large impedance at 1 to 30 MHz, and the other is 30 to 100 MHz. And Ni—Zn ferrite having a large impedance.

  In the invention of any one of claims 1 to 13, the impedance can be provided in the semiconductor power module (invention of claim 14). In the invention according to any one of claims 11 to 13, when the two types of impedances are inserted at two or more different locations across the ground line, the impedance on the side close to the power converter across the ground line The value can be made smaller than the impedance value on the side far from the power conversion device across the ground line (invention of claim 15).

  According to the present invention, noise generated in the vicinity of 1M to 100 MHz, which has been difficult to take measures with conventional input filters, is targeted, and a noise generation loop is generated between the inverter, converter, input filter, and input protection element. By narrowing down the common loop to be obtained and adding an appropriate impedance to the loop, noise generated in the vicinity of 1M to 100 MHz can be effectively reduced.

  1a to 1s are circuit diagrams showing additional countermeasures for impedance against six types of loops as a first embodiment of the present invention, and FIG. 2 is a second embodiment of the present invention in which frequency characteristics are different 2 FIGS. 8a, 8b and FIG. 9 are circuit diagrams showing a conventional example of a semiconductor power module. 8A is an example in which the electrolytic capacitor CN is directly connected to the DC intermediate circuit, and FIG. 8B is an example in which the electrolytic capacitor CN is directly connected to the snubber capacitor C.

  In FIGS. 1a to 1s, resonance frequencies are generated in the frequency band of 1 MHz to 100 MHz by the six common loops described in FIGS. 7a to 7f, and noise is thereby generated. Therefore, an impedance Z of 1 to 14 kΩ is additionally inserted. This is intended to reduce noise. 1a to 1s, FIG. 1a, FIG. 1d, and FIG. 1f are added in the module (FIG. 1a is in the module M2, and FIGS. 1d and 1f are in the module M1). This is the case when it is inserted. When the same impedance is additionally inserted in the same path, there is no particular difference between inside and outside the module, and the same function is achieved.

1a-1d, 1r and 1s are in loops CL1-3 of FIGS. 5a-f, FIGS. 1e, 1f are in loops CL2-6, FIGS. 1g, 1j-1m are in loops CL3-5, and FIGS. , 1n, 1o correspond to the loops CL2, 4, 6 and FIGS. 1p, 1q correspond to the loops CL1, 5, 6 respectively.
Although the PIM 6 in 1 module is assumed as the module used in FIGS. 1 a to 1 s, the effect is the same regardless of whether 7 in 1, 2 in 1 or 1 in 1 is used. Further, in FIGS. 1a to 1s, there is one type of impedance Z and one example of countermeasures. However, two types of impedances Z1 and Z2 may be used to cope with them.

  FIG. 2 shows a circuit example when impedances Z1 and Z2 of two different frequencies are used in the circuit of FIG. 1a. When Ni—Zn ferrite and Mn—Zn ferrite are additionally inserted in a composite manner, both effects are added, and a plurality of peaks can be effectively dealt with.

FIG. 4 shows the noise measurement results, particularly in the case of FIG. 1B among FIGS.
Here, in order to reduce the 10 MHz peak in the conduction noise region, Zadd = 22Ω was additionally inserted as an additional insertion impedance corresponding to this frequency. Accordingly, it can be seen that the case of FIG. 4 (2) in which the impedance is additionally inserted can be reduced by about 12 dB as compared with the case of FIG. 4 (1) in which no additional impedance is inserted.

Table 1 summarizes the relationship between the amount of additional impedance and the amount of noise reduction as described above.

In FIG. 2, impedances Z1 and Z2 of two different frequencies are inserted into the module M2, but can be as shown in FIG.
That is, in order to reduce noise of 1 to 4 MHz in particular, two impedances were inserted at different positions. One is additionally inserted, for example, Zadd1 = 75Ω between the input protection varistor B and the input filter F, and the other is inserted, for example, Zadd2 = 45Ω between the input filter F and the module M1.

  By inserting in two places, the noise can be reduced by about 15 dB compared to the case of only one place. This state is shown in FIG. 5, and the case of only one place is indicated by arrow W, and the case of two places is indicated by U and V. However, the case where the impedance value is switched, such as Zadd1 = 45Ω and Zadd2 = 75Ω, is indicated by V. In this case, the impedance is reduced by 12 dB, which is about 3 dB lower than the case of U where Zadd1 = 75Ω and Zadd2 = 45Ω. Therefore, it is more effective to make the impedance value near the module M1 across the ground line (power converter side) smaller than the impedance value near the module M1 across the ground line (power converter side). It can be said that. X represents an international standard value of IEC61800-3 C3.

  In the above, an example of an IGBT (insulated gate bipolar transistor) module is shown as the module. However, the present invention is not limited to this, and a general switching module can be used.

1 is a circuit diagram showing a first embodiment of the present invention. The circuit diagram which shows the 1st Embodiment 2 of this invention Circuit diagram showing the third embodiment of the present invention. Circuit diagram showing the first embodiment 4 of the present invention. Circuit diagram showing first embodiment 5 of the present invention. Circuit diagram showing the first embodiment 6 of the present invention. Circuit diagram showing first embodiment 7 of the present invention. Circuit diagram showing first embodiment 8 of the present invention. Circuit diagram showing first embodiment 9 of the present invention. A circuit diagram showing a tenth embodiment of the present invention. Circuit diagram showing Embodiment 11 of the first embodiment of the present invention. Circuit diagram showing Embodiment 12 of the first embodiment of the present invention. Circuit diagram showing Embodiment 13 of the first embodiment of the present invention. Circuit diagram showing Embodiment 14 of the first embodiment of the present invention. Circuit diagram showing Embodiment 15 of the first embodiment of the present invention. Circuit diagram showing Embodiment 16 of the first embodiment of the present invention. Circuit diagram showing Embodiment 17 of the first embodiment of the present invention. Circuit diagram showing a first embodiment 18 of the present invention. Circuit diagram showing Embodiment 19 of Embodiment 1 of the present invention. Circuit diagram showing a second embodiment of the present invention Circuit diagram showing a third embodiment of the present invention Explanation diagram of actual measurement result of conduction noise in the case of FIG. Illustration of the measurement result of conduction noise in the case of FIG. Frequency characteristics of Ni-Zn ferrite and Mn-Zn ferrite when using impedances with two different frequency characteristics Explanatory diagram of noise generation loop CL1 in a more practical inverter circuit Explanatory diagram of noise generation loop CL2 in a more practical inverter circuit Explanatory diagram of noise generation loop CL3 in a more practical inverter circuit Explanatory diagram of noise generation loop CL4 in a more practical inverter circuit Explanatory diagram of noise generation loop CL5 in a more practical inverter circuit Explanatory diagram of noise generation loop CL6 in a more practical inverter circuit Circuit diagram showing a typical inverter circuit example 1 Circuit diagram showing a typical inverter circuit example 2 Circuit diagram showing a more practical example of an inverter circuit

Explanation of symbols

  Z, Z1, Z2 ... impedance, C ... snubber capacitor, CN ... electrolytic capacitor, M1 ... rectifier diode module, M2 ... IGBT (switching) module, B ... input protection element (varistor (R)), F ... Input filter, CL1 to CL6 ... Common loop.

Claims (15)

  A power conversion device comprising an impedance for reducing a noise current at least at one position of a common loop of a power conversion device including a semiconductor power module.   The power converter according to claim 1, wherein the common loop is a common loop between a converter output and an inverter input.   The power converter according to claim 1, wherein the common loop is a common loop between an inverter output and an input filter.   The power converter according to any one of claims 1 to 3, wherein the common loop is a common loop between an inverter output and an input protection element.   The power converter according to claim 1, wherein the common loop is a common loop between an input filter and an input protection element.   The power converter according to any one of claims 1 to 5, wherein the common loop is a common loop between an input protection element and a converter input.   The power converter according to any one of claims 1 to 6, wherein the common loop is a common loop between an input filter and a converter input.   The power conversion device according to claim 1, wherein the impedance value is 1 to 14 kΩ.   The power converter according to any one of claims 1 to 8, wherein the noise has a peak in the vicinity of 1 M to 100 MHz that spans radiation noise from a conductive electromagnetic wave.   The power converter according to any one of claims 1 to 9, wherein the impedance has a large impedance in the vicinity of 1 M to 100 MHz that spans radiation noise from a conductive electromagnetic wave.   The power converter according to any one of claims 1 to 10, wherein the impedance is used in combination of one type or two types of frequency characteristics.   The power converter according to claim 11, wherein when the impedance having two types of frequency characteristics is used in combination, a combined impedance value of the two types of impedance is 1Ω to 14 kΩ.   Among the two types of impedance, one is a Mn—Zn ferrite having a large impedance at 1 M to 30 MHz, and the other is a Ni—Zn ferrite having a large impedance at 30 M to 100 MHz. Item 13. The power conversion device according to Item 11 or 12.   The power converter according to claim 1, wherein the impedance is provided in the semiconductor power module.   When the two types of impedances are inserted at two or more different locations across the ground line, the impedance value on the side closer to the power converter across the ground line is set to the impedance value on the side farther from the power converter across the ground line. The power converter according to claim 11, wherein the power converter is smaller than an impedance value.

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