CN203722608U - High-precision high-frequency ring oscillator circuit - Google Patents
High-precision high-frequency ring oscillator circuit Download PDFInfo
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- CN203722608U CN203722608U CN201420081462.6U CN201420081462U CN203722608U CN 203722608 U CN203722608 U CN 203722608U CN 201420081462 U CN201420081462 U CN 201420081462U CN 203722608 U CN203722608 U CN 203722608U
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- 230000010355 oscillation Effects 0.000 claims abstract description 9
- 239000003990 capacitor Substances 0.000 claims description 6
- 230000009514 concussion Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012935 Averaging Methods 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
Abstract
The utility model relates to a high-precision high-frequency ring oscillator circuit. The oscillator circuit includes a frequency-to-voltage converter, a filter, a frequency divider and a voltage-controlled oscillator. The output of the frequency-to-voltage converter is connected to the filter, and the output of the filter is connected to the voltage-controlled oscillator. The output of the voltage-controlled oscillator is connected outside the circuit to provide high-frequency oscillations, and the feedback output is connected to the frequency divider. The output of the frequency divider is connected to the frequency-to-voltage converter. The frequency-to-voltage converter outputs a control signal through comparison between an input signal frequency of the frequency divider and a set frequency. Compared with the prior art, the high-precision high-frequency ring oscillator circuit has the advantages of low designing difficulty, high designing efficiency, simple usage, low cost and the like.
Description
Technical field
The utility model relates to a kind of high frequency ring oscillator circuit, especially relates to a kind of high-precision high frequency ring oscillator circuit.
Background technology
Traditional ring oscillator is used odd level inverse delayed structure to be connected into ring to obtain the concussion of certain frequency.If wish, obtain high-precision concussion frequency, need to guarantee that the delay of every one-level is all equal as far as possible in each condition of work (temperature, power supply, technique change etc.), delay deviation is little; If required concussion frequency is higher, according to same precision percentage calculation, the requirement of this deviation is just harsher, as shake frequency more than 30MHz, claimed accuracy 1%, total delay deviation is less than 0.3ns, and this index is difficult to realize when operation conditions change is larger.So more difficult realization of direct design of high-precision high frequency ring oscillator.
Under prior art background, expect high-precision high frequency ring oscillator, can also use phase-locked loop (PLL) and FLL (FLL), as accompanying drawing 1.They are closed-loop control systems, adopt a high-precision low-frequency oscillator as benchmark, can obtain the N double-frequency oscillation of a high frequency by N frequency multiplier circuit, and when the accuracy of reference frequency is very high, N double-frequency oscillation output also can obtain very high accuracy.As adopt crystal oscillator as benchmark, and vibration precision can reach below 100ppm, and accuracy is higher than 0.01%.Although this closed-loop control system can obtain the higher-order of oscillation of very high degree of precision, benchmark vibration must be additionally provided, increased the complexity of system, and the system gross area is larger, is unfavorable for reducing system cost.
Utility model content
The purpose of this utility model is exactly to provide in order to overcome the defect of above-mentioned prior art existence the high-precision high frequency ring oscillator circuit that a kind of design difficulty is little, design efficiency is high, use is simple, cost is low, can easily reach 30MHz with upper frequency, approximately ± 1% frequency accuracy.
The purpose of this utility model can be achieved through the following technical solutions:
A kind of high-precision high frequency ring oscillator circuit, it is characterized in that, this pierce circuit comprises pressure converter, filter, frequency divider and voltage controlled oscillator frequently, described frequency pressure converter output is connected to filter, described filter output is connected to voltage controlled oscillator, described voltage controlled oscillator is externally exported the higher-order of oscillation, feedback output is simultaneously connected to frequency divider, described frequency divider output is connected to pressure converter frequently, and described frequency pressure converter is by comparing output control signal to frequency divider frequency input signal and setpoint frequency.
Described frequency pressure converter comprises current source I0, switch S 0, S1, S2, direct-to-ground capacitance C0, C1, voltage source V 0 and comparator X0, described current source I0 is connected to the anode of comparator X0 by switch S 0, the anode of described comparator X0 has connected direct-to-ground capacitance C0, and the anode of described comparator X0 is connected to direct-to-ground capacitance C1 by switch S 1 simultaneously, described direct-to-ground capacitance C1 is in parallel with switch S 2, and the negative terminal of described comparator X0 is connected to voltage source V 0.
The capacitance of described direct-to-ground capacitance C1 is C, and the capacitance of described direct-to-ground capacitance capacitor C 0 is k times of direct-to-ground capacitance C1.
Described frequency pressure converter receives the square wave of the duty ratio 50% of frequency divider output, and sends to respectively switch S 0, S1, S2, and wherein sending to S0 and S2 is positive square wave, and S1 is anti-phase square wave;
Between positive square wave high period, S0 is closed, and current source I0 is to direct-to-ground capacitance C0 charging, and the charging interval is the half period t/2 of frequency divider output vibration, and the upper enhanced charge of C0 is V0/R* (t/2), and the electric charge on direct-to-ground capacitance C1 is released completely;
Between positive square wave low period, S0 disconnects, and S1 is closed, S2 disconnects, and the electric charge on direct-to-ground capacitance C0 is assigned to C1, after distribution, voltage on C0 and C1 is the k/ (k+1) of former C0 voltage, and the electric charge of the upper minimizing of C0 is C*Vc*k/ (k+1), and wherein Vc is former C0 voltage.
In each cycle, if the electric charge that the upper enhanced charge > of C0 reduces, voltage C0 raises, comparator X0 output is high, by filter, regulates voltage controlled oscillator, makes its frequency increase, cycle reduces, and enhanced charge V0/R* (t/2) will reduce like this; If the electric charge that the upper enhanced charge < of C0 reduces, C0 lower voltage, comparator X0 output is low, and its frequency of voltage controlled oscillator is declined, and the cycle increases, and enhanced charge V0/R* (t/2) will increase like this;
Can be consistent with the negative terminal voltage V0 of comparator X0 after voltage stabilization on C0, closed-loop control system loop stability now, V0/R* (t/2)=C*V0*k/ (k+1), frequency divider frequency f=1/t=(k+1)/(2kRC).
Compared with prior art, the utlity model has following advantage.
1) solve technology barrier, reduced design difficulty, improved design efficiency.Can obtain easily the higher-order of oscillation of degree of precision, frequency is adjustable simultaneously, and extensibility is strong.
2) the designed ring oscillator going out has and uses simply, is easy to the system integration, lower-cost advantage.
Accompanying drawing explanation
Fig. 1 is the theory diagram of phase-locked loop, FLL;
Fig. 2 is theory diagram of the present utility model;
Fig. 3 is the structural representation of the frequency pressure converter in the utility model.
Embodiment
Below in conjunction with the drawings and specific embodiments, the utility model is elaborated.The present embodiment be take technical solutions of the utility model and is implemented as prerequisite, provided detailed execution mode and concrete operating process, but protection range of the present utility model is not limited to following embodiment.
As shown in Figure 2, a kind of high-precision high frequency ring oscillator circuit, this pierce circuit comprises pressure converter I, filter II, frequency divider III and voltage controlled oscillator IV frequently, frequently pressure converter I output is connected to filter II, filter II output is connected to voltage controlled oscillator IV, it is outer so that the higher-order of oscillation to be provided that voltage controlled oscillator IV output is connected to circuit, another feedback output is simultaneously connected to frequency divider III, frequency divider III output is connected to pressure converter I frequently, and pressure converter I is by comparing output control signal to frequency divider frequency input signal and setpoint frequency frequently.
Described filter, voltage controlled oscillator, frequency divider have multiple implementation under prior art background, do not limit here.Compare with the phase-locked loop shown in Fig. 1, FLL structure, the utility model is with frequently pressing converter I to replace phase discriminator (or frequency discriminator) and external reference frequency.So the present embodiment introduces pressure converter frequently.
As shown in Figure 3, frequently pressure converter comprises current source I0, switch S 0, S1, S2, direct-to-ground capacitance C0, C1, voltage source V 0 and comparator X0, current source I0 is connected to the anode of comparator X0 by switch S 0, the anode of comparator X0 has connected direct-to-ground capacitance C0, the anode of comparator X0 is connected to direct-to-ground capacitance C1 by switch S 1 simultaneously, and direct-to-ground capacitance C1 is in parallel with switch S 2, and the negative terminal of comparator X0 is connected to voltage source V 0.
Current source I0, comparator X0, and switch S 0, S1, S2, consist of CMOS technique circuit, can have multiple concrete structure.
Voltage source V 0, is a magnitude of voltage in comparator X0 common mode range, is the resistance string dividing potential drop of supply voltage.
The current value of current source I0 obtains divided by a resistance R by voltage source V 0.
Frequently pressure converter, by the relatively output control signal to frequency divider frequency input signal and setpoint frequency, regulates the frequency size of voltage controlled oscillator by filter, thereby makes to shake stable output and independent of power voltage.
If the capacitance of direct-to-ground capacitance C1 is C, the capacitance of direct-to-ground capacitance C0 is k times of capacitor C 1.
The square wave of the duty ratio 50% of frequency divider output offers switch S 0, S1, S2, and wherein S0 and S2 are positives, and S1 is anti-phase.
Between positive square wave high period, S0 is closed, and current source I0 is to capacitor C 0 charging, and the charging interval is the half period t/2 of frequency divider output vibration, and the upper enhanced charge of C0 is V0/R* (t/2).S1 disconnects, and S2 is closed, and the electric charge in capacitor C 1 is placed on the ground.
Between positive square wave low period, S0 disconnects, S1 is closed, and S2 disconnects, and the electric charge in capacitor C 0 is averagely allocated to C1, because the voltage of C1 in a upper phase place has been put into 0, C0 capacitance is k times of C1, so after charge-averaging distribution, the voltage on C0 and C1 is the k/ (k+1) of former C0 voltage, be that the upper electric charge reducing of C0 is C*Vc*k/ (k+1), wherein Vc is former C0 voltage.
In each cycle, if the electric charge that the upper enhanced charge > of C0 reduces, voltage C0 raises, comparator X0 output is high, by filter, regulates voltage controlled oscillator, makes its frequency increase, cycle reduces, and enhanced charge V0/R* (t/2) will tail off like this; If the electric charge that the upper enhanced charge < of C0 reduces, C0 lower voltage, comparator X0 output is low, by filter, regulates voltage controlled oscillator, and its frequency is declined, cycle increase, enhanced charge V0/R* (t/2) can become again many like this.
Voltage on final C0 can be stabilized on the same position of negative terminal voltage V0 with comparator X0, closed-loop control system loop stability now, V0/R* (t/2)=C*V0*k/ (k+1), can extrapolate frequency divider frequency f=1/t=(k+1)/(2kRC).
Visible, the frequency of oscillation that this oscillator obtains and independent of power voltage, if adopt multiple resistance and electric capacity with their temperature coefficient of balance, can obtain one with temperature also irrelevant frequency.The precision of oscillator depends on the matching degree of resistance capacitance like this, and the divider ratio that frequency height can be by increasing frequency divider is to reach the object of frequency multiplication.
Claims (3)
1. a high-precision high frequency ring oscillator circuit, it is characterized in that, this pierce circuit comprises pressure converter, filter, frequency divider and voltage controlled oscillator frequently, described frequency pressure converter output is connected to filter, described filter output is connected to voltage controlled oscillator, described voltage controlled oscillator is externally exported the higher-order of oscillation, and feedback output is simultaneously connected to frequency divider, and described frequency divider output is connected to pressure converter frequently.
2. a kind of high-precision high frequency ring oscillator circuit according to claim 1, it is characterized in that, described frequency pressure converter comprises current source I0, switch S 0, S1, S2, direct-to-ground capacitance C0, C1, voltage source V 0 and comparator X0, described current source I0 is connected to the anode of comparator X0 by switch S 0, the anode of described comparator X0 has connected direct-to-ground capacitance C0, the anode of described comparator X0 is connected to direct-to-ground capacitance C1 by switch S 1 simultaneously, described direct-to-ground capacitance C1 is in parallel with switch S 2, and the negative terminal of described comparator X0 is connected to voltage source V 0.
3. a kind of high-precision high frequency ring oscillator circuit according to claim 2, is characterized in that, the capacitance of described direct-to-ground capacitance C1 is C, and the capacitance of described direct-to-ground capacitance capacitor C 0 is k times of direct-to-ground capacitance C1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420081462.6U CN203722608U (en) | 2014-02-25 | 2014-02-25 | High-precision high-frequency ring oscillator circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420081462.6U CN203722608U (en) | 2014-02-25 | 2014-02-25 | High-precision high-frequency ring oscillator circuit |
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| CN203722608U true CN203722608U (en) | 2014-07-16 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201420081462.6U Expired - Lifetime CN203722608U (en) | 2014-02-25 | 2014-02-25 | High-precision high-frequency ring oscillator circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104143979A (en) * | 2014-02-25 | 2014-11-12 | 上海菱沃铂智能技术有限公司 | High-precision high-frequency ring oscillator circuit |
| CN106444344A (en) * | 2016-10-13 | 2017-02-22 | 东南大学 | High-stability clock generation circuit based on automatic biasing frequency locking ring |
-
2014
- 2014-02-25 CN CN201420081462.6U patent/CN203722608U/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104143979A (en) * | 2014-02-25 | 2014-11-12 | 上海菱沃铂智能技术有限公司 | High-precision high-frequency ring oscillator circuit |
| CN104143979B (en) * | 2014-02-25 | 2018-03-06 | 上海菱沃铂智能技术有限公司 | A kind of high-precision high frequency ring oscillator circuit |
| CN106444344A (en) * | 2016-10-13 | 2017-02-22 | 东南大学 | High-stability clock generation circuit based on automatic biasing frequency locking ring |
| CN106444344B (en) * | 2016-10-13 | 2018-11-06 | 东南大学 | A kind of high stable clock generation circuit based on automatic biasing frequency-locked loop |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20140716 |