CN112255528A - Probe station for wafer test - Google Patents
Probe station for wafer test Download PDFInfo
- Publication number
- CN112255528A CN112255528A CN202011024180.9A CN202011024180A CN112255528A CN 112255528 A CN112255528 A CN 112255528A CN 202011024180 A CN202011024180 A CN 202011024180A CN 112255528 A CN112255528 A CN 112255528A
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- probe station
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- 238000012360 testing method Methods 0.000 title claims abstract description 141
- 239000000523 sample Substances 0.000 title claims abstract description 83
- 239000000919 ceramic Substances 0.000 claims description 4
- 230000000007 visual effect Effects 0.000 claims description 4
- 239000013078 crystal Substances 0.000 abstract description 9
- 238000004519 manufacturing process Methods 0.000 abstract description 7
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 3
- 238000007599 discharging Methods 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 241001133184 Colletotrichum agaves Species 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000005489 elastic deformation Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000004579 marble Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000008188 pellet Substances 0.000 description 1
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
- G01R31/2831—Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Measuring Leads Or Probes (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The invention relates to a probe station for wafer testing. The probe station (1) comprises a basic platform (10) and a test fixture (11) positioned on the basic platform. The test fixture (11) comprises a test seat (2) and a pressure cover (4). The test seat is provided with a probe which is used for electrically contacting with a bonding pad of a wafer grain to be tested. The pressure cover (4) is used for fixing the wafer crystal grain to be tested in the test seat (2). The probe station has simple structure and low production cost, and is beneficial to reducing the cost of wafer testing.
Description
Technical Field
The invention relates to the technical field of chip testing, in particular to a probe station for wafer testing.
Background
After the wafer fabrication is complete, the wafer needs to be tested to identify faulty wafer dies. When a traditional semiconductor testing machine carries out wafer testing (Circuit Probe), a complete wafer to be tested is placed on a horizontal working face of a Probe station (Prober) firstly, the Probe station is debugged in advance through flatness, the flatness of the working face is guaranteed, meanwhile, the testing initial position coordinate is aligned, then the wafer to be tested is contacted with a Probe (Probe pin) on a fixed Probe card (Probe card) by controlling the accurate movement of the Probe station in X, Y and Z directions, and the testing is carried out by sending/obtaining testing signals/data through a testing machine connected with the Probe card. This method needs to connect the test resource pins on the test carrier board (Loadboard) with the probe card (ProbeCard) by means of the Pogo Tower (Pogo Tower) to ensure the signal quality and speed requirement of the test signal.
With the increasing level of semiconductor design, the size of the pad on the wafer die (die) is smaller and smaller, and the requirement for the positioning accuracy of the probe is higher and higher. As the alignment of the die bonding pad and the probe is realized through the movement of the probe station in the XYZ three directions during the wafer test, the flatness of the probe station has extremely high requirement so as to meet the error requirement of micron order. In addition, the test signals need to be connected with the test machine signals and the probe signals through the probe tower device, and because the number of the test signals generally needed by wafer testing is different from hundreds to thousands of signal pins, the requirement for ensuring the integrity and the precision consistency of the test signals is very difficult to meet, so that the probe station equipment is complex to realize, high in cost and not beneficial to large-scale construction production. In addition, because the probe station is inconvenient to move and debug, once the probe station is set, the probe station is fixedly used for testing a specific product, so that the resources of the testing machine cannot be flexibly and dynamically configured according to the testing requirements.
Therefore, it is desirable to provide a probe station with simple structure and low production cost so as to reduce the cost of wafer testing.
Disclosure of Invention
In order to solve the above technical problems, the present invention provides a probe station for wafer testing, which has a simple structure and a low production cost, so as to reduce the wafer testing cost.
The probe station for wafer test comprises a basic platform and a test fixture positioned on the basic platform, wherein the test fixture comprises a test seat and a pressure cover, a probe is arranged in the test seat and is used for being in contact with a bonding pad of a wafer grain to be tested, and the pressure cover is used for fixing the wafer grain to be tested in the test seat.
According to a preferred embodiment of the present invention, the pressure cover has an open position and a closed position, in the closed position, the pressure cover fixes the wafer die to be tested in the test socket so that the pad of the wafer die to be tested is in stable contact with the probe, and in the open position, the pressure cover is separated from the wafer die to be tested.
According to a preferred embodiment of the present invention, the pressure cover comprises a ceramic contact configured to apply pressure to the wafer die to be tested when the pressure cover is in the closed position, such that the pad of the wafer die to be tested abuts against the probe.
According to a preferred embodiment of the present invention, the fixture includes at least one test socket, and the at least one test socket is soldered on the circuit board of the fixture.
According to a preferred embodiment of the present invention, the circuit board of the fixture includes a test signal connector, so that the test signal connector is electrically connected to the probe of the at least one test socket.
According to a preferred embodiment of the present invention, the test fixture is replaceable.
According to a preferred embodiment of the present invention, the probe station further includes a loading arm and a unloading arm, the loading arm is configured to place the wafer die to be tested into the test socket, and the unloading arm is configured to take out the wafer die to be tested from the test socket.
According to a preferred embodiment of the present invention, the feeding mechanical arm and the discharging mechanical arm are the same mechanical arm.
According to a preferred embodiment of the present invention, the loading robot arm and the unloading robot arm are three-axis robot arms with visual positioning and parallel grabbing capabilities.
According to a preferred embodiment of the present invention, the probe station further includes a loading station for placing the cut wafer dies and a unloading station for placing the tested wafer dies.
The probe station for wafer test of the invention adopts the structure of the test seat comprising the probe to realize the electric contact with the bonding pad of the grain to be tested, thereby simplifying the structure of the probe station and reducing the manufacturing cost of the probe station. In addition, the test fixture in the probe station can be replaced according to different wafer crystal grains to be tested, so that flexible configuration according to test requirements is realized.
Drawings
The disclosure of the present invention will become more readily understood with reference to the accompanying drawings. It is easily understood by those skilled in the art that these drawings are only for illustrating the technical solutions of the present invention and are not intended to limit the scope of the present invention. In the drawings:
FIG. 1 is a schematic diagram of a probe station for wafer testing according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a test socket according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a circuit board of a test fixture according to an embodiment of the invention;
fig. 4 is a schematic structural diagram of a pressure cover of a test socket according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in detail with reference to the accompanying drawings and specific embodiments.
Fig. 1 is a schematic structural diagram of a probe station for wafer testing according to an embodiment of the invention. As shown in fig. 1, the probe station 1 includes a base platform 10 and a testing fixture 11 located on the base platform. The base platform 10 is preferably made of marble in order to ensure the flatness of the test platform. The test fixture 11 includes a test socket (socket)2 and a pressure cover 4. The test socket 2 is provided with probes 21 for electrically contacting pads of the wafer die to be tested. The test socket 2 can be fixed on the circuit board 3 of the test fixture 11, for example, by soldering. The pressure cover 4 is used for fixing the wafer die to be tested in the test socket 4. The probe station 1 is connected to the tester by a cable so that it can receive test signals from the tester and transmit feedback signals of the die back to the tester.
The wafer test using the probe station 1 of the present invention mainly includes three processes of feeding, testing and blanking. First, the diced wafer die to be tested is placed in the test socket 2 on the test fixture 11, so that the pads of the die are in electrical contact with the probes 21 in the test socket 2. Subsequently, the pressure cover 4 is closed. The closed pressure cover 4 applies downward pressure to the die to be tested, so that the pad of the wafer die to be tested is stably contacted with the probe. After the loading is completed, the testing machine 1 transmits a test signal to the die to be tested through the probe 21, receives a feedback signal from the die to be tested, and records a test result, thereby completing the test of the die to be tested. And after the test is finished, entering a blanking process. The pressure lid 4 is opened so that the die that has completed the test can be taken out of the test socket 2. In the process of wafer testing using the probe station 1 of the embodiment, the probe station 1 does not need to be moved, and any complicated and expensive parts such as a probe tower, a probe card and the like do not need to be used, thereby reducing the production cost of the probe station 1 and the wafer testing cost.
According to a preferred embodiment, the test fixture 11 in fig. 1 is replaceable. Because the functions, sizes, and positions and numbers of the pads of different dies are different, the same test fixture often cannot meet the test requirements of different dies. According to the probe station 1 of the present embodiment, the corresponding test fixture 11 can be replaced according to the test requirement of the wafer die, and the whole probe station 1 does not need to be replaced.
According to a preferred embodiment, the probe station 1 further comprises a feeding robot arm 121 and a blanking robot arm 122. The loading arm 121 is used to place the wafer die to be tested into the test socket 2, and the unloading arm 122 is used to take out the wafer die to be tested from the test socket 2. Of course, the feeding robot arm 121 and the discharging robot arm 122 described above may be the same robot arm, so that cost can be saved. The loading robot arm 121 and the unloading robot arm 122 are preferably three-axis robot arms having visual positioning and parallel grasping capabilities. The visual positioning refers to judging the position of a target object (such as a wafer crystal grain) according to the collected image, and the parallel grabbing refers to grabbing a plurality of crystal grains simultaneously. Therefore, the robot arm according to the present embodiment can grasp the die quickly and accurately.
According to a preferred embodiment, the probe station 1 further comprises a loading station 131 and a unloading station 132. The loading platform 131 includes a placement area for placing pre-cut wafer dies, each wafer die has its own coordinate and serial number, and the loading robot arm 121 can draw the corresponding wafer die and place the wafer die in the test socket 2 for testing according to the instruction of the tester. And after the wafer crystal grain to be tested is tested, automatically updating the wafer crystal grain to be tested. The blanking table 132 includes a holding area for holding the wafer pellets after testing. According to the grading requirement of the test result, the storage area is divided into different wafer particle storage areas, the blanking mechanical arm 122 sucks the wafer particles which are tested in the corresponding test seat, and the wafer crystal grains in different grades are placed in different areas according to the test result. The storage area at least comprises a PASS area passing the test and a FAIL area failing the test.
FIG. 2 is a schematic structural diagram of a test socket according to an embodiment of the present invention. According to the present embodiment, the test socket 2 includes a housing 21, a pad 22, and a probe 23. The housing 22 forms a rail structure defining a rectangular area therein. The size of the rectangle corresponds to the size of the crystal grain to be tested, so that the crystal grain to be tested can be stably embedded in the fence structure during testing. At least one probe 23 is provided in the rectangular area, the position and number of the probes 23 corresponding to the position and number of the pads of the die to be tested, so as to ensure that the pads of the die embedded in the fence structure are in electrical contact with the corresponding probes 23. The soldering pads 22 of the test socket are used for fixing the test socket on the circuit board 3 of the test fixture 11.
Fig. 3 is a schematic structural diagram of a circuit board of a test fixture according to an embodiment of the invention. According to the present embodiment, 6 test sockets 2 are soldered on the circuit board 3 of the test fixture 11. The number of test sockets 2 can be adjusted as desired. The larger the number of test sockets 2, the larger the number of dies that can be measured simultaneously, and the higher the efficiency of the test. However, the number of test sockets 2 is limited by the area of the test fixture 11 and the cost, and cannot be increased infinitely. In this embodiment, the circuit board 3 of the test fixture 11 further includes a test signal connector 31 thereon. The probe of each test socket 2 on the circuit board 3 is electrically connected to the test signal connector so that it can receive the test signal from the test signal connector 31 and send the feedback signal to the test signal connector 31. The test signal connector 31 is also connected to a test signal interface, and is connected to a tester through the test signal interface.
Fig. 4 is a schematic structural diagram of a pressure cover of a test socket according to an embodiment of the invention. The pressure cap 4 in fig. 4 is a pressure cap 4 corresponding to the test socket 2 in fig. 3. On the surface facing the test socket 2 in the closed position of the pressure cover 4, 6 contacts 40 are provided. When the die to be tested is embedded in the test socket 2 and the pressure cap 4 is closed, the contacts on the pressure cap 4 contact the surface of the die in the test socket 2 and apply downward pressure, so that the pads of the die abut against the heads of the probes 23, causing elastic deformation of the probes. Thereby, the pads of the die are stably brought into electrical contact with the probes 23, thereby ensuring stability of the test. According to the present invention, the number of the contacts 40 is not limited to 6 as long as the number and the position thereof coincide with those of the test sockets 2. Preferably, the contacts 40 are made of a ceramic material, so as to ensure good insulation.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (10)
1. The utility model provides a probe platform (1) for wafer test, includes basic platform (10) and is located test fixture (11) on the basic platform, test fixture (11) are including test seat (2) and pressure lid (4), be equipped with probe (23) in test seat (2) for with the pad electrical contact of the wafer crystalline grain that awaits measuring, pressure lid (4) are used for fixing the wafer crystalline grain that awaits measuring in test seat (2).
2. The probe station (1) according to claim 1, characterized in that the pressure cover (4) has an open position in which the pressure cover (4) secures a wafer die to be tested in the test socket such that a pad of the wafer die to be tested is in stable contact with the probe (23) and a closed position in which the pressure cover (4) is separated from the wafer die to be tested.
3. The probe station (1) according to claim 2, characterized in that the pressure cover (4) comprises ceramic contacts (40), the ceramic contacts (40) being configured such that when the pressure cover (4) is in a closed position, the ceramic contacts (40) apply a pressure to a wafer die to be tested such that a pad of the wafer die to be tested abuts against a probe (23).
4. The probe station (1) according to claim 3, characterized in that said test fixture (11) comprises at least one test socket (2), said at least one test socket (2) being soldered on a circuit board (3) of said test fixture (11).
5. The probe station (1) according to claim 4, characterized in that said jig (11) comprises on its circuit board (3) test signal connectors so that they are electrically connected with the probes (23) of said at least one test socket (2).
6. The probe station (1) according to any one of claims 1 to 5, characterized in that the test fixture (11) is replaceable.
7. The probe station (1) according to claim 6, wherein the probe station (1) further comprises a loading robot arm (121) and a unloading robot arm (122), the loading robot arm (121) is used for placing a wafer die to be tested into the test socket (2), and the unloading robot arm (122) is used for taking the wafer die to be tested out of the test socket (2).
8. The probe station (1) according to claim 7, characterized in that said feeding robot arm (121) and blanking robot arm (122) are one and the same.
9. The probe station (1) according to claim 7, characterized in that said feeding robot arm (121) and blanking robot arm (121) are tri-axial robots with visual positioning and parallel grasping capabilities.
10. The probe station (1) according to claim 7, characterized in that the probe station (1) further comprises a loading station (131) and a unloading station (132), the loading station (131) being used for placing the diced wafer dice and the unloading station (132) being used for placing the tested wafer dice.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011024180.9A CN112255528A (en) | 2020-09-25 | 2020-09-25 | Probe station for wafer test |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011024180.9A CN112255528A (en) | 2020-09-25 | 2020-09-25 | Probe station for wafer test |
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| Publication Number | Publication Date |
|---|---|
| CN112255528A true CN112255528A (en) | 2021-01-22 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202011024180.9A Pending CN112255528A (en) | 2020-09-25 | 2020-09-25 | Probe station for wafer test |
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Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102509709A (en) * | 2011-09-02 | 2012-06-20 | 致茂电子(苏州)有限公司 | Point measurement device for LED (light-emitting diode) crystalline grain point measurement equipment |
| CN104183515A (en) * | 2013-05-24 | 2014-12-03 | 标准科技股份有限公司 | Wafer testing machine stand |
| JP5858312B1 (en) * | 2014-07-25 | 2016-02-10 | 株式会社東京精密 | Probing apparatus and probe contact method |
| CN107863302A (en) * | 2017-11-02 | 2018-03-30 | 德淮半导体有限公司 | Test device and method of testing |
| CN207557414U (en) * | 2016-12-28 | 2018-06-29 | 上海捷策创电子科技有限公司 | A kind of wafer-level test device |
| CN108279368A (en) * | 2018-01-23 | 2018-07-13 | 德淮半导体有限公司 | Tester table and test method |
| CN108766900A (en) * | 2018-04-12 | 2018-11-06 | 中国电子科技集团公司第五十五研究所 | A kind of On-wafer measurement DC probe card |
| CN110412440A (en) * | 2019-06-24 | 2019-11-05 | 深圳市森美协尔科技有限公司 | A kind of full-automatic wafer probe station and full-automatic wafer test equipment |
| CN110767587A (en) * | 2019-10-21 | 2020-02-07 | 西安奕斯伟硅片技术有限公司 | Wafer processing device and loading and unloading method |
| CN210181167U (en) * | 2019-05-13 | 2020-03-24 | 绵阳金能移动能源有限公司 | Single wafer electrical performance testing arrangement |
-
2020
- 2020-09-25 CN CN202011024180.9A patent/CN112255528A/en active Pending
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102509709A (en) * | 2011-09-02 | 2012-06-20 | 致茂电子(苏州)有限公司 | Point measurement device for LED (light-emitting diode) crystalline grain point measurement equipment |
| CN104183515A (en) * | 2013-05-24 | 2014-12-03 | 标准科技股份有限公司 | Wafer testing machine stand |
| JP5858312B1 (en) * | 2014-07-25 | 2016-02-10 | 株式会社東京精密 | Probing apparatus and probe contact method |
| CN207557414U (en) * | 2016-12-28 | 2018-06-29 | 上海捷策创电子科技有限公司 | A kind of wafer-level test device |
| CN107863302A (en) * | 2017-11-02 | 2018-03-30 | 德淮半导体有限公司 | Test device and method of testing |
| CN108279368A (en) * | 2018-01-23 | 2018-07-13 | 德淮半导体有限公司 | Tester table and test method |
| CN108766900A (en) * | 2018-04-12 | 2018-11-06 | 中国电子科技集团公司第五十五研究所 | A kind of On-wafer measurement DC probe card |
| CN210181167U (en) * | 2019-05-13 | 2020-03-24 | 绵阳金能移动能源有限公司 | Single wafer electrical performance testing arrangement |
| CN110412440A (en) * | 2019-06-24 | 2019-11-05 | 深圳市森美协尔科技有限公司 | A kind of full-automatic wafer probe station and full-automatic wafer test equipment |
| CN110767587A (en) * | 2019-10-21 | 2020-02-07 | 西安奕斯伟硅片技术有限公司 | Wafer processing device and loading and unloading method |
Non-Patent Citations (2)
| Title |
|---|
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