CN112071698B - Control circuit for preventing relay from being attracted by mistake - Google Patents
Control circuit for preventing relay from being attracted by mistake Download PDFInfo
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- CN112071698B CN112071698B CN202010762633.1A CN202010762633A CN112071698B CN 112071698 B CN112071698 B CN 112071698B CN 202010762633 A CN202010762633 A CN 202010762633A CN 112071698 B CN112071698 B CN 112071698B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H47/00—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
- H01H47/001—Functional circuits, e.g. logic, sequencing, interlocking circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H47/00—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
- H01H47/22—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for supplying energising current for relay coil
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H11/00—Emergency protective circuit arrangements for preventing the switching-on in case an undesired electric working condition might result
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
- H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
- H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
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- Electronic Switches (AREA)
- Measurement Of Current Or Voltage (AREA)
Abstract
The application discloses a control circuit for preventing a relay from being attracted by mistake, which is applied to a UPS, wherein the UPS is provided with a relay for controlling the input or the cutting of mains voltage, and the relay can receive a control signal sent by a DSP; the control circuit includes: the voltage acquisition module is used for acquiring an input voltage peak value of the mains voltage; the signal acquisition module is used for acquiring a target driving signal according to the positive bus voltage, the negative bus voltage and the input voltage peak value of the UPS; and the relay control module is used for performing AND operation on the target driving signal and the control signal sent by the DSP to obtain a target control signal so as to control the suction state of the relay. Obviously, because the actuation state of the relay is controlled by the DSP chip and the target driving signal, the relay is equivalent to a secondary protection circuit in the state, and therefore the probability of false actuation of the relay is further reduced.
Description
Technical Field
The invention relates to the technical field of relays, in particular to a control circuit for preventing a relay from being attracted by mistake.
Background
Relays are a relatively common current control switch, and are often used in UPS (Uninterrupted Power Supply, uninterruptible power supply) control systems to control the input or output of mains supply. Referring to fig. 1, fig. 1 is a block diagram of a UPS in the prior art, in which the on state of a relay K is generally controlled by a control signal sent by a DSP (Digital Signal Process, digital signal processing). Under the working mechanism, if the DSP mistakenly triggers the relay K to enter the suction state, the fuse F can be burnt out when the DSP is light, and the switch tube in the UPS can be damaged when the DSP is heavy, so that the stable operation of the UPS can be influenced, and huge economic loss can be brought to people. Currently, there is no more effective solution to this technical problem.
Therefore, how to further reduce the probability of the occurrence of the false actuation of the relay is a technical problem to be solved urgently by those skilled in the art.
Disclosure of Invention
Accordingly, an object of the present invention is to provide a control circuit for preventing the relay from being erroneously actuated, so as to further reduce the probability of occurrence of erroneous actuation of the relay. The specific scheme is as follows:
the control circuit is applied to the UPS, wherein the UPS is provided with a relay for controlling the input or the cut-out of the mains voltage, and the relay can receive a control signal sent by a DSP; the control circuit includes:
the voltage acquisition module is used for acquiring an input voltage peak value of the mains voltage;
the signal acquisition module is used for acquiring a target driving signal according to the positive bus voltage, the negative bus voltage and the input voltage peak value of the UPS;
and the relay control module is used for performing AND operation on the target driving signal and the control signal sent by the DSP to obtain a target control signal so as to control the suction state of the relay.
Preferably, the voltage acquisition module includes:
the voltage acquisition unit is used for acquiring the mains voltage;
and the voltage acquisition unit is used for acquiring the input voltage peak value according to the mains voltage.
Preferably, the relay control module is specifically an and gate.
Preferably, the signal acquisition module includes:
the first acquisition submodule is used for obtaining a first comparison signal according to the positive bus voltage of the UPS and the input voltage peak value;
the second acquisition submodule is used for obtaining a second comparison signal according to the negative bus voltage of the UPS and the input voltage peak value;
and the logic operation unit is used for performing AND operation on the first comparison signal and the second comparison signal to obtain the target driving signal.
Preferably, the first obtaining submodule includes:
the first acquisition unit is used for acquiring the positive bus voltage of the UPS;
the first operational amplifier unit is used for carrying out operational amplification on the positive bus voltage of the UPS by utilizing a first operational amplifier to obtain a first operational amplifier signal;
the first comparison unit is used for comparing the first operational amplifier signal with the input voltage peak value to obtain the first comparison signal;
correspondingly, the second obtaining submodule includes:
the second acquisition unit is used for acquiring the negative bus voltage of the UPS;
the second operational amplifier unit is used for carrying out operational amplification on the negative bus voltage of the UPS by utilizing a second operational amplifier to obtain a second operational amplifier signal;
and the second comparison unit is used for comparing the second operational amplifier signal with the input voltage peak value to obtain the second comparison signal.
Preferably, the method further comprises:
the first filter circuit is used for filtering the first operational amplifier signal;
and the second filter circuit is used for filtering the second operational amplifier signal.
Preferably, the method further comprises:
the first anti-reverse circuit is arranged at the rear end of the first operational amplifier unit and is used for preventing reverse flow of current in the first acquisition submodule;
and the second anti-reverse circuit is arranged at the rear end of the second operational amplifier unit and is used for preventing the reverse flow of the current in the second acquisition sub-module.
Preferably, the method further comprises:
the first return difference module is used for eliminating signal jitter generated by the first acquisition sub-module in the operation process;
and the second return difference module is used for eliminating signal jitter generated by the second acquisition sub-module in the operation process.
Preferably, the voltage acquisition module includes: the first operational amplifier, the second operational amplifier, the first resistor, the second resistor, the third resistor, the fourth resistor, the first diode and the second diode;
the positive input end of the first operational amplifier is connected with the first end of the first resistor, the positive input end of the first operational amplifier is further used for receiving the mains voltage, the second end of the first resistor is connected with the output end of the first operational amplifier, the negative input end of the first operational amplifier is connected with the neutral line of the UPS and the first end of the second resistor, the second end of the second resistor is grounded, the output end of the first operational amplifier is respectively connected with the first end of the third resistor and the positive electrode of the first diode, the second end of the third resistor is respectively connected with the positive input end of the second operational amplifier and the first end of the fourth resistor, the second end of the fourth resistor is respectively connected with the output end of the second operational amplifier and the positive electrode of the second diode, the negative input end of the second operational amplifier is grounded, and the negative electrode of the first diode is connected with the negative electrode of the second diode.
Preferably, the signal acquisition module includes: the third operational amplifier, the fifth resistor, the sixth resistor, the first comparator, the first pull-up resistor, the fourth operational amplifier, the seventh resistor, the eighth resistor, the second comparator and the second pull-up resistor;
the positive input end of the third operational amplifier is connected with a positive bus of the UPS and the first end of the fifth resistor respectively, the second end of the fifth resistor is connected with the output end of the third operational amplifier, the negative input end of the third operational amplifier is connected with the neutral line of the UPS and the first end of the sixth resistor respectively, the second end of the sixth resistor is grounded, the output end of the third operational amplifier is connected with the negative input end of the first comparator, the negative input end of the first comparator is used for receiving the input voltage peak value, the output end of the first comparator is connected with the first end of the first pull-up resistor, and the second end of the first pull-up resistor is connected with a first target power supply;
the negative input end of the fourth operational amplifier is respectively connected with the neutral line of the UPS and the first end of the seventh resistor, the second end of the seventh resistor is connected with the output end of the fourth operational amplifier, the positive input end of the fourth operational amplifier is respectively connected with the negative bus of the UPS and the first end of the eighth resistor, the second end of the eighth resistor is grounded, the output end of the fourth operational amplifier is connected with the positive input end of the second comparator, the negative input end of the second comparator is used for receiving the input voltage peak value, the output end of the second comparator is connected with the first end of the second pull-up resistor, and the second end of the second pull-up resistor is connected with a second target power supply;
correspondingly, the first end of the first pull-up resistor is connected with the first end of the second pull-up resistor, and the first end of the second pull-up resistor are jointly formed into the output end of the signal acquisition module.
It can be seen that in the control circuit provided by the invention, firstly, the voltage acquisition module is utilized to acquire the input voltage peak value of the mains voltage, then the signal acquisition module is utilized to acquire the target driving signal according to the positive bus voltage, the negative bus voltage and the input voltage peak value of the mains voltage of the UPS, and finally, the relay control module is utilized to carry out AND operation on the target driving signal and the control signal sent by the DSP to acquire the target control signal so as to control the actuation state of the relay. Obviously, in the control circuit provided by the invention, because the suction state of the relay is controlled by the DSP chip and the target driving signal, the relay is equivalent to a secondary protection circuit in the state, namely, the relay can be triggered to enter the suction state only under the condition that the control signal of the DSP chip is consistent with the target driving signal, so that the probability of false suction of the relay is further reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a block diagram of a UPS according to the prior art;
fig. 2 is a block diagram of a control circuit for preventing a relay from being erroneously engaged according to an embodiment of the present invention;
FIG. 3 is a block diagram of a voltage acquisition module according to an embodiment of the present invention;
FIG. 4 is a block diagram of another voltage acquisition module according to an embodiment of the present invention;
fig. 5 is a block diagram of a signal acquisition module according to an embodiment of the present invention;
FIG. 6 is a block diagram of another signal acquisition module according to an embodiment of the present invention;
fig. 7 is a block diagram of another control circuit for preventing the relay from being erroneously engaged according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 2, fig. 2 is a block diagram of a control circuit for preventing a relay from being erroneously turned on, which is provided in an embodiment of the present invention, and the control circuit is applied to a UPS, in which a relay for controlling a mains voltage to be input or cut out is provided, and the relay receives a control signal sent by a DSP; the control circuit includes:
a voltage acquisition module 11, configured to acquire an input voltage peak value of a mains voltage;
a signal acquisition module 12, configured to obtain a target driving signal according to the positive bus voltage, the negative bus voltage, and the input voltage peak of the UPS;
and the relay control module 13 is used for performing AND operation on the target driving signal and the control signal sent by the DSP to obtain a target control signal so as to control the suction state of the relay.
In the present embodiment, a control circuit for preventing the false actuation of the relay is provided, by which the probability of occurrence of false actuation of the relay can be further reduced. The control circuit provided in this embodiment is applied to a UPS, in which a relay for controlling the input or the cut-out of the mains voltage is provided, and the relay also receives a control signal sent from the DSP, that is, the on or off state of the relay is controlled by the DSP.
In the control circuit, a voltage acquisition module 11, a signal acquisition module 12, and a relay control module 13 are provided. Specifically, the voltage acquisition module 11 is configured to acquire an input voltage peak value of a mains voltage, and the signal acquisition module 12 is configured to acquire a target driving signal according to a positive bus voltage, a negative bus voltage, and the input voltage peak value of the mains voltage of the UPS, where the positive bus voltage and the mains voltage of the UPS are compared to obtain a comparison signal, the negative bus voltage and the mains voltage of the UPS are compared to obtain a comparison signal, and then the comparison signal is subjected to a and operation to obtain the target driving signal. After the signal acquisition module 12 acquires the target driving signal, the relay control module 13 performs an and operation on the target driving signal and the control signal sent by the DSP, so as to obtain a target control signal, and controls the actuation state of the relay through the target control signal.
Obviously, under such a setting mechanism, the relay control module 13 outputs a target control signal for controlling the relay to perform actuation only when the target drive signal is identical to the control signal transmitted to the relay by the DSP. That is, in the control circuit provided in this embodiment, since the actuation state of the relay is controlled by the DSP chip and the target driving signal, in this state, the relay is equivalent to having a secondary protection circuit, and the relay can be triggered to enter the actuation state only when the control signal sent by the DSP to the relay is consistent with the target driving signal, so that the phenomenon that the relay enters the actuation state due to the DSP sending an error signal to the relay can be effectively avoided.
It can be seen that, in the control circuit provided in this embodiment, the voltage acquisition module is utilized to acquire the input voltage peak value of the mains voltage, then the signal acquisition module is utilized to acquire the target driving signal according to the positive bus voltage, the negative bus voltage and the input voltage peak value of the mains voltage of the UPS, and finally the relay control module is utilized to perform and operation on the target driving signal and the control signal sent by the DSP, so as to obtain the target control signal, so as to control the actuation state of the relay. Obviously, in the control circuit provided in this embodiment, since the actuation state of the relay is controlled by the DSP chip and the target driving signal, in this state, the relay is equivalent to having a secondary protection circuit, that is, only when the control signal of the DSP chip is consistent with the target driving signal, the relay can be triggered to enter the actuation state, so that the probability of occurrence of erroneous actuation of the relay is further reduced.
Based on the above embodiments, the present embodiment further describes and optimizes the technical solution, and as a preferred implementation manner, the voltage acquisition module 11 includes:
the voltage acquisition unit is used for acquiring the voltage of the mains supply;
and the voltage acquisition unit is used for acquiring an input voltage peak value according to the mains voltage.
In practical application, in order to obtain an input voltage peak value of the mains voltage, the voltage acquisition unit is used for acquiring the mains voltage, and then the voltage acquisition unit is used for acquiring the input voltage peak value of the mains voltage according to the acquired mains voltage. In the process of acquiring the input voltage peak value of the mains voltage, the input voltage peak value of the mains voltage on the sine wave positive half shaft and the input voltage peak value of the mains voltage on the sine wave negative half shaft are required to be acquired respectively, and then the input voltage peak value of the mains voltage is acquired according to the input voltage peak value of the mains voltage on the sine wave positive half shaft and the input voltage peak value of the mains voltage on the sine wave negative half shaft.
Referring to fig. 3, fig. 3 is a block diagram of a voltage acquisition module according to an embodiment of the invention. As a preferred embodiment, the voltage acquisition module 11 includes: the first operational amplifier U1, the second operational amplifier U2, the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the first diode D01 and the second diode D02;
the positive input end of the first operational amplifier U1 is connected with the first end of the first resistor R1, the positive input end of the first operational amplifier U1 is also used for receiving mains voltage, the second end of the first resistor R1 is connected with the output end of the first operational amplifier U1, the negative input end of the first operational amplifier U1 is connected with the neutral line of the UPS and the first end of the second resistor R2, the second end of the second resistor R2 is grounded, the output end of the first operational amplifier U1 is respectively connected with the first end of the third resistor R3 and the positive electrode of the first diode D01, the second end of the third resistor R3 is respectively connected with the positive input end of the second operational amplifier U2 and the first end of the fourth resistor R4, the second end of the fourth resistor R4 is respectively connected with the output end of the second operational amplifier U2 and the positive electrode of the second diode D02, and the negative input end of the second operational amplifier U2 is grounded, and the negative electrode of the first diode D01 is connected with the negative electrode of the second diode D02.
In this embodiment, in order to facilitate a subsequent processing flow, an a-phase voltage LINEA in a mains voltage is used to replace the mains voltage, a neutral line voltage of a UPS is a line N, when the mains voltage and the line N are input to a first operational amplifier U1, the first operational amplifier U1 performs operational amplification on the mains voltage and the neutral line voltage of the UPS, and obtains an input voltage peak value of the mains voltage on a sine wave positive half-axis, and a second operational amplifier U2 is equivalent to a first inverter, that is, after an output signal of the first operational amplifier U1 is subjected to operational amplification by the second operational amplifier U2, an input voltage peak value of the mains voltage on a sine wave negative half-axis can be obtained, and then, after the input voltage peak value of the mains voltage on the sine wave positive half-axis and the input voltage peak value of the mains voltage on the sine wave negative half-axis pass through a first diode D01 and a second diode D02, the input voltage peak value of the mains voltage can be obtained.
Referring to fig. 4, fig. 4 is a block diagram of another voltage acquisition module according to an embodiment of the invention. In an actual operation process, sampling resistors R11, R12, R13, R14, R15, R16, R17, R18 and R19 may be connected to the positive input terminal and the negative input terminal of the first op amp U1. In addition, in order to avoid the influence of harmonics in the mains supply on the measurement result, a filter circuit may be provided at the output of the second op-amp U2, wherein the resistors R01, R02 and the capacitor C01 form a filter circuit for filtering the mains supply voltage.
Based on the above embodiments, the technical solution is further described and optimized in this embodiment, and as a preferred implementation manner, the relay control module 13 is specifically an and gate.
In the present embodiment, the relay control module 13 is configured as an and gate, and the design cost required for the control circuit can be further reduced when the relay control module 13 is configured as an and gate because the logic circuit and gate can not only realize reliable logical and operation, but also has the advantage of low cost.
Based on the foregoing embodiments, this embodiment further describes and optimizes a technical solution, and as a preferred implementation manner, the signal acquisition module includes:
the first acquisition submodule is used for obtaining a first comparison signal according to the positive bus voltage and the input voltage peak value of the UPS;
the second acquisition submodule is used for obtaining a second comparison signal according to the negative bus voltage and the input voltage peak value of the UPS;
and the logic operation unit is used for performing AND operation on the first comparison signal and the second comparison signal to obtain a target driving signal.
In this embodiment, in order to acquire the target driving signal, a first acquisition sub-module, a second acquisition sub-module, and a logic operation module are provided in the signal acquisition module. In the process of acquiring the target driving signal, the first acquiring submodule acquires a first comparison signal according to the input voltage peak value of the positive bus voltage and the mains voltage of the UPS, the second acquiring submodule acquires a second comparison signal according to the input voltage peak value of the negative bus voltage and the mains voltage of the UPS, and then the logic operation unit performs AND operation on the first comparison signal and the second comparison signal to acquire the target driving signal.
As a preferred embodiment, the first acquisition submodule includes:
the first acquisition unit is used for acquiring the positive bus voltage of the UPS;
the first operational amplifier unit is used for performing operational amplification on the positive bus voltage of the UPS by using a first operational amplifier to obtain a first operational amplifier signal;
the first comparison unit is used for comparing the first operational amplifier signal with the input voltage peak value to obtain a first comparison signal;
correspondingly, the second acquisition submodule includes:
the second acquisition unit is used for acquiring the negative bus voltage of the UPS;
the second operational amplifier unit is used for carrying out operational amplification on the negative bus voltage of the UPS by utilizing a second operational amplifier to obtain a second operational amplifier signal;
and the second comparison unit is used for comparing the second operational amplifier signal with the input voltage peak value to obtain a second comparison signal.
In this embodiment, the first acquiring sub-module and the second acquiring sub-module are set to be functional modules with the same structural form, so that the setting difficulty of the control circuit can be reduced, and the stability of the control circuit in the running process can be improved.
In order to improve the measurement accuracy of the first comparison signal and the second comparison signal, in the present embodiment, the positive bus voltage and the negative bus voltage of the UPS are respectively amplified by the first operational amplifier unit and the second operational amplifier unit.
Referring to fig. 5, fig. 5 is a block diagram of a signal acquisition module according to an embodiment of the present invention; as a preferred embodiment, the signal acquisition module 12 includes: the third operational amplifier U3, the fifth resistor R5, the sixth resistor R6, the first comparator U5, the first pull-up resistor Rn1, the fourth operational amplifier U4, the seventh resistor R7, the eighth resistor R8, the second comparator U6 and the second pull-up resistor Rn2;
the positive input end of the third operational amplifier U3 is respectively connected with a positive bus of the UPS and the first end of a fifth resistor R5, the second end of the fifth resistor R5 is connected with the output end of the third operational amplifier U3, the negative input end of the third operational amplifier U3 is respectively connected with the neutral line of the UPS and the first end of a sixth resistor R6, the second end of the sixth resistor R6 is grounded, the output end of the third operational amplifier U3 is connected with the negative input end of a first comparator U5, the negative input end of the first comparator U5 is used for receiving an input voltage peak value, the output end of the first comparator U5 is connected with the first end of a first pull-up resistor Rn1, and the second end of the first pull-up resistor Rn1 is connected with a first target power supply;
the negative input end of the fourth operational amplifier U4 is respectively connected with the neutral line of the UPS and the first end of a seventh resistor R7, the second end of the seventh resistor R7 is connected with the output end of the fourth operational amplifier U4, the positive input end of the fourth operational amplifier U4 is respectively connected with the negative bus of the UPS and the first end of an eighth resistor R8, the second end of the eighth resistor R8 is grounded, the output end of the fourth operational amplifier U4 is connected with the positive input end of a second comparator U6, the negative input end of the second comparator U6 is used for receiving an input voltage peak value, the output end of the second comparator U6 is connected with the first end of a second pull-up resistor Rn2, and the second end of the second pull-up resistor Rn2 is connected with a second target power supply;
correspondingly, the first end of the first pull-up resistor Rn1 is connected with the first end of the second pull-up resistor Rn2, and the first end are jointly formed into an output end of the signal acquisition module.
In this embodiment, a specific setting manner of a signal acquisition module is provided, that is, firstly, a positive bus voltage ubus+ of a UPS and a neutral line voltage ulline N of the UPS are input to a third operational amplifier U3, and after the operational amplification of the third operational amplifier U3, a first operational amplifier signal is obtained, then, a first comparator U5 is used to compare the input voltage peak value of the first operational amplifier signal and the mains voltage to obtain a corresponding output signal, and finally, a first pull-up resistor Rn1 is used to pull up the output signal of the first comparator U5 to obtain a first comparison signal.
Correspondingly, the negative bus voltage Ubus-of the UPS and the neutral line voltage Uline N of the UPS are input to the fourth operational amplifier U4, a second operational amplifier signal is obtained after the operational amplification of the fourth operational amplifier U4, then the second operational amplifier signal and the input voltage peak value of the mains voltage are compared by the second comparator U6, a corresponding output signal is obtained, and finally the output signal of the second comparator U6 is pulled up by the second pull-up resistor Rn2, so that a second comparison signal is obtained.
It should be noted that, since the signals output by the first comparator U5 and the second comparator U6 are high-impedance signals, in this embodiment, the output signals of the first comparator U5 and the second comparator U6 are converted into high-level signals by using the first pull-up resistor Rn1 and the second pull-up resistor Rn2, respectively, so as to facilitate the analysis of the subsequent process.
Referring to fig. 6, fig. 6 is a block diagram of another signal acquisition module according to an embodiment of the invention. As a preferred embodiment, further comprising:
the first filter circuit is used for filtering the first operational amplifier signal;
and the second filter circuit is used for filtering the second operational amplifier signal.
In the actual operation process, in order to improve the accuracy and reliability of the output results of the first comparison signal and the second comparison signal, in this embodiment, a first filter circuit for filtering the output signal of the third operational amplifier U3 and a second filter circuit for filtering the output signal of the fourth operational amplifier U4 are further provided, so as to eliminate the interference signals existing in the output results of the third operational amplifier U3 and the fourth operational amplifier U4. Referring to fig. 6, in the present embodiment, the first filter circuit is built by using resistors R31, R32 and a capacitor C2, and the second filter circuit is built by using resistors R36, R37 and a capacitor C3.
As a preferred embodiment, further comprising:
the first anti-reverse circuit is arranged at the rear end of the first operational amplifier unit and used for preventing reverse flow of current in the first acquisition sub-module;
and the second anti-reverse circuit is arranged at the rear end of the second operational amplifier unit and used for preventing the reverse flow of the current in the second acquisition sub-module.
In the actual operation process, an anti-reverse circuit may also be provided in the first acquisition sub-module to prevent reverse flow of the current in the first acquisition sub-module. Referring to fig. 6, specifically, an anti-reverse diode D20 may be connected to the output end of the third operational amplifier U3 to prevent the reverse flow of the current in the first acquisition sub-module, and an anti-reverse diode D30 may be connected to the output end of the fourth operational amplifier U4 to prevent the reverse flow of the current in the second acquisition sub-module.
As a preferred embodiment, further comprising:
the first return difference module is used for eliminating signal jitter generated by the first acquisition sub-module in the operation process;
and the second return difference module is used for eliminating signal jitter generated by the second acquisition sub-module in the operation process.
In the actual operation process, a first return difference module and a second return difference module can be respectively arranged in the first acquisition sub-module and the second acquisition sub-module to eliminate the signal jitter phenomenon generated by the control circuit in the operation process.
Referring to fig. 6, a diode D21 and a resistor R33 in fig. 6 form a first return difference module for generating a first return voltage to eliminate a signal jitter phenomenon generated by an unstable signal in the operation process of the first acquisition sub-module; the diode D31 and the resistor R38 in fig. 6 form a second return difference module for generating a second return voltage to eliminate a signal jitter phenomenon generated by the second acquisition sub-module due to unstable signals during operation.
In order to enable those skilled in the art to clearly and clearly know the working principle of the control circuit for preventing the relay from being erroneously pulled, the embodiment is described in detail by using a specific example, and fig. 7 is a block diagram of another control circuit for preventing the relay from being erroneously pulled, which is provided in the embodiment of the present invention.
Assume that in fig. 7, the resistances of the resistors R11, R12, R13, R15, R16, R17, R21, R22, R23, R25, R26, R27, R41, R42, R43, R45, R46, and R47 are each 330kΩ, the resistances of the resistors R19, R29, and R49 are each 100kΩ, the resistances of the resistors R14, R18, R24, R28, R44, and R48 are each 10kΩ, the resistances of the resistors R1 and R2 are each 30kΩ, the resistances of the resistors R3 and R4 are each 10kΩ, the resistances of the resistors R01 and R02 are each 100kΩ, and the capacitance of the capacitor C1 is 105F; the resistance values of R5 and R7 are both 40KΩ, the resistance values of R6 and R8 are both 30KΩ, the resistance values of R31 and R36 are both 1KΩ, the capacitance values of C2 and C3 are both 104F, the resistance values of R32 and R37 are both 10KΩ, the resistance values of R33 and R38 are both 20KΩ, the resistance values of Rn1 and Rn2 are both 1KΩ, the resistance values of R34 and R39 are both 10KΩ, and the resistance values of R35 and R40 are both 20KΩ.
In fig. 7, the on state of the relay can be controlled only when the target control signal is active high, in which case it is necessary that both the target drive signal and the control signal of the DSP chip are high to make the target control signal high. Wherein the condition that the target driving signal is at high level is U b+ ＞U a And U is b- ＞U a 。
As can be seen from the setting parameters of the components in FIG. 7, although Uline N is the mains voltage, U is obtained after the deep filtering of the filter circuits R01, R02 and C1 a =15×ullinep/599, where ulline is the mains voltage; and U is b+ As the case may be, when the output of the comparator U4 is high, U b+ ＝400×U bus+ /13777; when the output of the comparator U4 is low, then U b+ ＝200×U bus+ /6589；U b- And U b+ As well as the calculation method of (c), are not described in detail herein.
When the control circuit is powered on, after the output signals of the first comparator U5 and the second comparator U6 are pulled up through the pull-up resistor, the and operation is performed through the lead, and then, the condition that the target control signal is set high is that: u (U) b+ ＞U a And U is b- ＞U a That is, only when U bus+ ＞0.8625Ulinep and U bus- At > 0.8625 ullinep, the output signal of the target control signal is high, in which case the relay is allowed to engage.
While U is b+ ＜U a When the output signal of the first comparator U5 jumps to a low level, i.e. when U bus When < 0.825Ulinep, the output signal of the first comparator U5 will transition to a low level. In summary, the condition that the target control signal is set high is that the bus voltage is not less than 0.8625 times of the peak value of the input voltage, and the return difference condition of the first comparator U5 and the second comparator U6 is that the bus voltage is less than 0.825 times of the peak value of the input voltage.
Obviously, in the control circuit for preventing the relay from being sucked by mistake provided by the embodiment, because the suction state of the relay is controlled by the DSP chip and the target driving signal together, the relay is equivalent to having a secondary protection circuit in the state, and the relay can be triggered to enter the suction state only under the condition that the control signal of the DSP chip is consistent with the target driving signal, thereby further reducing the probability of the relay to be sucked by mistake.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, so that the same or similar parts between the embodiments are referred to each other.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The above describes in detail a control circuit for preventing the relay from being erroneously attracted, and specific examples are applied to illustrate the principle and the implementation of the invention, and the description of the above examples is only used to help understand the method and the core idea of the invention; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.
Claims (10)
1. The control circuit is characterized by being applied to a UPS, wherein a relay for controlling the input or the cut-out of the mains voltage is arranged in the UPS, and the relay can receive a control signal sent by a DSP; the control circuit includes:
the voltage acquisition module is used for acquiring an input voltage peak value of the mains voltage;
the signal acquisition module is used for acquiring a target driving signal according to the positive bus voltage, the negative bus voltage and the input voltage peak value of the UPS;
and the relay control module is used for performing AND operation on the target driving signal and the control signal sent by the DSP to obtain a target control signal so as to control the suction state of the relay.
2. The control circuit of claim 1, wherein the voltage acquisition module comprises:
the voltage acquisition unit is used for acquiring the mains voltage;
and the voltage acquisition unit is used for acquiring the input voltage peak value according to the mains voltage.
3. Control circuit according to claim 1, characterized in that the relay control module is embodied as an and gate.
4. A control circuit according to any one of claims 1 to 3, wherein the signal acquisition module comprises:
the first acquisition submodule is used for obtaining a first comparison signal according to the positive bus voltage of the UPS and the input voltage peak value;
the second acquisition submodule is used for obtaining a second comparison signal according to the negative bus voltage of the UPS and the input voltage peak value;
and the logic operation unit is used for performing AND operation on the first comparison signal and the second comparison signal to obtain the target driving signal.
5. The control circuit of claim 4, wherein the first acquisition submodule comprises:
the first acquisition unit is used for acquiring the positive bus voltage of the UPS;
the first operational amplifier unit is used for carrying out operational amplification on the positive bus voltage of the UPS by utilizing a first operational amplifier to obtain a first operational amplifier signal;
the first comparison unit is used for comparing the first operational amplifier signal with the input voltage peak value to obtain the first comparison signal;
correspondingly, the second obtaining submodule includes:
the second acquisition unit is used for acquiring the negative bus voltage of the UPS;
the second operational amplifier unit is used for carrying out operational amplification on the negative bus voltage of the UPS by utilizing a second operational amplifier to obtain a second operational amplifier signal;
and the second comparison unit is used for comparing the second operational amplifier signal with the input voltage peak value to obtain the second comparison signal.
6. The control circuit of claim 5, further comprising:
the first filter circuit is used for filtering the first operational amplifier signal;
and the second filter circuit is used for filtering the second operational amplifier signal.
7. The control circuit of claim 5, further comprising:
the first anti-reverse circuit is arranged at the rear end of the first operational amplifier unit and is used for preventing reverse flow of current in the first acquisition submodule;
and the second anti-reverse circuit is arranged at the rear end of the second operational amplifier unit and is used for preventing the reverse flow of the current in the second acquisition sub-module.
8. The control circuit of claim 5, further comprising:
the first return difference module is used for eliminating signal jitter generated by the first acquisition sub-module in the operation process;
and the second return difference module is used for eliminating signal jitter generated by the second acquisition sub-module in the operation process.
9. The control circuit of claim 1, wherein the voltage acquisition module comprises: the first operational amplifier, the second operational amplifier, the first resistor, the second resistor, the third resistor, the fourth resistor, the first diode and the second diode;
the positive input end of the first operational amplifier is connected with the first end of the first resistor, the positive input end of the first operational amplifier is further used for receiving the mains voltage, the second end of the first resistor is connected with the output end of the first operational amplifier, the negative input end of the first operational amplifier is connected with the neutral line of the UPS and the first end of the second resistor, the second end of the second resistor is grounded, the output end of the first operational amplifier is respectively connected with the first end of the third resistor and the positive electrode of the first diode, the second end of the third resistor is respectively connected with the positive input end of the second operational amplifier and the first end of the fourth resistor, the second end of the fourth resistor is respectively connected with the output end of the second operational amplifier and the positive electrode of the second diode, the negative input end of the second operational amplifier is grounded, and the negative electrode of the first diode is connected with the negative electrode of the second diode.
10. The control circuit of claim 1, wherein the signal acquisition module comprises: the third operational amplifier, the fifth resistor, the sixth resistor, the first comparator, the first pull-up resistor, the fourth operational amplifier, the seventh resistor, the eighth resistor, the second comparator and the second pull-up resistor;
the positive input end of the third operational amplifier is connected with a positive bus of the UPS and the first end of the fifth resistor respectively, the second end of the fifth resistor is connected with the output end of the third operational amplifier, the negative input end of the third operational amplifier is connected with the neutral line of the UPS and the first end of the sixth resistor respectively, the second end of the sixth resistor is grounded, the output end of the third operational amplifier is connected with the negative input end of the first comparator, the negative input end of the first comparator is used for receiving the input voltage peak value, the output end of the first comparator is connected with the first end of the first pull-up resistor, and the second end of the first pull-up resistor is connected with a first target power supply;
the negative input end of the fourth operational amplifier is respectively connected with the neutral line of the UPS and the first end of the seventh resistor, the second end of the seventh resistor is connected with the output end of the fourth operational amplifier, the positive input end of the fourth operational amplifier is respectively connected with the negative bus of the UPS and the first end of the eighth resistor, the second end of the eighth resistor is grounded, the output end of the fourth operational amplifier is connected with the positive input end of the second comparator, the negative input end of the second comparator is used for receiving the input voltage peak value, the output end of the second comparator is connected with the first end of the second pull-up resistor, and the second end of the second pull-up resistor is connected with a second target power supply;
correspondingly, the first end of the first pull-up resistor is connected with the first end of the second pull-up resistor, and the first end of the second pull-up resistor are jointly formed into the output end of the signal acquisition module.
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| CN202010762633.1A CN112071698B (en) | 2020-07-31 | 2020-07-31 | Control circuit for preventing relay from being attracted by mistake |
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| CN202010762633.1A CN112071698B (en) | 2020-07-31 | 2020-07-31 | Control circuit for preventing relay from being attracted by mistake |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4246633A (en) * | 1979-02-09 | 1981-01-20 | General Signal Corporation | Voltage control circuitry for UPS |
| CN106410747A (en) * | 2015-07-28 | 2017-02-15 | 广东爱迪贝克软件科技有限公司 | Uninterrupted power supply (UPS) input protection circuit and UPS |
| CN207926268U (en) * | 2018-03-29 | 2018-09-28 | 厦门科华恒盛股份有限公司 | A kind of UPS circuits |
| CN108667126A (en) * | 2018-04-20 | 2018-10-16 | 厦门科华恒盛股份有限公司 | A kind of contactor method of controlling operation, system and UPS applied to UPS |
-
2020
- 2020-07-31 CN CN202010762633.1A patent/CN112071698B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4246633A (en) * | 1979-02-09 | 1981-01-20 | General Signal Corporation | Voltage control circuitry for UPS |
| CN106410747A (en) * | 2015-07-28 | 2017-02-15 | 广东爱迪贝克软件科技有限公司 | Uninterrupted power supply (UPS) input protection circuit and UPS |
| CN207926268U (en) * | 2018-03-29 | 2018-09-28 | 厦门科华恒盛股份有限公司 | A kind of UPS circuits |
| CN108667126A (en) * | 2018-04-20 | 2018-10-16 | 厦门科华恒盛股份有限公司 | A kind of contactor method of controlling operation, system and UPS applied to UPS |
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