CN112071698A - Control circuit for preventing error suction of relay - Google Patents
Control circuit for preventing error suction of relay Download PDFInfo
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- CN112071698A CN112071698A CN202010762633.1A CN202010762633A CN112071698A CN 112071698 A CN112071698 A CN 112071698A CN 202010762633 A CN202010762633 A CN 202010762633A CN 112071698 A CN112071698 A CN 112071698A
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- resistor
- operational amplifier
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- voltage
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H47/00—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
- H01H47/001—Functional circuits, e.g. logic, sequencing, interlocking circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H47/00—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
- H01H47/22—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for supplying energising current for relay coil
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H11/00—Emergency protective circuit arrangements for preventing the switching-on in case an undesired electric working condition might result
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
- H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
- H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electronic Switches (AREA)
- Measurement Of Current Or Voltage (AREA)
Abstract
The application discloses a control circuit for preventing a relay from being pulled in by mistake, which is applied to a UPS (uninterrupted power supply), wherein the UPS is provided with a relay for controlling the input or cut-out of mains voltage, and the relay can receive a control signal sent by a DSP (digital signal processor); the control circuit includes: the voltage acquisition module is used for acquiring an input voltage peak value of the mains voltage; the signal acquisition module is used for acquiring a target driving signal according to the positive bus voltage, the negative bus voltage and the input voltage peak value of the UPS; and the relay control module is used for carrying out AND operation on the target driving signal and the control signal sent by the DSP to obtain a target control signal so as to control the suction state of the relay. Obviously, because the pull-in state of the relay is controlled by the DSP chip and the target driving signal together, the relay is equivalent to have a secondary protection circuit in the state, and therefore the probability of error pull-in of the relay is further reduced.
Description
Technical Field
The invention relates to the technical field of relays, in particular to a control circuit for preventing a relay from being sucked by mistake.
Background
A relay is a common current control switch, and in an UPS (uninterruptible Power Supply) control system, the relay is often used to control the switching on or off of the commercial Power. Referring to fig. 1, fig. 1 is a structural diagram of a UPS in the prior art, wherein an actuation state of a relay K is generally controlled by a control Signal sent by a DSP (Digital Signal Process). Under this operating mechanism, if DSP triggers relay K by mistake and gets into the actuation state, then can burn out fuse F gently, then the damage appears in the switch tube that leads to in the UPS heavily, so not only can influence UPS's steady operation, moreover, also can give people and bring huge economic loss. At present, no effective solution exists for the technical problem.
Therefore, how to further reduce the probability of the false attraction of the relay is a technical problem to be solved urgently by the technical personnel in the field.
Disclosure of Invention
In view of the above, the present invention provides a control circuit for preventing a relay from being erroneously pulled in, so as to further reduce the probability of the relay being erroneously pulled in. The specific scheme is as follows:
a control circuit for preventing a relay from being pulled in by mistake is applied to a UPS, wherein the UPS is provided with a relay for controlling the input or cut-out of mains voltage, and the relay can receive a control signal sent by a DSP; the control circuit includes:
the voltage acquisition module is used for acquiring an input voltage peak value of the mains voltage;
the signal acquisition module is used for obtaining a target driving signal according to the positive bus voltage, the negative bus voltage and the input voltage peak value of the UPS;
and the relay control module is used for performing AND operation on the target driving signal and the control signal sent by the DSP to obtain a target control signal so as to control the suction state of the relay.
Preferably, the voltage acquisition module includes:
the voltage acquisition unit is used for acquiring the mains supply voltage;
and the voltage acquisition unit is used for acquiring the input voltage peak value according to the mains voltage.
Preferably, the relay control module is specifically an and gate.
Preferably, the signal acquisition module includes:
the first obtaining submodule is used for obtaining a first comparison signal according to the positive bus voltage of the UPS and the input voltage peak value;
the second obtaining submodule is used for obtaining a second comparison signal according to the negative bus voltage of the UPS and the input voltage peak value;
and the logic operation unit is used for performing a line AND operation on the first comparison signal and the second comparison signal to obtain the target driving signal.
Preferably, the first obtaining sub-module includes:
the first acquisition unit is used for acquiring the positive bus voltage of the UPS;
the first operational amplifier unit is used for carrying out operational amplification on the positive bus voltage of the UPS by using a first operational amplifier to obtain a first operational amplifier signal;
the first comparison unit is used for comparing the first operational amplifier signal with the input voltage peak value to obtain a first comparison signal;
correspondingly, the second obtaining sub-module includes:
the second acquisition unit is used for acquiring the negative bus voltage of the UPS;
the second operational amplifier unit is used for carrying out operational amplification on the negative bus voltage of the UPS by using a second operational amplifier to obtain a second operational amplifier signal;
and the second comparison unit is used for comparing the second operational amplifier signal with the input voltage peak value to obtain a second comparison signal.
Preferably, the method further comprises the following steps:
the first filter circuit is used for filtering the first operational amplifier signal;
and the second filter circuit is used for filtering the second operational amplifier signal.
Preferably, the method further comprises the following steps:
the first anti-reverse circuit is arranged at the rear end of the first operational amplifier unit and used for preventing the reverse flow of current in the first acquisition submodule;
and the second anti-reverse circuit is arranged at the rear end of the second operational amplifier unit and is used for preventing the reverse flow of the current in the second acquisition submodule.
Preferably, the method further comprises the following steps:
the first return difference module is used for eliminating signal jitter generated by the first acquisition submodule in the operation process;
and the second return difference module is used for eliminating signal jitter generated by the second acquisition submodule in the operation process.
Preferably, the voltage acquisition module includes: the circuit comprises a first operational amplifier, a second operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a first diode and a second diode;
wherein a positive input terminal of the first operational amplifier is connected to a first terminal of the first resistor, and, the positive input end of the first operational amplifier is further used for receiving the mains voltage, the second end of the first resistor is connected with the output end of the first operational amplifier, the negative input terminal of the first operational amplifier is connected to the neutral line of the UPS and the first terminal of the second resistor, the second end of the second resistor is grounded, the output end of the first operational amplifier is respectively connected with the first end of the third resistor and the anode of the first diode, the second end of the third resistor is connected to the positive input end of the second operational amplifier and the first end of the fourth resistor respectively, the second end of the fourth resistor is respectively connected with the output end of the second operational amplifier and the anode of the second diode, the negative input end of the second operational amplifier is grounded, and the negative electrode of the first diode is connected with the negative electrode of the second diode.
Preferably, the signal acquisition module includes: the circuit comprises a third operational amplifier, a fifth resistor, a sixth resistor, a first comparator, a first pull-up resistor, a fourth operational amplifier, a seventh resistor, an eighth resistor, a second comparator and a second pull-up resistor;
a positive input end of the third operational amplifier is connected to a positive bus of the UPS and a first end of the fifth resistor, a second end of the fifth resistor is connected to an output end of the third operational amplifier, a negative input end of the third operational amplifier is connected to a neutral line of the UPS and a first end of the sixth resistor, a second end of the sixth resistor is grounded, an output end of the third operational amplifier is connected to a positive input end of the first comparator, a negative input end of the first comparator is configured to receive the input voltage peak, an output end of the first comparator is connected to a first end of the first pull-up resistor, and a second end of the first pull-up resistor is connected to a first target power supply;
a negative input end of the fourth operational amplifier is connected with a neutral line of the UPS and a first end of the seventh resistor, a second end of the seventh resistor is connected with an output end of the fourth operational amplifier, a positive input end of the fourth operational amplifier is connected with a negative bus of the UPS and a first end of the eighth resistor, a second end of the eighth resistor is grounded, an output end of the fourth operational amplifier is connected with a positive input end of the second comparator, a negative input end of the second comparator is used for receiving the input voltage peak value, an output end of the second comparator is connected with a first end of the second pull-up resistor, and a second end of the second pull-up resistor is connected with a second target power supply;
correspondingly, the first end of the first pull-up resistor is connected with the first end of the second pull-up resistor, and the first end of the first pull-up resistor and the first end of the second pull-up resistor are connected to form the output end of the signal acquisition module.
Therefore, in the control circuit provided by the invention, firstly, the voltage acquisition module is used for acquiring the input voltage peak value of the mains voltage, then, the signal acquisition module is used for acquiring a target driving signal according to the positive bus voltage, the negative bus voltage and the input voltage peak value of the mains voltage of the UPS, and finally, the relay control module is used for carrying out AND operation on the target driving signal and the control signal sent by the DSP to obtain a target control signal so as to control the pull-in state of the relay. Obviously, in the control circuit provided by the invention, because the pull-in state of the relay is controlled by the DSP chip and the target driving signal together, the relay is equivalent to have a secondary protection circuit in the state, that is, the relay can be triggered to enter the pull-in state only under the condition that the control signal of the DSP chip is consistent with the target driving signal, so that the probability of error pull-in of the relay is further reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a block diagram of a prior art UPS;
fig. 2 is a structural diagram of a control circuit for preventing a relay from being pulled in by mistake according to an embodiment of the present invention;
fig. 3 is a structural diagram of a voltage obtaining module according to an embodiment of the present invention;
FIG. 4 is a block diagram of another voltage acquisition module according to an embodiment of the present invention;
fig. 5 is a structural diagram of a signal obtaining module according to an embodiment of the present invention;
fig. 6 is a block diagram of another signal acquisition module according to an embodiment of the present invention;
fig. 7 is a structural diagram of another control circuit for preventing the relay from being pulled in by mistake according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 2, fig. 2 is a structural diagram of a control circuit for preventing a relay from being pulled in by mistake according to an embodiment of the present invention, the control circuit is applied to a UPS, the UPS is provided with a relay for controlling the input or cut-out of a mains voltage, and the relay receives a control signal sent by a DSP; the control circuit includes:
the voltage acquisition module 11 is configured to acquire an input voltage peak of the mains voltage;
the signal acquisition module 12 is configured to obtain a target driving signal according to a positive bus voltage, a negative bus voltage, and an input voltage peak of the UPS;
and the relay control module 13 is used for performing and operation on the target driving signal and the control signal sent by the DSP to obtain a target control signal so as to control the attraction state of the relay.
In this embodiment, a control circuit for preventing the relay from being erroneously pulled in is provided, and the probability of the erroneous pulling in of the relay can be further reduced through the protection circuit. The control circuit provided by the embodiment is applied to the UPS, the UPS is provided with a relay for controlling the input or cut-out of the mains voltage, and the relay also receives a control signal sent by the DSP, namely, the pull-in or cut-off state of the relay is controlled by the DSP.
In the control circuit, a voltage acquisition module 11, a signal acquisition module 12 and a relay control module 13 are provided. Specifically, the voltage obtaining module 11 is configured to obtain an input voltage peak value of the mains voltage, and the signal obtaining module 12 is configured to obtain a target driving signal according to the positive bus voltage, the negative bus voltage of the UPS, and the input voltage peak value of the mains voltage, where a comparison signal is obtained by comparing the positive bus voltage of the UPS with the mains voltage, a comparison signal is obtained by comparing the negative bus voltage of the UPS with the mains voltage, and then the target driving signal is obtained by performing and operation on the comparison signal. After the signal obtaining module 12 obtains the target driving signal, the relay control module 13 performs an and operation on the target driving signal and the control signal sent by the DSP to obtain a target control signal, and controls the pull-in state of the relay according to the target control signal.
Obviously, under such a setting mechanism, the relay control module 13 will output a target control signal for controlling the relay to pull in only if the target driving signal is consistent with the control signal sent by the DSP to the relay. That is to say, in the control circuit provided in this embodiment, since the pull-in state of the relay is controlled by the DSP chip and the target driving signal together, in this state, the relay is equivalent to having a secondary protection circuit, and only under the condition that the control signal sent by the DSP to the relay is consistent with the target driving signal, the relay can be triggered to enter the pull-in state, so that the phenomenon that the relay enters the pull-in state due to the DSP sending an error signal to the relay can be effectively avoided.
It can be seen that, in the control circuit provided in this embodiment, first, the voltage obtaining module is used to obtain the input voltage peak value of the mains voltage, then, the signal obtaining module is used to obtain the target driving signal according to the positive bus voltage, the negative bus voltage of the UPS and the input voltage peak value of the mains voltage, and finally, the relay control module is used to perform and operation on the target driving signal and the control signal sent by the DSP to obtain the target control signal, so as to control the pull-in state of the relay. Obviously, in the control circuit provided in this embodiment, since the pull-in state of the relay is controlled by the DSP chip and the target driving signal together, in this state, the relay is equivalent to having a secondary protection circuit, that is, only under the condition that the control signal of the DSP chip is consistent with the target driving signal, the relay can be triggered to enter the pull-in state, so that the probability of the false pull-in of the relay is further reduced.
Based on the above embodiment, this embodiment further describes and optimizes the technical solution, and as a preferred implementation, the voltage obtaining module 11 includes:
the voltage acquisition unit is used for acquiring mains supply voltage;
and the voltage acquisition unit is used for acquiring an input voltage peak value according to the mains voltage.
In practical application, in order to obtain the input voltage peak value of the mains voltage, firstly, the voltage acquisition unit is used for acquiring the mains voltage, and then, the voltage acquisition unit is used for obtaining the input voltage peak value of the mains voltage according to the acquired mains voltage. In the process of obtaining the input voltage peak value of the mains voltage, firstly, an input voltage peak value of the mains voltage on a sine wave positive half shaft and an input voltage peak value of the mains voltage on a sine wave negative half shaft need to be obtained respectively, and then, the input voltage peak value of the mains voltage is obtained according to the input voltage peak value of the mains voltage on the sine wave positive half shaft and the input voltage peak value of the mains voltage on the sine wave negative half shaft.
Referring to fig. 3, fig. 3 is a structural diagram of a voltage obtaining module according to an embodiment of the present invention. As a preferred embodiment, the voltage acquisition module 11 includes: the circuit comprises a first operational amplifier U1, a second operational amplifier U2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first diode D01 and a second diode D02;
the positive input end of the first operational amplifier U1 is connected to the first end of the first resistor R1, the positive input end of the first operational amplifier U1 is further configured to receive a mains voltage, the second end of the first resistor R1 is connected to the output end of the first operational amplifier U1, the negative input end of the first operational amplifier U1 is connected to a neutral line of the UPS and the first end of the second resistor R2, the second end of the second resistor R2 is grounded, the output end of the first operational amplifier U1 is connected to the first end of the third resistor R3 and the positive electrode of the first diode D01, the second end of the third resistor R3 is connected to the positive input end of the second operational amplifier U2 and the first end of the fourth resistor R4, the second end of the fourth resistor R4 is connected to the output end of the second operational amplifier U2 and the positive electrode of the second diode D02, the negative input end of the second operational amplifier U2 is grounded, and the negative electrode of the first diode D01 and the negative electrode 02D 01.
In this embodiment, in order to facilitate the subsequent processing flow, in this embodiment, the a-phase voltage LINEA in the mains voltage is used to replace the mains voltage, the neutral line voltage of the UPS is Uline N, when the mains voltage and the Uline N are input to the first operational amplifier U1, the first operational amplifier U1 performs operational amplification on the mains voltage and the neutral line voltage of the UPS, and obtains an input voltage peak value of the mains voltage on the positive half-axis of the sine wave, and the second operational amplifier U2 is equivalent to the first inverter, that is, after an output signal of the first operational amplifier U1 is subjected to operational amplification by the second operational amplifier U2, an input voltage peak value of the mains voltage on the negative half-axis of the sine wave can be obtained, and then, after the input voltage peak value of the mains voltage on the positive half-axis of the sine wave and the input voltage peak value of the mains voltage on the negative half-axis of the sine wave pass through the first diode D01 and the second diode D02, the peak value of the input voltage of the mains voltage is obtained.
Referring to fig. 4, fig. 4 is a structural diagram of another voltage obtaining module according to an embodiment of the present invention. In practical operation, sampling resistors R11, R12, R13, R14, R15, R16, R17, R18 and R19 may be connected to the positive input terminal and the negative input terminal of the first operational amplifier U1. In addition, in order to avoid the influence of the harmonic waves in the mains supply on the measurement result, a filter circuit can be arranged at the output end of the second operational amplifier U2, wherein the resistors R01, R02 and the capacitor C01 form the filter circuit for filtering the mains supply voltage.
Based on the above embodiments, the present embodiment further describes and optimizes the technical solution, and as a preferred implementation, the relay control module 13 is specifically an and gate.
In this embodiment, the relay control module 13 is configured as an and gate, because the and gate of the logic circuit not only can implement reliable logical and operation, but also has the advantage of low cost, when the relay control module 13 is configured as an and gate, the design cost required by the control circuit can be further reduced.
Based on the foregoing embodiments, this embodiment further describes and optimizes the technical solution, and as a preferred implementation, the signal obtaining module includes:
the first obtaining submodule is used for obtaining a first comparison signal according to the positive bus voltage and the input voltage peak value of the UPS;
the second obtaining submodule is used for obtaining a second comparison signal according to the negative bus voltage of the UPS and the input voltage peak value;
and the logic operation unit is used for performing a linear AND operation on the first comparison signal and the second comparison signal to obtain a target driving signal.
In this embodiment, in order to obtain the target driving signal, a first obtaining submodule, a second obtaining submodule and a logical operation module are arranged in the signal obtaining module. In the process of obtaining the target driving signal, the first obtaining sub-module obtains a first comparison signal according to a positive bus voltage of the UPS and an input voltage peak value of a mains voltage, the second obtaining sub-module obtains a second comparison signal according to a negative bus voltage of the UPS and the input voltage peak value of the mains voltage, and then the logic operation unit performs line and operation on the first comparison signal and the second comparison signal to obtain the target driving signal.
As a preferred embodiment, the first obtaining sub-module includes:
the first acquisition unit is used for acquiring the positive bus voltage of the UPS;
the first operational amplifier unit is used for carrying out operational amplification on the positive bus voltage of the UPS by utilizing a first operational amplifier to obtain a first operational amplifier signal;
the first comparison unit is used for comparing the first operational amplifier signal with the input voltage peak value to obtain a first comparison signal;
correspondingly, the second obtaining sub-module comprises:
the second acquisition unit is used for acquiring the negative bus voltage of the UPS;
the second operational amplifier unit is used for carrying out operational amplification on the negative bus voltage of the UPS by using a second operational amplifier to obtain a second operational amplifier signal;
and the second comparison unit is used for comparing the second operational amplifier signal with the input voltage peak value to obtain a second comparison signal.
In this embodiment, the first obtaining submodule and the second obtaining submodule are set to be functional modules with the same structural form, so that the setting difficulty of the control circuit can be reduced, and the stability of the control circuit in the operation process can be improved.
In addition, in order to improve the measurement accuracy of the first comparison signal and the second comparison signal, in the present embodiment, the positive bus voltage and the negative bus voltage of the UPS are respectively operated and amplified by the first operational amplifier unit and the second operational amplifier unit.
Referring to fig. 5, fig. 5 is a structural diagram of a signal acquisition module according to an embodiment of the present invention; as a preferred embodiment, the signal acquisition module 12 includes: a third operational amplifier U3, a fifth resistor R5, a sixth resistor R6, a first comparator U5, a first pull-up resistor Rn1, a fourth operational amplifier U4, a seventh resistor R7, an eighth resistor R8, a second comparator U6 and a second pull-up resistor Rn 2;
the positive input end of a third operational amplifier U3 is connected with a positive bus of the UPS and the first end of a fifth resistor R5, the second end of a fifth resistor R5 is connected with the output end of the third operational amplifier U3, the negative input end of the third operational amplifier U3 is connected with the neutral line of the UPS and the first end of a sixth resistor R6, the second end of the sixth resistor R6 is grounded, the output end of the third operational amplifier U3 is connected with the positive input end of a first comparator U5, the negative input end of the first comparator U5 is used for receiving an input voltage peak value, the output end of the first comparator U5 is connected with the first end of a first pull-up resistor Rn1, and the second end of the first pull-up resistor Rn1 is connected with a first target power supply;
a negative input end of a fourth operational amplifier U4 is connected with a neutral line of the UPS and a first end of a seventh resistor R7 respectively, a second end of a seventh resistor R7 is connected with an output end of the fourth operational amplifier U4, a positive input end of the fourth operational amplifier U4 is connected with a negative bus of the UPS and a first end of an eighth resistor R8 respectively, a second end of an eighth resistor R8 is grounded, an output end of the fourth operational amplifier U4 is connected with a positive input end of a second comparator U6, a negative input end of the second comparator U6 is used for receiving an input voltage peak value, an output end of the second comparator U6 is connected with a first end of a second pull-up resistor Rn2, and a second end of the second pull-up resistor Rn2 is connected with a second target power supply;
correspondingly, a first end of the first pull-up resistor Rn1 and a first end of the second pull-up resistor Rn2 are connected, and together form an output end of the signal acquisition module.
In this embodiment, a specific setting manner of the signal obtaining module is provided, that is, firstly, the positive bus voltage Ubus + of the UPS and the neutral line voltage Uline N of the UPS are input to the third operational amplifier U3, and after the positive bus voltage Ubus + and the neutral line voltage Uline N of the UPS are subjected to operational amplification by the third operational amplifier U3, the first operational amplifier signal U is obtainedb+Then, the first operational amplifier signal U is amplified by the first comparator U5b+And the input voltage peak value U of the mains voltageaAnd finally, the output signal of the first comparator U5 is pulled up by using a first pull-up resistor Rn1 to obtain a first comparison signal.
Correspondingly, the negative bus voltage Ubus-of the UPS and the neutral line voltage Uline N of the UPS are input to the fourth operational amplifier U4, and a second operational amplifier signal U is obtained after the fourth operational amplifier U4 is operated and amplifiedb-Then, the second operational amplifier signal U is amplified by the second comparator U6b-And the input voltage peak value U of the mains voltageaAnd finally, the output signal of the second comparator U6 is pulled up by using a second pull-up resistor Rn2 to obtain a second comparison signal.
It should be noted that, since the signals output by the first comparator U5 and the second comparator U6 are high-impedance signals, in this embodiment, the output signals of the first comparator U5 and the second comparator U6 are converted into high-level signals by the first pull-up resistor Rn1 and the second pull-up resistor Rn2, respectively, so as to facilitate analysis of subsequent processes.
Referring to fig. 6, fig. 6 is a structural diagram of another signal acquisition module according to an embodiment of the present invention. As a preferred embodiment, the method further comprises:
the first filter circuit is used for filtering the first operational amplifier signal;
and the second filter circuit is used for filtering the second operational amplifier signal.
In practical operation, in order to improve the accuracy and reliability of the output results of the first comparison signal and the second comparison signal, in this embodiment, a first filter circuit for filtering the output signal of the third operational amplifier U3 and a second filter circuit for filtering the output signal of the fourth operational amplifier U4 are further provided, so as to eliminate the interference signals existing in the output results of the third operational amplifier U3 and the fourth operational amplifier U4. Referring to fig. 6, in this embodiment, a first filter circuit is built by using resistors R31 and R32 and a capacitor C2, and a second filter circuit is built by using resistors R36 and R37 and a capacitor C3.
As a preferred embodiment, the method further comprises:
the first anti-reverse circuit is arranged at the rear end of the first operational amplifier unit and used for preventing the reverse flow of current in the first acquisition submodule;
and the second anti-reverse circuit is arranged at the rear end of the second operational amplifier unit and is used for preventing the reverse flow of the current in the second acquisition submodule.
In actual operation, a reverse prevention circuit can be arranged in the first acquisition sub-module to prevent the reverse flow of current in the first acquisition sub-module. Referring to fig. 6, specifically, an anti-reverse diode D20 may be connected to an output terminal of the third operational amplifier U3 to prevent the reverse flow of current in the first acquisition sub-module, and an anti-reverse diode D30 may be connected to an output terminal of the fourth operational amplifier U4 to prevent the reverse flow of current in the second acquisition sub-module.
As a preferred embodiment, the method further comprises:
the first return difference module is used for eliminating signal jitter generated by the first acquisition submodule in the operation process;
and the second return difference module is used for eliminating signal jitter generated by the second acquisition submodule in the operation process.
In the actual operation process, a first return difference module and a second return difference module can be respectively arranged in the first acquisition submodule and the second acquisition submodule to eliminate the signal jitter phenomenon generated in the operation process of the control circuit.
Referring to fig. 6, a diode D21 and a resistor R33 in fig. 6 form a first return difference module for generating a first return voltage to eliminate a signal jitter phenomenon generated by signal instability of the first acquisition submodule during operation; the diode D31 and the resistor R38 in fig. 6 form a second return difference module for generating a second return voltage to eliminate the signal jitter phenomenon generated by the signal instability of the second acquisition submodule during operation.
In order to make those skilled in the art clearly and clearly know the working principle of the control circuit for preventing the relay from being pulled in by mistake, this embodiment is described in detail by a specific example, please refer to fig. 7, and fig. 7 is a structural diagram of another control circuit for preventing the relay from being pulled in by mistake provided by the embodiment of the present invention.
It is assumed in fig. 7 that the resistances of the resistors R11, R12, R13, R15, R16, R17, R21, R22, R23, R25, R26, R27, R41, R42, R43, R45, R46, and R47 are all 330K Ω, the resistances of the resistors R19, R29, and R49 are all 100K Ω, the resistances of the resistors R14, R18, R24, R28, R44, and R48 are all 10K Ω, the resistances of the resistors R1 and R2 are all 30K Ω, the resistances of the resistors R3 and R4 are all 10K Ω, the resistances of the resistors R01 and R02 are all 100K Ω, and the capacitance value of the capacitor C1 is 105F; the resistance values of R5 and R7 are both 40K Ω, the resistance values of R6 and R8 are both 30K Ω, the resistance values of R31 and R36 are both 1K Ω, the capacitance values of C2 and C3 are both 104F, the resistance values of R32 and R37 are both 10K Ω, the resistance values of R33 and R38 are both 20K Ω, the resistance values of Rn1 and Rn2 are both 1K Ω, the resistance values of R34 and R39 are both 10K Ω, and the resistance values of R35 and R40 are both 20K Ω.
In fig. 7, the pull-in state of the relay can be controlled only when the target control signal is active at a high level, in which case it is thenThe target control signal is high level only if the target driving signal and the control signal of the DSP chip are high level. Wherein, the condition that the target driving signal is at high level is that: u shapeb+＞UaAnd U isb-＞Ua。
As can be seen from the setting parameters of the components in fig. 7, U is obtained after the deep filtering of the filter circuits R01, R02 and C1, although Uline N is the mains voltagea15 × Ulinep/599, wherein Uline is mains voltage; and Ub+When the output of the comparator U4 is high, then U is assertedb+＝400×Ubus+13777; when the output of comparator U4 is low, then Ub+＝200×Ubus+/6589；Ub-And Ub+The calculation method is the same, and will not be described in detail here.
When the control circuit is powered on, after the output signals of the first comparator U5 and the second comparator U6 are pulled up by the pull-up resistor, the wired and operation is performed through the conducting wire, and then the target control signal is set to be high if: u shapeb+＞UaAnd U isb-＞UaI.e. only when U is presentbus+0.8625Ulinep and Ubus-When the output signal of the target control signal is high level and is greater than 0.8625 Ulinenp, the relay can be allowed to pull in the condition.
When U is formedb+＜UaThe output signal of the first comparator U5 jumps low again, i.e. when U is assertedbusBelow 0.825Ulinep, the output signal of the first comparator U5 transitions low. In summary, the condition that the target control signal is set high is that the bus voltage is not less than 0.8625 times the peak value of the input voltage, and the condition that the first comparator U5 and the second comparator U6 have a back difference is that the bus voltage is less than 0.825 times the peak value of the input voltage.
Obviously, in the control circuit for preventing the relay from being mistakenly attracted provided by the embodiment, because the attraction state of the relay is controlled by the DSP chip and the target driving signal together, under the state, the relay is equivalent to have a secondary protection circuit, and only under the condition that the control signal of the DSP chip is consistent with the target driving signal, the relay can be triggered to enter the attraction state, so that the probability of the relay being mistakenly attracted can be further reduced.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The control circuit for preventing the relay from being pulled in by mistake provided by the invention is described in detail, a specific example is applied in the control circuit to explain the principle and the implementation mode of the invention, and the description of the embodiment is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. A control circuit for preventing a relay from being pulled in by mistake is characterized in that the control circuit is applied to a UPS, a relay for controlling the input or cut-out of mains voltage is arranged in the UPS, and the relay can receive a control signal sent by a DSP; the control circuit includes:
the voltage acquisition module is used for acquiring an input voltage peak value of the mains voltage;
the signal acquisition module is used for obtaining a target driving signal according to the positive bus voltage, the negative bus voltage and the input voltage peak value of the UPS;
and the relay control module is used for performing AND operation on the target driving signal and the control signal sent by the DSP to obtain a target control signal so as to control the suction state of the relay.
2. The control circuit of claim 1, wherein the voltage acquisition module comprises:
the voltage acquisition unit is used for acquiring the mains supply voltage;
and the voltage acquisition unit is used for acquiring the input voltage peak value according to the mains voltage.
3. The control circuit according to claim 1, wherein the relay control module is embodied as an and gate.
4. The control circuit of any one of claims 1 to 3, wherein the signal acquisition module comprises:
the first obtaining submodule is used for obtaining a first comparison signal according to the positive bus voltage of the UPS and the input voltage peak value;
the second obtaining submodule is used for obtaining a second comparison signal according to the negative bus voltage of the UPS and the input voltage peak value;
and the logic operation unit is used for performing a line AND operation on the first comparison signal and the second comparison signal to obtain the target driving signal.
5. The control circuit of claim 4, wherein the first acquisition submodule comprises:
the first acquisition unit is used for acquiring the positive bus voltage of the UPS;
the first operational amplifier unit is used for carrying out operational amplification on the positive bus voltage of the UPS by using a first operational amplifier to obtain a first operational amplifier signal;
the first comparison unit is used for comparing the first operational amplifier signal with the input voltage peak value to obtain a first comparison signal;
correspondingly, the second obtaining sub-module includes:
the second acquisition unit is used for acquiring the negative bus voltage of the UPS;
the second operational amplifier unit is used for carrying out operational amplification on the negative bus voltage of the UPS by using a second operational amplifier to obtain a second operational amplifier signal;
and the second comparison unit is used for comparing the second operational amplifier signal with the input voltage peak value to obtain a second comparison signal.
6. The control circuit of claim 5, further comprising:
the first filter circuit is used for filtering the first operational amplifier signal;
and the second filter circuit is used for filtering the second operational amplifier signal.
7. The control circuit of claim 5, further comprising:
the first anti-reverse circuit is arranged at the rear end of the first operational amplifier unit and used for preventing the reverse flow of current in the first acquisition submodule;
and the second anti-reverse circuit is arranged at the rear end of the second operational amplifier unit and is used for preventing the reverse flow of the current in the second acquisition submodule.
8. The control circuit of claim 5, further comprising:
the first return difference module is used for eliminating signal jitter generated by the first acquisition submodule in the operation process;
and the second return difference module is used for eliminating signal jitter generated by the second acquisition submodule in the operation process.
9. The control circuit of claim 1, wherein the voltage acquisition module comprises: the circuit comprises a first operational amplifier, a second operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a first diode and a second diode;
wherein a positive input terminal of the first operational amplifier is connected to a first terminal of the first resistor, and, the positive input end of the first operational amplifier is further used for receiving the mains voltage, the second end of the first resistor is connected with the output end of the first operational amplifier, the negative input terminal of the first operational amplifier is connected to the neutral line of the UPS and the first terminal of the second resistor, the second end of the second resistor is grounded, the output end of the first operational amplifier is respectively connected with the first end of the third resistor and the anode of the first diode, the second end of the third resistor is connected to the positive input end of the second operational amplifier and the first end of the fourth resistor respectively, the second end of the fourth resistor is respectively connected with the output end of the second operational amplifier and the anode of the second diode, the negative input end of the second operational amplifier is grounded, and the negative electrode of the first diode is connected with the negative electrode of the second diode.
10. The control circuit of claim 1, wherein the signal acquisition module comprises: the circuit comprises a third operational amplifier, a fifth resistor, a sixth resistor, a first comparator, a first pull-up resistor, a fourth operational amplifier, a seventh resistor, an eighth resistor, a second comparator and a second pull-up resistor;
a positive input end of the third operational amplifier is connected to a positive bus of the UPS and a first end of the fifth resistor, a second end of the fifth resistor is connected to an output end of the third operational amplifier, a negative input end of the third operational amplifier is connected to a neutral line of the UPS and a first end of the sixth resistor, a second end of the sixth resistor is grounded, an output end of the third operational amplifier is connected to a positive input end of the first comparator, a negative input end of the first comparator is configured to receive the input voltage peak, an output end of the first comparator is connected to a first end of the first pull-up resistor, and a second end of the first pull-up resistor is connected to a first target power supply;
a negative input end of the fourth operational amplifier is connected with a neutral line of the UPS and a first end of the seventh resistor, a second end of the seventh resistor is connected with an output end of the fourth operational amplifier, a positive input end of the fourth operational amplifier is connected with a negative bus of the UPS and a first end of the eighth resistor, a second end of the eighth resistor is grounded, an output end of the fourth operational amplifier is connected with a positive input end of the second comparator, a negative input end of the second comparator is used for receiving the input voltage peak value, an output end of the second comparator is connected with a first end of the second pull-up resistor, and a second end of the second pull-up resistor is connected with a second target power supply;
correspondingly, the first end of the first pull-up resistor is connected with the first end of the second pull-up resistor, and the first end of the first pull-up resistor and the first end of the second pull-up resistor are connected to form the output end of the signal acquisition module.
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| CN202010762633.1A CN112071698B (en) | 2020-07-31 | 2020-07-31 | Control circuit for preventing relay from being attracted by mistake |
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| CN202010762633.1A CN112071698B (en) | 2020-07-31 | 2020-07-31 | Control circuit for preventing relay from being attracted by mistake |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4246633A (en) * | 1979-02-09 | 1981-01-20 | General Signal Corporation | Voltage control circuitry for UPS |
| CN106410747A (en) * | 2015-07-28 | 2017-02-15 | 广东爱迪贝克软件科技有限公司 | Uninterrupted power supply (UPS) input protection circuit and UPS |
| CN207926268U (en) * | 2018-03-29 | 2018-09-28 | 厦门科华恒盛股份有限公司 | A kind of UPS circuits |
| CN108667126A (en) * | 2018-04-20 | 2018-10-16 | 厦门科华恒盛股份有限公司 | A kind of contactor method of controlling operation, system and UPS applied to UPS |
-
2020
- 2020-07-31 CN CN202010762633.1A patent/CN112071698B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4246633A (en) * | 1979-02-09 | 1981-01-20 | General Signal Corporation | Voltage control circuitry for UPS |
| CN106410747A (en) * | 2015-07-28 | 2017-02-15 | 广东爱迪贝克软件科技有限公司 | Uninterrupted power supply (UPS) input protection circuit and UPS |
| CN207926268U (en) * | 2018-03-29 | 2018-09-28 | 厦门科华恒盛股份有限公司 | A kind of UPS circuits |
| CN108667126A (en) * | 2018-04-20 | 2018-10-16 | 厦门科华恒盛股份有限公司 | A kind of contactor method of controlling operation, system and UPS applied to UPS |
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