CN110048627A - The modulator approach of the multi-electrical level inverter of non-common mode voltage - Google Patents
The modulator approach of the multi-electrical level inverter of non-common mode voltage Download PDFInfo
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- CN110048627A CN110048627A CN201910266434.9A CN201910266434A CN110048627A CN 110048627 A CN110048627 A CN 110048627A CN 201910266434 A CN201910266434 A CN 201910266434A CN 110048627 A CN110048627 A CN 110048627A
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- H02J3/383—
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/56—Power conversion systems, e.g. maximum power point trackers
Abstract
The present invention provides a kind of modulator approaches of the multi-electrical level inverter of non-common mode voltage, belong to the modulation technique field of multi-electrical level inverter, including will modulate Wave Decomposition, and the modulating wave after decomposition subtracts each other two-by-two is equal to former modulating wave；Modulating wave after decomposition is subjected to the effect vector that one-dimensional space Vector Modulation obtains the synthesis modulating wave, and corresponding vector action time；Export the vector that modulus value is small in one carrier cycle of positive half period first in conjunction with sawtooth carrier wave, the big first output of modulus value, obtains intermediate pwm signal in negative half-cycle；Intermediate pwm signal subtracts each other two-by-two, obtains three-phase PWM signal；It is actually needed according to different topology and carries out redundant vectors selection.This invention removes common-mode voltages, eliminate influence of the leakage current to grid-connected current, improve waveform quality；Compared to traditional SVPWM modulation strategy, from Simplified two-dimension to one-dimensional, sector judgement and vector action time are simplified, are free of trigonometric function operation, and calculation amount is small；For the versatile of different inverter topologies.
Description
Technical field
The present invention relates to the modulation technique fields of multi-electrical level inverter, and in particular to a kind of more level of non-common mode voltage are inverse
Become the modulator approach of device.
Background technique
In recent years, photovoltaic power generation because its cleaning it is renewable, resourceful, potentiality to be exploited is huge and widely countries in the world are closed
Note.Non-isolated photovoltaic grid-connected inverter compared to conventional belt isolating transformer photovoltaic combining inverter for, volume greatly subtracts
Small, cost lowers, and efficiency improves.But the photovoltaic pond plate of non-isolated photovoltaic grid-connected inverter is directly connected to power grid, is generated
The problems such as leakage current, leakage current can bring electromagnetic interference, grid-connected current distortion and power loss increase, in some instances it may even be possible to endanger equipment
With personnel safety.Multi-electrical level inverter can reduce common-mode voltage dv/dt, reduce harmonic wave of output voltage, improve inverter efficiency.
If it is intended to obtaining better harmonic performance, it is necessary to which inverter possesses more output level numbers.
Existing multi-electrical level inverter modulation technique is broadly divided into space vector modulation (SVPWM) and sinusoidal pulse width modulation
(SPWM) two class, SVPWM to two level and three-level application comparative maturity, when level number increase to five level and its more than when,
Voltage vector number greatly increases, and calculating becomes extremely complex, and SVPWM can increase with level number, so that common-mode voltage
Amplitude also increases with it.SPWM has between carrier wave and switching tube applies comparative maturity in the conventional topologies of specific corresponding relationship,
Not strong for non-traditional topological versatility, common-mode voltage is reduced with respect to SVPWM, but higher output frequency makes parasitism
Voltage high frequency variation on capacitor, it is still desirable to add common mode filtering link in rear class and inhibit leakage current.
It is therefore desirable to start with from modulation strategy, it is inhibited on common-mode voltage source of generation, and designs one kind
It is versatile for different multi-electrical level inverter topologys, it calculates succinctly, is easy to more level of the non-common mode voltage of Digital Realization
Inverter modulation technique.
Summary of the invention
It the purpose of the present invention is to provide a kind of versatile, calculates succinct, is easy to the non-common mode voltage of Digital Realization
Multi-electrical level inverter modulator approach, to solve technical problem present in above-mentioned background technique.
To achieve the goals above, this invention takes following technical solutions:
A kind of modulator approach of the multi-electrical level inverter of non-common mode voltage provided by the invention, including following process step:
Step S110: modulation Wave Decomposition, the modulating wave after decomposition subtracts each other two-by-two is equal to former modulating wave；
Step S120: the modulating wave after decomposition is subjected to one-dimensional space Vector Modulation and show that the effect for synthesizing the modulating wave is sweared
Amount；
Step S130: three-phase PWM letter is obtained according to effect vector and corresponding vector action time in conjunction with sawtooth carrier wave
Number；
Step S140: according to the three-phase PWM signal, redundant vectors selection is carried out, obtains the driving of each power switch tube
Signal is realized and is modulated to the output phase of multi-electrical level inverter.
Preferably, the step S110 is specifically included:
To n electrical level inverter, by three-phase modulations wave uA、uBAnd uCU is decomposed by transformation matrix1、u2And u3, transformation for mula
It is as follows:
Wherein, uAWith u1-u2Same-phase, etc. amplitudes, uBWith u2-u3Same-phase, etc. amplitudes, uCWith u3-u1Same-phase, constant amplitude
Value.
Preferably, in the step S120, the modulating wave by after decomposition carries out one-dimensional space Vector Modulation and obtains conjunction
It is specifically included at the effect vector of the modulating wave:
By u1、u2And u3Carry out n0The one-dimensional space Vector Modulation of level, n0The one-dimensional space is divided into n by a voltage vector0-1
A modulation sector, by u1、u2And u3It carries out transformation and respectively obtains u '1、u′2With u '3, make u '1、u′2With u '3All fall within the first modulation
In sector, transformation rule is as follows:
Wherein, E indicates that the level step of multi-electrical level inverter, x are the integer part of the downward bracket function of x, and x ' is that x is upward
The integer part of bracket function.
Preferably, the step S130 is specifically included:
Judge the modulation sector, selection participates in synthesized voltage vector；
By u '1、u′2With u '3Compared with sawtooth carrier wave, the action time of each voltage vector is obtained, is respectively obtained
Corresponding to u1、u2And u3M signal PWM1、PWM2And PWM3；
M signal PWM1With PWM2Subtract each other to obtain the pwm signal PWM of A phaseA, PWM2With PWM3Subtract each other to obtain the PWM letter of B phase
Number PWMB, PWM3With PWM1Subtract each other to obtain the pwm signal PWM of C phaseC。
Preferably, the n0For the minimum odd number greater than n/2.
Preferably, the n0- 1 modulating fan area be respectively 0~E, 0~-E, E~2E,
Preferably, the judgement modulation sector, selection participate in synthesized voltage vector and specifically include:
It chooses and needs the small level vector of big level vector sum of the modulation sector judged to act on vector, if u10
In~E, then big level vector is E, and small level vector is 0；If u1In 0~-E, then big level vector is-E, small level vector
It is 0.
Preferably, it is f that the sawtooth carrier wave, which is frequency,c, amplitude be 0 to the E sawtooth carrier wave uniformly increased.
Preferably, the M signal PWM1、PWM2And PWM3Acquisition specifically include:
If u1Greater than 0, T is used1 0It is compared with sawtooth carrier wave, works as T1 0When greater than carrier wave, u is exported1Modulate sector in place
Small level vector as M signal PWM1；Work as T1 0When less than carrier wave, then u is exported1The big level vector of place modulation sector
As M signal PWM1；If u1Less than 0, T is used1 1It is compared with sawtooth carrier wave, works as T1 1When greater than carrier wave, u is exported1Place
The big level vector of sector is modulated as M signal PWM1；Work as T1 1When less than carrier wave, then u is exported1Modulate the small of sector in place
Level vector is as M signal PWM1；
Wherein,
If u2Greater than 0, T is used2 0It is compared with sawtooth carrier wave, works as T2 0When greater than carrier wave, u is exported2Modulate sector in place
Small level vector as M signal PWM2；Work as T2 0When less than carrier wave, then u is exported2The big level vector of place modulation sector
As M signal PWM2；If u2Less than 0, T is used2 1It is compared with sawtooth carrier wave, works as T2 1When greater than carrier wave, u is exported2Place
The big level vector of sector is modulated as M signal PWM2；Work as T2 1When less than carrier wave, then u is exported2Modulate the small of sector in place
Level vector is as M signal PWM2；
Wherein,
If u3Greater than 0, T is used3 0It is compared with sawtooth carrier wave, works as T3 0When greater than carrier wave, u is exported3Modulate sector in place
Small level vector as M signal PWM3；Work as T3 0When less than carrier wave, then u is exported3The big level vector of place modulation sector
As M signal PWM3；If u3Less than 0, T is used3 1It is compared with sawtooth carrier wave, works as T3 1When greater than carrier wave, u is exported3Place
The big level vector of sector is modulated as M signal PWM3；Work as T3 1When less than carrier wave, then u is exported3Modulate the small of sector in place
Level vector is as M signal PWM3；
Wherein,
The PWMA、PWMBAnd PWMCSum is 0, i.e., common-mode voltage is 0.
It the invention has the advantages that: common-mode voltage is completely eliminated from source, solves the problems, such as leakage current from the root, saves
Rear class common mode filtering link is gone；Influence of the leakage current to grid-connected current is eliminated, waveform quality is improved；Compared to tradition
SVPWM modulation strategy, from Simplified two-dimension to one-dimensional, sector judgement and vector action time are simplified, are free of triangle letter
Number operation, computation amount；For the versatile of different inverter topologies.
The additional aspect of the present invention and advantage will be set forth in part in the description, these will become from the following description
Obviously, or practice through the invention is recognized.
Detailed description of the invention
In order to illustrate the technical solution of the embodiments of the present invention more clearly, required use in being described below to embodiment
Attached drawing be briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for this
For the those of ordinary skill of field, without creative efforts, it can also be obtained according to these attached drawings others
Attached drawing.
Fig. 1 is the modulator approach flow chart of the multi-electrical level inverter of non-common mode voltage described in the embodiment of the present invention.
Fig. 2 is the seven electrical level inverter topology diagrams based on switching capacity described in the embodiment of the present invention.
Fig. 3 is one-phase five-level inverter one-dimensional space polar plot described in the embodiment of the present invention.
Fig. 4 is that the folded modulation of overturning described in the embodiment of the present invention involves carrier waveform figure.
Fig. 5 is M signal PWM simulation waveform described in the embodiment of the present invention.
Fig. 6 is that three-phase described in the embodiment of the present invention exports PWM simulation waveform.
Fig. 7 is A phase PWM Fourier analysis figure described in the embodiment of the present invention.
Fig. 8 is clamping capacitor voltage simulation waveform described in the embodiment of the present invention.
Fig. 9 is common-mode voltage simulation waveform described in the embodiment of the present invention.
Specific embodiment
Embodiments of the present invention are described below in detail, the example of the embodiment is shown in the accompanying drawings, wherein from beginning
Same or similar element or module with the same or similar functions are indicated to same or similar label eventually.Below by ginseng
The embodiment for examining attached drawing description is exemplary, and for explaining only the invention, and is not construed as limiting the claims.
Those skilled in the art of the present technique are appreciated that unless expressly stated, singular " one " used herein, " one
It is a ", " described " and "the" may also comprise plural form.It is to be further understood that being arranged used in specification of the invention
Diction " comprising " refer to that there are the feature, integer, step, operation, element and/or modules, but it is not excluded that in the presence of or addition
Other one or more features, integer, step, operation, element, module and/or their group.
It should be noted that in embodiment of the present invention unless specifically defined or limited otherwise, term is " even
Connect ", " fixation " etc. shall be understood in a broad sense, may be a fixed connection, may be a detachable connection, or is integral, can be machine
Tool connection, is also possible to be electrically connected, can be and be directly connected to, be also possible to be indirectly connected with by intermediary, can be two
The interaction relationship of connection or two elements inside element, unless having specific limit.For those skilled in the art
For, the concrete meaning of above-mentioned term in embodiments of the present invention can be understood as the case may be.
Those skilled in the art of the present technique are appreciated that unless otherwise defined, all terms used herein (including technology art
Language and scientific term) there is meaning identical with the general understanding of those of ordinary skill in fields of the present invention.Should also
Understand, those terms such as defined in the general dictionary, which should be understood that, to be had and the meaning in the context of the prior art
The consistent meaning of justice, and unless defined as here, it will not be explained in an idealized or overly formal meaning.
In order to facilitate understanding of embodiments of the present invention, further by taking specific embodiment as an example below in conjunction with attached drawing to be solved
Explanation is released, and embodiment does not constitute the restriction to the embodiment of the present invention.
Those of ordinary skill in the art are it should be understood that attached drawing is the schematic diagram of one embodiment, the portion in attached drawing
Part or device are not necessarily implemented necessary to the present invention.
Embodiment one
As shown in Figure 1, the embodiment of the invention provides a kind of modulator approach of the multi-electrical level inverter of non-common mode voltage, packet
Include following process step:
For n electrical level inverter, level step is E, DC voltage Vdc, the technical solution adopted by the present invention includes
Following steps:
Step (1), by three-phase modulations wave u shown in formula (1)A、uB、uCIt is decomposed into u shown in formula (2)1、u2、u3, decompose
Afterwards, uAWith u1-u2Same-phase, etc. amplitudes, uBWith u2-u3Same-phase, etc. amplitudes, uCWith u3-u1Same-phase, etc. amplitudes, transformation matrix
As shown in formula (3).
uA=Msin (ω t)
In formula, M is modulation wave amplitude, can be manually set, no more than the half of DC voltage.
Step (2), u1、u2、u3Following multi-electrical level inverter modulation is carried out respectively.If inverter is 3 electrical level inverters,
Then u1、u2、u3Carry out 2 level modulations；If inverter is 5 electrical level inverters, u1、u2、u3Carry out 3 level modulations；If inverter
For 7 electrical level inverters, then u1、u2、u3Carry out 5 level modulations；If inverter is 9 electrical level inverters, u1、u2、u3Carry out 5 level
Modulation；And so on, n electrical level inverter, then u1、u2、u3Carry out n0Level modulation, n0For the minimum odd number greater than n/2.
By u1、u2、u3Carry out n0The one-dimensional space Vector Modulation of level, n0The one-dimensional space is divided into 0~E, 0 by a voltage vector
~- E, E~2E,-E~-2E... have (n altogether0- 1) a sector, u1、u2、u3It carries out overturning folding and obtains u '1、u′2、u′3, make it
The sector 0~E is all fallen within, to reduce number of carrier wave.u1Transform to u '1Shown in rule such as formula (4), u2、u3The same u of transformation1Transformation.
X is the integer part of the downward bracket function of x in formula, and x ' is that x rounds up the integer part of function.
Judge u1The small level vector of big level vector sum of the sector is chosen for effect vector, if u in place sector1In 0~E
Sector, then big level vector is E, and small level vector is 0；If u1In the sector 0~-E, then big level vector is-E, small level arrow
Amount is 0.
Use a frequency for fc, amplitude is 0 to the E sawtooth carrier wave uniformly increased, frequency fcIt can be manually set.
If u1Greater than 0, T is used1 0It is compared with sawtooth carrier wave, works as T1 0When greater than carrier wave, u is exported1Modulate sector in place
Small level vector as M signal PWM1；Work as T1 0When less than carrier wave, then u is exported1The big level vector of place modulation sector
As M signal PWM1；If u1Less than 0, T is used1 1It is compared with sawtooth carrier wave, works as T1 1When greater than carrier wave, u is exported1Place
The big level vector of sector is modulated as M signal PWM1；Work as T1 1When less than carrier wave, then u is exported1Modulate the small of sector in place
Level vector is as M signal PWM1；
Wherein,
If u2Greater than 0, T is used2 0It is compared with sawtooth carrier wave, works as T2 0When greater than carrier wave, u is exported2Modulate sector in place
Small level vector as M signal PWM2；Work as T2 0When less than carrier wave, then u is exported2The big level vector of place modulation sector
As M signal PWM2；If u2Less than 0, T is used2 1It is compared with sawtooth carrier wave, works as T2 1When greater than carrier wave, u is exported2Place
The big level vector of sector is modulated as M signal PWM2；Work as T2 1When less than carrier wave, then u is exported2Modulate the small of sector in place
Level vector is as M signal PWM2；
Wherein,
If u3Greater than 0, T is used30 is compared with sawtooth carrier wave, works as T3 0When greater than carrier wave, u is exported3Modulate sector in place
Small level vector as M signal PWM3；Work as T3 0When less than carrier wave, then u is exported3The big level vector of place modulation sector
As M signal PWM3；If u3Less than 0, T is used3 1It is compared with sawtooth carrier wave, works as T3 1When greater than carrier wave, u is exported3Place
The big level vector of sector is modulated as M signal PWM3；Work as T3 1When less than carrier wave, then u is exported3Modulate the small of sector in place
Level vector is as M signal PWM3；
Wherein,
Step (3), the M signal PWM that step (2) is obtained1With PWM2Subtract each other to obtain the PWM of A phaseASignal, PWM2With
PWM3Subtract each other to obtain the PWM of B phaseBSignal, PWM3With PWM1Subtract each other to obtain the PWM of C phaseCSignal.
Step (4) obtains PWM by step (3)A、PWMB、PWMC, redundancy is carried out further according to the actual needs of different topologys
Vector is chosen, and each switch controlled signal is obtained, because of PWMA、PWMB、PWMCThe sum of be 0, i.e., common-mode voltage be 0.
Embodiment two
In the embodiment of the present invention two, more complicated seven electrical level inverters based on switching capacity of charge and discharge operating condition are selected
It is A phase topology diagram shown in Fig. 2 as example topology, the identical A phase of B phase, C, and A, B, C three-phase P, O, N are connected to one piece,
Level step E is equal to 62.5V, DC voltage VdcEqual to 375V.
A, B, C three-phase modulations wave uA、uB、uCSuch as formula (1), the matrixing through formula (2) obtains u1、u2、u3。
uA=180sin (ω t)
u1、u2、u3Need to carry out five level one-dimensional space Vector Modulations, the one-dimensional space is divided into 0~E, 0 by 5 voltage vectors
~- E, E~2E, four sectors-E~-2E, as shown in Fig. 3.Use a cycle for 50s, what amplitude uniformly increased for 0 to E
Sawtooth carrier wave.u1、u2、u3It carries out overturning folding and obtains u '1、u′2、u′3, so that it is all fallen within the sector 0~E, to reduce number of carrier wave.
u1Shown in transformation rule such as formula (3), waveform and carrier wave are as shown in Fig. 4 after transformation, u2、u3The same u of transformation1Transformation rule.
Judge u1The small level vector of big level vector sum of the sector is chosen for effect vector, if u in place sector1In 0~E
Sector, then big level vector is E, and small level vector is 0；If u1In the sector E~2E, then big level vector is 2E, small level arrow
Amount is E；If u1In the sector 0~-E, then big level vector is-E, and small level vector is 0；If u1In-E~sector -2E, then big electricity
Flat vector is -2E, and small level vector is-E.
Use a frequency for 10kHz, amplitude is 0 to 62.5 sawtooth carrier waves uniformly increased, if u1Greater than 0, T is used1 0
It is compared with carrier wave, works as T1 0The small level vector in the sector is exported when greater than carrier wave, and the big level in the sector is exported when less than carrier wave
Vector；If u1Less than 0, T is used1 1It is compared with carrier wave, works as T1 1The big level vector in the sector is exported when greater than carrier wave, is less than and is carried
The small level vector in the sector is exported when wave.Thus u is obtained1The intermediate PWM modulated1Signal, u2、u3With the identical method of use
Modulation obtains intermediate PWM2、PWM3Signal.T1 1And T1 0Calculation formula such as formula (4) shown in.Obtained intermediate PWM1、PWM2、PWM3
Signal is as shown in Fig. 5, wherein (a) indicates M signal PWM1Waveform diagram, (b) indicate M signal PWM2Waveform diagram,
(c) M signal PWM is indicated3Waveform diagram.
The M signal PWM that will be obtained1With PWM2Subtract each other to obtain the PWM of A phaseASignal, PWM2With PWM3Subtract each other to obtain B phase
PWMBSignal, PWM3With PWM1Subtract each other to obtain the PWM of C phaseCSignal.
Since the seven electrical level inverter topologys based on switching capacity need to realize the electricity of clamping capacitance C3, C4 in attached drawing (2)
Pressure maintains 62.5V.According to obtained PWMA、PWMB、PWMC, suitable redundant vectors are chosen to each voltage vector, to maintain
Clamping capacitor voltage balance.Switching tube S1 is that complementary conducting is closed with S8, S9 and S11 with S10 with S4, S5 with S6, S7 with S2, S3
System, and switching tube S1 and S3, S2 and S4 simultaneously turn on shutdown.Its combinations of voltages mode and clamping capacitance charge status such as table 1
It is shown.
The corresponding switch state of the different output levels of table 1 and capacitor charge and discharge situation
Hysteresis control is used to clamping capacitor voltage, the control period is 100s.For example, working as PWMAWhen output level is E, pincers
Position capacitance voltage is greater than 62.5V, then using the vector of clamping capacitance charging, gives switching tube S1, S5 open signal, S7, S9 shutdown
Signal, remaining tubing corresponding actions；Clamping capacitor voltage is less than 62.5V, then using the vector of clamping capacitance electric discharge, gives switching tube
S1, S7, S9 open signal, S7 cut-off signals, remaining tubing corresponding actions realize that clamping capacitor voltage balances with this.A, B, C phase
PWM waveform is as shown in Fig. 6, wherein (a) indicates signal PWMAWaveform diagram, (b) indicate signal PWMBWaveform diagram, (c) table
Show signal PWMCWaveform diagram.A phase PWM Fourier analysis is as shown in Fig. 7, the identical A phase of B, C, clamping capacitor voltage such as attached drawing 8
Shown, common-mode voltage is as shown in Fig. 9.
In conclusion the present invention can be suitable for being based on seven electrical level inverter of switching capacity type, meet its clamping capacitance electricity
Weighing apparatus is flattened, needs to make corresponding redundant vectors according to other different topologies in step (4) and chooses, is easy to promote, output voltage tool
There are good harmonic performance, and non-common mode voltage.
The foregoing is only a preferred embodiment of the present invention, but scope of protection of the present invention is not limited thereto,
In the technical scope disclosed by the present invention, any changes or substitutions that can be easily thought of by anyone skilled in the art,
It should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be with scope of protection of the claims
Subject to.
Claims (9)
1. a kind of modulator approach of the multi-electrical level inverter of non-common mode voltage, which is characterized in that including following process step:
Step S110: modulation Wave Decomposition, the modulating wave after decomposition subtracts each other two-by-two is equal to former modulating wave；
Step S120: the modulating wave after decomposition is subjected to the effect vector that one-dimensional space Vector Modulation obtains the synthesis modulating wave；
Step S130: three-phase PWM signal is obtained according to effect vector and corresponding vector action time in conjunction with sawtooth carrier wave；
Step S140: according to the three-phase PWM signal, carrying out redundant vectors selection, obtain the driving signal of each power switch tube,
It realizes and the output phase of multi-electrical level inverter is modulated.
2. the method according to claim 1, wherein the step S110 is specifically included:
To n electrical level inverter, by three-phase modulations wave uA、uBAnd uCU is decomposed by transformation matrix1、u2And u3, transformation for mula is such as
Under:
Wherein, uAWith u1-u2Same-phase, etc. amplitudes, uBWith u2-u3Same-phase, etc. amplitudes, uCWith u3-u1Same-phase, etc. amplitudes.
3. according to the method described in claim 2, it is characterized in that, in the step S120, the modulating wave by after decomposition
It carries out one-dimensional space Vector Modulation and show that the effect vector for synthesizing the modulating wave specifically includes:
By u1、u2And u3Carry out n0The one-dimensional space Vector Modulation of level, n0The one-dimensional space is divided into n by a voltage vector0- 1 tune
Sector processed, by u1、u2And u3It carries out transformation and respectively obtains u '1、u′2With u '3, make u '1、u′2With u '3All fall within the first modulation sector
Interior, transformation rule is as follows:
Wherein, E indicates that the level step of multi-electrical level inverter, x are the integer part of the downward bracket function of x, and x ' rounds up for x
The integer part of function.
4. according to the method described in claim 3, it is characterized in that, the step S130 is specifically included:
Judge the modulation sector, selection participates in synthesized voltage vector；
By u '1、u′2With u '3Compared with sawtooth carrier wave, the action time of each voltage vector is obtained, correspondence is respectively obtained
In u1、u2And u3M signal PWM1、PWM2And PWM3；
M signal PWM1With PWM2Subtract each other to obtain the pwm signal PWM of A phaseA, PWM2With PWM3Subtract each other to obtain the pwm signal of B phase
PWMB, PWM3With PWM1Subtract each other to obtain the pwm signal PWM of C phaseC。
5. according to the method described in claim 4, it is characterized by:
The n0For the minimum odd number greater than n/2.
6. according to the method described in claim 5, it is characterized by:
The n0- 1 modulating fan area is respectively
7. according to the method described in claim 6, it is characterized in that, the judgement modulation sector, selection participate in synthesis electricity
Pressure vector specifically includes:
It chooses and needs the small level vector of big level vector sum of the modulation sector judged to act on vector, if u1In 0~E,
Then big level vector is E, and small level vector is 0；If u1In 0~-E, then big level vector is-E, and small level vector is 0.
8. the method according to the description of claim 7 is characterized in that it is f that the sawtooth carrier wave, which is frequency,c, amplitude be 0 to E it is uniform
The sawtooth carrier wave of increase.
9. according to the method described in claim 8, it is characterized in that, the M signal PWM1、PWM2And PWM3Acquisition it is specific
Include:
If u1Greater than 0, T is used1 0It is compared with sawtooth carrier wave, works as T1 0When greater than carrier wave, u is exported1Modulate the small of sector in place
Level vector is as M signal PWM1；Work as T1 0When less than carrier wave, then u is exported1The big level vector conduct of place modulation sector
M signal PWM1；If u1Less than 0, T is used1 1It is compared with sawtooth carrier wave, works as T1 1When greater than carrier wave, u is exported1Place modulation
The big level vector of sector is as M signal PWM1；Work as T1 1When less than carrier wave, then u is exported1The small level of place modulation sector
Vector is as M signal PWM1；
Wherein,
If u2Greater than 0, useIt is compared with sawtooth carrier wave, whenWhen greater than carrier wave, u is exported2Modulate the small of sector in place
Level vector is as M signal PWM2；WhenWhen less than carrier wave, then u is exported2The big level vector conduct of place modulation sector
M signal PWM2；If u2Less than 0, useIt is compared with sawtooth carrier wave, whenWhen greater than carrier wave, u is exported2Place modulation
The big level vector of sector is as M signal PWM2；WhenWhen less than carrier wave, then u is exported2The small level of place modulation sector
Vector is as M signal PWM2；
Wherein,
If u3Greater than 0, useIt is compared with sawtooth carrier wave, whenWhen greater than carrier wave, u is exported3Modulate the small of sector in place
Level vector is as M signal PWM3；WhenWhen less than carrier wave, then u is exported3The big level vector conduct of place modulation sector
M signal PWM3；If u3Less than 0, useIt is compared with sawtooth carrier wave, whenWhen greater than carrier wave, u is exported3Place modulation
The big level vector of sector is as M signal PWM3；WhenWhen less than carrier wave, then u is exported3The small level of place modulation sector
Vector is as M signal PWM3；
Wherein,
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110504856A (en) * | 2019-09-06 | 2019-11-26 | 浙江日风电气股份有限公司 | A kind of neutral-point potential balance algorithm based on optimal phase modulation Wave Decomposition |
| CN110739875A (en) * | 2019-11-07 | 2020-01-31 | 北京交通大学 | Six-segment type nearest level approximation modulation method for eliminating MMC common-mode voltage |
| CN112217409A (en) * | 2020-11-05 | 2021-01-12 | 武汉理工大学 | Variable carrier pulse width modulation system and method of three-phase four-bridge arm voltage type inverter |
| CN113765424A (en) * | 2021-09-30 | 2021-12-07 | 深圳市英威腾电气股份有限公司 | Three-level inverter synchronous carrier modulation method and device |
| CN116707332A (en) * | 2023-06-09 | 2023-09-05 | 深圳市恒运昌真空技术有限公司 | Inverter and multi-level generation method thereof |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201937496U (en) * | 2011-01-06 | 2011-08-17 | 安徽长远绿色能源有限公司 | High-frequency inverter control system based on single-phase space vector pulse width modulation (SVPWM) |
| CN102545253A (en) * | 2010-12-13 | 2012-07-04 | 深圳市金威源科技股份有限公司 | Digital signal processor (DSP)-based staggered single-phase space vector pulse modulation gridding device |
| CN105245123A (en) * | 2015-10-16 | 2016-01-13 | 燕山大学 | One-dimensional modulation common-mode current suppression technology for three-phase neutral point-clamped three-level inverter |
| CN106208643A (en) * | 2016-08-03 | 2016-12-07 | 西安电子科技大学 | Based on the common mode current suppressing method under the non-equal illumination of photovoltaic combining inverter |
| KR20160142185A (en) * | 2015-06-02 | 2016-12-12 | 영남대학교 산학협력단 | SVPWM scheme for common-mode voltage reduction in five-level ANPC inverters |
| CN206533300U (en) * | 2017-03-01 | 2017-09-29 | 河北大学 | A kind of five-part form SVPWM modulating systems |
-
2019
- 2019-04-03 CN CN201910266434.9A patent/CN110048627B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102545253A (en) * | 2010-12-13 | 2012-07-04 | 深圳市金威源科技股份有限公司 | Digital signal processor (DSP)-based staggered single-phase space vector pulse modulation gridding device |
| CN201937496U (en) * | 2011-01-06 | 2011-08-17 | 安徽长远绿色能源有限公司 | High-frequency inverter control system based on single-phase space vector pulse width modulation (SVPWM) |
| KR20160142185A (en) * | 2015-06-02 | 2016-12-12 | 영남대학교 산학협력단 | SVPWM scheme for common-mode voltage reduction in five-level ANPC inverters |
| CN105245123A (en) * | 2015-10-16 | 2016-01-13 | 燕山大学 | One-dimensional modulation common-mode current suppression technology for three-phase neutral point-clamped three-level inverter |
| CN106208643A (en) * | 2016-08-03 | 2016-12-07 | 西安电子科技大学 | Based on the common mode current suppressing method under the non-equal illumination of photovoltaic combining inverter |
| CN206533300U (en) * | 2017-03-01 | 2017-09-29 | 河北大学 | A kind of five-part form SVPWM modulating systems |
Non-Patent Citations (1)
| Title |
|---|
| NASSEREDDINE SABEUR等: ""A Simplified Time-Domain Modulation Scheme-Based Maximum Boost Control for Three-Phase Quasi-Z Source Inverters"", 《IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS》 * |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110504856A (en) * | 2019-09-06 | 2019-11-26 | 浙江日风电气股份有限公司 | A kind of neutral-point potential balance algorithm based on optimal phase modulation Wave Decomposition |
| CN110504856B (en) * | 2019-09-06 | 2023-03-31 | 浙江日风电气股份有限公司 | Neutral point potential balance algorithm based on optimal phase modulation wave decomposition |
| CN110739875A (en) * | 2019-11-07 | 2020-01-31 | 北京交通大学 | Six-segment type nearest level approximation modulation method for eliminating MMC common-mode voltage |
| CN112217409A (en) * | 2020-11-05 | 2021-01-12 | 武汉理工大学 | Variable carrier pulse width modulation system and method of three-phase four-bridge arm voltage type inverter |
| CN113765424A (en) * | 2021-09-30 | 2021-12-07 | 深圳市英威腾电气股份有限公司 | Three-level inverter synchronous carrier modulation method and device |
| CN113765424B (en) * | 2021-09-30 | 2024-03-22 | 深圳市英威腾电气股份有限公司 | Synchronous carrier modulation method and device for three-level inverter |
| CN116707332A (en) * | 2023-06-09 | 2023-09-05 | 深圳市恒运昌真空技术有限公司 | Inverter and multi-level generation method thereof |
| CN116707332B (en) * | 2023-06-09 | 2024-02-02 | 深圳市恒运昌真空技术股份有限公司 | Inverter and multi-level generation method thereof |
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