CN108964507B

CN108964507B - T-shaped conversion circuit and corresponding three-phase conversion circuit

Info

Publication number: CN108964507B
Application number: CN201710361225.3A
Authority: CN
Inventors: 陈成辉; 陈四雄; 易龙强
Original assignee: Xiamen Kehua Hengsheng Co Ltd
Current assignee: Kehua Data Co Ltd
Priority date: 2017-05-19
Filing date: 2017-05-19
Publication date: 2020-10-16
Anticipated expiration: 2037-05-19
Also published as: CN108964507A

Abstract

The invention discloses a T-shaped conversion circuit and a corresponding three-phase conversion circuit. In the T-type conversion circuit, an inductor, four diodes and two capacitors are added in the T-type conversion circuit in the prior art, so that soft switching can be realized by a controllable switching device and a diode device, and the power consumption of a power device and the power consumption of the diode device are reduced. The corresponding three-phase conversion circuit can also realize the soft switching of the controllable switching device and the diode device, and the power consumption of the power device and the diode device is reduced.

Description

T-shaped conversion circuit and corresponding three-phase conversion circuit

Technical Field

The invention relates to the field of electric energy conversion, in particular to a T-shaped conversion circuit.

Background

In the prior art, a conversion circuit with a T-type layout has been widely used. A T-topology conversion circuit generally includes two vertically arranged controllable switching devices and two horizontally arranged controllable switching devices; two controllable switching devices which are vertically arranged are connected in series, one end of each controllable switching device is connected with a positive bus, and the other end of each controllable switching device is connected with a negative bus; a connection point between the two vertically arranged controllable switching devices is used as an input end and an output end of the conversion circuit; two controllable switching devices arranged transversely are generally arranged on a middle bridge arm, one end of the middle bridge arm is connected to an input end and an output end, and the other end of the middle bridge arm is connected to a neutral line. The connection modes of the two laterally arranged controllable switching devices on the middle bridge arm are generally three, as shown in fig. 1, 2 and 3. Fig. 1 shows two laterally arranged controllable switching devices connected in series and in series with each other in reverse, with the drain or collector connected to each other. Fig. 2 shows a situation where two laterally arranged controllable switching devices are connected in series and in anti-series with each other with the source or emitter connected to each other. Fig. 3 shows the situation where two laterally arranged controllable switching devices are connected in series with a diode and then connected in parallel to the middle leg. In the above 3 diagrams, the controllable switching devices each include an IGBT and a freewheeling diode connected in anti-parallel with the IGBT. Compared with a double-level conversion circuit, the T-type three-level conversion circuit in the prior art has the advantages of halving blocking voltage of a single IGBT tube, small harmonic wave, low loss, high efficiency and the like.

In the T-type three-level conversion circuit, the power consumption of each IGBT tube can be divided into on-state power consumption and on-off power consumption, wherein the on-off power consumption can be divided into on-stage power consumption and off-stage power consumption. When the operating frequency is low, the on-state power consumption is dominant; however, when the operating frequency is high, the on-off power consumption is increased to be the main power consumption, wherein the power consumption in the on-state is larger than that in the off-state. Therefore, in case of high operating frequencies, it is necessary to implement "soft switching", which means that the controllable switching device can implement Zero Voltage Switching (ZVS), Zero Current Switching (ZCS) or zero voltage zero current switching (ZVZXCS), or that the current or voltage rises with a limited slope during switching. If soft switching cannot be achieved, the following problems arise:

1. the power device (controllable switch device) has large loss; the temperature of the power device is increased, so that the working frequency cannot be improved, the current and voltage capacity of the power device cannot reach the rated index, and the power device cannot operate under the rated condition, thereby restricting the application of the three-level topology;

2. the power device is easy to be broken down for the second time; under the condition of inductive load, peak voltage exists when the power device is switched off; under the condition of capacitive load, peak current exists when the power device is switched on; therefore, secondary breakdown is easily caused, the safe operation of the power device is greatly damaged, and a larger Safe Operating Area (SOA) needs to be designed;

3. generating larger EMI electromagnetic interference; in the operation of the high-frequency operation state, the inter-electrode parasitic capacitance of the power device is an extremely important parameter. Such an interelectrode capacitance causes two disadvantages during switching of the power device: (1) when the device is switched on under high voltage, the inter-electrode parasitic capacitance energy storage is absorbed and dissipated by the device, so that temperature rise is generated, and the temperature rise is more serious when the frequency is higher; (2) dv/dt is coupled to the output terminal during the voltage conversion of the interelectrode capacitor, which causes electromagnetic interference and makes the system unstable. In addition, the inter-electrode capacitance and stray inductance in the circuit can generate oscillation, and the normal work of the system is interfered;

4. the circuit topology is very sensitive to the parasitic parameters of the power device; when the soft switch cannot be realized, the problem of direct connection of an upper bridge arm and a lower bridge arm may exist, and because the soft switch cannot be realized, the power device also has turn-on delay time (dead time), and under the condition of high frequency, in order to eliminate the influence of the dead time on the performance of the inverter, the adopted correction measures further complicate the design of the whole system;

5. an absorption circuit is required to be designed, the absorption circuit is used for limiting di/dt when the power device is switched on and dv/dt when the power device is switched off, so that a dynamic switch track is reduced to a SOA (service oriented architecture) in a direct current safety area, the power device can be ensured to run safely, but the absorption circuit cannot eliminate switching loss, the design difficulty of the whole conversion device is increased, and meanwhile, larger device stress caused by reverse recovery of a freewheeling diode and mutual interference of the absorption circuit in the energy regeneration process can be caused;

6. the power device generates noise pollution when switching at high frequency, so that the requirement of the conversion circuit on an input filter and an output filter is high.

Based on the above six problems, it is urgently needed to implement soft switching of the T-type three-level conversion circuit.

Disclosure of Invention

The present invention is directed to solve the problems of the prior art, and provides a T-type converter circuit and a three-phase converter circuit thereof, so that a power device can implement soft switching operation, thereby reducing power consumption of the power device and a diode device, and solving the problems of the prior art.

In order to achieve the purpose, the invention adopts the following technical scheme:

a T-shaped conversion circuit comprises two vertically arranged controllable switching devices, two horizontally arranged controllable switching devices, an inductor, a first diode, a second diode, a third diode, a fourth diode, a first capacitor and a second capacitor; the two vertically arranged controllable switching devices are connected in series, one end of each controllable switching device is connected with a positive bus, and the other end of each controllable switching device is connected with a negative bus; the connection point between the two vertically arranged controllable switching devices is used as an input end and an output end; the two controllable switching devices which are transversely arranged are positioned on the middle bridge arm; one end of the middle bridge arm is connected to the input and output end, and the other end of the middle bridge arm is connected to one end of the inductor; the other end of the inductor is connected to the neutral line; among the two transversely arranged controllable switching devices, the controllable switching device meeting the first condition or the second condition is defined as a second controllable switching device, and the controllable switching device meeting the third condition or the fourth condition is defined as a third controllable switching device; the first condition is that the source or the emitter of the controllable switching device is connected to the inductor; the second condition is that the drain or collector of the controllable switch device is connected to the input and output end; the third condition is that the source or the emitter of the controllable switching device is connected to the input and output ends; the fourth condition is that the drain or collector of the controllable switching device is connected to the inductor; the first diode and the second diode are connected in series, the cathode of the first diode is connected to the positive bus, the anode of the second diode is connected to the connection point of the inductor and the middle bridge arm, one end of the first capacitor is connected to the connection point of the first diode and the second diode, and the other end of the first capacitor is connected to the input and output end; the third diode and the fourth diode are connected in series, the anode of the fourth diode is connected to the negative bus, and the cathode of the third diode is connected to the source electrode or the emitter electrode of the second controllable switching device; one end of the second capacitor is connected to the connection point of the third diode and the fourth diode, and the other end of the second capacitor is connected to the drain electrode or the collector electrode of the second controllable switching device.

In an embodiment, said second controllable switching device is connected in anti-series with said third controllable switching device, and the drain or collector of the second controllable switching device is connected to the drain or collector of the third controllable switching device.

In a second embodiment said second controllable switching device is connected in anti-series with said third controllable switching device, and the source or emitter of the second controllable switching device is connected to the source or emitter of the third controllable switching device.

In a third embodiment, the middle bridge arm further comprises a fifth diode and a sixth diode; the source or the emitter of the third controllable switching device and the drain or the collector of the second controllable switching device are connected to the input and the output ends; the source electrode or the emitter electrode of the second controllable switching device is connected to the anode electrode of the fifth diode; the drain electrode or the collector electrode of the third controllable switching device is connected to the cathode electrode of the sixth diode; the cathode of the fifth diode and the anode of the sixth diode are connected to the inductor.

Further, any one of the two vertically arranged controllable switching devices adopts an IGBT unit or an MOS unit, and when the IGBT unit is adopted, the IGBT unit comprises an IGBT tube and a diode connected with the IGBT tube in an anti-parallel manner; when the MOS unit is adopted, the MOS unit can be an MOS tube with a body diode or comprise an MOS tube without a body diode and an anti-parallel diode.

Further, any one of the two laterally arranged controllable switching devices adopts an IGBT unit or an MOS unit, and when the IGBT unit is adopted, the IGBT unit comprises an IGBT tube and a diode connected with the IGBT tube in anti-parallel; when the MOS unit is adopted, the MOS unit can be an MOS tube with a body diode or comprise an MOS tube without a body diode and an anti-parallel diode.

A three-phase conversion circuit comprises a first conversion circuit, a second conversion circuit and a third conversion circuit; the first conversion circuit, the second conversion circuit and the third conversion circuit adopt a T-shaped conversion circuit as claimed in any one of claims 1 to 6; the neutral line of the first conversion circuit, the neutral line of the second conversion circuit and the neutral line of the third conversion circuit are connected with each other.

Compared with the prior art, the technical scheme of the invention has the following beneficial effects:

1. in the T-type conversion circuit, all controllable switching devices and diode devices can realize soft switching, namely Zero Voltage Switching (ZVS), Zero Current Switching (ZCS) or Zero Voltage Zero Current Switching (ZVZCS), or on-off switching with limited dv/dt and di/dt. Therefore, the on-off loss of the controllable switch device is greatly reduced, and the working efficiency of the conversion circuit is improved; the power device is not easy to be subjected to secondary breakdown, and the dead time is eliminated;

2. the controllable switching device is switched on and off with limited dv/dt and di/dt, so the EMI electromagnetic interference of the system is much more optimized than that of the system without realizing soft switching;

3. because the on-off loss of the controllable switch device is reduced, the conversion device can work above the working frequency of the traditional conversion device in multiples, so that the parameter requirement of an output filter required by the conversion device is low, and the size can be reduced in multiples, thereby being beneficial to further reducing the material cost, reducing the product size and improving the product power density;

4. compared with the prior art, the invention only adds one inductor, four diodes and two capacitors, has less added devices, simple and compact structure and does not need to additionally add a controllable switch device and a control circuit;

5. the three-phase conversion circuit using the T-type conversion circuit also has the above-described effects.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:

FIG. 1 is a circuit diagram illustrating a first prior art scenario;

FIG. 2 is a circuit diagram illustrating a second prior art scenario;

FIG. 3 is a circuit diagram illustrating a third prior art scenario;

FIG. 4 is a circuit diagram of a first embodiment of a T-type conversion circuit according to the present invention;

FIG. 5 is a circuit diagram of a second embodiment of the T-type conversion circuit of the present invention;

FIG. 6 is a circuit diagram of a third embodiment of a T-type conversion circuit according to the present invention;

FIG. 7 is a schematic diagram of the T-type converter circuit according to the first embodiment of the present invention, before the vertical tube commutates to the horizontal tube when the inverted output voltage is a positive half-cycle;

fig. 8 is a schematic diagram of a first stage operation of a vertical tube to horizontal tube converter when DC/AC conversion is performed and an inverted output voltage is a positive half cycle in a T-type converter circuit according to an embodiment of the present invention;

FIG. 9 is a schematic diagram of a second stage operation of the T-type inverter circuit according to the present invention, in which the vertical tube performs DC/AC conversion and the inversion output voltage is a positive half-cycle, and the vertical tube performs current conversion to the horizontal tube;

FIG. 10 is a schematic diagram of the T-type inverter circuit according to the first embodiment of the present invention, before the horizontal tube is commutated to the vertical tube when the inverted output voltage is a positive half-cycle;

FIG. 11 is a schematic diagram illustrating a third stage of the horizontal to vertical pipe commutation when the T-type inverter circuit performs DC/AC conversion and the inverted output voltage is a positive half cycle according to the first embodiment of the present invention;

FIG. 12 is a schematic diagram illustrating a fourth stage of the horizontal to vertical pipe commutation when the inverted output voltage is a positive half cycle after DC/AC conversion according to the first embodiment of the T-type inverter circuit of the present invention;

fig. 13 is a schematic diagram illustrating operation of the vertical tube before commutation to the horizontal tube when the AC input voltage is a positive half cycle when AC/DC conversion is performed in the T-type converter circuit according to the first embodiment of the present invention;

fig. 14 is a schematic diagram of a first stage operation of a T-type inverter circuit according to the present invention, in which a vertical tube performs AC/DC conversion and an AC input voltage is a positive half-cycle, and a vertical tube performs current conversion to a horizontal tube;

FIG. 15 is a schematic diagram illustrating a second stage operation of the T-type inverter circuit according to the present invention, in which the vertical tube commutates to the horizontal tube when the AC input voltage is a positive half-cycle after AC/DC conversion;

FIG. 16 is a schematic diagram of the T-converter circuit according to the first embodiment of the present invention, before the horizontal tube is commutated to the vertical tube when the AC input voltage is a positive half-cycle;

fig. 17 is a schematic diagram illustrating the operation of the horizontal to vertical pipe commutation when the AC input voltage is a positive half cycle after AC/DC conversion according to the first embodiment of the T-type converter circuit of the present invention;

fig. 18 is a circuit diagram of an embodiment of a three-phase inverter circuit according to the invention.

Detailed Description

In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention clearer and clearer, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

Fig. 4 is a circuit diagram of a first embodiment of the T-type conversion circuit according to the present invention. As shown in fig. 4, an embodiment of the T-shaped inverter circuit includes two vertically arranged controllable switching devices, two horizontally arranged controllable switching devices, an inductor L, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a first capacitor C1, a second capacitor C2, a third polar capacitor C3, and a fourth polar capacitor C4.

The two vertically arranged controllable switching devices are respectively a first controllable switching device and a fourth controllable switching device, wherein the first controllable switching device adopts an IGBT unit and comprises a first IGBT tube Q1 and a first freewheeling diode Dq1 connected with the first IGBT tube Q1 in an anti-parallel mode; the fourth controllable switching device adopts an IGBT unit and comprises a fourth IGBT tube Q4 and a fourth freewheeling diode Dq4 connected in anti-parallel with the fourth IGBT tube Q4. First IGBT tube Q1 is connected in series with fourth IGBT tube Q4, the collector of first IGBT tube Q1 is connected to the positive bus, the emitter of fourth IGBT tube Q4 is connected to the negative bus, the emitter of first IGBT tube Q1 is connected to the collector of fourth IGBT tube Q4, and the connection point is used as the input/output terminal.

The two transversely arranged controllable switching devices positioned on the middle bridge arm are respectively a second controllable switching device and a third controllable switching device, wherein the second controllable switching device adopts an IGBT unit and comprises a second IGBT tube Q2 and a second freewheeling diode Dq2 connected with the second IGBT tube Q2 in an anti-parallel manner; the third controllable switching device adopts an IGBT unit and comprises a third IGBT tube Q3 and a third freewheeling diode Dq3 connected in anti-parallel with the third IGBT tube Q3. Second IGBT tube Q2 and third IGBT tube Q3 are connected in series in reverse to the middle arm. The emitter of the third IGBT tube Q3 is connected to the input and output ends; the collector of the third IGBT tube Q3 is connected to the collector of the second IGBT tube Q2; the emitter of the second IGBT tube Q2 is connected to the inductor L; the other end of the inductor L is connected to the neutral line.

A first diode D1 and a second diode D2 are connected in series, the cathode of the first diode D1 is connected to the positive bus, and the anode of the second diode D2 is connected to the connection point of the inductor L and the middle bridge arm; one end of the first capacitor C1 is connected to the connection point of the first diode D1 and the second diode D2, and the other end of the first capacitor C1 is connected to the input/output terminal.

The third diode D3 and the fourth diode D4 are connected in series, the anode of the fourth diode D4 is connected to the negative bus, and the cathode of the third diode D3 is connected to the emitter of the second IGBT tube Q2; one end of the second capacitor C2 is connected to the connection point of the third diode D3 and the fourth diode D4, and the other end of the second capacitor C2 is connected to the collector of the second IGBT.

The anode of the third polar capacitor C3 is connected with the positive bus, and the cathode is connected with the neutral line; the positive electrode of the fourth polarity capacitor C4 is connected with the neutral line, and the negative electrode is connected with the negative bus.

In this embodiment, the controllable switch device may also adopt an MOS unit, and when the MOS unit is adopted, the MOS unit may be an MOS transistor with a body diode or include an MOS transistor without a body diode and an anti-parallel diode.

The T-type conversion circuit of the present embodiment can realize soft switching of all controllable switching devices and diode devices, i.e., Zero Voltage Switching (ZVS), Zero Current Switching (ZCS) or Zero Voltage Zero Current Switching (ZVZCS), or on-off switching with limited dv/dt and di/dt, during the inversion and rectification processes. Specifically, the method comprises the following steps:

when the first embodiment of the T-type inverter circuit works in inversion, the first embodiment of the T-type inverter circuit includes two half cycles, i.e., a positive half cycle of the inversion output voltage and a negative half cycle of the inversion output voltage, and each half cycle is divided into two processes, i.e., vertical pipe commutation and horizontal pipe commutation:

when the inversion output voltage is a positive half period, the vertical tube current conversion process to the horizontal tube is as follows:

figure 7 shows the vertical tubes before flow to the horizontal tubes. Before the vertical tube-to-tube converter is converted, the first IGBT tube Q1 and the third IGBT tube Q3 are in a conducting state, and the second IGBT tube Q2 and the fourth IGBT tube Q4 are in a stopping state. At this time, the current flows to the load Z through the first IGBT Q1, and the third IGBT Q3 is turned on but does not pass the current. Since the first IGBT Q1 is turned on, the second capacitor C2 is charged to Vdc, and at this time, no current flows through the inductor L, and the voltage of the first capacitor C1 is zero.

Fig. 8 shows the operation of the first stage in the vertical tube to horizontal tube commutation process. In the first phase, the third IGBT Q4 is kept in the on state, the fourth IGBT Q4 is kept in the off state, the first IGBT Q1 is turned from the on state to the off state, and the second IGBT Q2 is turned from the off state to the on state. As shown in fig. 8, in the process of turning off the first IGBT Q1 and turning on the second IGBT Q2, the second capacitor C2 discharges to the load Z through the fourth diode D4 and the third IGBT Q3. Meanwhile, the second capacitor C2 also charges the inductor L with energy through the second IGBT Q2 and the fourth diode D4. Since the voltage across the second capacitor C2 is gradually discharged to zero, the current of the load Z at the moment when the first IGBT Q1 is turned off is supplied by the second capacitor C2. Therefore, the first IGBT Q1 is turned off in a zero-voltage manner, and the turn-off loss is very small, which is a typical soft switching process. Due to the inductor L, the current is also established in a di/dt manner during the process of the second IGBT Q2 switching from the off state to the on state, which is also a soft switching process.

Fig. 9 shows the second stage of operation during the vertical tube to horizontal tube commutation. After the first phase is completed, the fourth diode D4 is turned off, and the current in the inductor L becomes zero again. While the fourth freewheeling diode Dq4 begins to freewheel. The load Z output level is clamped at-Vdc/2 level. The inductor L starts to store energy through the second freewheeling diode Dq2 and the third IGBT Q3, and the current of the inductor L increases linearly from zero, and at the same time, the current through the fourth freewheeling diode Dq4 decreases proportionally. The commutation process is completed when the current through the fourth freewheeling diode Dq4 decreases to zero. At this time, the fourth freewheeling diode Dq4 is turned off, and the load current is carried by the second freewheeling diode Dq2 and the third IGBT transistor Q3. In the above process, the current change occurring through the second freewheeling diode Dq2, the second IGBT transistor Q2, the fourth freewheeling diode Dq4 and the third IGBT transistor Q3 is performed at the finite current change rate di/dt due to the presence of the inductor L. So in this process they both achieve soft switching. The freewheeling process of the fourth diode D4 is also turned on and off at a limited current change rate di/dt, so that the turn-on loss of the fourth diode D4 can be significantly reduced.

When the inversion output voltage is a positive half period, the current conversion process of the horizontal axial vertical pipe is as follows:

fig. 10 shows the state after the vertical tube is commutated to the horizontal tube, or before the horizontal tube is commutated to the vertical tube, when the inverted output voltage is in the positive half period. Before the horizontal axial vertical pipe is commutated, the first IGBT pipe Q1 and the fourth IGBT pipe Q4 are in a cut-off state, and the second IGBT pipe Q2 and the third IGBT pipe Q3 are in a conducting state. At this time, current flows from the inductor L to the load Z through the second freewheeling diode Dq2 and the third IGBT Q3, and the second IGBT Q2 is turned on but no current flows therethrough. And the first capacitor C1 and the second capacitor C2 are in a zero-voltage discharge state, and the current passing through the inductor L is equal to the current passing through the load Z.

Figure 11 illustrates the operation of the third stage of the process for horizontal to vertical tube flow reversal. In the third phase, the third IGBT Q3 is kept in the on state, the fourth IGBT Q4 is kept in the off state, the first IGBT Q1 is turned from the off state to the on state, and the second IGBT Q2 is turned from the on state to the off state. As shown in fig. 11, when first IGBT Q1 is turned on and second IGBT Q2 is turned off, the upper half bus voltage reversely pressurizes inductor L via first IGBT Q1, second freewheeling diode Dq2 and third IGBT Q3, and the current flowing through inductor L is forced to linearly decrease. At the same time, the upper half-bus supplies power to the load Z through the first IGBT tube Q1. The two circuits coexist and operate simultaneously. As the current through the inductor L is gradually reduced, the load current transitions to the current through the first IGBT transistor Q1. When the current flowing through inductor L is zero, second freewheeling diode Dq2 is turned off in the reverse direction, and since second IGBT Q2 is turned off, the current no longer flows through the middle arm.

At the moment when the first IGBT Q1 is turned on, the inductor L carries the load current, so that the first IGBT Q1 is turned on to be a zero current conduction, and the current of the first IGBT Q1 during the conduction process is established in a finite di/dt manner, so that the first IGBT Q1 is in a soft switching operating mode. The second IGBT Q2 also belongs to the soft switching mode, in which no current flows during the transition from the on state to the off state.

Fig. 12 illustrates the fourth stage of operation during the horizontal to vertical tube flow reversal. After the third stage is completed, the load Z output level is clamped at Vdc/2 level due to the voltage of the second capacitor C2 being zero. Therefore, as shown in fig. 16, the second capacitor C2 is charged by the upper half bus voltage through the first IGBT tube Q1, the third freewheeling diode Dq3, the third diode D3 and the inductor L. Due to the inductor L, when the second capacitor C2 is charged to Vdc, the third freewheeling diode Dq3 and the third diode D3 are turned off in reverse direction, the charging and commutation process is completed, and the state where the current flows to the load Z through the first IGBT Q1, that is, the state of fig. 7, is returned.

During the charging of the second capacitor C2, the third freewheeling diode Dq3 and the third diode D3 are turned on and off at a finite rate of current change di/dt, and therefore, the switching losses during the turning on and off of the third freewheeling diode Dq3 and the third diode D3 are very low, and belong to the soft-switching operation mode.

The commutation process when the inversion output voltage is a negative half cycle is similar to the commutation process when the inversion output voltage is a positive half cycle, and the vertical tube commutation or the horizontal tube commutation also needs to go through two stages, which is not described in detail herein.

When the conversion circuit works in rectification, the conversion circuit comprises two half cycles of a positive half cycle of alternating input voltage and a negative half cycle of the alternating input voltage, and each half cycle is divided into two processes of vertical pipe commutation and horizontal pipe commutation:

when the alternating current input voltage is in a positive half period, the vertical pipe current conversion process to the horizontal pipe is as follows:

fig. 13 shows the vertical tube before flow to the horizontal tube. Before the vertical horizontal tube is commutated, the first IGBT tube Q1 and the third IGBT tube Q3 are in a conducting state, and the second IGBT tube Q2 and the fourth IGBT tube Q4 are in a blocking state. The rectified current flows from the first freewheeling diode Dq1 to the bus. The third IGBT Q3 is conducting but no current flows through it. Since the third IGBT tube is turned on, the first capacitor C1 is in a zero-voltage discharge state. Since the first IGBT Q1 is turned on, the second capacitor C2 is charged to Vdc, and the current of the inductor L is zero.

Fig. 14 shows the operation of the first stage of the vertical tube to horizontal tube commutation process. In the first stage, the third IGBT Q3 is kept in the on state, and the fourth IGBT Q4 is kept in the off state. The first IGBT Q1 is turned from on to off, and the second IGBT Q2 is turned from off to on. As shown in fig. 14, in this process, since the first freewheeling diode Dq1 is in a conducting state, the first freewheeling diode Dq1, the third freewheeling diode Dq3, the second IGBT Q2 and the inductor L establish a loop with the input source Z. Due to the existence of the inductor L, the current passing through the middle bridge arm is linearly increased from zero; at the same time, the current through the first freewheeling diode Dq1 decreases linearly until the current through the inductor L increases to the rectified current, at which time the first freewheeling diode Dq1 turns off.

Due to the existence of the first freewheeling diode Dq1, the process of turning the first IGBT tube Q1 from on to off belongs to zero-voltage, zero-current turn-off. Due to the inductor L, the current linearly increases during the transition from off to on of the second IGBT Q2, so the on process of the second IGBT Q2 belongs to zero current conduction. Both are typical soft switching processes.

Fig. 15 shows the second stage of the standpipe to cross tube shortage flow process. After the first phase is completed, the first freewheeling diode Dq1 is turned off, and the second capacitor C2 starts to discharge through the second IGBT Q2, the fourth diode D4 and the inductor L. After discharging to zero. The second stage is completed.

When the alternating current input voltage is in a positive half period, the current conversion process of the transverse axial vertical pipe is as follows:

fig. 16 shows the state after the end of the vertical tube to horizontal tube commutation, i.e. before the horizontal tube to vertical tube commutation. At this time, the second capacitor C2 finishes discharging, and the rectified current is carried by the third freewheeling diode Dq3, the second IGBT Q2 and the inductor L. The first IGBT transistor Q1 and the fourth IGBT transistor Q4 are in an off state, and the second IGBT transistor Q2 and the third IGBT transistor Q3 are in an on state. Although the third IGBT tube Q3 is in the on state, no current flows. And the first capacitor C1 and the second capacitor C2 are both in a zero voltage discharge state. The current through the inductor L is the rectified current.

Figure 17 shows the operation of the horizontal to vertical tube flow reversal process. When the horizontal pipe is commutating to the vertical pipe, the third IGBT Q3 is kept in the on state, the fourth IGBT Q4 is kept in the off state, the first IGBT Q1 is turned from the off state to the on state, and the second IGBT Q2 is turned from the on state to the off state. During the turn-off of the second IGBT Q2, the rectified current passes from passing through the second IGBT Q2 to passing through the second capacitor C2 due to the presence of the second capacitor C2. The voltage of the second IGBT Q2 increases linearly from zero, and is turned off at zero voltage and zero current. When the input source Z charges the second capacitor C2 through the third freewheeling diode Dq3, the third diode D3 and the inductor L, the current flowing from the rectified current to the bus through the first freewheeling diode Dq1 gradually increases, and no current flows through the first IGBT Q1 due to the existence of the first freewheeling diode Dq1, so that the conduction process of the first IGBT Q1 is zero-current and zero-voltage conduction. From the above analysis, in the process of horizontal to vertical pipe commutation, the on and off processes of the first IGBT Q1 and the second IGBT Q2 are soft switching processes.

When the current of the inductor L gradually changes from the rectified current to zero, the second capacitor C2 is charged, the third diode D3 and the third freewheeling diode Dq3 are cut off, the first freewheeling diode Dq1 is turned on, and the whole commutation process is completed. Returning to the state of fig. 13.

The commutation process when the ac input voltage is in the negative half cycle is similar to the commutation process when the ac input voltage is in the positive half cycle, and the commutation process of the vertical tube to the horizontal tube or the commutation process of the horizontal tube to the vertical tube is similar, and the details are not described herein.

Fig. 5 shows a circuit diagram of a second embodiment of the T-type conversion circuit of the present invention. As shown in fig. 5, the second embodiment of the T-shaped inverter circuit includes two vertically arranged controllable switching devices, two horizontally arranged controllable switching devices, an inductor L, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a first capacitor C1, a second capacitor C2, a third polar capacitor C3, and a fourth polar capacitor C4.

The two transversely arranged controllable switching devices positioned on the middle bridge arm are respectively a second controllable switching device and a third controllable switching device, wherein the second controllable switching device adopts an IGBT unit and comprises a second IGBT tube Q2 and a second freewheeling diode Dq2 connected with the second IGBT tube Q2 in an anti-parallel manner; the third controllable switching device adopts an IGBT unit and comprises a third IGBT tube Q3 and a third freewheeling diode Dq3 connected in anti-parallel with the third IGBT tube Q3. Second IGBT tube Q2 and third IGBT tube Q3 are connected in series in reverse to the middle arm. The collector of the second IGBT tube Q2 is connected to the input and output ends; the emitter of the second IGBT tube Q2 is connected to the emitter of the third IGBT tube Q3; the collector of the third IGBT tube is connected to the inductor L; the other end of the inductor L is connected to the neutral line.

Second embodiment the principle and the first embodiment of soft switching of the controllable switching device and the diode during commutation are believed not to be described in detail here.

Fig. 6 shows a circuit diagram of a third embodiment of the T-type conversion circuit of the present invention. As shown in fig. 6, the second embodiment of the T-shaped inverter circuit includes two vertically arranged controllable switching devices, two horizontally arranged controllable switching devices, an inductor L, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, a first capacitor C1, a second capacitor C2, a third polar capacitor C3, and a fourth polar capacitor C4.

The middle bridge arm comprises two controllable switching devices, a fifth diode and a sixth diode which are transversely arranged. The two transversely arranged controllable switching devices are respectively a second controllable switching device and a third controllable switching device, wherein the second controllable switching device adopts an IGBT unit and comprises a second IGBT tube Q2 and a second freewheeling diode Dq2 connected with the second IGBT tube Q2 in an anti-parallel mode; the third controllable switching device adopts an IGBT unit and comprises a third IGBT tube Q3 and a third freewheeling diode Dq3 connected in anti-parallel with the third IGBT tube Q3. The collector of the second IGBT tube Q2 and the emitter of the third IGBT tube Q3 are connected to the input end and the output end; the emitter of the second IGBT Q2 is connected to the anode of the fifth diode D5, the collector of the third IGBT Q3 is connected to the cathode of the sixth diode D6, and the cathode of the fifth diode D5 and the anode of the sixth diode D6 are connected to one end of the inductor L; the other end of the inductor L is connected to the neutral line.

Third embodiment the principle of implementing soft switching by the controllable switching device and the diode in the commutation process is similar to that of the first embodiment, and will not be described in detail here.

As can be seen from the above three embodiments, in the T-type conversion circuit of the present invention, all the controllable switching devices and diode devices can implement soft switching, i.e., Zero Voltage Switching (ZVS), Zero Current Switching (ZCS) or Zero Voltage Zero Current Switching (ZVZCS), or on-off switching with limited dv/dt and di/dt. Therefore, the on-off loss of the controllable switch device is greatly reduced, and the working efficiency of the conversion circuit is improved; the power device is not easy to be broken down secondarily, and meanwhile dead time is eliminated.

The controllable switching device is switched on and off with a limited dv/dt and di/dt, so the system EMI electromagnetic interference is much more optimized than if soft switching is not implemented.

Because the on-off loss of the controllable switch device is reduced, the conversion device can work on the working frequency of the traditional conversion device in multiples, the parameter requirement of an output filter required by the conversion device is lowered, and the size can be reduced in multiples, so that the material cost is further reduced, the product size is reduced, and the product power density is improved.

Compared with the prior art, the invention only adds one inductor, four diodes and two capacitors, has less added devices, simple and compact structure and does not need to additionally add a controllable switch device and a control circuit.

Fig. 18 shows a circuit schematic of an embodiment of a three-phase inverter circuit of the present invention. As shown in fig. 18, the three-phase inverter circuit in the embodiment includes a first inverter circuit, a second inverter circuit, and a third inverter circuit; the first conversion circuit, the second conversion circuit and the third conversion circuit all adopt the T-shaped conversion circuit described in the first embodiment of the T-shaped conversion circuit; the neutral line of the first conversion circuit, the neutral line of the second conversion circuit and the neutral line of the third conversion circuit are connected with each other. Of course, the first conversion circuit, the second conversion circuit, and the third conversion circuit may be the T-type conversion circuit described in the second embodiment or the third embodiment of the T-type conversion circuit, and the same effects are obtained.

Claims

1. A T-type conversion circuit is characterized in that: the circuit comprises two controllable switching devices which are vertically arranged, two controllable switching devices which are horizontally arranged, an inductor, a first diode, a second diode, a third diode, a fourth diode, a first capacitor and a second capacitor;

the two vertically arranged controllable switching devices are connected in series, one end of each controllable switching device is connected with a positive bus, and the other end of each controllable switching device is connected with a negative bus;

the connection point between the two vertically arranged controllable switching devices is used as an input end and an output end;

the two controllable switching devices which are transversely arranged are positioned on the middle bridge arm; one end of the middle bridge arm is connected to the input and output end, and the other end of the middle bridge arm is connected to one end of the inductor; the other end of the inductor is connected to the neutral line;

among the two transversely arranged controllable switching devices, the controllable switching device meeting the first condition or the second condition is defined as a second controllable switching device, and the controllable switching device meeting the third condition or the fourth condition is defined as a third controllable switching device; the first condition is that the source or the emitter of the controllable switching device is connected to the inductor; the second condition is that the drain or collector of the controllable switch device is connected to the input and output end; the third condition is that the source or the emitter of the controllable switching device is connected to the input and output ends; the fourth condition is that the drain or collector of the controllable switching device is connected to the inductor;

the first diode and the second diode are connected in series, the cathode of the first diode is connected to the positive bus, the anode of the second diode is connected to the connection point of the inductor and the middle bridge arm, one end of the first capacitor is connected to the connection point of the first diode and the second diode, and the other end of the first capacitor is connected to the input and output end;

the third diode and the fourth diode are connected in series, the anode of the fourth diode is connected to the negative bus, and the cathode of the third diode is connected to the source electrode or the emitter electrode of the second controllable switching device; one end of the second capacitor is connected to the connection point of the third diode and the fourth diode, and the other end of the second capacitor is connected to the drain electrode or the collector electrode of the second controllable switching device.

2. A T-type inverter circuit as claimed in claim 1 wherein said second controllable switching device is connected in anti-series with said third controllable switching device, and wherein the drain or collector of the second controllable switching device is connected to the drain or collector of the third controllable switching device.

3. A T-type inverter circuit as claimed in claim 1 wherein said second controllable switching device is connected in anti-series with said third controllable switching device, and wherein the source or emitter of the second controllable switching device is connected to the source or emitter of the third controllable switching device.

4. A T-type inverter circuit as claimed in claim 1 wherein the intermediate leg further comprises a fifth diode and a sixth diode;

the source or the emitter of the third controllable switching device and the drain or the collector of the second controllable switching device are connected to the input and the output ends;

the source electrode or the emitter electrode of the second controllable switching device is connected to the anode electrode of the fifth diode;

the drain electrode or the collector electrode of the third controllable switching device is connected to the cathode electrode of the sixth diode;

the cathode of the fifth diode and the anode of the sixth diode are connected to the inductor.

5. A T-type conversion circuit as claimed in any one of claims 1 to 4, wherein any one of said two vertically arranged controllable switching devices is an IGBT unit or an MOS unit, and when an IGBT unit is used, said IGBT unit comprises an IGBT tube and a diode connected in anti-parallel with the IGBT tube; when the MOS unit is adopted, the MOS unit can be an MOS tube with a body diode or comprise an MOS tube without a body diode and an anti-parallel diode.

6. A T-type conversion circuit as claimed in any one of claims 1 to 4, wherein any one of said two laterally arranged controllable switching devices is an IGBT cell or an MOS cell, and when an IGBT cell is used, said IGBT cell comprises an IGBT tube and a diode connected in anti-parallel with the IGBT tube; when the MOS unit is adopted, the MOS unit can be an MOS tube with a body diode or comprise an MOS tube without a body diode and an anti-parallel diode.

7. A three-phase conversion circuit is characterized by comprising a first conversion circuit, a second conversion circuit and a third conversion circuit; the first conversion circuit, the second conversion circuit and the third conversion circuit adopt a T-shaped conversion circuit as claimed in any one of claims 1 to 6; the neutral line of the first conversion circuit, the neutral line of the second conversion circuit and the neutral line of the third conversion circuit are connected with each other.