AT525517A1 - Test device and arrangement with this - Google Patents

Abstract

A testing device (1) for isolated chips (4) with a test head (17) fitted with (test) needles (3) has contacts (10) which are arranged next to the test head (17). An arrangement for testing isolated chips (4) comprises a testing device (1) and a holder (5) for the chip (4) on which the contacts (10) rest.

Description

Arrangement comprising the test device.

Chips singulated (cut out) from wafers must be checked to see whether they are able to fulfill the function assigned to them. This is also important because damage to chips does not occur when chips are separated

can be excluded.

There are test devices for testing individual chips

known.

The known testing devices include a holder (chuck) to which the chip to be tested is held, in particular by negative pressure. The known testing devices also include a device for contacting the front side of the chip, which can be a probe card, for example. The back of the chip is electrically connected to the chuck. When carrying out a test process, switching processes with very rapidly changing currents are carried out on a chip, among other things. These are passed on to the chip via the (test) needles and the chuck. For this purpose lines are provided, on the one hand from the power source of the test device to the (test) needles and on the other hand to

guide Chuck.

The problem with these known test devices is that the lines, the (test) needles and the chuck form a conductor loop which, with regard to its electrical properties, represents an inductance. This is particularly troublesome since the parasitic inductances described, which are given by the conductor loops, have a desired

counteract rapid changes in current.

Inductances are kept at least small.

This object is achieved according to the invention with a

Testing apparatus having the features of claim 1.

The invention is also based on the object of providing an arrangement for the test device according to the invention

To make available.

This object is achieved with an arrangement according to claim 7.

Preferred and advantageous configurations of

arrangement according to the invention are the subject of the dependent claims.

Since the power source is not connected via the chuck in the testing device according to the invention, but via separate contacts which are placed on the top of the chuck when the testing process is carried out and which are arranged next to the (test) needles of the probe card, small conductor loops are formed achieved so that parasitic inductances so

are small that they no longer interfere with the testing process.

In the test device according to the invention, the additional contacts on the probe card can be arranged in such a way that they are placed on the chuck as close as possible to the (test) needles of the probe card. Additional contacts can be on one or both sides or around the (test) needles of the

Probe card to be arranged around.

For the practical use of the test device according to the invention, it is advantageous if the additional contacts are resilient like the (test) needles of the probe card

are trained. It is preferred that the spring stroke of

is, for example, of the order of 0.5 mm.

An advantage of the arrangement according to the invention is that because of the smaller trained conductor loops so low parasitic inductances occur that performing fast switching operations in the chip to be tested by the

Test device is not significantly hampered.

Further details and features of the invention result from the following description of preferred exemplary embodiments

based on the drawings. It shows:

1 schematically shows a known test arrangement,

2 shows a schematic of a test arrangement with a test device designed according to the invention,

3 shows an exemplary embodiment of a test device according to the invention,

4 shows an arrangement with a test device and a holder, and

Fig. 5 shows the arrangement of Fig. 4 with drawn

conductor loops.

An insert plate 9 is placed in a depression 11 in the upper side of a holder 5 (“chuck”). The insert plate 9 is electrically and thermally conductively connected to the base body of the holder 5 . The chip 4 lies on the insert plate 9. Bores 12 to which negative pressure is applied are provided in the insert plate 9, so that a chip 4 is held on the insert plate 9 by negative pressure. So the back of the chip 4 is on the insert plate 9 with the electrically conductive top

of the holder 5 in an electrically conductive connection.

Negative pressure, held.

From a power source 6, which supplies, for example, square-wave pulses, the (test) needles 3 of the probe card 2 are over

Lines 7 charged with electricity.

The power source 6 is in an electrically conductive connection via a further line 8 to the chuck 5 and thus to the rear side of the chip 4 . The lines 7 and 8 and the (test) needles 3 of the probe card 2 form large conductor loops, so that the associated parasitic inductances unfavorably impede fast switching processes during a test process or

slow it down.

In the test arrangement 1 according to the invention, shown schematically and greatly simplified in FIG. 2, additional contacts 10 are provided in addition to the (test) needles 3 in the probe card 2 . The contacts 10 are connected to the power source 6 via lines 8 . The lines 7 which supply the (test) needles 3 with current are also connected to the power source 6 . The contacts 10 can be on one side of the (test) needles 3 of the probe card 2, on opposite sides of the (test) needles 3 or around the

(Test) needles 3 of the probe card 2 can be arranged.

The (test) needles 3 of the probe card 2 are designed to be resilient, with the spring deflection being on the order of 50 to 100 μm. The contacts 10 are designed as spring contacts, where

the spring deflection of the contacts 10, for example, in the range of 0.5

Contacting the front of the chuck 5 is achieved.

It can be seen that in the test arrangement 1 according to the invention, the conductor loops formed by the lines 7 and 8, the (test) needles 3 and the contacts 10 are significantly smaller (see FIG. 5) than the above-mentioned conductor loops of a known test arrangement 1 ( see figure 1). When using a test arrangement 1 according to the invention for testing isolated chips 4, even fast switching processes are no longer possible during testing due to the now significantly reduced parasitic inductance

disadvantageously handicapped or slowed down.

It should be pointed out that, for the sake of clarity, only one line 7 to one of the (test) needles 3 is shown in FIG. 2 . Likewise, only one line 8 to one of the additional contacts 10 is shown for the sake of clarity. It is desirable in itself that in the test arrangement 1 according to the invention each (test) needle 3 is connected to the power source 6 independently of the other (test) needles 3 . In practice, with the test arrangement 1 according to the invention, either each (test) needle 3 can be connected to the power source independently of the other (test) needles, but groups of (test) needles 3 can also be combined or all (test) )Needles 3 must be connected together to the power source 6. In practice, several groups of (test) needles 3 can be connected to a common line 7 . The number of lines 7 is thus adapted to the number of channels in a connected test system. The test current can therefore be monitored channel by channel and limited if necessary. Damage to the (test) needles 3 due to high test current (e.g. due to a defective chip 4) can be avoided. The same applies to the lines

8, which connect the contacts 10 to the power source 6.

Test device 1 provided with a test system.

Although in FIG. 3 the test device 1 is provided with a test head 17 designed as a vertical test head (“vertical needle card”), other test heads 17 fitted with (test) needles 3, for example needle cards of the cantilever type, are also possible within the scope of the invention.

Needle spiders, considered.

The arrangement according to the invention shown in FIG. 4 comprises a test device 1 according to the invention according to FIG

is.

The holder 5 has a base body 21 in which channels 22 that can be subjected to negative pressure are provided. A recess 11 is provided in the upper side of the base body 21 of the holder 5 when in the position of use. The recess 11 accommodates an exchangeable insert plate 9 . In the insert plate 9 there is a recess 12 in its upper side when in use

provided, in which a test chip 4 is inserted. The

maintained the channels 22 applied negative pressure.

A sense contact 23 is accommodated in the base body 21 of the holder 5 and rests against the chip 4 from below. The sense contact 23 is electrically conductively connected via a bridge 24 to contact fingers 25 which are accommodated in the base body 21 and on which—cf. FIG. The sense contact 23 and

the contact fingers 25 have the following task:

The voltage drop across the chip 4 is an important parameter for monitoring and evaluating test processes. The voltage measurement with current-carrying contacts would result in a falsification of the measurement results, since line and connection resistances (depending on the current) themselves produce a voltage drop. For this reason, contact is made directly on the top and bottom of the chip with separately routed sense lines, which allow currentless voltage measurement. The sense contacts on the top of the chip are made with specially designed sense contacts (similar to the current-carrying test needles 3). The sense (spring) contact 23, which is designed to be electrically isolated from the rest of the chuck 5, rests on the underside of the chip. The contact fingers 25 are on selected (spring) contacts 10 of

Test device 1 on.

From the illustration in FIG. 4 it can be seen that the contacts 10 of the test device 1 arranged next to the (test) needles bear against the base body 21 of the holder 5 and are in electrically conductive contact with the base body 21 of the holder 5 . The purpose of the large number of contacts 10 on the test device 1 is to measure the current strength of electrical test currents in

to limit the contacts 10.

(opposing) magnetic fields impeding the test current.

In summary, an embodiment of the invention such as

be described as follows:

A testing device 1 for isolated chips 4 with a test head 17 fitted with (test) needles 3 has contacts 10 which are arranged next to the test head 17 . An arrangement for testing isolated chips 4 comprises a testing device 1 and a holder 5 for the chip 4, on which the contacts 10

issue.

Claims (1)

Testing device (1) for isolated chips (4) with a test head (17) fitted with (test) needles (3), characterized in that the testing device (1) has contacts (10) has, which are arranged next to the test head (17). Device according to claim 1, characterized in that the (test) needles (3) and the contacts (10) on the same Side of the test device (1) are arranged. Device according to claim 1 or 2, characterized in that the contacts (10) in the Testing device (1) are spring-loaded. Device according to Claim 3, characterized in that the spring deflection of the contacts (10) is greater than the spring deflection of the (test) needles (3) of the test head (17). Device according to one of claims 1 to 4, characterized in that the contacts (10) at least are arranged on one side next to the (test) needles (3). Device according to one of Claims 1 to 5, characterized in that the test head (17) takes the form of a vertical needle card or a cantilever needle card is trained. Arrangement for testing isolated chips (4), comprising a testing device (1) according to one of Claims 1 to 6 and a holder (5) for the chip (4), with an insert plate ( 9) in which the chip (4) is held, is provided, characterized in that the contacts (10) of the test device (1) in the position of use on the base body (21) of the holder 11. 10 (5) abut directly. Arrangement according to claim 7, characterized in that the contacts (10) on the holder (5) next to the insert plate (9). Arrangement according to claim 7 or 8, characterized, that the contact fingers (25) with a sense contact (23), the one at the back one at that Holder (5) specified Chips (4) is created electrically conductive, and that in which Base body (21) of the holder (5) Contact finger (25) are included, and that selected contacts (10) of Checking device (1) rest against contact fingers (25). Arrangement according to claim 9, characterized in that the contact fingers (25) in the base body (21) of the holder (5) in an area that is outside of the probe (17). Test device (1) is arranged. Arrangement according to claim 9 or 10, characterized, that the free ends of the contact fingers (25) in the Test device (1) facing surface of the base body (21) of the holder (5).